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For most CPU ports this was already the case. This makes it possible to use
the size as an object alignment using RTEMS_ALIGNED().
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Directly use "static inline" which is available in C99 and later. This brings
the RTEMS implementation closer to standard C.
Close #3935.
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All CPU ports used the same _CPU_Counter_difference() implementation. Remove
this CPU port interface and mandate a monotonically increasing CPU counter.
Close #3456.
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Added two pragmas to address, and changed the value of
AARCH64_EXCEPTION_MAKE_ENUM_64_BIT to INT_MAX because the old value was not
in range of an int.
Updates #4662
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This function was never actually used and is dead code.
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The previous SMP multitasking start assumed that the initial heir thread of a
processor starts execution in _Thread_Handler(). The _Thread_Handler() sets
the interrupt state explicitly by _ISR_Set_level() before it calls the thread
entry. Under certain timing conditions, processors may perform an initial
context switch to a thread which already executes its thread body (see
smptests/smpstart01). In this case, interrupts are disabled after the context
switch on targets which do not save/restore the interrupt state during a
context switch (aarch64, arm, and riscv).
Close #4627.
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This adds the function implementations necessary to add exception
extensions support to AArch64.
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All other architectures use uint32_t for interrupt levels and there is
no reason not to do so on AArch64.
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This adds SMP support for AArch64 in cpukit and for the ZynqMP BSPs.
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Move _CPU_Fatal_halt() declaration to <rtems/score/cpuimpl.h> and make sure it
is a proper declaration of a function which does not return. Fix the type of
the error code. If necessary, add the implementation to cpu.c. Implementing
_CPU_Fatal_halt() as a function makes it possible to wrap this function for
example to fully test _Terminate().
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Remove _CPU_SMP_Processor_event_broadcast() and
_CPU_SMP_Processor_event_receive(). These functions are hard to use since they
are subject to the lost wake up problem.
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The _CPU_ISR_Is_enabled() function operates on ISR cookies and so must
mask off the appropriate status bits. This also fixes the naming of the
parameters of the _CPU_ISR_* functions to indicate use of ISR cookies
instead of interrupt enable/disable levels.
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This ensures that the saved SP register is sized appropriately depending
on the chosen ABI and prevents a warning in the libmisc stack checker.
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Provide RTEMS_NO_RETURN also in case RTEMS_DEBUG is defined to prevent errors
like this:
error: no return statement in function returning non-void [-Werror=return-type]
Use C11 and C++11 standard means to declare a no-return function.
Close #4122.
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This adds a CPU port for AArch64(ARMv8) with support for exceptions and
interrupts.
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