diff options
author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2021-07-26 15:43:00 -0500 |
---|---|---|
committer | Joel Sherrill <joel@rtems.org> | 2021-09-21 08:58:32 -0500 |
commit | 5f652cb27e0134362e0160135124352539315845 (patch) | |
tree | a370df31b31472331566975319b8fc9fa950d4d4 /cpukit/score/cpu/aarch64/include/rtems/score/cpu.h | |
parent | bsps/gicv2: Allow BSPs to define IRQ attributes (diff) | |
download | rtems-5f652cb27e0134362e0160135124352539315845.tar.bz2 |
cpukit: Add AArch64 SMP Support
This adds SMP support for AArch64 in cpukit and for the ZynqMP BSPs.
Diffstat (limited to 'cpukit/score/cpu/aarch64/include/rtems/score/cpu.h')
-rw-r--r-- | cpukit/score/cpu/aarch64/include/rtems/score/cpu.h | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h index dacc18638e..82f74193a2 100644 --- a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h @@ -134,9 +134,9 @@ #ifdef RTEMS_SMP #if defined(AARCH64_MULTILIB_VFP) - #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x70 + #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0xb8 #else - #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x30 + #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x78 #endif #endif @@ -191,12 +191,12 @@ typedef struct { static inline void _AARCH64_Data_memory_barrier( void ) { - __asm__ volatile ( "dmb LD" : : : "memory" ); + __asm__ volatile ( "dmb SY" : : : "memory" ); } static inline void _AARCH64_Data_synchronization_barrier( void ) { - __asm__ volatile ( "dsb LD" : : : "memory" ); + __asm__ volatile ( "dsb SY" : : : "memory" ); } static inline void _AARCH64_Instruction_synchronization_barrier( void ) @@ -313,6 +313,11 @@ void _CPU_ISR_install_vector( */ void _CPU_Context_switch( Context_Control *run, Context_Control *heir ); +RTEMS_NO_RETURN void _CPU_Context_switch_no_return( + Context_Control *executing, + Context_Control *heir +); + RTEMS_NO_RETURN void _CPU_Context_restore( Context_Control *new_context ); #ifdef RTEMS_SMP |