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* score: Remove the Giant lockSebastian Huber2016-05-201-140/+0
| | | | Update #2555.
* score: Rename _ISR_Disable() and _ISR_Enable()Sebastian Huber2016-05-201-10/+0
| | | | | | | | | Rename _ISR_Disable() into _ISR_Local_disable(). Rename _ISR_Enable() into _ISR_Local_enable(). Remove _Debug_Is_owner_of_giant(). This is a preparation to remove the Giant lock. Update #2555.
* score: Rename _ISR_Disable_without_giant()Sebastian Huber2016-05-201-8/+8
| | | | | | | | | Rename _ISR_Disable_without_giant() into _ISR_Local_disable(). Rename _ISR_Enable_without_giant() into _ISR_Local_enable(). This is a preparation to remove the Giant lock. Update #2555.
* score: Remove assertSebastian Huber2015-06-031-6/+0
| | | | | | With the introduction of fine grained locking there is no longer a one-to-one connection between the Giant lock nest level and the thread dispatch disable level.
* score: Fix assertSebastian Huber2015-05-191-2/+4
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* score: Improve assertMartin Galvan2015-04-171-1/+5
| | | | | While cpu_self->thread_dispatch_disable_level shouldn't ever be zero, it would be better to check it before doing the decrement.
* score: Add parameter to Giant acquire/releaseSebastian Huber2015-03-041-4/+4
| | | | Update #2273.
* score: Use common names for per-CPU variablesSebastian Huber2014-04-221-22/+22
| | | | | | | | | | | | | | | | Use "cpu" for an arbitrary Per_CPU_Control variable. Use "cpu_self" for the Per_CPU_Control of the current processor. Use "cpu_index" for an arbitrary processor index. Use "cpu_index_self" for the processor index of the current processor. Use "cpu_count" for the processor count obtained via _SMP_Get_processor_count(). Use "cpu_max" for the processor maximum obtained by rtems_configuration_get_maximum_processors().
* score: Simplify Giant lockSebastian Huber2014-04-221-9/+7
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* Change all references of rtems.com to rtems.org.Chris Johns2014-03-211-1/+1
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* score: Delete _Assert_Owner_of_giant()Sebastian Huber2014-03-191-5/+3
| | | | | Add _Debug_Is_owner_of_giant(). This makes it possible to assert the opposite.
* score: Add SMP lock profiling supportSebastian Huber2014-03-141-1/+1
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* score: Add per-CPU profilingSebastian Huber2014-03-141-0/+3
| | | | | | | Add per-CPU profiling stats API. Implement the thread dispatch disable level profiling. The interrupt profiling must be implemented in CPU port specific parts (mostly assembler code). Add a support function _Profiling_Outer_most_interrupt_entry_and_exit() for this purpose.
* score: Add local context to SMP lock APISebastian Huber2014-03-111-15/+15
| | | | | | | | | | | Add a local context structure to the SMP lock API for acquire and release pairs. This context can be used to store the ISR level and profiling information. It may be later used to enable more sophisticated lock algorithms, e.g. MCS locks. There is only one lock that cannot be used with a local context. This is the per-CPU lock since here we would have to transfer the local context through a context switch which is very complicated.
* score: Delete _Thread_Dispatch_set_disable_level()Sebastian Huber2014-03-061-40/+0
| | | | | This function was only used in some tests and can be replaced with other functions.
* score: Add and use _Giant_Drop()Sebastian Huber2014-03-061-0/+13
| | | | New test smptests/smpfatal03.
* smp: Add and use _Assert_Owner_of_giant()Sebastian Huber2013-08-301-10/+24
| | | | | | | | | | | | | | Add and use _ISR_Disable_without_giant() and _ISR_Enable_without_giant() if RTEMS_SMP is defined. On single processor systems the ISR disable/enable was the big hammer which ensured system-wide mutual exclusion. On SMP configurations this no longer works since other processors do not care about disabled interrupts on this processor and continue to execute freely. On SMP in addition to ISR disable/enable an SMP lock must be used. Currently we have only the Giant lock so we can check easily that ISR disable/enable is used only in the right context.
* smp: Fix warningsSebastian Huber2013-08-231-1/+0
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* score: Per-CPU thread dispatch disable levelSebastian Huber2013-08-091-43/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a per-CPU thread dispatch disable level. So instead of one global thread dispatch disable level we have now one instance per processor. This is a major performance improvement for SMP. On non-SMP configurations this may simplifiy the interrupt entry/exit code. The giant lock is still present, but it is now decoupled from the thread dispatching in _Thread_Dispatch(), _Thread_Handler(), _Thread_Restart_self() and the interrupt entry/exit. Access to the giant lock is now available via _Giant_Acquire() and _Giant_Release(). The giant lock is still implicitly acquired via _Thread_Dispatch_decrement_disable_level(). The giant lock is only acquired for high-level operations in interrupt handlers (e.g. release of a semaphore, sending of an event). As a side-effect this change fixes the lost thread dispatch necessary indication bug in _Thread_Dispatch(). A per-CPU thread dispatch disable level greatly simplifies the SMP support for the interrupt entry/exit code since no spin locks have to be acquired in this area. It is only necessary to get the current processor index and use this to calculate the address of the own per-CPU control. This reduces the interrupt latency considerably. All elements for the interrupt entry/exit code are now part of the Per_CPU_Control structure: thread dispatch disable level, ISR nest level and thread dispatch necessary. Nothing else is required (except CPU port specific stuff like on SPARC).
* smp: Delete _ISR_Disable_on_this_core(), etc.Sebastian Huber2013-07-301-4/+4
| | | | | | | | | | | | | | | | | | | | Delete _ISR_Enable_on_this_core(), _ISR_Flash_on_this_core(), _ISR_SMP_Disable(), _ISR_SMP_Enable(), _ISR_SMP_Flash(). The ISR disable/enable interface has no parameter to pass a specific object. Thus it is only possible to implement a single global lock object with this interface. Using the ISR disable/enable as the giant lock on SMP configurations is not feasible. Potentially blocking resource obtain sequences protected by the thread dispatch disable level are subdivided into smaller ISR disabled critical sections. This works since on single processor configurations there is only one thread of execution that can block. On SMP this is different (image a mutex obtained concurrently by different threads on different processors). The thread dispatch disable level is currently used as the giant lock. There is not need to complicate things with this unused interface.
* score: Create object implementation headerSebastian Huber2013-07-261-1/+0
| | | | | | Move implementation specific parts of object.h and object.inl into new header file objectimpl.h. The object.h contains now only the application visible API.
* score: Create states implementation headerSebastian Huber2013-07-261-1/+0
| | | | | | Move implementation specific parts of states.h and states.inl into new header file statesimpl.h. The states.h contains now only the application visible API.
* score: Merge sysstate API into one fileSebastian Huber2013-07-241-1/+0
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* smp: Add and use _CPU_SMP_Get_current_processor()Sebastian Huber2013-07-171-3/+3
| | | | | | | | | | Add and use _SMP_Get_current_processor() and rtems_smp_get_current_processor(). Delete bsp_smp_interrupt_cpu(). Change type of current processor index from int to uint32_t to match _SMP_Processor_count type.
* score: Add and use _Thread_Dispatch_is_enabled()Sebastian Huber2013-06-141-8/+0
| | | | | Delete _Thread_Dispatch_in_critical_section() and _Thread_Is_dispatching_enabled().
* smp: Fix _Thread_Dispatch_decrement_disable_levelSebastian Huber2013-06-121-1/+7
| | | | | | We must obtain the processor ID after interrupts are disabled since a non-optimizing compiler may store the value on the stack and read it back.
* smp: Protect decrement operationSebastian Huber2013-06-121-4/+4
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* score: Move thread dispatch content to new fileSebastian Huber2013-06-071-1/+1
| | | | | | | Move thread dispatch declarations and inline functions to new header <rtems/score/threaddispatch.h> to make it independent of the Thread_Control structure. This avoids a cyclic dependency in case thread dispatch functions are used for the object implementation.
* smp: New SMP lock APISebastian Huber2013-05-311-42/+44
| | | | | | | | | | | | | | Move the SMP lock implementation to the CPU port. An optimal SMP lock implementation is highly architecture dependent. For example the memory models may be fundamentally different. The new SMP lock API has a flaw. It does not provide the ability to use a local context for acquire and release pairs. Such a context is necessary to implement for example the Mellor-Crummey and Scott (MCS) locks. The SMP lock is currently used in _Thread_Disable_dispatch() and _Thread_Enable_dispatch() and makes them to a giant lock acquire and release. Since these functions do not pass state information via a local context there is currently no use case for such a feature.
* score misc: Score misc: Clean up Doxygen #6 (GCI 2012)Christopher Kerl2012-11-291-2/+8
| | | | | | | This patch is a task from GCI 2012 which improves the Doxygen comments in the RTEMS source. http://www.google-melange.com/gci/task/view/google/gci2012/7976215
* Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill2012-05-111-2/+0
| | | | | | | | | | | | Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
* 2011-08-22 Jennifer Averett <Jennifer.Averett@OARcorp.com>Jennifer Averett2011-08-221-4/+2
| | | | | | | | PR 1876 * score/Makefile.am, score/include/rtems/score/isr.h, score/src/isr.c, score/src/smp.c, score/src/smplock.c, score/src/threaddispatch.c, score/src/threaddispatchdisablelevel.c: Add smp isr support. * score/src/isrsmp.c: New file.
* 2011-05-23 Jennifer Averett <Jennifer.Averett@OARcorp.com>Jennifer Averett2011-05-231-0/+133
* score/Makefile.am, score/include/rtems/score/thread.h, score/inline/rtems/score/thread.inl: Add smp support to dispable dispatch level accesses. * score/src/threaddispatchdisablelevel.c: New file.
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