rtems - RTEMS Kernel, file-systems, drivers, BSPs, samples, and testsuite.

	Commit message (Collapse)	Author	Age	Files	Lines
*	arm: Improve Doxygen file comments	Sebastian Huber	2023-05-26	1	-2/+5
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*	arm: Fix Armv7-M TLS support	Sebastian Huber	2022-11-10	1	-1/+1
\| \| \| \| \| \| \|	Set the thread ID register in the CPU context. Update #3835. Close #4753.
*	score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT	Sebastian Huber	2022-10-14	1	-1/+1
\| \| \| \|	Update #3835.
*	cpukit/: Scripted embedded brains header file clean up	Joel Sherrill	2022-03-10	1	-6/+0
\| \| \| \|	Updates #4625.
*	score/cpu/arm: Change license to BSD-2	Joel Sherrill	2022-02-28	1	-3/+22
\| \| \| \|	Updates #3053.
*	Canonicalize config.h include	Sebastian Huber	2020-04-16	1	-1/+1
\| \| \| \| \| \| \| \|	Use the following variant which was already used by most source files: #ifdef HAVE_CONFIG_H #include "config.h" #endif
*	Change all references of rtems.com to rtems.org.	Chris Johns	2014-03-21	1	-1/+1
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*	Add thread-local storage (TLS) support	Sebastian Huber	2014-02-04	1	-1/+7
\| \| \| \| \|	Tested and implemented on ARM, m68k, PowerPC and SPARC. Other architectures need more work.
*	arm: Include <rtems/score/cpu.h>	Sebastian Huber	2013-01-07	1	-2/+1
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*	score misc: Clean up Doxygen GCI Task #12	Alex Ivanov	2012-12-07	1	-0/+6
\| \| \| \|	http://www.google-melange.com/gci/task/view/google/gci2012/7983217
*	2011-09-24 Sebastian Huber <sebastian.huber@embedded-brains.de>	Sebastian Huber	2011-09-24	1	-0/+44
	* rtems/score/armv7m.h, armv7m-context-initialize.c, armv7m-context-restore.c, armv7m-context-switch.c, armv7m-exception-handler-get.c, armv7m-exception-handler-set.c, armv7m-exception-priority-get.c, armv7m-exception-priority-set.c, armv7m-initialize.c, armv7m-isr-dispatch.c, armv7m-isr-enter-leave.c, armv7m-isr-level-get.c, armv7m-isr-level-set.c, armv7m-isr-vector-install.c, armv7m-multitasking-start-stop.c: New files. * Makefile.am, preinstall.am: Reflect changes above. * rtems/score/arm.h: Define ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M. * rtems/score/cpu.h, cpu_asm.S, cpu.c, arm_exc_abort.S, arm_exc_handler_high.c, arm_exc_handler_low.S, arm_exc_interrupt.S: Define CPU_HAS_HARDWARE_INTERRUPT_STACK to FALSE. Use ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M.