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* bsps/arm: Mark functions in start.SSebastian Huber2022-09-221-0/+2
| | | | | | | Add the function type to _start() and bsp_start_hook_0_done() so that the linker can generate ARM/Thumb interworking code. Update #4202.
* bsps/arm: Add comment about banked FIQ registersSebastian Huber2022-09-221-0/+1
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* bsps: Fix .data.rel.ro placementSebastian Huber2022-08-121-1/+1
| | | | | | | The .data.rel.ro* linker input section pattern accidentally matches with writeable data those symbol name starts with "ro". Close #4701.
* bsps: Sort .noinit* sectionsSebastian Huber2022-07-151-1/+1
| | | | | | | | Sort the .noinit* input sections by name first, then by alignment if two sections have the same name. This allows the placement of begin/end symbols to initialize some areas with a special value. Update #4678.
* bsps/arm/shared: Change license to BSD-2Joel Sherrill2022-07-0813-39/+286
| | | | Updates #3053.
* bsps/arm: MP core timer setting off by oneChris Johns2022-06-151-1/+1
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* bsp/arm: allocate .rtemsstack on REGION_STACK instead of on REGION_WORKKarel Gardas2022-05-231-1/+1
| | | | | | | | REGION_WORK may be backed by external RAM which may not be initialized in a time we need stack to work well. E.g. code loaded in flash, stack allocated on in-cpu SRAM and data (REGION_WORK) on external SDRAM. Sponsored-By: Precidata
* bsps/arm: Fix bsp_start_memcpy() for ARMv7-ARSebastian Huber2022-03-141-0/+4
| | | | Synchronize data and instruction streams.
* bsps/arm/: Scripted embedded brains header file clean upJoel Sherrill2022-03-1017-102/+0
| | | | Updates #4625.
* build: Remove old build systemSebastian Huber2021-09-211-11/+0
| | | | | Close #3250. Close #4081.
* bsps/arm: More robust SMP startSebastian Huber2021-08-121-2/+14
| | | | | Do not continue execution on processors which are not configured to prevent the use of arbitrary memory for the initialization stack.
* bsps/irq: bsp_interrupt_facility_initialize()Sebastian Huber2021-07-271-3/+1
| | | | | | Do not return a status code in bsp_interrupt_facility_initialize() since this leads to unreachable code in bsp_interrupt_initialize(). Use RTEMS_DEBUG assertions in bsp_interrupt_facility_initialize() if necessary.
* bsps/irq: bsp_interrupt_vector_disable()Sebastian Huber2021-07-261-1/+2
| | | | | | Return a status code for bsp_interrupt_vector_disable(). Update #3269.
* bsps/irq: bsp_interrupt_vector_enable()Sebastian Huber2021-07-261-1/+2
| | | | | | Return a status code for bsp_interrupt_vector_enable(). Update #3269.
* bsps/irq: Add rtems_interrupt_is_pending()Sebastian Huber2021-07-261-0/+11
| | | | | | Add a default implementation which just returns RTEMS_UNSATISFIED. Update #3269.
* bsps/irq: Add rtems_interrupt_get_attributes()Sebastian Huber2021-07-261-0/+8
| | | | | | | Add a default implementation which clears the attributes to zero and just returns RTEMS_SUCCESSFUL for valid parameters. Update #3269.
* bsps/irq: Add rtems_interrupt_raise()Sebastian Huber2021-07-261-0/+12
| | | | | | | | | Add rtems_interrupt_raise_on() and rtems_interrupt_clear(). Add a default implementation which just returns RTEMS_UNSATISFIED for valid parameters. Update #3269.
* bsps/irq: Add rtems_interrupt_vector_is_enabled()Sebastian Huber2021-07-261-0/+11
| | | | | | | Add a default implementation which just returns RTEMS_UNSATISFIED for valid parameters. Update #3269.
* bsps/arm: Fix SMP startSebastian Huber2021-07-091-0/+6
| | | | | | | | Skip the data cache initialization if we are a secondary processor. The bug was introduced by e164df5e33608576443b4cd5923a9046358ee773 and did not show up in tests using Qemu since the data cache behaviour is not emulated.
* bsps/arm: Add start up support for ARMv6 RPi ModelsPranav Dangi2021-07-071-1/+7
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* bsps/irq: Use BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-242-2/+2
| | | | | | Use BSP_INTERRUPT_VECTOR_COUNT instead of BSP_INTERRUPT_VECTOR_MAX. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MINSebastian Huber2021-06-241-1/+1
| | | | | | | | | | Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector numbers start with zero. The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit and building all BSPs. Update #3269.
* bsps: Support RTEMS_NOINIT in linkcmdsSebastian Huber2021-05-021-0/+7
| | | | Update #3866.
* bsps/arm: Set MSP in ARMv7-M start codeSebastian Huber2021-04-211-0/+8
| | | | | | Set the Main Stack Pointer (MSP) to the ISR stack area end just in case we run using the Process Stack Pointer (PSP). This helps if applications are started by a boot loader.
* bsps: Remove networking driversVijay Kumar Banerjee2021-04-071-1839/+0
| | | | Update #3850
* bsps: Add missing DWARF 5 sectionsSebastian Huber2021-01-261-3/+5
| | | | Sort alphabetically.
* bsps: Support DWARF 5 sectionsSebastian Huber2021-01-251-8/+13
| | | | GCC 11 uses DWARF 5 by default.
* bsps: Use header file for GIC architecture supportSebastian Huber2020-12-231-56/+0
| | | | | | This avoids a function call overhead in the interrupt dispatching. Update #4202.
* bsps/arm: Invalidate TLB in start.SSebastian Huber2020-12-231-0/+9
| | | | Update #4202.
* bsps/arm: Clear SCTLR[M, I, A, C] in start.SSebastian Huber2020-12-231-2/+35
| | | | | | | Initialize the data and unified cache levels. Invalidate the instruction cache levels. Update #4202.
* bsps/arm: Add arm-data-cache-loop-set-way.hSebastian Huber2020-12-231-62/+9
| | | | | | This makes it possible to reuse this loop. Update #4202.
* bsps/arm: Remove optional start hook argumentsSebastian Huber2020-12-231-37/+26
| | | | | | | The start hook arguments are not used by a BSP. Removing them avoids the need for a stack during the very early system initialization. Update #4202.
* bsps/arm: Invalidate branch predictors earlierSebastian Huber2020-12-231-0/+11
| | | | | | | Make sure the branch predictors are invalidated before the first branch is executed. Update #4202.
* bsps/arm: Set VBAR in start.SSebastian Huber2020-12-231-1/+27
| | | | | | | | | | Set the VBAR to the vector table in the start section before bsp_start_hook_0() is called to earlier handle exceptions in RTEMS. Set the VBAR to the normal vector table in start.S for the main processor. Secondary processors set it in bsp_start_hook_0(). Update #4202.
* bsps: Remove gicvx_interrupt_dispatch()Sebastian Huber2020-12-161-5/+0
| | | | | | Avoid one level of indirection. Update #4202.
* bsps/arm/imx*: Fix location of shared headersChristian Mauderer2020-12-144-355/+0
| | | | | | | When moving the headers from the imx BSP to the shared area, the wrong directory has been selected. This patch fixes that problem. Update #4180
* bsps: Remove ARM GIC SGI target filterSebastian Huber2020-12-101-1/+0
| | | | | | | Remove the target filter for software-generated interrupts since this feature is not supported by the affinity routing in GICv3. Update #4202.
* bsps: Fix GICv3 arm_gic_trigger_sgi()Sebastian Huber2020-12-101-1/+1
| | | | | | | | Use the targets parameter to determine the targets of the SGI. Change targets parameter type to 32-bit to ease the parameter passing. GICv3 supports up to 16 targets. Update #4202.
* arm/cache-cp15: Support Armv8Sebastian Huber2020-12-101-13/+12
| | | | Update #4202.
* bsps: Move ARM GICv2 driver to bsps/sharedKinsey Moore2020-12-022-287/+1
| | | | | This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
* bsps: Move zynq-uart to bsps/sharedKinsey Moore2020-12-022-361/+0
| | | | | This moves the zynq-uart driver from bsps/arm/shared to bsps/shared to accomodate use by AArch64 BSPs.
* bsp/imxrt: Add new BSPChristian Mauderer2020-11-201-0/+5
| | | | Update #4180
* bsps/imx: Move imx-gpio to arm/sharedChristian Mauderer2020-11-203-0/+560
| | | | Update #4180
* imx: Move imx_iomux to arm/sharedChristian Mauderer2020-11-205-0/+637
| | | | Update #4180
* bsps/arm: Sort fast text/data sectionsSebastian Huber2020-10-211-2/+2
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* bsps/arm: Add support for MPU region alignmentSebastian Huber2020-10-211-0/+21
| | | | Update #3910.
* bsps: Break out AArch32 GICv3 supportKinsey Moore2020-10-053-330/+62
| | | | | This breaks out AArch32-specific code so that the shared GICv3 code can be reused by other architectures.
* bsps: Break out AArch32 portions of GPT driverKinsey Moore2020-10-052-211/+74
| | | | | | This breaks AArch32-specific portions of the ARM GPT driver into their own file so that the generic code can be moved for reuse by other architectures.
* Move ARM PL011 UART driverKinsey Moore2020-10-051-91/+0
| | | | This UART driver is now needed for BSPs other than ARM.
* arm: Fix arm_cp15_set_translation_table_entries()Sebastian Huber2020-09-171-1/+1
| | | | | | | | In a multi-processor system we must broadcast the TLB maintenance operation to the Inner Shareable domain to ensure that the other processors update their TLB caches accordingly. Close #4068.
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