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authorSebastian Huber <sebastian.huber@embedded-brains.de>2021-08-04 14:21:34 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2021-08-12 10:04:11 +0200
commit59472042ec0ef4b501df675f4df75e377994c92c (patch)
tree166041afc39d65df712115f6c298db494d75c035 /bsps/arm/shared
parentTest needed for timer_create with CLOCK_MONOTONC (diff)
downloadrtems-59472042ec0ef4b501df675f4df75e377994c92c.tar.bz2
bsps/arm: More robust SMP start
Do not continue execution on processors which are not configured to prevent the use of arbitrary memory for the initialization stack.
Diffstat (limited to 'bsps/arm/shared')
-rw-r--r--bsps/arm/shared/start/start.S16
1 files changed, 14 insertions, 2 deletions
diff --git a/bsps/arm/shared/start/start.S b/bsps/arm/shared/start/start.S
index bc87e7b36d..55b5b8d78c 100644
--- a/bsps/arm/shared/start/start.S
+++ b/bsps/arm/shared/start/start.S
@@ -197,9 +197,21 @@ _start:
/* Read MPIDR and get current processor index */
mrc p15, 0, r7, c0, c0, 5
and r7, #0xff
-#endif
-#ifdef RTEMS_SMP
+ /*
+ * Check that this is a configured processor. If not, then there is
+ * not much what can be done since we do not have a stack available for
+ * this processor. Just loop forever in this case.
+ */
+ ldr r1, =_SMP_Processor_configured_maximum
+ ldr r1, [r1]
+ cmp r1, r7
+ bgt .Lconfigured_processor
+.Linvalid_processor_wait_for_ever:
+ wfe
+ b .Linvalid_processor_wait_for_ever
+.Lconfigured_processor:
+
/*
* Get current per-CPU control and store it in PL1 only Thread ID
* Register (TPIDRPRW).