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* dev/serial: Add Zynq UART kernel I/O supportSebastian Huber2024-04-041-2/+0
| | | | | | Replace the BSP_CONSOLE_MINOR BSP option for the Xilinx Zynq BSPs with the new BSP option ZYNQ_UART_KERNEL_IO_BASE_ADDR. Move the kernel I/O support to a shared file.
* bsps/arm: Use shared empty bsp_start_hook_0()Sebastian Huber2024-01-151-0/+1
| | | | Update #4982.
* Update company nameSebastian Huber2023-05-2017-17/+17
| | | | | The embedded brains GmbH & Co. KG is the legal successor of embedded brains GmbH.
* build: Use enabled by for defaultsSebastian Huber2023-01-1714-44/+54
| | | | | | | | | | | | | | Merge the "default" and "default-by-variant" attributes. Use an "enabled-by" expression to select the default value based on the enabled set. This makes it possible to select default values depending on other options. For example you could choose memory settings based on whether RTEMS_SMP is enabled or disabled. The change was tested by comparing the output of ./waf bspdefaults before and after the change.
* build: Replace variant patterns with a listSebastian Huber2023-01-174-4/+10
| | | | | | | | | | | Replace the variant patterns in the default-by-variant list with an explicit list of matching BSPs. The change was tested by comparing the output of ./waf bspdefaults before and after the change.
* build: Format build itemsSebastian Huber2023-01-177-8/+8
| | | | | Use yaml.dump(data, default_flow_style=False, allow_unicode=True) with a custom representer for integer default values to format all build items.
* spec/bsps: Do not install tm27.hChris Johns2022-08-221-1/+0
| | | | Updates #4705
* bsps: Default to CPU counter benchmark timerSebastian Huber2022-01-151-1/+1
| | | | | | Most BSPs which used the stubbed benachmark timer provide a CPU counter. All BSPs provide at least a stub CPU counter. Simply use the benchmark timer implementation using the CPU counter.
* bsps/arm: Add missing Cache Manager source fileSebastian Huber2021-12-131-0/+1
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* build: Use common objects item for get memorySebastian Huber2021-11-301-1/+2
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* bsps/gicv2: Allow BSPs to define IRQ attributesKinsey Moore2021-09-211-0/+1
| | | | | | | ARM's GICv2 is configurable and its attributes vary between implementations including omission of specific interrupts. This allows BSPs to accomodate those varying implementations with customized attribute sets.
* build: Merge default-by-family into by-variantSebastian Huber2021-08-1814-14/+0
| | | | | | | Prefix the BSP family name with "bsps/" to make it distinct to the BSP variant names. Update #4468.
* build: Use BSP family for optionsChris Johns2021-07-1514-0/+14
| | | | | | | - Optionally add support for 'default-by-family' to allow option to be set by a family and so all related BSPs Close #4468
* bsps/shared: Add Xilinx-AXI SPI driver to wafJan Sommer2021-03-301-0/+2
| | | | Updates #4321
* bsps/xilinx_zynq: Add SPI driver to wafJan Sommer2021-03-101-0/+2
| | | | Updates #4320
* bsps: Add default rtems_get_target_hash()Sebastian Huber2021-02-261-0/+1
| | | | Update #4267.
* build: Sort source listsSebastian Huber2021-02-241-2/+2
| | | | Use the Python sorted() function to sort the "source" lists.
* bsps: Use header file for GIC architecture supportSebastian Huber2020-12-231-1/+0
| | | | | | This avoids a function call overhead in the interrupt dispatching. Update #4202.
* bsps/arm: Unify ARM Generic Timer optionsSebastian Huber2020-12-103-34/+4
| | | | Update #4202.
* spec: Move zynq-uart into its own objectKinsey Moore2020-12-041-0/+2
| | | | | | | Currently, zynq-uart code is always built and has some requirements for BSPs that use it. Instead of making all BSPs satisfy that requirement or working around it by setting defaults, this moves the zynq-uart code into its own spec build object so it can be included if needed.
* Add AArch64 ZynpMP BSPKinsey Moore2020-12-042-16/+1
| | | | | | | | This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC (ZynqMP) family of chips. It is configured to be usable on the Qemu ZCU102 machine definition and should be almost trivially portable to ZynqMP development boards and custom hardware. It is also configured to be usable with libbsd.
* bsps: Move ARM GICv2 driver to bsps/sharedKinsey Moore2020-12-021-1/+2
| | | | | This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
* bsps: Move zynq-uart to bsps/sharedKinsey Moore2020-12-021-2/+0
| | | | | This moves the zynq-uart driver from bsps/arm/shared to bsps/shared to accomodate use by AArch64 BSPs.
* bsps: Break out AArch32 portions of GPT driverKinsey Moore2020-10-051-1/+5
| | | | | | This breaks AArch32-specific portions of the ARM GPT driver into their own file so that the generic code can be moved for reuse by other architectures.
* build: Alternative build system based on wafSebastian Huber2020-09-1420-0/+451
Update #3818.
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