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* libc: Optimize malloc() initializationHEADmasterSebastian Huber32 hours10-0/+10
| | | | | | | | | | | | | | | | The BSPs provide memory for the separate C Program Heap initialization via _Memory_Get(). Most BSPs provide exactly one memory area. Only two BSPs provide more than one memory area (arm/altera-cyclone-v and bsps/powerpc/mpc55xxevb). Only if more than one memory area is provided, there is a need to use _Heap_Extend(). Provide two implementations to initialize the separate C Program Heap and let the BSP select one of the implementations based on the number of provided memory areas. This gets rid of a dependency on _Heap_Extend(). It also avoids dead code sections for most BSPs. Change licence to BSD-2-Clause according to file history. Update #3053.
* score: Optimize Workspace Handler initializationSebastian Huber32 hours10-0/+10
| | | | | | | | | | | | The BSPs provide memory for the workspace initialization via _Memory_Get(). Most BSPs provide exactly one memory area. Only two BSPs provide more than one memory area (arm/altera-cyclone-v and bsps/powerpc/mpc55xxevb). Only if more than one memory area is provided, there is a need to use _Heap_Extend(). Provide two implementations to initialize the workspace handler and let the BSP select one of the implementations based on the number of provided memory areas. This gets rid of a dependency on _Heap_Extend(). It also avoids dead code sections for most BSPs.
* build: Use common objects item for get memorySebastian Huber32 hours117-84/+210
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* bsp_specs: Delete last remnants of these.Joel Sherrill2 days1-3/+0
| | | | Updates #3937.
* build: Remove trailing white spaceSebastian Huber2 days2-2/+2
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* aarch64: Break out MMU definitionsKinsey Moore2021-11-014-0/+4
| | | | | | This moves the AArch64 MMU memory type definitions into cpukit for use by libdebugger since remapping of memory is required to insert software breakpoints.
* spec/aarch64: Enable previously unbuildable testsKinsey Moore2021-10-206-23/+0
| | | | | | | The spconfig01 and spmisc01 tests were disabled for all AArch64 BSPs due to a toolchain issue preventing them from compiling correctly. The binutils version that contains the fix has been released and integrated into RSB such that these two tests now build and operate correctly.
* microblaze: Rework for RTEMS 6Alex White2021-10-1314-0/+522
| | | | | This reworks the existing MicroBlaze architecture port and BSP to achieve basic functionality using the latest RTEMS APIs.
* cpukit: Add AArch64 SMP SupportKinsey Moore2021-09-213-0/+20
| | | | This adds SMP support for AArch64 in cpukit and for the ZynqMP BSPs.
* bsps/gicv2: Allow BSPs to define IRQ attributesKinsey Moore2021-09-217-0/+7
| | | | | | | ARM's GICv2 is configurable and its attributes vary between implementations including omission of specific interrupts. This allows BSPs to accomodate those varying implementations with customized attribute sets.
* arm/lpc24xx: Use common test definition fileSebastian Huber2021-09-214-68/+2
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* build: Remove invalid attributesSebastian Huber2021-09-142-2/+0
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* bsps/arm: Fix ABI flags for Cortex-M4Sebastian Huber2021-09-142-3/+5
| | | | Close #4504.
* bsps/zynqmp: Added I2C support for ZynqMPStephen Clark2021-09-095-0/+87
| | | | Added I2C drivers for ZynqMP and updated build system accordingly.
* bsps/zynq: Moved general i2c files to shared directoriesStephen Clark2021-09-091-3/+3
| | | | | Certain files related to the Zynq BSP's I2C driver are useable by the ZynqMP BSP as well. Moved these files to shared directory in anticipation of I2C support for ZynqMP.
* build: Merge default-by-family into by-variantSebastian Huber2021-08-18682-685/+1
| | | | | | | Prefix the BSP family name with "bsps/" to make it distinct to the BSP variant names. Update #4468.
* bsps: Move optfdt* files to shared parent directorypranav2021-08-0924-246/+26
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* bsps/irq: Add rtems_interrupt_entry_install()Sebastian Huber2021-07-264-9/+8
| | | | | | | | | | | | | | | | | | | Add rtems_interrupt_entry_remove(). Split up irq-generic.c into several files. In particular, place all functions which use dynamic memory into their own file. Add optional macros to let the BSP customize the vector installation after installing the first entry and the vector removal before removing the last entry: * bsp_interrupt_vector_install() * bsp_interrupt_vector_remove() Use these new customization options in the m68k/genmcf548x BSP so re-use the generic interrupt controller support. Update #3269.
* bsps/irq: Add rtems_interrupt_raise()Sebastian Huber2021-07-263-0/+3
| | | | | | | | | Add rtems_interrupt_raise_on() and rtems_interrupt_clear(). Add a default implementation which just returns RTEMS_UNSATISFIED for valid parameters. Update #3269.
* rtems: Add rtems_interrupt_vector_enable()Sebastian Huber2021-07-263-0/+3
| | | | | | Add rtems_interrupt_vector_disable(). Update #3269.
* bsps/irq: Move handler iterate to separate fileSebastian Huber2021-07-263-0/+3
| | | | Update #3269.
* bsps/irq: Move get/set affinity to separate fileSebastian Huber2021-07-263-0/+3
| | | | Update #3269.
* Fixes for TMS570 BSPRobin Mueller2021-07-201-1/+1
| | | | | | | | | When compiling the lwIP port for the TMS570, there were issues with the BSP. Headers are expected in a folder named ti_herc which did not exist. This fixes the issue. Furthermore, there were multiple warnings about define redefinitions. This was fixed as well.
* STM32H7 ethernet pin correctionsRobin Mueller2021-07-203-0/+44
| | | | | | | | | | These patches were submitted a few months ago, but it was found out that the default-by-family: [] were missing in the GPIO .yml lines. This was fixed in this patch. This patch accounts for different pins for the ETH peripheral on STM32H7 devices. For example, the Nucleo H743ZI has slightly different pins than other STM32H7 boards.
* build: Add missing default-by-familySebastian Huber2021-07-152-0/+2
| | | | Update #4468.
* build: Fix the motorola_powerpc default baudrateChris Johns2021-07-151-2/+4
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* build: Use BSP family for optionsChris Johns2021-07-15692-0/+692
| | | | | | | - Optionally add support for 'default-by-family' to allow option to be set by a family and so all related BSPs Close #4468
* build: Add option to customize the LINKFLAGSSebastian Huber2021-07-063-1/+19
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* bsps/imxrt: Simplify linkcmds and make it flexibleChristian Mauderer2021-07-0212-67/+96
| | | | | | | | | Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes it simpler to support other types of external RAM. This patch also removes some of the calculations and improves names and documentation to avoid pitfalls. It removes a unnecessary memory definition. Update #4180
* bsps/imxrt: Allow different ARM PLL settingChristian Mauderer2021-07-021-0/+1
| | | | Update #4180
* Revert "bsps/zynqmp: Allow any or all CGEMs to be enabled"Kinsey Moore2021-07-015-72/+0
| | | | | | | This reverts commit 10041a4cfc00d5f6876d3d6cfc30c23347b4cf42. This type of configuration does not belong in RTEMS and is better constrained to libbsd where the defines are actually being used.
* spec/aarch64: fix abi flags for xilinx_versal_ilp32_vck190Gedare Bloom2021-06-291-0/+1
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* bsps/zynqmp: Allow any or all CGEMs to be enabledKinsey Moore2021-06-285-0/+72
| | | | | | | Provide the options necessary to enable any combination of CGEM ethernet interfaces in LibBSD. The default is still CGEM3, so this should continue to operate as expected on typical Zynq Ultrascale+ MPSoC development hardware.
* bsps/aarch64: replace boot options with asm switch codeGedare Bloom2021-06-244-22/+0
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* bsps/aarch64: add non-secure mode and versal supportGedare Bloom2021-06-249-6/+68
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* bsps/aarch64: add physical secure timerGedare Bloom2021-06-242-0/+33
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* aarch64/xilinx-versal: new BSPs for qemu and vck190Gedare Bloom2021-06-2418-0/+516
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* sparc: More reliable bad trap handlingSebastian Huber2021-06-243-3/+0
| | | | | | | | | | | | | Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap() for all unexpected traps. This enables a proper RTEMS fatal error handling right from the start. Do not rely on the stack and register settings which caused an unexpected trap. Use the ISR stack of the processor to do the fatal error handling. Save the full context which caused the trap. Fatal error handler may use it for error logging. Unify the _CPU_Exception_frame_print() implementations and move it to cpukit. Update #4459.
* bsp/generic_or1k: Remove incomplete IRQ supportSebastian Huber2021-06-241-3/+1
| | | | Update #3269.
* bsps/powerpc, bsps/shared: Move remaining legacy networking header filesVijay Kumar Banerjee2021-06-232-5/+0
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* aarch64: add qemu bsps for cortex-a72Gedare Bloom2021-06-0912-0/+394
| | | | The a72 BSPs are identical to the a53 BSPs just changing a53 to a72.
* arm/fvp: Remove unused GICv2 BSP optionSebastian Huber2021-06-072-6/+1
| | | | Update #4202.
* spec/aarch64: Add BSPs for real ZynqMP hardwareKinsey Moore2021-05-277-2/+85
| | | | | | | Add the BSPs for running on the ZU3EG Ultrascale+ Zynq MPSoC and alter the option defaults necessary for them to run properly using the standard BOOT.BIN configured for PetaLinux that comes in the Out-of-Box package.
* bsps/aarch64: Add MMU driver to relax alignmentKinsey Moore2021-05-275-4/+35
| | | | | | | | | | | | | | | Currently, the AArch64 BSPs have a hard time running on real hardware without building the toolchain and the bsps with -mstrict-align in multiple places. Configuring the MMU on these chips allows for unaligned memory accesses for non-device memory which avoids requiring strict alignment in the toolchain and in the BSPs themselves. In writing this driver, it was found that the synchronous exception handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to avoid thread stack misalignments in RTEMS_DEBUG mode. This is now avoided by exactly preserving thread mode stack and flags and the new implementation is compatible with the draft information provided on the mailing list covering the Exception Management API.
* bsps/a53: Increase available RAMKinsey Moore2021-05-271-1/+1
| | | | | | | The default available RAM on the A53 BSP is quite small at 8MB. This bumps that to 128MB to avoid allocation failures in tmcontext01 caused by large allocations on a cache size of 16MB reported by the system registers in QEMU.
* bsps/imxrt: Fix OCRAM, ITCM and DTCM sizesChristian Mauderer2021-05-177-4/+86
| | | | | | | | | | | | The sizes are configurable via fuses or per software via some registers. At the moment the registers are not changed. Changing the registers destroys data stored in the RAM areas (like application code or data). So either the fuses or some bootloader should be used to set them before the application starts. This also adds an OCRAM only linker command file. Update #4180
* bsps/riscv: Support RTEMS_NOINIT in linkcmdsSebastian Huber2021-05-031-0/+7
| | | | Update #3866.
* powerpc/shared/console: Make console baud rate configurable.Peter Dufault2021-04-276-1/+16
| | | | | | | | | | | The "powerpc/shared/console" code has the start-up console value fixed at 9600 baud. This changes the hard-wired constant "9600" in the code to the configuration setting "BSP_CONSOLE_BAUD" and adds configuration support in both the "waf" and the legacy configuration systems. Note that the VME BSPs beatnik, mvme3100, and mve5100 can be improved by adding a "mvmexxxx" BSP family. This configuration change, as well as future configuration changes, could then be made in a "grp.yml" file.
* Nucleo UART3 (console) pins correctionRobin Mueller2021-04-232-8/+2
| | | | Now using default pins
* build: Remove duplicated attributesSebastian Huber2021-04-222-2/+0
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