summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/riscv/cpu.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* riscv: Use wfi instruction for idle taskSebastian Huber2018-07-251-2/+3
* riscv: Rework exception handlingSebastian Huber2018-07-251-46/+0
* riscv: New CPU_Exception_frameSebastian Huber2018-07-251-0/+38
* riscv: Add floating-point supportSebastian Huber2018-06-291-0/+44
* riscv: Fix global constructionSebastian Huber2018-06-291-4/+5
* riscv: Optimize context switch and interruptsSebastian Huber2018-06-291-0/+50
* riscv: Enable interrupts during dispatch after ISRSebastian Huber2018-06-291-2/+10
* riscv: Avoid namespace pollutionSebastian Huber2018-06-281-3/+2
* riscv: Implement ISR set/get levelSebastian Huber2018-06-281-7/+5
* Rework initialization and interrupt stack supportSebastian Huber2018-06-271-5/+0
* cpukit: RISC-V - make riscv32 code work for riscv64 - v2Hesham Almatary2017-11-011-0/+124
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-01 10:26:52 +0000