Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Update company name | Sebastian Huber | 2023-05-20 | 1 | -1/+1 |
* | riscv: Remove superfluous init/fini functions | Sebastian Huber | 2022-11-09 | 1 | -12/+0 |
* | riscv: Use wfi instruction for idle task | Sebastian Huber | 2018-07-25 | 1 | -2/+3 |
* | riscv: Rework exception handling | Sebastian Huber | 2018-07-25 | 1 | -46/+0 |
* | riscv: New CPU_Exception_frame | Sebastian Huber | 2018-07-25 | 1 | -0/+38 |
* | riscv: Add floating-point support | Sebastian Huber | 2018-06-29 | 1 | -0/+44 |
* | riscv: Fix global construction | Sebastian Huber | 2018-06-29 | 1 | -4/+5 |
* | riscv: Optimize context switch and interrupts | Sebastian Huber | 2018-06-29 | 1 | -0/+50 |
* | riscv: Enable interrupts during dispatch after ISR | Sebastian Huber | 2018-06-29 | 1 | -2/+10 |
* | riscv: Avoid namespace pollution | Sebastian Huber | 2018-06-28 | 1 | -3/+2 |
* | riscv: Implement ISR set/get level | Sebastian Huber | 2018-06-28 | 1 | -7/+5 |
* | Rework initialization and interrupt stack support | Sebastian Huber | 2018-06-27 | 1 | -5/+0 |
* | cpukit: RISC-V - make riscv32 code work for riscv64 - v2 | Hesham Almatary | 2017-11-01 | 1 | -0/+124 |