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path: root/cpukit/score/cpu/riscv/cpu.c (unfollow)
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2023-05-20Update company nameSebastian Huber1-1/+1
2022-11-09riscv: Remove superfluous init/fini functionsSebastian Huber1-12/+0
2018-07-25riscv: Use wfi instruction for idle taskSebastian Huber1-2/+3
2018-07-25riscv: Rework exception handlingSebastian Huber1-46/+0
2018-07-25riscv: New CPU_Exception_frameSebastian Huber1-0/+38
2018-06-29riscv: Add floating-point supportSebastian Huber1-0/+44
2018-06-29riscv: Fix global constructionSebastian Huber1-4/+5
2018-06-29riscv: Optimize context switch and interruptsSebastian Huber1-0/+50
2018-06-29riscv: Enable interrupts during dispatch after ISRSebastian Huber1-2/+10
2018-06-28riscv: Avoid namespace pollutionSebastian Huber1-3/+2
2018-06-28riscv: Implement ISR set/get levelSebastian Huber1-7/+5
2018-06-27Rework initialization and interrupt stack supportSebastian Huber1-5/+0
2017-11-01cpukit: RISC-V - make riscv32 code work for riscv64 - v2Hesham Almatary1-4/+4
2017-10-28cpukit: Add basic riscv32 architecture port v3Hesham Almatary1-26/+36
2017-04-25epiphany/cpu.c: Fix typo to eliminate warningJoel Sherrill1-2/+2
2017-04-24epiphany/cpu.c: Fix not a prototype warningJoel Sherrill1-2/+2
2015-05-21cpukit: Add Epiphany architecture port v4Hesham ALMatary1-0/+114