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2023-05-20
Update company name
Sebastian Huber
1
-1
/
+1
2022-11-09
riscv: Remove superfluous init/fini functions
Sebastian Huber
1
-12
/
+0
2018-07-25
riscv: Use wfi instruction for idle task
Sebastian Huber
1
-2
/
+3
2018-07-25
riscv: Rework exception handling
Sebastian Huber
1
-46
/
+0
2018-07-25
riscv: New CPU_Exception_frame
Sebastian Huber
1
-0
/
+38
2018-06-29
riscv: Add floating-point support
Sebastian Huber
1
-0
/
+44
2018-06-29
riscv: Fix global construction
Sebastian Huber
1
-4
/
+5
2018-06-29
riscv: Optimize context switch and interrupts
Sebastian Huber
1
-0
/
+50
2018-06-29
riscv: Enable interrupts during dispatch after ISR
Sebastian Huber
1
-2
/
+10
2018-06-28
riscv: Avoid namespace pollution
Sebastian Huber
1
-3
/
+2
2018-06-28
riscv: Implement ISR set/get level
Sebastian Huber
1
-7
/
+5
2018-06-27
Rework initialization and interrupt stack support
Sebastian Huber
1
-5
/
+0
2017-11-01
cpukit: RISC-V - make riscv32 code work for riscv64 - v2
Hesham Almatary
1
-4
/
+4
2017-10-28
cpukit: Add basic riscv32 architecture port v3
Hesham Almatary
1
-26
/
+36
2017-04-25
epiphany/cpu.c: Fix typo to eliminate warning
Joel Sherrill
1
-2
/
+2
2017-04-24
epiphany/cpu.c: Fix not a prototype warning
Joel Sherrill
1
-2
/
+2
2015-05-21
cpukit: Add Epiphany architecture port v4
Hesham ALMatary
1
-0
/
+114