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* Rework initialization and interrupt stack supportSebastian Huber2018-06-271-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Statically initialize the interrupt stack area (_Configuration_Interrupt_stack_area_begin, _Configuration_Interrupt_stack_area_end, and _Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the interrupt stack area in a special section ".rtemsstack.interrupt". Let BSPs define the optimal placement of this section in their linker command files (e.g. in a fast on-chip memory). This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the low level initialization code has all information available via global symbols. This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define superfluous, since the interrupt stacks are allocated by confdefs.h for all architectures. There is no need for BSP-specific linker command file magic (except the section placement), see previous ARM linker command file as a bad example. Remove _CPU_Install_interrupt_stack(). Initialize the hardware interrupt stack in _CPU_Initialize() if necessary (e.g. m68k_install_interrupt_stack()). The optional _CPU_Interrupt_stack_setup() is still useful to customize the registration of the interrupt stack area in the per-CPU information. The initialization stack can reuse the interrupt stack, since * interrupts are disabled during the sequential system initialization, and * the boot_card() function does not return. This stack resuse saves memory. Changes per architecture: arm: * Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases. * Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp. bfin: * Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value. lm32, m32c, mips, nios2, riscv, sh, v850: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. m68k: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. powerpc: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. * Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA). sparc: * Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM. Update #3459.
* score: _Thread_Dispatch_increment_disable_level()Sebastian Huber2016-05-201-2/+2
| | | | | | | | | | Avoid _Thread_Dispatch_increment_disable_level() and _Thread_Dispatch_decrement_disable_level() and thus the Giant lock. This is a preparation to remove the Giant lock. Update #2555.
* cpukit/score/cpu/lm32/irq.c: Fix warningJoel Sherrill2014-10-201-0/+6
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* Change all references of rtems.com to rtems.org.Chris Johns2014-03-211-1/+1
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* Include missing <rtems/score/threaddispatch.h>Sebastian Huber2013-07-261-3/+1
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* score: Add and use _Thread_Dispatch_is_enabled()Sebastian Huber2013-06-141-1/+1
| | | | | Delete _Thread_Dispatch_in_critical_section() and _Thread_Is_dispatching_enabled().
* score misc: Score misc: Clean up Doxygen #9 (GCI 2012)Alex Ivanov2012-11-301-10/+6
| | | | | | | This patch is a task from GCI 2012 which improves the Doxygen comments in the RTEMS source. https://google-melange.appspot.com/gci/task/view/google/gci2012/7977211
* Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill2012-05-111-2/+0
| | | | | | | | | | | | Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
* 2011-08-18 Sebastien Bourdeauducq <sebastien.bourdeauducq@gmail.com>Sebastian Huber2011-08-181-2/+1
| | | | | PR 1868/lm32 * irq.c: Bugfix.
* 2011-04-21 Jennifer Averett <Jennifer.Averett@OARcorp.comJennifer Averett2011-04-211-2/+2
| | | | | | | | | | | | | PR 1777/cpukit * libcsupport/src/malloc_deferred.c, libcsupport/src/realloc.c, score/Makefile.am, score/cpu/lm32/irq.c, score/cpu/nios2/irq.c, score/include/rtems/score/coremutex.h, score/include/rtems/score/thread.h, score/inline/rtems/score/thread.inl, score/src/heapfree.c, score/src/pheapwalk.c, score/src/smp.c, score/src/threaddispatch.c: Consolidated access to _Thread_Dispatch_disable_level. * score/src/threaddisabledispatch.c, score/src/threadenabledispatch.c: New files.
* 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2011-02-111-1/+1
| | | | | * cpu.c, irq.c, rtems/score/lm32.h: Use "__asm__" instead of "asm" for improved c99-compliance.
* 2010-07-30 Gedare Bloom <giddyup44@yahoo.com>Joel Sherrill2010-07-301-1/+1
| | | | | | PR 1599/cpukit * irq.c: Rename _Context_Switch_necessary to _Thread_Dispatch_necessary to more properly reflect the intent.
* 2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2010-06-291-8/+3
| | | | | | | | PR 1573/cpukit * irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains the information required by RTEMS for each CPU core. This encapsulates information such as thread executing, heir, idle and dispatch needed.
* 2010-05-29 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2010-05-291-1/+1
| | | | * irq.c: Change _exception_stack_frame into void*.
* 2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2010-03-271-0/+4
| | | | * cpu.c, cpu_asm.S, irq.c: Add include of config.h
* 2009-05-05 Michael Walle <michael@walle.cc>Joel Sherrill2009-05-051-0/+11
| | | | * cpu_asm.S, irq.c, rtems/score/cpu.h: Add lm32 gdb stub support.
* 2009-04-14 Michael Walle <michael@walle.cc>Joel Sherrill2009-04-141-0/+83
* cpu.h: corrected the registers in Context_Control and in CPU_Interrupt_frame to correspond to the saved frame in cpu_asm.S Also switched on CPU_ISR_PASSES_FRAME_POINTER. * cpu_asm.S: Moved the restore part of _CPU_Context_switch for easier reading. Fixed _CPU_Context_restore, it now moves the argument and branches to a label in _CPU_Context_switch. Removed unnecessary saves of registers in context switch and irq handling. Rewrote irq code to call the C helper. Added some documentation * irq.c: New file derived from c4x and nios2.
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