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* sparc: Fix move of CPU counter implementationSebastian Huber2023-10-201-4/+2
| | | | | | This fixes a build error with RTEMS_PROFILING enabled. Update #4954.
* sparc: Move CPU counter implementationSebastian Huber2023-10-205-285/+10
| | | | | | Enable a BSP-specific CPU counter implementation. Update #4954.
* sparc: Fix stack corruptionSebastian Huber2023-10-122-1/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a potential stack corruption in uniprocessor configurations during start multitasking. The system initialization uses the interrupt stack. A first level interrupt shall never interrupt a context which uses the interrupt stack. Such a use would lead to stack corruption and undefined system behaviour. Unfortunately, in uniprocessor configurations this was the case. Multiprocessing is started using _CPU_Context_restore(). The caller of this function (_Thread_Start_multitasking()) uses the interrupt stack. Later we have in cpukit/score/cpu/sparc/cpu_asm.S: mov %g1, %psr ! restore status register and ! **** ENABLE TRAPS **** ld [%o1 + G5_OFFSET], %g5 ! restore the global registers ld [%o1 + G7_OFFSET], %g7 ! Load thread specific ISR dispatch prevention flag ld [%o1 + ISR_DISPATCH_DISABLE_STACK_OFFSET], %o2 ! Store it to memory later to use the cycles ldd [%o1 + L0_OFFSET], %l0 ! restore the local registers ldd [%o1 + L2_OFFSET], %l2 ldd [%o1 + L4_OFFSET], %l4 ldd [%o1 + L6_OFFSET], %l6 ! Now restore thread specific ISR dispatch prevention flag st %o2, [%g6 + PER_CPU_ISR_DISPATCH_DISABLE] ldd [%o1 + I0_OFFSET], %i0 ! restore the input registers ldd [%o1 + I2_OFFSET], %i2 ldd [%o1 + I4_OFFSET], %i4 ldd [%o1 + I6_FP_OFFSET], %i6 ldd [%o1 + O6_SP_OFFSET], %o6 ! restore the output registers Between the ENABLE TRAPS and the restore of the output registers, we still use the stack of the caller and interrupts may be enabled. If an interrupt happens in this code block, the interrupt stack is concurrently used which may lead to a crash. Fix this by adding a new function _SPARC_Start_multiprocessing() for uniprocessor configurations. This function first sets the stack pointer to use the stack of the heir thread. Close #4955.
* score: Add _CPU_Get_TLS_thread_pointer()Sebastian Huber2023-09-151-0/+7
| | | | | | | | Add _CPU_Get_TLS_thread_pointer() to get the thread pointer which is used to get the address of thread-local storage objects associated with a thread. Update #4920.
* score: Add files to Doxygen groupsSebastian Huber2023-07-262-0/+17
| | | | Update #3707.
* bsps/sparc: Remove BSP_POWER_DOWN_AT_FATAL_HALTSebastian Huber2023-07-141-0/+2
| | | | | | Remove the BSP_POWER_DOWN_AT_FATAL_HALT BSP option. Applications should do the customization of the system termination with an initial fatal extension.
* score: Remove CPU port specific cpuatomic.hSebastian Huber2023-06-121-33/+0
| | | | | All CPU ports used the same <rtems/score/cpustdatomic.h> header file to provide the atomic operations. Remove the header file indirection.
* Update company nameSebastian Huber2023-05-2011-11/+11
| | | | | The embedded brains GmbH & Co. KG is the legal successor of embedded brains GmbH.
* sparc: Add header files to Doxygen groupSebastian Huber2023-03-155-8/+23
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* cpukit: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-141-1/+1
| | | | | | | | | This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
* score: Add CPU_THREAD_LOCAL_STORAGE_VARIANTSebastian Huber2022-10-142-1/+3
| | | | Update #3835.
* Do not use RTEMS_INLINE_ROUTINESebastian Huber2022-09-193-12/+12
| | | | | | | Directly use "static inline" which is available in C99 and later. This brings the RTEMS implementation closer to standard C. Close #3935.
* score: Remove _CPU_Counter_difference()Sebastian Huber2022-09-091-8/+0
| | | | | | | All CPU ports used the same _CPU_Counter_difference() implementation. Remove this CPU port interface and mandate a monotonically increasing CPU counter. Close #3456.
* score: Add _CPU_Use_thread_local_storage()Sebastian Huber2022-07-041-0/+12
| | | | | | | | | | | | At some point during system initialization, the idle threads are created. Afterwards, the boot processor basically executes within the context of an idle thread with thread dispatching disabled. On some architectures, the thread-local storage area of the associated thread must be set in dedicated processor registers. Add the new CPU port function to do this: void _CPU_Use_thread_local_storage( const Context_Control *context ) Close #4672.
* cpukit/: Scripted embedded brains header file clean upJoel Sherrill2022-03-104-24/+0
| | | | Updates #4625.
* score/cpu/sparc: Change license to BSD-2Joel Sherrill2022-02-2816-48/+352
| | | | Updates #3053.
* sparc: Add workaround for GRLIB-TN-0011Sebastian Huber2021-11-261-0/+12
| | | | | | | | | | Affected components are the GR712RC, UT699, UT699E, UT700, and LEON3FT-RTAX. Strictly, the workaround is only necessary if the MMU is enabled. Use __FIX_LEON3FT_B2BST to enable the workaround. This is not 100% appropriate, but the best thing we can use to enable the workaround. Close #4551.
* build: Remove old build systemSebastian Huber2021-09-211-11/+0
| | | | | Close #3250. Close #4081.
* score: Canonicalize _CPU_Fatal_halt()Sebastian Huber2021-07-282-11/+2
| | | | | | | | Move _CPU_Fatal_halt() declaration to <rtems/score/cpuimpl.h> and make sure it is a proper declaration of a function which does not return. Fix the type of the error code. If necessary, add the implementation to cpu.c. Implementing _CPU_Fatal_halt() as a function makes it possible to wrap this function for example to fully test _Terminate().
* score: Remove processor event broadcast/receiveSebastian Huber2021-07-281-10/+0
| | | | | | Remove _CPU_SMP_Processor_event_broadcast() and _CPU_SMP_Processor_event_receive(). These functions are hard to use since they are subject to the lost wake up problem.
* sparc: Prefer RTEMS_FATAL_SOURCE_EXCEPTIONSebastian Huber2021-07-151-14/+0
| | | | | | Prefer RTEMS_FATAL_SOURCE_EXCEPTION over INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT since the fatal code (rtems_exception_frame) provides more context.
* sparc: Simplify trap table initializationSebastian Huber2021-06-243-54/+638
| | | | | | | | | | | | | | | Move _ISR_Handler() to a separate file since it is now only used if a handler is installed by _CPU_ISR_install_raw_handler(). Statically initialize the traps for external interrupts to use the new _SPARC_Interrupt_trap() which directly dispatches the interrupt handlers installed by rtems_interrupt_handler_install() via the BSP-provided _SPARC_Interrupt_dispatch(). Since the trap table is now fully statically initialized, there is no longer a dependency on the Cache Manager in the default configuration. Update #4458.
* sparc: Move FP frame offset defines to cpuimpl.hSebastian Huber2021-06-242-57/+57
| | | | | | This makes them usable in multiple files. Update #4458.
* sparc: More reliable bad trap handlingSebastian Huber2021-06-245-1/+513
| | | | | | | | | | | | | Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap() for all unexpected traps. This enables a proper RTEMS fatal error handling right from the start. Do not rely on the stack and register settings which caused an unexpected trap. Use the ISR stack of the processor to do the fatal error handling. Save the full context which caused the trap. Fatal error handler may use it for error logging. Unify the _CPU_Exception_frame_print() implementations and move it to cpukit. Update #4459.
* sparc: Move ISR handler install routinesSebastian Huber2021-06-242-174/+201
| | | | | | | | Move _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector() to separate files. The goal is to make their use optional. Update #4458. Update #4459.
* score: Remove _CPU_Initialize_vectors()Sebastian Huber2021-06-241-5/+0
| | | | | | | This CPU port macro was not used. Since the _ISR_Vector_table[] is statically allocated, CPU ports could initialize this table in _CPU_Initialize() if necessary. Remove _CPU_Initialize_vectors() to simplify the CPU port interface.
* score: Add _CPU_Context_switch_no_return()Sebastian Huber2021-05-182-0/+7
| | | | | | | | | | | The __builtin_unreachable() cannot be used with current GCC versions to tell the compiler that a function does not return to the caller, see: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99151 Add a no return variant of _CPU_Context_switch() to avoid generation of dead code in _Thread_Start_multitasking() if RTEMS was built with SMP support enabled.
* leon,tn-0018: work around GRLIB-TN-0018 errataDaniel Hellstrom2021-03-116-1/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Overview ======== The errata is worked around in the kernel without requiring toolchain modifications. It is triggered the JMPL/RETT return from trap instruction sequence never generated by the compiler and. There are also other conditions that must must be true to trigger the errata, for example the instruction that the trap returns to has to be a JMPL instruction. The errata can only be triggered if certain data is corrected by ECC (inflicted by radiation), thus it can not be triggered under normal operation. For more information see: www.gaisler.com/notes Affected RTEMS target BSPs: * GR712RC * UT699 * UT700/699E The work around is enabled by defining __FIX_LEON3_TN0018 at build time. After applying the following GCC patch, GCC will set the define when compiling for an affected multilib: * GR712RC (-mcpu=leon3 -mfix-gr712rc) * UT700/UT699E (-mpcu=leon3 -mfix-ut700) * UT699 (-mcpu=leon -mfix-ut699) When building for another multilib and TN0018 is still required, it is possible to enable it on the RTEMS kernel configure line using the TARGET_CFLAGS (-D__FIX_LEON3FT_TN0018) or other by other means. The following GCC patch sets __FIX_LEON3FT_TN0018 for the affected RTEMS multilibs: --------- diff --git a/gcc/config/sparc/rtemself.h b/gcc/config/sparc/rtemself.h index 6570590..ddec98c 100644 --- a/gcc/config/sparc/rtemself.h +++ b/gcc/config/sparc/rtemself.h @@ -33,6 +33,8 @@ builtin_assert ("system=rtems"); \ if (sparc_fix_b2bst) \ builtin_define ("__FIX_LEON3FT_B2BST"); \ + if (sparc_fix_gr712rc || sparc_fix_ut700 || sparc_fix_ut699) \ + builtin_define ("__FIX_LEON3FT_TN0018"); \ } \ while (0) --------- Workaround Implementation ========================= In general there are two approaches that the workaround uses: A) avoid ECC restarting the RETT instruction B) avoid returning from trap to a JMPL instruction Where A) comes at a higher performance cost than B), so B) is used where posssible. B) can be achived for certain returns from trap handlers if trap entry is controlled by assembly, such as system calls. A) A special JMPL/RETT sequence where instruction cache is disabled temporarily to avoid RETT containing ECC errors, and reading of RETT source registers to "clean" them from incorrect ECC just before RETT is executed. B) The work around prevents JMPL after system calls (TA instruction) and modifies assembly code on return from traps jumping back to application code. Note that for some traps the trapped instruction is always re-executed and can therefore not trigger the errata, for example the SAVE instruction causing window overflow or an float instruction causing FPU disabled trap. RTEMS SPARC traps workaround implementation: NAME NOTE TRAP COMMENT * window overflow 1 - 0x05 always returns to a SAVE * window underflow 1 - 0x06 always returns to a RESTORE * interrupt traps 2 - 0x10..1f special rett sequence workaround * syscall 3 - 0x80 shutdown system - never returns * ABI flush windows 2 - 0x83 special rett sequence workaround * syscall_irqdis 4 - 0x89 * syscall_irqen 4 - 0x8A * syscall_irqdis_fp 1 - 0x8B always jumps back to FP instruction * syscall_lazy_fp_switch 5 - 0x04 A) jumps back to FP instruction, or to B) _Internal_error() starting with SAVE Notes: 1) no workaround needed because trap always returns to non-JMPL instruction 2) workaround implemented by special rett sequence 3) no workaround needed because system call never returns 4) workaround implemented by inserting NOP in system call generation. Thus fall into 1) when workaround is enabled and no trap handler fix needed. 5) trap handler branches into both 1) and returning to _Internal_error() which starts with a SAVE and besides since it shuts down the system that RETT should never be in cache (only executed once) so fix not necessary in this case. Any custom trap handlers may also have to be updated. To simplify that, helper work around assembly code in macros are available in a separate include file <libcpu/grlib-tn-0018.h>. Close #4155.
* sparc,leon: avoid triggering LEON3FT errata TN-0009Daniel Hellstrom2021-03-111-2/+3
| | | | Close #4336.
* sparc,leon: avoid triggering TN-0009 bad sequenceDaniel Hellstrom2021-03-111-1/+2
| | | | Update #4336.
* sparc: fix bad register alignment for 64 bit storeDaniel Hellstrom2021-03-111-1/+3
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* sparc: Remove sequences that the B2BST scan script warns aboutDaniel Cederman2021-03-112-3/+6
| | | | Update #4336.
* sparc: Add SPARC_INTERRUPT_SOURCE_TO_TRAP()Sebastian Huber2020-11-061-0/+12
| | | | Update #4171.
* sparc: Add SPARC_INTERRUPT_TRAP_TO_SOURCE()Sebastian Huber2020-11-061-0/+17
| | | | Update #4171.
* sparc: Add SPARC_IS_INTERRUPT_TRAP()Sebastian Huber2020-11-061-0/+17
| | | | Update #4171.
* sparc: Move SPARC-specific macros to sparc.hSebastian Huber2020-11-062-22/+40
| | | | | | Clarify Doxygen comments. Fix formatting. Update #4171.
* rtems: Improve RTEMS_NO_RETURN attributeSebastian Huber2020-10-102-7/+6
| | | | | | | | | | | Provide RTEMS_NO_RETURN also in case RTEMS_DEBUG is defined to prevent errors like this: error: no return statement in function returning non-void [-Werror=return-type] Use C11 and C++11 standard means to declare a no-return function. Close #4122.
* sparc: Use RTEMS_XCONCAT()Sebastian Huber2020-08-201-4/+2
| | | | Prefer macros with a proper namespace.
* score: Add CPU_USE_LIBC_INIT_FINI_ARRAYKinsey Moore2020-06-301-0/+2
| | | | | | | | This introduces the CPU_USE_LIBC_INIT_FINI_ARRAY define for use by CPU ports to determine which global constructor and destructor methods are used instead of placing architecture defines where they shouldn't be. Close #4018
* Canonicalize config.h includeSebastian Huber2020-04-163-3/+3
| | | | | | | | Use the following variant which was already used by most source files: #ifdef HAVE_CONFIG_H #include "config.h" #endif
* sparc: Fix mistakenly cleared PSR[EF] bit.Maksim E. Kozlov2019-06-071-1/+1
| | | | | The superfluously modified %l0 had no effect if the branch is not taken. This change clarifies the code.
* sparc: Fix missed restoring of PSR in syscall_lazy_fp_switchMaksim E. Kozlov2019-06-061-0/+11
| | | | | | | | | It is needed to restore PSR just before return because condition codes are dirty after the CMP instructions and this may cause undefined program behavior after returning from the switching procedure (on following branch instruction, for example). Close #3756.
* sparc: Improve _CPU_Context_validate()Sebastian Huber2019-06-061-8/+20
| | | | | | Use the FPU and check that the condition codes in the PSR are preserved. Update #3756.
* doxygen: score: Add SPARC CPU architecture groupAndreas Dachsberger2019-04-023-2/+26
| | | | Update #3706.
* Remove superfluous <rtems/system.h> includesSebastian Huber2019-03-143-3/+0
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* Simplify _CPU_Counter_difference()Sebastian Huber2018-12-074-97/+140
| | | | | | | | | | | | | | In order to simplify the use of CPU counter values it is beneficial to have monotonic increasing values within the range of the CPU counter ticks data type, e.g. 32-bit unsigned integer. This eases the use of CPU counter timestamps in external tools which do not know the details of the CPU counter hardware. The CPU counter is the fastest way to get a time on an RTEMS system. Such a CPU counter may be also used as the timecounter. Use it on SPARC for this purpose to simplify the clock drivers. Update #3456.
* sparc: Remove use of proc_ptrSebastian Huber2018-11-122-15/+19
| | | | Update #3585.
* score: Remove _ISR_Dispatch()Sebastian Huber2018-11-081-2/+2
| | | | | | | | This function was only used on some m68k variants. On these m68k variants there is no need to use a global symbol. Use a local label instead. Remove _ISR_Dispatch() from the architecture-independent layer.
* build: Include header.am in cpukit/Makefile.amSebastian Huber2018-10-102-22/+9
| | | | | Include all cpukit/*/header.am files in cpukit/Makefile.am. This gets rid of all subtree Makefile.am and the sudirs hack.
* build: Merge score/cpu/*/Makefile.amSebastian Huber2018-10-101-17/+0
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