summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/riscv/include (follow)
Commit message (Expand)AuthorAgeFilesLines
* riscv: Add LADDR assembler defineSebastian Huber2018-07-061-1/+11
* riscv: Implement CPU counterSebastian Huber2018-07-061-1/+16
* riscv: Clear reservationsSebastian Huber2018-07-053-6/+21
* riscv: Fix fcsr initializationSebastian Huber2018-07-021-0/+9
* riscv: Add floating-point supportSebastian Huber2018-06-293-40/+184
* riscv: Remove dead codeSebastian Huber2018-06-291-41/+1
* riscv: Optimize context switch and interruptsSebastian Huber2018-06-292-17/+123
* riscv: Fix _CPU_Context_Initialize() prototypeSebastian Huber2018-06-291-6/+6
* riscv: Implement _CPU_Context_validate()Sebastian Huber2018-06-291-6/+1
* riscv: Make some CPU port defines visible to asmSebastian Huber2018-06-292-37/+49
* riscv: Implement _CPU_Context_volatile_clobber()Sebastian Huber2018-06-291-4/+1
* riscv: Remove mstatus from thread contextSebastian Huber2018-06-292-11/+14
* riscv: Fix CPU_STACK_ALIGNMENTSebastian Huber2018-06-291-1/+2
* riscv: Remove RISCV_GCC_RED_ZONE_SIZESebastian Huber2018-06-291-3/+0
* riscv: Enable interrupts during dispatch after ISRSebastian Huber2018-06-292-0/+6
* riscv: Add _CPU_Get_current_per_CPU_control()Sebastian Huber2018-06-282-0/+23
* riscv: Avoid namespace pollutionSebastian Huber2018-06-281-7/+1
* riscv: Optimize and fix interrupt disable/enableSebastian Huber2018-06-281-15/+16
* riscv: Add dummy SMP supportSebastian Huber2018-06-282-125/+27
* riscv: Implement ISR set/get levelSebastian Huber2018-06-281-2/+13
* Rework initialization and interrupt stack supportSebastian Huber2018-06-271-15/+0
* score: Add CPU_INTERRUPT_STACK_ALIGNMENTSebastian Huber2018-06-271-0/+5
* Add _CPU_Counter_frequency()Sebastian Huber2018-06-151-0/+2
* Remove register keyword from public header filesSebastian Huber2018-04-161-1/+1
* riscv/include/rtems/score/types.h: Eliminate this fileJoel Sherrill2018-03-122-71/+4
* Remove make preinstallChris Johns2018-01-258-0/+2558
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-14 20:54:00 +0000