summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/mips/rtems/asm.h (follow)
Commit message (Collapse)AuthorAgeFilesLines
* Remove make preinstallChris Johns2018-01-251-160/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
* score: Doxygen Clean Up Task #4Alex Ivanov2013-01-081-9/+12
|
* Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill2012-05-111-2/+0
| | | | | | | | | | | | Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
* 2010-07-01 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2010-07-011-0/+1
| | | | | | | * rtems/asm.h, rtems/score/cpu.h: cpu.h defines were not available to assembly programs. This resulted in percpu.h (when included from assembly) not being able to detect that the MIPS does not have a dedicated software managed interrupt stack.
* 2005-10-27 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2005-10-271-4/+1
| | | | | * rtems/asm.h: Remove private version of CONCAT macros. Include <rtems/concat.h> instead.
* 2005-04-26 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2005-04-261-1/+1
| | | | * rtems/asm.h: Eliminate warnings.
* New header guard.Ralf Corsepius2005-01-281-2/+2
|
* PR 730Greg Menke2004-12-061-0/+2
| | | | | * cpu_asm.S: Collected PR 601 changes for commit to cvshead for rtems-4.7
* Cosmetics.Ralf Corsepius2004-11-211-1/+0
|
* 2004-11-12 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2004-11-211-3/+5
| | | | * asm.h: Add doxygen preamble.
* Remove stray white spaces.Ralf Corsepius2004-04-151-1/+0
|
* 2002-02-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2002-01-161-1/+1
| | | | | | * asm.h: Remove #include <rtems/score/targopts.h>. Add #include <rtems/score/cpuopts.h>. * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
* 2000-12-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-131-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * cpu_asm.h: Removed. * Makefile.am: Remove cpu_asm.h. * rtems/score/mips64orion.h: Renamed mips.h. * rtems/score/mips.h: New file, formerly mips64orion.h. Header rewritten. (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask, mips_disable_in_interrupt_mask): New macros. * rtems/score/Makefile.am: Reflect renaming mips64orion.h. * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the few defines that were in <cpu_asm.h>. * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine. MIPS ISA 3 is still in assembly for now. (_CPU_Thread_Idle_body): Rewrote in C. * cpu_asm.S: Rewrote file header. (FRAME,ENDFRAME) now in asm.h. (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C. (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C. (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and leaves other bits in SR alone on task switch. (mips_enable_interrupts,mips_disable_interrupts, mips_enable_global_interrupts,mips_disable_global_interrupts, disable_int, enable_int): Removed. (mips_get_sr): Rewritten as C macro. (_CPU_Thread_Idle_body): Rewritten in C. (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and placed in libcpu. (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved to libcpu/mips/shared/interrupts. (general): Cleaned up comment blocks and #if 0 areas. * idtcpu.h: Made ifdef report an error. * iregdef.h: Removed warning. * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable number defined by libcpu. (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines to access SR. (_CPU_ISR_Set_level): Rewritten as macro for ISA I. (_CPU_Context_Initialize): Honor ISR level in task initialization. (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
* 2000-10-24 Alan Cudmore <alanc@linuxstart.com> andJoel Sherrill2000-10-241-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Joel Sherrill <joel@OARcorp.com> * This is a major reworking of the mips64orion port to use gcc predefines as much as possible and a big push to multilib the mips port. The mips64orion port was copied/renamed to mips to be more like other GNU tools. Alan did most of the technical work of determining how to map old macro names used by the mips64orion port to standard compiler macro definitions. Joel did the merge with CVS magic to keep individual file history and did the BSP modifications. Details follow: * Makefile.am: idtmon.h in mips64orion port not present. * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added. * cpu.c: Comments added. * cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added. First attempt at exception/interrupt processing for ISA level 1 and minus any use of IDT/MON added. * idtcpu.h: Conditionals changed to use gcc predefines. * iregdef.h: Ditto. * cpu_asm.h: No real change. Merger required commit. * rtems/Makefile.am: Ditto. * rtems/score/Makefile.am: Ditto. * rtems/score/cpu.h: Change MIPS64ORION to MIPS. * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
* Removed no cpu references.Joel Sherrill2000-07-111-2/+2
|
* Moved asm.h back up in tree.Joel Sherrill1999-02-191-0/+102
|
* Moved to proper rtems/scoreJoel Sherrill1999-02-191-102/+0
|
* Changed reference from no_cpu to mips64orion.Joel Sherrill1998-12-151-1/+1
|
* headers updated to reflect new style copyright notice as partJoel Sherrill1997-04-221-1/+1
| | | | of switching to the modified GNU GPL.
* added "ifndef" to avoid redefinition warningJoel Sherrill1997-04-071-0/+2
|
* Added include of targopts.h.Joel Sherrill1997-01-291-0/+1
|
* added $Id$ to file headersJoel Sherrill1996-09-111-1/+1
| | | | cpu.h: added prototype for _CPU_ISR_Get_level()
* new file for MIPS port by Craig Lebakken (lebakken@minn.net) andJoel Sherrill1996-09-061-0/+99
Derrick Ostertag (ostertag@transition.com).
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-08 15:15:42 +0000