| Commit message (Collapse) | Author | Age | Files | Lines |
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Update #3835.
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Updates #3053.
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Move _CPU_Fatal_halt() declaration to <rtems/score/cpuimpl.h> and make sure it
is a proper declaration of a function which does not return. Fix the type of
the error code. If necessary, add the implementation to cpu.c. Implementing
_CPU_Fatal_halt() as a function makes it possible to wrap this function for
example to fully test _Terminate().
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Update #3585.
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Rename
* _Configuration_Interrupt_stack_area_begin in _ISR_Stack_area_begin,
* _Configuration_Interrupt_stack_area_end in _ISR_Stack_area_end, and
* _Configuration_Interrupt_stack_size in _ISR_Stack_size.
Move definitions to <rtems/score/isr.h>. The new names are considerable
shorter and in the right namespace.
Update #3459.
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Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).
This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.
This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.
Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).
The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.
The initialization stack can reuse the interrupt stack, since
* interrupts are disabled during the sequential system initialization,
and
* the boot_card() function does not return.
This stack resuse saves memory.
Changes per architecture:
arm:
* Mostly replace the linker symbol based configuration of stacks with
the standard <rtems/confdefs.h> configuration via
CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND
mode stack is still defined via linker symbols. These modes are
rarely used in applications and the default values provided by the
BSP should be sufficient in most cases.
* Remove the bsp_processor_count linker symbol hack used for the SMP
support. This is possible since the interrupt stack area is now
allocated by the linker and not allocated from the heap. This makes
some configure.ac stuff obsolete. Remove the now superfluous BSP
variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.
bfin:
* Remove unused magic linker command file allocation of initialization
stack. Maybe a previous linker command file copy and paste problem?
In the start.S the initialization stack is set to a hard coded value.
lm32, m32c, mips, nios2, riscv, sh, v850:
* Remove magic linker command file allocation of initialization stack.
Reuse interrupt stack for initialization stack.
m68k:
* Remove magic linker command file allocation of initialization stack.
Reuse interrupt stack for initialization stack.
powerpc:
* Remove magic linker command file allocation of initialization stack.
Reuse interrupt stack for initialization stack.
* Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt
stack on BSPs using the shared linkcmds.base (replacement for
REGION_RWEXTRA).
sparc:
* Remove the hard coded initialization stack. Use the interrupt stack
for the initialization stack on the boot processor. This saves
16KiB of RAM.
Update #3459.
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Update #2559.
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Drop the <rtems/score/percpu.h> include since this file exposes a lot of
implementation details.
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Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
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http://www.google-melange.com/gci/task/view/google/gci2012/7983217
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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* cpu.c, cpu_asm.S: Remove /*PAGE markers which were interpreted by a
long dead print script.
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* cpu.c, rtems/score/cpu.h, rtems/score/m68k.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
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* cpu.c, cpu_asm.S: Add include of config.h
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initialization, save and restore code.
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* cpu.c, rtems/score/cpu.h: Eliminate _CPU_Thread_dispatch_pointer and
passing address of _Thread_Dispatch to _CPU_Initialize. Clean up
comments.
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* cpu.c, rtems/score/cpu.h: Remove extraneous spaces.
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* cpu.c, rtems/score/cpu.h: Add extern for bfffo table and rename it to
indicate that it is specific to this architecture.
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* cpu.c, rtems/score/cpu.h: Move interrupt_stack_size field from CPU
Table to Configuration Table. Eliminate CPU Table from all ports.
Delete references to CPU Table in all forms.
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* score/cpu/arm/cpu.c, score/cpu/avr/cpu.c, score/cpu/bfin/cpu.c,
score/cpu/c4x/cpu.c, score/cpu/h8300/cpu.c, score/cpu/i386/cpu.c,
score/cpu/m68k/cpu.c, score/cpu/mips/cpu.c, score/cpu/nios2/cpu.c,
score/cpu/no_cpu/cpu.c, score/cpu/sh/cpu.c, score/cpu/sparc/cpu.c,
cpukit/sapi/src/exinit.c: Move copying of CPU Table to shared
executive initialization.
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* cpu.c: Remove warning.
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* cpu.c, m68302.h, rtems/score/cpu.h, rtems/score/m68k.h: Convert to
using c99 fixed size types.
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* cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/m68k.h,
rtems/score/types.h: URL for license changed.
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* cpu.c: Removed warnings.
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* cpu.c: Do not read or write raw interrupt vector table if
we are on a CPU that does not have a %vbr register and the
BSP is configured as having the table in ROM.
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in ROM.
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software floating point emulation code. Code implemented by
Karen Sara Looney <Karen.Looney@colorado.edu> with much
email assistance from Joel.
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of switching to the modified GNU GPL.
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for an interrupt stack. Hopefully this will encourage someone to
implement software stack switching on the m68k.
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68000 class CPUs.
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<jsg@coulomb.eng.ohio-state.edu> of the rest of the 68000-ish support
for interrupt handling and bfffo support, the two BSPs he submitted
(efi68k and efi332), and SGI Irix 5.3 host support.
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Configuration Table Template file added and all tests
modified to use this. All gvar.h and conftbl.h files
removed from test directories.
Configuration parameter maximum_devices added.
Core semaphore and mutex handlers added and RTEMS API Semaphore
Manager updated to reflect this.
Initialization sequence changed to invoke API specific initialization
routines. Initialization tasks table now owned by RTEMS Tasks Manager.
Added user extension for post-switch.
Utilized user extensions to implement API specific functionality
like signal dispatching.
Added extensions to the System Initialization Thread so that an
API can register a function to be invoked while the system
is being initialized. These are largely equivalent to the
pre-driver and post-driver hooks.
Added the Modules file oar-go32_p5, modified oar-go32, and modified
the file make/custom/go32.cfg to look at an environment varable which
determines what CPU model is being used.
All BSPs updated to reflect named devices and clock driver's IOCTL
used by the Shared Memory Driver. Also merged clock isr into
main file and removed ckisr.c where possible.
Updated spsize to reflect new and moved variables.
Makefiles for the executive source and include files updated to show
break down of files into Core, RTEMS API, and Neither.
Header and inline files installed into subdirectory based on whether
logically in the Core or a part of the RTEMS API.
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