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* Remove make preinstallChris Johns2018-01-251-511/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
* leon,gr740: start ASR22:23 up-counter on boot by writing ASR22Daniel Hellstrom2017-10-251-1/+1
| | | | | | According to data sheet bit 31 in ASR22 must be written with a zero to start the up-counter. GRMON starts the up-counter for us. This patch is important when running in "flight" from ROM without GRMON.
* bsp/leon3: Cleaner namespace for LEON3 debug UARTMartin Aberg2017-05-141-1/+1
| | | | | | Prefix BSP specific symbols with BSP name: dbg_uart -> leon3_debug_uart debug_uart_index -> leon3_debug_uart_index
* bsp/leon3: Avoid implicit integer conversionsSebastian Huber2016-10-191-8/+8
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* sparc: Rework CPU counter supportSebastian Huber2016-06-211-2/+45
| | | | | Rework CPU counter support to enable use of the GR740 up-counter via %asr22 and %asr23.
* bsp/leon3: Use sysinit for bsp_debug_uart_init()Sebastian Huber2016-06-201-2/+0
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* score: Distribute clock tick to all online CPUsSebastian Huber2016-03-041-0/+18
| | | | Update #2554.
* basedefs.h: Add and use RTEMS_NO_RETURNSebastian Huber2015-10-261-1/+1
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* leon3: timer config updated to use proper namingDaniel Hellstrom2015-04-171-2/+2
| | | | To be merged with "leon3: make timer initialization configurable"
* LEON3: new Console driver, APBUART driver using Driver ManagerDaniel Hellstrom2015-04-171-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | This patch reimplements the console driver of the LEON3 BSP, it has split up the console driver in two parts: Console driver and UART driver. Before the only UART supported was APBUART and only on-chip APBUARTs found during startup. However splitting the driver in two allows any UART interface to reuse the termios attach code of the console driver, pratically this has always been a problem when discovering APBUARTs after startup for example the PCI board GR-RASTA-IO has APBUARTs and must wait until after PCI has been setup. Since the only current driver that supports the new console driver uses the Driver Manager, the new console driver is only enabled when Driver Manager is initialized during startup. The new APBUART driver supports: * polling mode * interrupt mode * task-driven mode * set UART attributes * read UART attributes (system console inherit settings from boot loader) * Driver manager for finding/initialization of the hardware
* leon3: make timer initialization configurableDaniel Hellstrom2015-04-171-0/+24
| | | | | | | | | | | Its now possible to select which timer core will be used for system clock timer and to control the timer prescaler that affects all timer instances on that timer core. The timer and interrupt controller AMBA devices are exported to make it possible for other code to get detailed information. For example the frequency of the timer and interrupt controller is required by the cpucounter support.
* sparc/leon3: LEON_Is_interrupt_masked for Leon3 in leon.h wrongly definedJiri Gaisler2014-12-021-3/+1
| | | | | Condition needs to be inverted, as a 1 in the mask register means that the interrupt is enabled. Solves ticket #1958 in trac.
* bsp/sparc: Ensure that data cache snooping is enabledDaniel Cederman2014-10-231-0/+6
| | | | Check that data cache snooping exists and is enabled on all cores.
* SPARC BSPs: added CPU aware interrupt ctrl operationsDaniel Hellstrom2014-10-091-12/+40
| | | | | | The LEON2 and ERC32 maps the new macros to CPU0 since they do not support SMP. With the LEON3 a specific CPU's interrupt controller registers can be modified using macros.
* bsp/leon3: Replace the define LEON3_MP_IRQ with a weakly linked variableDaniel Cederman2014-10-021-2/+0
| | | | | | | | The LEON3_MP_IRQ define is used to pick the IRQ to be used by the shared memory driver and for inter-processor interrupts. On some LEON3 systems, for example the GR712RC, the default value of 14 is not suitable. To make this value configurable from the application, it is replaced with a weakly linked variable that can be overridden from the application.
* bsp/sparc: Flush only instruction cacheDaniel Cederman2014-08-221-0/+5
| | | | | | The flush instruction on LEON flushes both the data and the instruction cache. Flushing of just the instruction cache can be done by setting the "flush instruction cache" bit in the cache control register.
* bsps/sparc: Move APBUART printk supportChristian Mauderer2014-07-091-19/+0
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* bsps/sparc: Reduce copy and pasteSebastian Huber2014-07-011-33/+0
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* LEON3: coding style clean bsp_irq_fixup()Daniel Hellstrom2014-05-281-9/+9
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* LEON3: add support for IRQ16..31 for CPU!=0Daniel Hellstrom2014-05-281-2/+3
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* bsps/sparc: Change tabs to spaces.Daniel Cederman2014-05-271-3/+3
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* bsps/sparc: Make lines in SPARC BSPs adhere to 80 character limit.Daniel Cederman2014-05-271-6/+8
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* bsps: Use bsp_start_on_secondary_processor()Sebastian Huber2014-05-121-7/+0
| | | | Use a standard function for startup on secondary processors.
* bsps/sparc: Move flags to grlib headerChristian Mauderer2014-05-121-5/+0
| | | | This enables re-use for other BSPs
* bsps/sparc: Change asm to __asm__ to compile with -pedantic.Daniel Cederman2014-03-211-1/+1
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* Change all references of rtems.com to rtems.org.Chris Johns2014-03-211-1/+1
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* score: Add local context to SMP lock APISebastian Huber2014-03-111-16/+16
| | | | | | | | | | | Add a local context structure to the SMP lock API for acquire and release pairs. This context can be used to store the ISR level and profiling information. It may be later used to enable more sophisticated lock algorithms, e.g. MCS locks. There is only one lock that cannot be used with a local context. This is the per-CPU lock since here we would have to transfer the local context through a context switch which is very complicated.
* bsp/leon3: Use interrupt timestamping counterSebastian Huber2014-03-101-0/+7
| | | | | Use the interrupt controller timestamping counter for the CPU counter if available since it runs with a high frequency.
* bsp/leon3: Add and use cache register functionsSebastian Huber2014-02-281-0/+42
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* bsp/leon3: Use ambapp_freq_get() for CPU counterSebastian Huber2014-02-281-0/+7
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* sparc: Fix CPU counter supportSebastian Huber2014-02-241-0/+7
| | | | | | | | The SPARC processors supported by RTEMS have no built-in CPU counter support. We have to use some hardware counter module for this purpose. The BSP must provide a 32-bit register which contains the current CPU counter value and a function for the difference calculation. It can use for example the GPTIMER instance used for the clock driver.
* bsp/leon3: Add and use leon3_get_cpu_count()Sebastian Huber2014-02-211-0/+9
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* bsp/leon3: Add leon3_power_down_loop()Sebastian Huber2014-02-211-0/+2
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* bsp/leon3: Add and use LEON3_IrqCtrl_LockSebastian Huber2014-02-191-13/+21
| | | | | Disabling of interrupts is not enough to ensure mutual exclusion on SMP configurations.
* bsp/leon3: Declare leon3_ext_irq_init() in headerSebastian Huber2014-02-191-0/+3
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* sparc: Add LEON3_ASR17_PROCESSOR_INDEX_SHIFTSebastian Huber2014-02-141-1/+1
| | | | Add _LEON3_Get_current_processor().
* score: Add CPU counter supportSebastian Huber2014-02-141-0/+2
| | | | | | | | | Add a CPU counter interface to allow access to a free-running counter. It is useful to measure short time intervals. This can be used for example to enable profiling of critical low-level functions. Add two busy wait functions rtems_counter_delay_ticks() and rtems_counter_delay_nanoseconds() implemented via the CPU counter.
* bsp/leon3: Declare bsp_debug_uart_init() in headerSebastian Huber2014-02-061-0/+2
| | | | Do not return a status.
* bsp/leon3: Fix SMP initializationSebastian Huber2014-02-051-0/+7
| | | | | | | Avoid usage of the same stack area by multiple secondary processors at the same time. Avoid magic delay loops.
* bsp/leon3: Console driver changesSebastian Huber2014-02-041-0/+37
| | | | | Move declaration of global variables and functions to <leon.h> header file. Make several global variables and functions static.
* leon3: improve doxygenToma Radu2013-12-041-0/+6
| | | | Add doxygen to the bsp.h, tm27.h, amba.h and leon.h files
* LEON: moved register definitions into grlib header fileDaniel Hellstrom2012-05-161-26/+2
| | | | | | | | | | | | Some register layout definitions for LEON3 reside in ambapp.h which does not really has anything to do with device registers. The register structures has been incorrectly named LEON3_*, the cores are not only used on LEON3 but on LEON4 and perhaps on LEON5 when that day comes. Some structures has been renamed according to the GRLIB core name instead, which CPU that actually use it is not relevant. Drivers has been updated with the new names. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
* Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill2012-05-111-2/+0
| | | | | | | | | | | | Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
* LEON3: updated console driver for new AMBAPP layerDaniel Hellstrom2012-04-171-7/+0
| | | | Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
* SPARC BSPs: implemented shared-irq using libbsp/shared layerDaniel Hellstrom2012-04-061-0/+28
| | | | | | | | | | | | | | | The implementation use IRQ number instead of vector number since some IRQs does not have a unique vector, for example the extended interrupts all enter the same trap vector entry. Added support for the LEON3 extended interrupt controller when using the shared IRQ layer. ERC32 patches untested. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com> Regenerate
* LEON3: various cleanups in leon.hDaniel Hellstrom2012-03-291-63/+1
| | | | | | Removed old LEON2 definitions never used in LEON3 leon.h. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
* GRETH: added support for non-snooping GRETH 10/100 systemsDaniel Hellstrom2012-03-271-0/+8
| | | | | | | | | | | | | | | | | | When data cache snooping is not present the cache needs flushing, the SPARC LEON CPUs does not have to ability to flush individual cache rows and flushing all cache is expensive. Instead the LDA instruction is used to force cache miss on individual loads during the IP-align copy operation required anyway. GRETH GBIT non-snooping systems are still unsupported, since it use zero-copy (can deal with unaligned DMA). Let the bsp.h select if the GRETH driver is supported. Currently only the LEON2/LEON3 platforms BSPs builds the driver. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
* 2011-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2011-06-281-0/+4
| | | | | | | | Jennifer Averett <jennifer.averett@OARcorp.com> PR 1801/bsps * Makefile.am, include/leon.h: Add SMP support to LEON3 BSP. * smp/getcpuid.c, smp/smp_leon3.c: New files.
* 2011-03-04 Joel Sherrill <joel.sherrilL@OARcorp.com>Joel Sherrill2011-03-041-2/+2
| | | | | | | | PR 1748/bsps * clock/ckinit.c, include/leon.h: When the clock tick generates an interrupt WHILE we have interrupts disabled doing a get TOD or uptime, the get nanoseconds handler was returning a bogusly large number.
* Whitespace removal.Ralf Corsepius2009-11-291-18/+18
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