diff options
| author | Daniel Hellstrom <daniel@gaisler.com> | 2012-04-06 05:05:07 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@oarcorp.com> | 2012-04-06 08:17:58 -0500 |
| commit | 95518e59bd6dda4bda22f4f02a22613b67e39400 (patch) | |
| tree | 6cfb21ea5492179731efad5a3a91813eb0f76df3 /c/src/lib/libbsp/sparc/leon3/include/leon.h | |
| parent | LEON3: console use register pointers instead of UART indexes (diff) | |
| download | rtems-95518e59bd6dda4bda22f4f02a22613b67e39400.tar.bz2 | |
SPARC BSPs: implemented shared-irq using libbsp/shared layer
The implementation use IRQ number instead of vector number since
some IRQs does not have a unique vector, for example the extended
interrupts all enter the same trap vector entry.
Added support for the LEON3 extended interrupt controller when using
the shared IRQ layer.
ERC32 patches untested.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Regenerate
Diffstat (limited to 'c/src/lib/libbsp/sparc/leon3/include/leon.h')
| -rw-r--r-- | c/src/lib/libbsp/sparc/leon3/include/leon.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/sparc/leon3/include/leon.h b/c/src/lib/libbsp/sparc/leon3/include/leon.h index fd208b083a..819800cf59 100644 --- a/c/src/lib/libbsp/sparc/leon3/include/leon.h +++ b/c/src/lib/libbsp/sparc/leon3/include/leon.h @@ -152,6 +152,23 @@ extern volatile LEON3_UART_Regs_Map *LEON3_Console_Uart[LEON3_APBUARTS]; /* LEON3 CPU Index of boot CPU */ extern int LEON3_Cpu_Index; +/* The external IRQ number, -1 if not external interrupts */ +extern int LEON3_IrqCtrl_EIrq; + +static __inline__ int bsp_irq_fixup(int irq) +{ + int eirq; + + if (LEON3_IrqCtrl_EIrq != 0 && irq == LEON3_IrqCtrl_EIrq) { + /* Get interrupt number from IRQ controller */ + eirq = LEON3_IrqCtrl_Regs->intid[LEON3_Cpu_Index] & 0x1f; + if (eirq & 0x10) + irq = eirq; + } + + return irq; +} + /* Macros used for manipulating bits in LEON3 GP Timer Control Register */ #define LEON3_GPTIMER_EN 1 @@ -232,6 +249,17 @@ extern int LEON3_Cpu_Index; sparc_enable_interrupts( _level ); \ } while (0) +/* Make all SPARC BSPs have common macros for interrupt handling */ +#define BSP_Clear_interrupt(_source) LEON_Clear_interrupt(_source) +#define BSP_Force_interrupt(_source) LEON_Force_interrupt(_source) +#define BSP_Is_interrupt_pending(_source) LEON_Is_interrupt_pending(_source) +#define BSP_Is_interrupt_masked(_source) LEON_Is_interrupt_masked(_source) +#define BSP_Unmask_interrupt(_source) LEON_Unmask_interrupt(_source) +#define BSP_Mask_interrupt(_source) LEON_Mask_interrupt(_source) +#define BSP_Disable_interrupt(_source, _previous) \ + LEON_Disable_interrupt(_source, _prev) +#define BSP_Restore_interrupt(_source, _previous) \ + LEON_Restore_interrupt(_source, _previous) /* * Each timer control register is organized as follows: |