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* bsp/imx: Fix system counter init for imx6Christian Mauderer2021-01-211-1/+60
| | | | | | | | | For i.MX7 U-Boot initializes the system counter. On i.MX6 Barebox is often used which doesn't initialize the counter. With this patch, we try to auto-detect whether the counter is initialized or not and do the initialization ourself if necessary. Closes #3869
* bsps/imxrt: Add ioctl to LPSPI to get registersChristian Mauderer2021-01-212-0/+74
| | | | | | | | This allows an application to get the registers of the LPSPI. That is usefull for applications that want to use DMA for a very specialized and highly optimized communication. Update #4180
* bsps/imxrt: Add DMA numbers to dtsiChristian Mauderer2021-01-212-478/+604
| | | | | | | Also currently no driver uses these numbers, it is usefull for applications that want to use the DMA. Update #4180
* bsps/shared: Adapt fsl-edma driver for imxrtChristian Mauderer2021-01-214-824/+723
| | | | | | | | | | Note: The changes have been done with portability in mind. The driver should (in theory) be able to replace the original one in the MPC BSPs too. For full compatibility an adaption layer and especially a test would be necessary. Because both are missing, don't integrate it into the MPC BSP now. Update #4180
* bsps/shared: Copy fsl-edma from mpc55xxChristian Mauderer2021-01-213-0/+1368
| | | | | | This is a preparation for making the driver universal. Update #4180
* bsps/imxrt: Use standard names to avoid warningsChristian Mauderer2021-01-212-106/+103
| | | | | | | If spi or i2c slaves are "connected" to the spi or i2c bus, the device tree compiler complains if the busses are not named spi or i2c. Update #4180
* bsps/aarch64: Swap primary ZynqMP UARTKinsey Moore2021-01-142-4/+4
| | | | | Both Qemu and actual hardware treat the second UART in memory map as the primary UART. This adjusts the ZynqMP BSPs to match.
* bsp/stm32h7: Split console configurationSebastian Huber2021-01-0421-150/+498
| | | | | | | This allows applications to individually provide configuration structures. Update #4209.
* bsp/stm32h7: Split start configurationSebastian Huber2021-01-045-38/+166
| | | | | | | This allows applications to individually provide configuration structures. Update #4209.
* bsps/shared/ofw: Implement RTEMS OFW interfaceG S Niteesh Babu2020-12-274-0/+1348
| | | | | | | | | | | | | | RTEMS OFW is a FDT only implementation of the OpenFirmWare interface. This API is created to be compatible with FreeBSD OpenFirmWare interface. The main intention is to make porting of FreeBSD drivers to RTEMS easier. Most functions implemented have an direct one-one mapping with the original OFW API and some extra auxiliary functions were implemented to make working with device trees easier in RTEMS. Update #3784
* Update header.amSebastian Huber2020-12-234-8/+19
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* arm/fvp: New BSPSebastian Huber2020-12-2311-0/+694
| | | | | | | | This BSP supports the Arm Fixed Virtual Platform. Only the Cortex-R52 processor configuration is supported by the BSP. It should be easy to add support for other variants if needed. Update #4202.
* bsps/arm: Rely on initialized vector tableSebastian Huber2020-12-231-5/+4
| | | | | | | The arm_cp15_set_exception_handler() is a complicated function which should be avoided if possible. Update #4202.
* bsps: Use header file for GIC architecture supportSebastian Huber2020-12-235-19/+34
| | | | | | This avoids a function call overhead in the interrupt dispatching. Update #4202.
* bsps/arm: Invalidate TLB in start.SSebastian Huber2020-12-235-15/+10
| | | | Update #4202.
* bsps/arm: Clear SCTLR[M, I, A, C] in start.SSebastian Huber2020-12-235-119/+43
| | | | | | | Initialize the data and unified cache levels. Invalidate the instruction cache levels. Update #4202.
* bsps/arm: Add arm-data-cache-loop-set-way.hSebastian Huber2020-12-232-62/+105
| | | | | | This makes it possible to reuse this loop. Update #4202.
* bsps/arm: Remove optional start hook argumentsSebastian Huber2020-12-232-48/+28
| | | | | | | The start hook arguments are not used by a BSP. Removing them avoids the need for a stack during the very early system initialization. Update #4202.
* bsps/arm: Invalidate branch predictors earlierSebastian Huber2020-12-235-5/+11
| | | | | | | Make sure the branch predictors are invalidated before the first branch is executed. Update #4202.
* bsps/arm: Set VBAR in start.SSebastian Huber2020-12-2310-93/+34
| | | | | | | | | | Set the VBAR to the vector table in the start section before bsp_start_hook_0() is called to earlier handle exceptions in RTEMS. Set the VBAR to the normal vector table in start.S for the main processor. Secondary processors set it in bsp_start_hook_0(). Update #4202.
* bsps: Fix includesSebastian Huber2020-12-222-1/+6
| | | | Update #4202.
* bsps: Remove gicvx_interrupt_dispatch()Sebastian Huber2020-12-165-18/+2
| | | | | | Avoid one level of indirection. Update #4202.
* bsps: Add GICv3 arm_gic_irq_processor_count()Sebastian Huber2020-12-163-6/+35
| | | | Update #4202.
* bsps/arm: Fix MMU configurationSebastian Huber2020-12-152-0/+8
| | | | Update #4184.
* bsps/arm/imx*: Fix location of shared headersChristian Mauderer2020-12-144-0/+0
| | | | | | | When moving the headers from the imx BSP to the shared area, the wrong directory has been selected. This patch fixes that problem. Update #4180
* bsps/imxrt: Split up dts.Christian Mauderer2020-12-142-290/+311
| | | | | | This allows simpler creation of own dts files for custom boards. Update #4180
* bsp/rtl22xx: Fix non-ASCII characterChristian Mauderer2020-12-141-1/+1
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* bsp/mpc83xx: Fix non-ASCII charactersChristian Mauderer2020-12-141-1/+1
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* bsps: Replace non-ASCII bullet pointsChristian Mauderer2020-12-142-6/+6
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* bsps: Replace non-ASCII trademark symbolChristian Mauderer2020-12-142-2/+2
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* bsps: Replace non-ASCII copyright characterChristian Mauderer2020-12-1411-11/+11
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* bsps/gicv3: Resolve build warnings on 64bitKinsey Moore2020-12-111-2/+2
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* tm27: Use generic cpu index accessorKinsey Moore2020-12-111-3/+2
| | | | | | The arm_cp15 function for accessing the current CPU index is specific to ARMv7 while this header is used for ARMv8 as well. Instead, use a generic accessor that is part of the standard CPU API.
* bsps/arm: Fix MMU small pages supportJan Sommer2020-12-111-1/+1
| | | | | | - For small tables only round to the next 4kiB instead of 1MiB Close #4184.
* bsps: Remove ARM GIC SGI target filterSebastian Huber2020-12-105-31/+5
| | | | | | | Remove the target filter for software-generated interrupts since this feature is not supported by the affinity routing in GICv3. Update #4202.
* bsps: Fix GICv3 arm_gic_trigger_sgi()Sebastian Huber2020-12-105-10/+11
| | | | | | | | Use the targets parameter to determine the targets of the SGI. Change targets parameter type to 32-bit to ease the parameter passing. GICv3 supports up to 16 targets. Update #4202.
* bsp/realview-pbx-a9: Fix smpfatal04 testSebastian Huber2020-12-101-2/+3
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* bsps/arm: Support system level ARM Generic TimerSebastian Huber2020-12-101-1/+12
| | | | Update #4202.
* arm/cache-cp15: Support Armv8Sebastian Huber2020-12-101-13/+12
| | | | Update #4202.
* bsps: Print CPU in default fatal error extensionSebastian Huber2020-12-101-1/+8
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* bsps: Add SMP support to ARM GICv3Sebastian Huber2020-12-091-23/+33
| | | | Update #4202.
* spec: Move zynq-uart into its own objectKinsey Moore2020-12-041-4/+0
| | | | | | | Currently, zynq-uart code is always built and has some requirements for BSPs that use it. Instead of making all BSPs satisfy that requirement or working around it by setting defaults, this moves the zynq-uart code into its own spec build object so it can be included if needed.
* Add AArch64 ZynpMP BSPKinsey Moore2020-12-046-0/+426
| | | | | | | | This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC (ZynqMP) family of chips. It is configured to be usable on the Qemu ZCU102 machine definition and should be almost trivially portable to ZynqMP development boards and custom hardware. It is also configured to be usable with libbsd.
* zynq-uart: Fix set_attributes implementationKinsey Moore2020-12-033-6/+59
| | | | | | | | | The zynq-uart set_attributes implementation was configured to always return false which causes spconsole01 to fail. This restores the disabled implementation which sets the baud rate registers appropriately and allows spconsole01 to pass. This also expands the set_attributes functionality to allow setting of the stop bits, character width, and parity.
* bsps: Remove unused bsp_stack_main_sizeSebastian Huber2020-12-035-15/+0
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* bsps: Move ARM GICv2 driver to bsps/sharedKinsey Moore2020-12-025-19/+8
| | | | | This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
* bsps: Move zynq-uart to bsps/sharedKinsey Moore2020-12-0212-12/+19
| | | | | This moves the zynq-uart driver from bsps/arm/shared to bsps/shared to accomodate use by AArch64 BSPs.
* rtems: Add <rtems/rtems/clockimpl.h>Sebastian Huber2020-12-025-0/+5
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* bsp/stm32h7: Add and use BSP Doxygen groupSebastian Huber2020-11-26216-0/+3517
| | | | Update #3910.
* rtems: Improve rtems_interrupt_server_create()Sebastian Huber2020-11-241-13/+17
| | | | | | Also start interrupt server tasks on processors which do not have a scheduler. Applications may dynamically manage processors using rtems_scheduler_remove_processor() and rtems_scheduler_add_processor().
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