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authorKinsey Moore <kinsey.moore@oarcorp.com>2020-10-29 13:40:54 -0500
committerJoel Sherrill <joel@rtems.org>2020-12-02 18:51:40 -0600
commita151ee167ecf7cc7f18e66d03b49843c01031d00 (patch)
tree4c6b16dd4eca5c825cfb81d662e64970b4dd45a4 /bsps
parentbsps: Move zynq-uart to bsps/shared (diff)
downloadrtems-a151ee167ecf7cc7f18e66d03b49843c01031d00.tar.bz2
bsps: Move ARM GICv2 driver to bsps/shared
This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
Diffstat (limited to 'bsps')
-rw-r--r--bsps/aarch64/shared/irq/irq-arm-gicvx-aarch64.c (renamed from bsps/aarch64/shared/irq/irq-arm-gicv3-aarch64.c)2
-rw-r--r--bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c (renamed from bsps/arm/shared/irq/irq-arm-gicv3-aarch32.c)2
-rw-r--r--bsps/include/dev/irq/arm-gic-irq.h4
-rw-r--r--bsps/shared/dev/irq/arm-gicv2.c (renamed from bsps/arm/shared/irq/irq-gic.c)17
-rw-r--r--bsps/shared/dev/irq/arm-gicv3.c2
5 files changed, 8 insertions, 19 deletions
diff --git a/bsps/aarch64/shared/irq/irq-arm-gicv3-aarch64.c b/bsps/aarch64/shared/irq/irq-arm-gicvx-aarch64.c
index fe74bf46bd..67839118e1 100644
--- a/bsps/aarch64/shared/irq/irq-arm-gicv3-aarch64.c
+++ b/bsps/aarch64/shared/irq/irq-arm-gicvx-aarch64.c
@@ -60,5 +60,5 @@ void arm_interrupt_facility_set_exception_handler(void)
void bsp_interrupt_dispatch(void)
{
- gicv3_interrupt_dispatch();
+ gicvx_interrupt_dispatch();
}
diff --git a/bsps/arm/shared/irq/irq-arm-gicv3-aarch32.c b/bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
index b805199ba9..b9267aecba 100644
--- a/bsps/arm/shared/irq/irq-arm-gicv3-aarch32.c
+++ b/bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
@@ -57,5 +57,5 @@ void arm_interrupt_facility_set_exception_handler(void)
void bsp_interrupt_dispatch(void)
{
- gicv3_interrupt_dispatch();
+ gicvx_interrupt_dispatch();
}
diff --git a/bsps/include/dev/irq/arm-gic-irq.h b/bsps/include/dev/irq/arm-gic-irq.h
index a97191faca..d63fce32d1 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -122,10 +122,10 @@ void arm_interrupt_facility_set_exception_handler(void);
void arm_interrupt_handler_dispatch(rtems_vector_number vector);
/**
- * This is the GICv3 interrupt dispatcher that is to be called from the
+ * This is the GICv1/GICv2/GICv3 interrupt dispatcher that is to be called from the
* architecture-specific implementation of the IRQ handler.
*/
-void gicv3_interrupt_dispatch(void);
+void gicvx_interrupt_dispatch(void);
static inline uint32_t arm_gic_irq_processor_count(void)
{
diff --git a/bsps/arm/shared/irq/irq-gic.c b/bsps/shared/dev/irq/arm-gicv2.c
index 1a401b67b6..cba8982764 100644
--- a/bsps/arm/shared/irq/irq-gic.c
+++ b/bsps/shared/dev/irq/arm-gicv2.c
@@ -14,10 +14,6 @@
#include <dev/irq/arm-gic.h>
-#include <rtems/score/armv4.h>
-
-#include <libcpu/arm-cp15.h>
-
#include <bsp/irq.h>
#include <bsp/irq-generic.h>
#include <bsp/start.h>
@@ -53,7 +49,7 @@
#define CPUIF_ICCICR GIC_CPUIF_ICCICR_ENABLE
#endif
-void bsp_interrupt_dispatch(void)
+void gicvx_interrupt_dispatch(void)
{
volatile gic_cpuif *cpuif = GIC_CPUIF;
uint32_t icciar = cpuif->icciar;
@@ -61,11 +57,7 @@ void bsp_interrupt_dispatch(void)
rtems_vector_number spurious = 1023;
if (vector != spurious) {
- uint32_t psr = _ARMV4_Status_irq_enable();
-
- bsp_interrupt_handler_dispatch(vector);
-
- _ARMV4_Status_restore(psr);
+ arm_interrupt_handler_dispatch(vector);
cpuif->icceoir = icciar;
}
@@ -117,10 +109,7 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
uint32_t id_count = get_id_count(dist);
uint32_t id;
- arm_cp15_set_exception_handler(
- ARM_EXCEPTION_IRQ,
- _ARMV4_Exception_interrupt
- );
+ arm_interrupt_facility_set_exception_handler();
for (id = 0; id < id_count; id += 32) {
#ifdef BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0
diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c
index ad39872eb0..da19300b15 100644
--- a/bsps/shared/dev/irq/arm-gicv3.c
+++ b/bsps/shared/dev/irq/arm-gicv3.c
@@ -134,7 +134,7 @@
#define ARM_GIC_REDIST ((volatile gic_redist *) BSP_ARM_GIC_REDIST_BASE)
#define ARM_GIC_SGI_PPI (((volatile gic_sgi_ppi *) ((char*)BSP_ARM_GIC_REDIST_BASE + (1 << 16))))
-void gicv3_interrupt_dispatch(void)
+void gicvx_interrupt_dispatch(void)
{
uint32_t icciar = READ_SR(ICC_IAR1);
rtems_vector_number vector = GIC_CPUIF_ICCIAR_ACKINTID_GET(icciar);