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* xilinx-zynqmp: Include <rtems/libio.h> for rtems_termios_initialize()HEADmasterJoel Sherrill5 hours2-0/+2
* termios: Add <rtems/termiosdevice.h>Sebastian Huber7 days3-1/+3
| | | | | | | Add <rtems/termiosdevice.h> which does not depend on <rtems/libio.h> to provide rtems_termios_device_context and rtems_termios_device_handler. For polled serial device drivers, this removes a header file dependency to the full file system support.
* arm/xilinx-zynq: Initialize debug console onceSebastian Huber12 days1-0/+6
* arm/xilinx-zynq: Do not provide legacy APISebastian Huber12 days2-2/+1
| | | | | The header file <rtems/irq.h> provides a legacy API. Do not provide it by default through <bsp/irq.h>.
* bsps/arm: Use interrupt entry for IPISebastian Huber12 days1-6/+10
| | | | Avoid a dynamic memory allocation for the inter-processor interrupt.
* bsps/arm: Use interrupt entry for clock driverSebastian Huber12 days1-4/+9
| | | | Avoid a dynamic memory allocation for the clock driver interrupt.
* bsps/arm: Use interrupt entry for <tm27.h>Sebastian Huber12 days1-18/+34
| | | | | Avoid a dynamic memory allocation for the <tm27.h> interrupts. Replace assert() with _Assert().
* arm/xilinx-zynq: Improve Doxygen file commentsSebastian Huber12 days7-14/+75
* bsps/arm: Improve Doxygen groupsSebastian Huber12 days5-9/+62
* bsps: Improve Doxygen file commentsSebastian Huber12 days8-11/+61
* imx_iomux: Don't set reserved bits in PAD_CTLChristian Mauderer2023-05-221-0/+10
| | | | | | | | | On most i.MX* the upper bits in SW_PAD_CTL are reserved. On some chips, like the i.MXRT1166, they are a domain write protection. Setting them to 1 can have unexpected side effects. The device tree uses these bits for some flags. Make sure that they are not accidentally written to some value.
* bsps/imxrt: Move board specific filesChristian Mauderer2023-05-224-0/+0
| | | | | Move the files that are board specific and not specific to the chip family into a separate folder.
* bsps/imxrt: Make chip start code chip specificChristian Mauderer2023-05-222-0/+6
| | | | | Some parts of the startup code don't apply for all chips. Make that part chip specific.
* bsps/imxrt: Support more chip variants in headerChristian Mauderer2023-05-221-9/+40
| | | | | | The different variants of the i.MXRT have some minimal differences in the fsl_flexspi_nor_config.h. Make sure that the header supports the different chips.
* bsps/imxrt: Remove unmaintained definesChristian Mauderer2023-05-222-56/+4
| | | | | | | The defines for the different clock frequencies in the fsl_clock_config.h do not represent the clock frequencies that have been set up in the registers. Remove them to avoid someone trusting in correct values.
* bsps/shared: Fix header for fsl-edmaChristian Mauderer2023-05-221-1/+1
| | | | | | If a different chip variant is used in the i.mxrt BSP, a different header would have to be included. Make sure that the fsl-edma driver uses a header that doesn't have to be adapted.
* bsps/imxrt: Get clock for IMXRT11xx in driversChristian Mauderer2023-05-224-6/+73
| | | | | | The mcux_sdk has a different interface for getting the clock for IMXRT11xx than for getting it in IMXRT10xx. Adapt simple drivers to support that interface.
* bsps/imxrt1052: PLL config based on speed gradeChristian Mauderer2023-05-221-0/+7
* bsps/imxrt: Adapt to new mcux-sdk versionChristian Mauderer2023-05-22145-141136/+9
| | | | | Remove the old NXP MCUXpresso SDK and adapt the BSP so that it uses the new mcux-sdk.
* bsps/imxrt: (Re-)Apply RTEMS patches to new libChristian Mauderer2023-05-229-0/+419
| | | | | Reapply patches used in the old version of the NXP library and apply patches necessary for the new version of the library.
* bsp/imxrt: Update support library from mcux-sdkChristian Mauderer2023-05-22246-0/+396279
| | | | | | | | | | | | | | | | | | | This imports new files from the mcux-sdk support library. NXP now offers the library as a git repository instead of a zip package. The git repository supports multiple CPUs from the i.MXRT family: The imported files are from revision 2b9354539e6e4f722749e87b0bdc22966dc080d9 This revision is the same as MCUXpresso 2.13.0 with small bug fixes. For importing the files, a script has been used, that parses the mcux-sdk cmake files and creates the yaml files for RTEMS:
* Update company nameSebastian Huber2023-05-20678-678/+678
| | | | | The embedded brains GmbH & Co. KG is the legal successor of embedded brains GmbH.
* bsps/microblaze: Add device tree support to GPIOAlex White2023-05-192-0/+81
* bsps/microblaze: Remove GPIO build system optionsAlex White2023-05-192-42/+0
| | | | | | The number of GPIO devices along with each of their particular configurations is application-specific. Encoding this information as build options also introduced a lot of clutter.
* aarch64/versal: Fix uart interrupt issuesAaron Nyholm2023-05-161-1/+3
* bsps/amd64: add a new EFI-based variant of AMD64 BSPKarel Gardas2023-04-2916-5/+6953
| | | | | | | | | | The new amd64efi BSP supports: - multiboot2 boot format. Runs well with GRUB. - console based on either EFI simple text output or GOP-based framebuffer - clock based on EFI event/timer API - early console using either hard-wired PC-AT serial or just memory buffer - with EFI support disabled the BSP is more or less equivalent to amd64 BSP with multiboot2 support
* bsps/shared: import FreeBSD libefi libraryKarel Gardas2023-04-2913-0/+3495
| | | | | | | | The library is imported in minimalist version just to support future amd64efi BSP. The FreeBSD tree commit id with imported libefi version is: ce7b20e5129cf0f269951b313d336a9c7d54d790
* bsps/powerpc: Fix warnings with PPC_SPECIAL_PURPOSE_REGISTERChris Johns2023-04-246-12/+13
* bsps/microblaze: Fix UART transmit interruptMaldonado, Sergio E. (GSFC-580.0)2023-04-192-5/+19
* bsps/microblaze: Add support for multiple UARTsMaldonado, Sergio E. (GSFC-580.0)2023-04-193-29/+186
* bsps/microblaze: Allow copying FDT from U-BootMaldonado, Sergio E. (GSFC-580.0)2023-04-194-2/+147
* bsps/aarch64: Enable MMU during remapsKinsey Moore2023-04-181-3/+4
| | | | | | | | The MMU must be enabled during mapping changes and TLB invalidations. When this is not the case, TLB updates do not occur correctly in all cases. This is especially apparent when changing a block entry to a table entry when remapping small memory ranges in an otherwise contiguous block.
* bsps/powerpc: Fix warnings with PPC_SPECIAL_PURPOSE_REGISTERChris Johns2023-04-112-27/+38
* bsps/motorola_powerpc: Change defines from BSP names to avoid clashChris Johns2023-04-1110-21/+21
| | | | | | - Change mvme2100 to mot_pcc_mvme2100 to avoid clashing with the RTEMS_BSP value for the BSP. You cannot have a define that is the BSP name.
* bsps/mvme2700: Add MVME2700 BSPChris Johns2023-04-061-4/+4
* bsp/qoriq: Build VME Tundra Tsi148 driverSebastian Huber2023-04-051-0/+50
* bsps/vme: Remove quirkSebastian Huber2023-04-051-5/+1
| | | | printk() supports long long integers.
* bsps/vme: Include missing header fileSebastian Huber2023-04-051-0/+1
* bsps: Mark argument as unusedSebastian Huber2023-04-051-0/+1
| | | | Update #4862.
* bsps/riscv: add riscv/kendrytek210 BSP variant source changesAlan Cudmore2023-03-287-6/+171
| | | | | | | | | This patch adds support for the Kendryte K210 RISC-V BSP variant. The SoC uses the existing Interrupt Controller, Timer, and console UART. It only needs SoC specific initialization and an embedded device tree binary similar to the polarfire SoC BSP. Updates #4876
* bsps/riscv: add device tree source and device tree blob header for k210 bsp ↵Alan Cudmore2023-03-282-0/+531
| | | | | | | | | | variant This patch adds the k210 device tree source and the corresponding device tree blob encoded in the header which is used for the embedded device tree blob for the Kendryte K210 BSP variant. Updates #4876
* bsps/xqspipsu: Add support for reading ECCKinsey Moore2023-03-223-0/+253
| | | | | This adds a helper function to read the ECC status for an ECC unit in SPI-attached NOR memory.
* bsps/zynqmp: Use correct include pathKinsey Moore2023-03-221-1/+1
| | | | | | The existing include path only works from inside the RTEMS build. This fixes the include path to work both in the RTEMS build and with builds of external apps since this file gets installed with the BSP.
* bsps/arm: Fix wordingSebastian Huber2023-03-171-1/+1
* bsps/riscv: Use per-CPU mtimecmp in clock driverSebastian Huber2023-03-171-26/+15
| | | | | Use the mtimecmp from the PLIC/CLINT initialization in the clock driver. This register is defined by the device tree and does not assume a fixed mapping.
* bsps/riscv: Fix riscv_get_hart_index_by_phandle()Sebastian Huber2023-03-172-2/+10
| | | | Take a non-zero RISCV_BOOT_HARTID into account.
* bsps/riscv: Make SMP start more robustSebastian Huber2023-03-172-6/+15
| | | | | | | In SMP configurations, check that we run on a configured processor. If not, then there is not much that can be done since we do not have a stack available for this processor. Just loop forever in this case. Do this in assemlby to ensure that no stack memory is used.
* score/arm: enhance ARMV7M MPU setup with capability to set control registerKarel Gardas2023-03-166-6/+6
| | | | | | | Due to API change, the patch also fixes affected BSPs and uses value provided by MPU CTRL spec option there. Sponsored-By: Precidata
* bsps/zynqmp: Add JFFS2 NAND adapterKinsey Moore2023-03-152-0/+382
| | | | | This adds the glue code necessary to allow JFFS2 to operate on top of NAND memory hosted by the XNandPsu peripheral/driver.
* bsps/xnandpsu: Allow use of both chip selectsKinsey Moore2023-03-151-0/+4
| | | | | | By default, the Xilinx NAND driver does not probe the second chip select. This alteration allows the second half of chips to be detected when present.