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* bsps/arm: Add start up support for ARMv6 RPi ModelsPranav Dangi2021-07-071-1/+7
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* bsp/raspberrypi: Fix <bsp/irq.h> header guardSebastian Huber2021-07-071-1/+1
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* bsp/imx: Fix pointer from integer warningSebastian Huber2021-07-071-2/+5
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* build: Add option to customize the LINKFLAGSSebastian Huber2021-07-063-1/+19
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* Update test smpstrongapa01Richi Dubey2021-07-061-19/+47
| | | | Update smpstrongapa01 to account for task shifting.
* Fix compiler warnings for schedulerstrongapa.cRichi Dubey2021-07-061-4/+20
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* bsps/imxrt: Simplify linkcmds and make it flexibleChristian Mauderer2021-07-0218-131/+156
| | | | | | | | | Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes it simpler to support other types of external RAM. This patch also removes some of the calculations and improves names and documentation to avoid pitfalls. It removes a unnecessary memory definition. Update #4180
* bsps/imxrt: Allow different ARM PLL settingChristian Mauderer2021-07-023-0/+42
| | | | Update #4180
* m68k/uC5282: linkcmds KEEP and SORT sectionsGedare Bloom2021-07-011-15/+19
| | | | | Fixes a problem with bad epilog code in _fini and to keep sections necessary with the -ffunction/data-sections.
* Revert "bsps/zynqmp: Allow any or all CGEMs to be enabled"Kinsey Moore2021-07-015-72/+0
| | | | | | | This reverts commit 10041a4cfc00d5f6876d3d6cfc30c23347b4cf42. This type of configuration does not belong in RTEMS and is better constrained to libbsd where the defines are actually being used.
* bsp/leon3: Move bsp_interrupt_is_valid_vector()Sebastian Huber2021-07-012-16/+14
| | | | | This function is not performance critical. There is no need to implement it inline.
* bsp/leon3: Fix bsp_interrupt_is_valid_vector()Sebastian Huber2021-07-011-3/+7
| | | | | | | | | | The fix to address CID 1399742 (NO_EFFECT) in commit f8b6359415404540864f809cbcffb8c2200261e1 introduced a bug since LEON3_IrqCtrl_EIrq == -1 in case no extended interrupts are supported by the interrupt controller. Fix this by checking for LEON3_IrqCtrl_EIrq > 0. In addition, interrupt number 0 is reserved and should not be used.
* rtems: Do not broadcast to signal a condition varSebastian Huber2021-07-011-1/+1
| | | | Close #4463.
* bsps: Fix GICv3 support for AArch32Sebastian Huber2021-06-301-3/+3
| | | | | | | | | | | The GICv3 support is shared between AArch32 and AArch64. For AArch32, the new AARCH64_IS_NONSECURE is never defined. Use ARM_MULTILIB_ARCH_V4 instead. This issue was introduced by 76c6caad52244ab9a14151620a80ff0f71035b6c. There is still a change in bsp_interrupt_vector_enable() for AArch32 compared to the version before 76c6caad52244ab9a14151620a80ff0f71035b6c.
* bsps/cadence-spi: Fix moduleid offsetKinsey Moore2021-06-291-0/+1
| | | | | Move the moduleid register to the correct offset according to Cadence IP documentation.
* bsps/zynq-uart: Make post baud change kick globalKinsey Moore2021-06-293-5/+14
| | | | | | | | The existing fix for the ZynqMP UART hardware bug only caught the vast majority of instances where it could occur. To fully fix the data corruption, this fix must be applied after every baud rate change. This makes the logic reset and kick apply in any locations where the baud rate could be changed.
* spec/aarch64: fix abi flags for xilinx_versal_ilp32_vck190Gedare Bloom2021-06-291-0/+1
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* arm: For AArch32 use non-shareable memorySebastian Huber2021-06-291-2/+2
| | | | | | | | The Cortex-R52 does not support cache coherency and the shareable memory attribute. If a region is configured to be shareable, then it falls back to use non-cacheable memory. Update #4202.
* arm: Fix AARCH32_PMSA_ATTR_XN valueSebastian Huber2021-06-291-1/+1
| | | | Update #4202.
* arm: Fix AArch32 memory attribute definesSebastian Huber2021-06-291-4/+4
| | | | Update #4202.
* arm: Disable alignment check in PMSA initSebastian Huber2021-06-291-1/+1
| | | | | | | Disable the alignment check through SCTLR[A] in _AArch32_PMSA_Initialize(). Update #4202.
* bsps/zynqmp: Allow any or all CGEMs to be enabledKinsey Moore2021-06-285-0/+72
| | | | | | | Provide the options necessary to enable any combination of CGEM ethernet interfaces in LibBSD. The default is still CGEM3, so this should continue to operate as expected on typical Zynq Ultrascale+ MPSoC development hardware.
* aarch64: whitespace fixes in start.SGedare Bloom2021-06-241-166/+166
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* bsps/aarch64: replace boot options with asm switch codeGedare Bloom2021-06-245-29/+8
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* bsps/aarch64: add non-secure mode and versal supportGedare Bloom2021-06-2411-10/+105
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* bsps/aarch64: add physical secure timerGedare Bloom2021-06-244-0/+42
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* bsps/aarch64: add mnemonic for ICC_IGRPEN1_EL3Gedare Bloom2021-06-241-0/+1
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* bsps/dev/irq: make icspicfgr an indexable arrayGedare Bloom2021-06-241-4/+2
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* aarch64: add support to drop EL3 to EL2Kinsey Moore2021-06-241-1/+26
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* aarch64/xilinx-versal: new BSPs for qemu and vck190Gedare Bloom2021-06-2428-0/+1481
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* Update Strong APA SchedulerRichi Dubey2021-06-243-229/+924
| | | | | | | | | | This change allows for the migration of higher priority tasks on the arrival of a lower priority task limited by affinity constraints. Change license to BSD-2-Clause according to file history and re-licensing agreement. Update #3053.
* sparc: Simplify trap table initializationSebastian Huber2021-06-2415-170/+704
| | | | | | | | | | | | | | | Move _ISR_Handler() to a separate file since it is now only used if a handler is installed by _CPU_ISR_install_raw_handler(). Statically initialize the traps for external interrupts to use the new _SPARC_Interrupt_trap() which directly dispatches the interrupt handlers installed by rtems_interrupt_handler_install() via the BSP-provided _SPARC_Interrupt_dispatch(). Since the trap table is now fully statically initialized, there is no longer a dependency on the Cache Manager in the default configuration. Update #4458.
* bsps: bsp_interrupt_handler_dispatch_unchecked()Sebastian Huber2021-06-241-19/+40
| | | | | | Add bsp_interrupt_handler_dispatch_unchecked() as an alternative to bsp_interrupt_handler_dispatch(). It may be used if the caller can ensure that the vector number is valid.
* sparc: Move FP frame offset defines to cpuimpl.hSebastian Huber2021-06-242-57/+57
| | | | | | This makes them usable in multiple files. Update #4458.
* bsps/sparc: Use rtems_interrupt_handler_install()Sebastian Huber2021-06-2410-31/+98
| | | | | | | Avoid using set_vector() which depends on _ISR_Vector_table(). Prepare for a statically initialized trap table. Update #4458.
* sparc: More reliable bad trap handlingSebastian Huber2021-06-2423-585/+519
| | | | | | | | | | | | | Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap() for all unexpected traps. This enables a proper RTEMS fatal error handling right from the start. Do not rely on the stack and register settings which caused an unexpected trap. Use the ISR stack of the processor to do the fatal error handling. Save the full context which caused the trap. Fatal error handler may use it for error logging. Unify the _CPU_Exception_frame_print() implementations and move it to cpukit. Update #4459.
* sparc: Move ISR handler install routinesSebastian Huber2021-06-244-174/+203
| | | | | | | | Move _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector() to separate files. The goal is to make their use optional. Update #4458. Update #4459.
* bsps/sparc: Add a symbol for each trap table entrySebastian Huber2021-06-241-95/+264
| | | | | | | | This makes it easier to review start.o and set break points to trap table entries. This change was checked by inspecting the trap table in start.o with objdump. Update #4458.
* score: Move _ISR_Vector_table[] to separate fileSebastian Huber2021-06-244-8/+50
| | | | | | | | | | The _ISR_Handler_initialization() does not touch the _ISR_Vector_table[]. Move the definition of _ISR_Vector_table[] to a separate file. Change license to BSD-2-Clause according to file history and re-licensing agreement. Update #3053.
* score: Remove bogus _ISR_Nest_level settingSebastian Huber2021-06-241-4/+0
| | | | | | | This variable is actually contained in _Per_CPU_Information[] which is already zero initialized. Remove superfluous includes.
* score: Remove _CPU_Initialize_vectors()Sebastian Huber2021-06-2413-76/+0
| | | | | | | This CPU port macro was not used. Since the _ISR_Vector_table[] is statically allocated, CPU ports could initialize this table in _CPU_Initialize() if necessary. Remove _CPU_Initialize_vectors() to simplify the CPU port interface.
* bsp/atsam: Fix BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-241-1/+1
| | | | | | Fix an off by one error. Update #3269.
* bsps/irq: Default BSP_INTERRUPT_VECTOR_COUNT == 0Sebastian Huber2021-06-241-2/+5
| | | | | | | Change the default value of BSP_INTERRUPT_VECTOR_COUNT so that no interrupt vectors are supported and all related directives return RTEMS_INVALID_ID. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAXSebastian Huber2021-06-2455-65/+0
| | | | | | This define is no longer used. Update #3269.
* bsps/irq: Use BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-2416-22/+22
| | | | | | Use BSP_INTERRUPT_VECTOR_COUNT instead of BSP_INTERRUPT_VECTOR_MAX. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_NUMBERSebastian Huber2021-06-242-4/+2
| | | | | | Replace it with BSP_INTERRUPT_VECTOR_COUNT. Update #3269.
* bsps/irq: Add BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-2455-0/+67
| | | | | | | | | | | | | Assert BSP_INTERRUPT_VECTOR_MAX + 1 == BSP_INTERRUPT_VECTOR_COUNT. After building all BSPs with this patch, BSP_INTERRUPT_VECTOR_MAX can be removed and replaced by BSP_INTERRUPT_VECTOR_COUNT. The BSP_INTERRUPT_VECTOR_COUNT allows a default implementation which supports no interrupt vector at all. Using COUNT instead of MAX may avoid some interpretation issues, for example is the maximum value a valid vector number or not. Update #3269.
* smpcapture02: Fix use of BSP_INTERRUPT_VECTOR_MAXSebastian Huber2021-06-241-1/+1
| | | | | | This define represents the last valid interrupt vector number. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MINSebastian Huber2021-06-2461-107/+16
| | | | | | | | | | Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector numbers start with zero. The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit and building all BSPs. Update #3269.
* bsps/irq: Assert BSP_INTERRUPT_VECTOR_MIN == 0Sebastian Huber2021-06-241-0/+4
| | | | | | | After building all BSPs with this patch, this BSP-specific define can be removed to simplify the implementation. Update #3269.
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