aarch64/xilinx-versal: new BSPs for qemu and vck190

28 files changed, 1481 insertions, 0 deletions

diff --git a/bsps/aarch64/xilinx-versal/console/console.c b/bsps/aarch64/xilinx-versal/console/console.c
new file mode 100644
index 0000000000..e7f752f1a7
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/console/console.c
@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxVersal
+ *
+ * @brief This source file contains this BSP's console configuration.
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <rtems/console.h>
+#include <rtems/bspIo.h>
+#include <rtems/sysinit.h>
+
+#include <bsp/irq.h>
+#include <dev/serial/versal-uart.h>
+
+#include <bspopts.h>
+
+static versal_uart_context versal_uart_instances[2] = {
+  {
+    .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Versal UART 0" ),
+    .regs = (volatile struct versal_uart *) 0xff000000,
+    .irq = VERSAL_IRQ_UART_0
+  }, {
+    .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Versal UART 1" ),
+    .regs = (volatile struct versal_uart *) 0xff010000,
+    .irq = VERSAL_IRQ_UART_1
+  }
+};
+
+rtems_status_code console_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *arg
+)
+{
+  size_t i;
+
+  rtems_termios_initialize();
+
+  for (i = 0; i < RTEMS_ARRAY_SIZE(versal_uart_instances); ++i) {
+    char uart[] = "/dev/ttySX";
+
+    uart[sizeof(uart) - 2] = (char) ('0' + i);
+    rtems_termios_device_install(
+      &uart[0],
+      &versal_uart_handler,
+      NULL,
+      &versal_uart_instances[i].base
+    );
+
+    if (i == BSP_CONSOLE_MINOR) {
+      link(&uart[0], CONSOLE_DEVICE_NAME);
+    }
+  }
+
+  return RTEMS_SUCCESSFUL;
+}
+
+void versal_debug_console_flush(void)
+{
+  versal_uart_reset_tx_flush(&versal_uart_instances[BSP_CONSOLE_MINOR].base);
+}
+
+static void versal_debug_console_out(char c)
+{
+  rtems_termios_device_context *base =
+    &versal_uart_instances[BSP_CONSOLE_MINOR].base;
+
+  versal_uart_write_polled(base, c);
+}
+
+static void versal_debug_console_init(void)
+{
+  rtems_termios_device_context *base =
+    &versal_uart_instances[BSP_CONSOLE_MINOR].base;
+
+  (void) versal_uart_initialize(base);
+  BSP_output_char = versal_debug_console_out;
+}
+
+static void versal_debug_console_early_init(char c)
+{
+  rtems_termios_device_context *base =
+    &versal_uart_instances[BSP_CONSOLE_MINOR].base;
+
+  (void) versal_uart_initialize(base);
+  BSP_output_char = versal_debug_console_out;
+  versal_debug_console_out(c);
+}
+
+static int versal_debug_console_in(void)
+{
+  rtems_termios_device_context *base =
+    &versal_uart_instances[BSP_CONSOLE_MINOR].base;
+
+  return versal_uart_read_polled(base);
+}
+
+BSP_output_char_function_type BSP_output_char = versal_debug_console_early_init;
+
+BSP_polling_getchar_function_type BSP_poll_char = versal_debug_console_in;
+
+RTEMS_SYSINIT_ITEM(
+  versal_debug_console_init,
+  RTEMS_SYSINIT_BSP_START,
+  RTEMS_SYSINIT_ORDER_LAST_BUT_5
+);
diff --git a/bsps/aarch64/xilinx-versal/dev/serial/versal-uart-polled.c b/bsps/aarch64/xilinx-versal/dev/serial/versal-uart-polled.c
new file mode 100644
index 0000000000..be46c99efd
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/dev/serial/versal-uart-polled.c
@@ -0,0 +1,228 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org> 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <dev/serial/versal-uart.h>
+#include <dev/serial/versal-uart-regs.h>
+
+#include <bspopts.h>
+
+static inline volatile versal_uart *versal_uart_get_regs(
+  rtems_termios_device_context *base
+)
+{
+  versal_uart_context *ctx = (versal_uart_context *) base;
+  return ctx->regs;
+}
+
+/*
+ * Make weak and let the user override.
+ */
+uint32_t versal_uart_input_clock(void) __attribute__ ((weak));
+
+uint32_t versal_uart_input_clock(void)
+{
+  return VERSAL_CLOCK_UART;
+}
+
+int32_t versal_cal_baud_rate(
+  uint32_t baudrate,
+  uint32_t maxerror,
+  uint32_t *ibdiv,
+  uint32_t *fbdiv
+)
+{
+  uint32_t calcbaudrate;
+  uint32_t bauderror;
+  uint32_t percenterror;
+  uint32_t fbdivrnd;
+  uint32_t inputclk = versal_uart_input_clock();
+
+  /*
+   * The baud rate cannot be larger than the UART clock / 16.
+   */
+  if ((baudrate * 16) > inputclk) {
+    return -1;
+  }
+
+  /* 
+   * The UART clock cannot be larger than 16*65535*baudrate.
+   * Could maybe use an estimate (inputclk / 2**16) to save a division.
+   * This invariant gets checked below, by ensuring ibdiv < 2**16.
+   */
+
+  /*
+   * The UART clock cannot be more than 5/3 times faster than the LPD_LSBUS_CLK
+   *  - TODO?
+   */
+  
+  /*
+   * The baud rate divisor is a 16-bit integer and 6-bit fractional part.
+   * It is equal to the UART clock / (16 * baudrate).
+   */
+  *ibdiv = inputclk / 16 / baudrate;
+  if ( *ibdiv > 1<<16 ) {
+    return -1;
+  }
+
+  /*
+   * Find the fractional part. This can overflow with 32-bit arithmetic if
+   * inputclk > 536870911, so use 64-bit. Unfortunately, this means we have
+   * two 64-bit divisions here.
+   */
+  fbdivrnd = ((((uint64_t)inputclk / 16) << 7) / baudrate) & 0x1;
+  *fbdiv = (((((uint64_t)inputclk / 16) << 6) / baudrate) & 0x3F) + fbdivrnd;
+
+  /*
+   * calculate the baudrate and check if the error is too large.
+   */
+  calcbaudrate = (((uint64_t)inputclk / 16) << 6) / ((*ibdiv << 6) | *fbdiv);
+
+  if (baudrate > calcbaudrate) {
+    bauderror = baudrate - calcbaudrate;
+  } else {
+    bauderror = calcbaudrate - baudrate;
+  }
+
+  percenterror = (bauderror * 100) / baudrate;
+
+  if (maxerror < percenterror) {
+    return -1;
+  }
+
+  return 0;
+}
+
+int versal_uart_initialize(rtems_termios_device_context *base)
+{
+  volatile versal_uart *regs = versal_uart_get_regs(base);
+  uint32_t maxerr = 3;
+  uint32_t ibauddiv = 0;
+  uint32_t fbauddiv = 0;
+  int rv;
+
+  versal_uart_reset_tx_flush(base);
+
+  rv = versal_cal_baud_rate(
+      VERSAL_UART_DEFAULT_BAUD,
+      maxerr,
+      &ibauddiv,
+      &fbauddiv
+  );
+
+  if ( rv < 0 ) {
+    return rv;
+  }
+
+  /* Line control: 8-bit word length, no parity, no FIFO, 1 stop bit */
+  regs->uartlcr_h = VERSAL_UARTLCR_H_WLEN( VERSAL_UARTLCR_H_WLEN_8 );
+
+  /* Control: receive, transmit, uart enable, no CTS, no RTS, no loopback */
+  regs->uartcr = VERSAL_UARTCR_RXE
+    | VERSAL_UARTCR_TXE
+    | VERSAL_UARTCR_UARTEN;
+
+  regs->uartibrd = VERSAL_UARTIBRD_BAUD_DIVINT(ibauddiv);
+  regs->uartfbrd = VERSAL_UARTFBRD_BAUD_DIVFRAC(fbauddiv);
+
+  return 0;
+}
+
+static bool versal_uart_first_open(
+  struct rtems_termios_tty *tty,
+  rtems_termios_device_context *base,
+  struct termios *term,
+  rtems_libio_open_close_args_t *args
+)
+{
+  int rc = versal_uart_initialize(base);
+  if ( rc < 0 ) {
+    return false;
+  }
+
+  rtems_termios_set_initial_baud(tty, VERSAL_UART_DEFAULT_BAUD);
+
+  return true;
+}
+
+int versal_uart_read_polled(rtems_termios_device_context *base)
+{
+  volatile versal_uart *regs = versal_uart_get_regs(base);
+
+  if ((regs->uartfr & VERSAL_UARTFR_RXFE) != 0) {
+    return -1;
+  } else {
+    return VERSAL_UARTDR_DATA_GET(regs->uartdr);
+  }
+}
+
+void versal_uart_write_polled(
+  rtems_termios_device_context *base,
+  char c
+)
+{
+  volatile versal_uart *regs = versal_uart_get_regs(base);
+
+  while ((regs->uartfr & VERSAL_UARTFR_TXFF) != 0) {
+    /* Wait while full */
+  }
+
+  regs->uartdr = VERSAL_UARTDR_DATA(c);
+}
+
+void versal_uart_reset_tx_flush(rtems_termios_device_context *base)
+{
+  volatile versal_uart *regs = versal_uart_get_regs(base);
+  int c = 4;
+
+  while (c-- > 0)
+    versal_uart_write_polled(base, '\r');
+
+  while ((regs->uartfr & VERSAL_UARTFR_TXFE) == 0) {
+    /* Wait for empty */
+  }
+}
+
+static void versal_uart_write_support(
+  rtems_termios_device_context *base,
+  const char *s,
+  size_t n
+)
+{
+  size_t i;
+
+  for (i = 0; i < n; i++) {
+    versal_uart_write_polled(base, s[i]);
+  }
+}
+
+const rtems_termios_device_handler versal_uart_handler = {
+  .first_open = versal_uart_first_open,
+  .write = versal_uart_write_support,
+  .poll_read = versal_uart_read_polled,
+  .mode = TERMIOS_POLLED
+};
+
diff --git a/bsps/aarch64/xilinx-versal/include/bsp.h b/bsps/aarch64/xilinx-versal/include/bsp.h
new file mode 100644
index 0000000000..2017e10ade
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/include/bsp.h
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxVersal
+ *
+ * @brief This header file provides the core BSP definitions
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_AARCH64_XILINX_VERSAL_BSP_H
+#define LIBBSP_AARCH64_XILINX_VERSAL_BSP_H
+
+/**
+ * @addtogroup RTEMSBSPsAArch64
+ *
+ * @{
+ */
+
+#include <bspopts.h>
+
+#ifndef ASM
+
+#include <bsp/default-initial-extension.h>
+#include <bsp/start.h>
+
+#include <rtems.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define BSP_ARM_GIC_CPUIF_BASE 0xf9040000
+#define BSP_ARM_GIC_DIST_BASE 0xf9000000
+#define BSP_ARM_GIC_REDIST_BASE 0xf9080000
+
+#define BSP_RESET_SMC
+
+/**
+ * @brief Versal specific set up of the MMU.
+ *
+ * Provide in the application to override the defaults in the BSP.
+ */
+BSP_START_TEXT_SECTION void versal_setup_mmu_and_cache(void);
+
+void versal_debug_console_flush(void);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* ASM */
+
+/** @} */
+
+#endif /* LIBBSP_AARCH64_XILINX_VERSAL_BSP_H */
diff --git a/bsps/aarch64/xilinx-versal/include/bsp/irq.h b/bsps/aarch64/xilinx-versal/include/bsp/irq.h
new file mode 100644
index 0000000000..ec39b727d9
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/include/bsp/irq.h
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxVersal
+ *
+ * @brief This header file provides the BSP's IRQ definitions.
+ */
+
+/*
+ * Copyright (C) Gedare Bloom <gedare@rtems.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H
+#define LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H
+
+#ifndef ASM
+
+#include <rtems/irq.h>
+#include <rtems/irq-extension.h>
+
+#include <dev/irq/arm-gic-irq.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define BSP_INTERRUPT_VECTOR_COUNT 1024
+
+/* Interrupts vectors */
+#define BSP_TIMER_VIRT_PPI 27
+#define BSP_TIMER_PHYS_NS_PPI 30
+#define VERSAL_IRQ_UART_0 50
+#define VERSAL_IRQ_UART_1 51
+#define VERSAL_IRQ_ETHERNET_0 88
+#define VERSAL_IRQ_ETHERNET_0_WAKEUP 89
+#define VERSAL_IRQ_ETHERNET_1 90
+#define VERSAL_IRQ_ETHERNET_1_WAKEUP 91
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* ASM */
+
+#endif /* LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H */
diff --git a/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart-regs.h b/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart-regs.h
new file mode 100644
index 0000000000..59db8f950a
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart-regs.h
@@ -0,0 +1,141 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup versal_uart_regs
+ *
+ * @brief Xilinx Versal UART register definitions.
+ *
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @defgroup versal_uart_regs Xilinx Versal UART Register Definitions
+ * @ingroup versal
+ * @brief Xilinx Versal UART Register Definitions
+ * @{
+ */
+
+#ifndef LIBBSP_ARM_XILINX_VERSAL_UART_REGS_H
+#define LIBBSP_ARM_XILINX_VERSAL_UART_REGS_H
+
+#include <bsp/utility.h>
+
+#define VERSAL_UART_FIFO_DEPTH 64
+
+typedef struct versal_uart {
+  uint32_t uartdr;
+#define VERSAL_UARTDR_OE BSP_BIT32(11)
+#define VERSAL_UARTDR_BE BSP_BIT32(10)
+#define VERSAL_UARTDR_PE BSP_BIT32(9)
+#define VERSAL_UARTDR_FE BSP_BIT32(8)
+#define VERSAL_UARTDR_DATA(val) BSP_FLD32(val, 0, 7)
+#define VERSAL_UARTDR_DATA_GET(reg) BSP_FLD32GET(reg, 0, 7)
+#define VERSAL_UARTDR_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
+  uint32_t uartrsr_uartecr;
+#define VERSAL_UARTRSR_UARTECR_OE BSP_BIT32(3)
+#define VERSAL_UARTRSR_UARTECR_BE BSP_BIT32(2)
+#define VERSAL_UARTRSR_UARTECR_PE BSP_BIT32(1)
+#define VERSAL_UARTRSR_UARTECR_FE BSP_BIT32(0)
+  uint32_t reserved_08[4];
+  uint32_t uartfr;
+#define VERSAL_UARTFR_RI BSP_BIT32(8)
+#define VERSAL_UARTFR_TXFE BSP_BIT32(7)
+#define VERSAL_UARTFR_RXFF BSP_BIT32(6)
+#define VERSAL_UARTFR_TXFF BSP_BIT32(5)
+#define VERSAL_UARTFR_RXFE BSP_BIT32(4)
+#define VERSAL_UARTFR_BUSY BSP_BIT32(3)
+#define VERSAL_UARTFR_DCD BSP_BIT32(2)
+#define VERSAL_UARTFR_DSR BSP_BIT32(1)
+#define VERSAL_UARTFR_CTS BSP_BIT32(0)
+  uint32_t reserved_1c;
+  uint32_t uartilpr;
+#define VERSAL_UARTILPR_ILPDVSR(val) BSP_FLD32(val, 0, 7)
+#define VERSAL_UARTILPR_ILPDVSR_GET(reg) BSP_FLD32GET(reg, 0, 7)
+#define VERSAL_UARTILPR_ILPDVSR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
+  uint32_t uartibrd;
+#define VERSAL_UARTIBRD_BAUD_DIVINT(val) BSP_FLD32(val, 0, 15)
+#define VERSAL_UARTIBRD_BAUD_DIVINT_GET(reg) BSP_FLD32GET(reg, 0, 15)
+#define VERSAL_UARTIBRD_BAUD_DIVINT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15)
+  uint32_t uartfbrd;
+#define VERSAL_UARTFBRD_BAUD_DIVFRAC(val) BSP_FLD32(val, 0, 5)
+#define VERSAL_UARTFBRD_BAUD_DIVFRAC_GET(reg) BSP_FLD32GET(reg, 0, 5)
+#define VERSAL_UARTFBRD_BAUD_DIVFRAC_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5)
+  uint32_t uartlcr_h;
+#define VERSAL_UARTLCR_H_SPS BSP_BIT32(7)
+#define VERSAL_UARTLCR_H_WLEN(val) BSP_FLD32(val, 5, 6)
+#define VERSAL_UARTLCR_H_WLEN_GET(reg) BSP_FLD32GET(reg, 5, 6)
+#define VERSAL_UARTLCR_H_WLEN_SET(reg, val) BSP_FLD32SET(reg, val, 5, 6)
+#define VERSAL_UARTLCR_H_WLEN_5 0x00U
+#define VERSAL_UARTLCR_H_WLEN_6 0x01U
+#define VERSAL_UARTLCR_H_WLEN_7 0x02U
+#define VERSAL_UARTLCR_H_WLEN_8 0x03U
+#define VERSAL_UARTLCR_H_FEN BSP_BIT32(4)
+#define VERSAL_UARTLCR_H_STP2 BSP_BIT32(3)
+#define VERSAL_UARTLCR_H_EPS BSP_BIT32(2)
+#define VERSAL_UARTLCR_H_PEN BSP_BIT32(1)
+#define VERSAL_UARTLCR_H_BRK BSP_BIT32(0)
+  uint32_t uartcr;
+#define VERSAL_UARTCR_CTSEN BSP_BIT32(15)
+#define VERSAL_UARTCR_RTSEN BSP_BIT32(14)
+#define VERSAL_UARTCR_OUT2 BSP_BIT32(13)
+#define VERSAL_UARTCR_OUT1 BSP_BIT32(12)
+#define VERSAL_UARTCR_RTS BSP_BIT32(11)
+#define VERSAL_UARTCR_DTR BSP_BIT32(10)
+#define VERSAL_UARTCR_RXE BSP_BIT32(9)
+#define VERSAL_UARTCR_TXE BSP_BIT32(8)
+#define VERSAL_UARTCR_LBE BSP_BIT32(7)
+//#define VERSAL_UARTCR_SIREN BSP_BIT32()?
+#define VERSAL_UARTCR_UARTEN BSP_BIT32(0)
+  uint32_t uartifls;
+#define VERSAL_UARTIFLS_RXIFLSEL(val) BSP_FLD32(val, 3, 5)
+#define VERSAL_UARTIFLS_RXIFLSEL_GET(reg) BSP_FLD32GET(reg, 3, 5)
+#define VERSAL_UARTIFLS_RXIFLSEL_SET(reg, val) BSP_FLD32SET(reg, val, 3, 5)
+#define VERSAL_UARTIFLS_TXIFLSEL(val) BSP_FLD32(val, 0, 2)
+#define VERSAL_UARTIFLS_TXIFLSEL_GET(reg) BSP_FLD32GET(reg, 0, 2)
+#define VERSAL_UARTIFLS_TXIFLSEL_SET(reg, val) BSP_FLD32SET(reg, val, 0, 2)
+  uint32_t uartimsc;
+  uint32_t uartris;
+  uint32_t uartmis;
+  uint32_t uarticr;
+#define VERSAL_UARTI_OEI BSP_BIT32(10)
+#define VERSAL_UARTI_BEI BSP_BIT32(9)
+#define VERSAL_UARTI_PEI BSP_BIT32(8)
+#define VERSAL_UARTI_FEI BSP_BIT32(7)
+#define VERSAL_UARTI_RTI BSP_BIT32(6)
+#define VERSAL_UARTI_TXI BSP_BIT32(5)
+#define VERSAL_UARTI_RXI BSP_BIT32(4)
+#define VERSAL_UARTI_DSRMI BSP_BIT32(3)
+#define VERSAL_UARTI_DCDMI BSP_BIT32(2)
+#define VERSAL_UARTI_CTSMI BSP_BIT32(1)
+#define VERSAL_UARTI_RIMI BSP_BIT32(0)
+} versal_uart;
+
+/** @} */
+
+#endif /* LIBBSP_ARM_XILINX_ZYNQ_UART_REGS_H */
diff --git a/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart.h b/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart.h
new file mode 100644
index 0000000000..95b5172218
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart.h
@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup versal_uart
+ *
+ * @brief Xilinx Versal UART support.
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_ARM_XILINX_VERSAL_UART_H
+#define LIBBSP_ARM_XILINX_VERSAL_UART_H
+
+#include <rtems/termiostypes.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @defgroup versal_uart Xilinx Versal UART Support
+ * @ingroup RTEMSBSPsARMVersal
+ * @brief UART Support
+ *
+ * This driver operates an instance of the Xilinx UART present in the
+ * family of Xilinx Versal SoCs.
+ */
+
+typedef struct {
+  rtems_termios_device_context base;
+  volatile struct versal_uart *regs;
+  bool transmitting; /* Currently unused */
+  rtems_vector_number irq;
+} versal_uart_context;
+
+extern const rtems_termios_device_handler versal_uart_handler;
+
+#define VERSAL_UART_DEFAULT_BAUD 115200
+
+int versal_uart_initialize(rtems_termios_device_context *base);
+
+int versal_uart_read_polled(rtems_termios_device_context *base);
+
+void versal_uart_write_polled(
+  rtems_termios_device_context *base,
+  char c
+);
+
+/**
+  * Flush TX FIFO and wait until it is empty.
+  */
+void versal_uart_reset_tx_flush(rtems_termios_device_context *base);
+
+int versal_cal_baud_rate(
+  uint32_t  baudrate,
+  uint32_t  maxerror,
+  uint32_t* ibdiv,
+  uint32_t* fbdiv
+);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_XILINX_VERSAL_UART_H */
diff --git a/bsps/aarch64/xilinx-versal/include/tm27.h b/bsps/aarch64/xilinx-versal/include/tm27.h
new file mode 100644
index 0000000000..acf26a255d
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/include/tm27.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxVersal
+ *
+ * @brief This header file provides functionality for the tm27 test.
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+#include <dev/irq/arm-gic-tm27.h>
+
+#endif /* __tm27_h */
diff --git a/bsps/aarch64/xilinx-versal/start/bspstart.c b/bsps/aarch64/xilinx-versal/start/bspstart.c
new file mode 100644
index 0000000000..2f0048ddf3
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/start/bspstart.c
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxVersal
+ *
+ * @brief This source file contains the implementation of bsp_start().
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <bsp/irq-generic.h>
+#include <bsp/linker-symbols.h>
+
+void bsp_start( void )
+{
+  bsp_interrupt_initialize();
+  rtems_cache_coherent_add_area(
+    bsp_section_nocacheheap_begin,
+    (uintptr_t) bsp_section_nocacheheap_size
+  );
+}
diff --git a/bsps/aarch64/xilinx-versal/start/bspstarthooks.c b/bsps/aarch64/xilinx-versal/start/bspstarthooks.c
new file mode 100644
index 0000000000..be98675a24
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/start/bspstarthooks.c
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxVersal
+ *
+ * @brief This source file contains the implementation of this BSP's startup
+ *   hooks.
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <bsp.h>
+#include <bsp/start.h>
+
+BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
+{
+  /* Do nothing */
+}
+
+BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
+{
+  AArch64_start_set_vector_base();
+  bsp_start_copy_sections();
+  versal_setup_mmu_and_cache();
+  bsp_start_clear_bss();
+}
diff --git a/bsps/aarch64/xilinx-versal/start/bspstartmmu.c b/bsps/aarch64/xilinx-versal/start/bspstartmmu.c
new file mode 100644
index 0000000000..6ab33cc4f1
--- /dev/null
+++ b/bsps/aarch64/xilinx-versal/start/bspstartmmu.c
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsAArch64XilinxVersal
+ *
+ * @brief This source file contains the default MMU tables and setup.
+ */
+
+/*
+ * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <bsp.h>
+#include <bsp/start.h>
+#include <bsp/aarch64-mmu.h>
+
+BSP_START_DATA_SECTION static const aarch64_mmu_config_entry
+versal_mmu_config_table[] = {
+  AARCH64_MMU_DEFAULT_SECTIONS,
+  {  /* APU GIC */
+    .begin = 0xf9000000U,
+    .end = 0xf90c0000U,
+    .flags = AARCH64_MMU_DEVICE
+  }, { /* FPD CSRs */
+    .begin = 0xfd000000U,
+    .end = 0xfe000000U,
+    .flags = AARCH64_MMU_DEVICE
+  }, { /* LPD CSRs */
+    .begin = 0xfe000000U,
+    .end = 0xfe800000U,
+    .flags = AARCH64_MMU_DEVICE
+  }, { /* LPD IOP CSRs and LPD peripherals */
+    .begin = 0xff000000U,
+    .end = 0xffc00000U,
+    .flags = AARCH64_MMU_DEVICE
+  }
+};
+
+/*
+ * Make weak and let the user override.
+ */
+BSP_START_TEXT_SECTION void
+versal_setup_mmu_and_cache( void ) __attribute__ ((weak));
+
+BSP_START_TEXT_SECTION void
+versal_setup_mmu_and_cache( void )
+{
+  aarch64_mmu_setup();
+
+  aarch64_mmu_setup_translation_table_and_enable(
+    &versal_mmu_config_table[ 0 ],
+    RTEMS_ARRAY_SIZE( versal_mmu_config_table )
+  );
+}
diff --git a/spec/build/bsps/aarch64/xilinx-versal/abi.yml b/spec/build/bsps/aarch64/xilinx-versal/abi.yml
new file mode 100644
index 0000000000..67340ffa08
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/abi.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom 
+default:
+- -mcpu=cortex-a72
+default-by-variant:
+- value:
+  - -mcpu=cortex-a72
+  - -mabi=ilp32
+  variants:
+  - aarch64/xilinx_versal_ilp32_qemu
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/bspqemuilp32.yml b/spec/build/bsps/aarch64/xilinx-versal/bspqemuilp32.yml
new file mode 100644
index 0000000000..85d508a6f4
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspqemuilp32.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: aarch64
+bsp: xilinx_versal_ilp32_qemu
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2021 Gedare Bloom 
+cppflags: []
+enabled-by: true
+family: xilinx-versal
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: tstqemu
+- role: build-dependency
+  uid: linkcmds_ilp32
+source: []
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/bspqemulp64.yml b/spec/build/bsps/aarch64/xilinx-versal/bspqemulp64.yml
new file mode 100644
index 0000000000..5df2483d34
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspqemulp64.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: aarch64
+bsp: xilinx_versal_lp64_qemu
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2021 Gedare Bloom 
+cppflags: []
+enabled-by: true
+family: xilinx-versal
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: tstqemu
+- role: build-dependency
+  uid: linkcmds_lp64
+source: []
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/bspvck190ilp32.yml b/spec/build/bsps/aarch64/xilinx-versal/bspvck190ilp32.yml
new file mode 100644
index 0000000000..741b28c6e8
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspvck190ilp32.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: aarch64
+bsp: xilinx_versal_ilp32_vck190
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+cppflags: []
+enabled-by: true
+family: xilinx-versal
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp_vck190
+- role: build-dependency
+  uid: linkcmds_ilp32
+source: []
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml b/spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml
new file mode 100644
index 0000000000..b33a10f8f0
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: aarch64
+bsp: xilinx_versal_lp64_vck190
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+cppflags: []
+enabled-by: true
+family: xilinx-versal
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp_vck190
+- role: build-dependency
+  uid: linkcmds_lp64
+source: []
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/grp.yml b/spec/build/bsps/aarch64/xilinx-versal/grp.yml
new file mode 100644
index 0000000000..7c7dea0fef
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/grp.yml
@@ -0,0 +1,50 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2021 Gedare Bloom 
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: ../start
+- role: build-dependency
+  uid: ../optmmupages
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: obj
+- role: build-dependency
+  uid: optloadoff
+- role: build-dependency
+  uid: optnocachelen
+- role: build-dependency
+  uid: optramlen
+- role: build-dependency
+  uid: optramori
+- role: build-dependency
+  uid: optclkuart
+- role: build-dependency
+  uid: optconminor
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+- role: build-dependency
+  uid: ../../objdevspizynq
+- role: build-dependency
+  uid: ../../objdevspixil
+- role: build-dependency
+  uid: ../../optcachedata
+- role: build-dependency
+  uid: ../../optcacheinst
+- role: build-dependency
+  uid: ../../opto2
+- role: build-dependency
+  uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/aarch64/xilinx-versal/grp_vck190.yml b/spec/build/bsps/aarch64/xilinx-versal/grp_vck190.yml
new file mode 100644
index 0000000000..c10f2a725f
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/grp_vck190.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: ../../optstarthyp
+- role: build-dependency
+  uid: tstvck190
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml b/spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml
new file mode 100644
index 0000000000..3030fd0ae9
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml
@@ -0,0 +1,74 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+  /* SPDX-License-Identifier: BSD-2-Clause */
+
+  /*
+   * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org> 
+   *
+   * Redistribution and use in source and binary forms, with or without
+   * modification, are permitted provided that the following conditions
+   * are met:
+   * 1. Redistributions of source code must retain the above copyright
+   *    notice, this list of conditions and the following disclaimer.
+   * 2. Redistributions in binary form must reproduce the above copyright
+   *    notice, this list of conditions and the following disclaimer in the
+   *    documentation and/or other materials provided with the distribution.
+   *
+   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+   * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   * POSSIBILITY OF SUCH DAMAGE.
+   */
+
+  MEMORY {
+    RAM       : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} + ${BSP_XILINX_VERSAL_LOAD_OFFSET}, LENGTH = ${BSP_XILINX_VERSAL_RAM_LENGTH} - ${BSP_XILINX_VERSAL_LOAD_OFFSET} - ${BSP_XILINX_VERSAL_NOCACHE_LENGTH} - (0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES})
+    NOCACHE   : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} + ${BSP_XILINX_VERSAL_RAM_LENGTH} - (0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}) - ${BSP_XILINX_VERSAL_NOCACHE_LENGTH}, LENGTH = ${BSP_XILINX_VERSAL_NOCACHE_LENGTH}
+    RAM_MMU   : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} + ${BSP_XILINX_VERSAL_RAM_LENGTH} - (0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}), LENGTH = 0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}
+  }
+
+  REGION_ALIAS ("REGION_START",          RAM);
+  REGION_ALIAS ("REGION_VECTOR",         RAM);
+  REGION_ALIAS ("REGION_TEXT",           RAM);
+  REGION_ALIAS ("REGION_TEXT_LOAD",      RAM);
+  REGION_ALIAS ("REGION_RODATA",         RAM);
+  REGION_ALIAS ("REGION_RODATA_LOAD",    RAM);
+  REGION_ALIAS ("REGION_DATA",           RAM);
+  REGION_ALIAS ("REGION_DATA_LOAD",      RAM);
+  REGION_ALIAS ("REGION_FAST_TEXT",      RAM);
+  REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
+  REGION_ALIAS ("REGION_FAST_DATA",      RAM);
+  REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
+  REGION_ALIAS ("REGION_BSS",            RAM);
+  REGION_ALIAS ("REGION_WORK",           RAM);
+  REGION_ALIAS ("REGION_STACK",          RAM);
+  REGION_ALIAS ("REGION_NOCACHE",        NOCACHE);
+  REGION_ALIAS ("REGION_NOCACHE_LOAD",   NOCACHE);
+
+  bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ? bsp_stack_exception_size : 1024;
+
+  bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
+
+  bsp_vector_table_in_start_section = 1;
+
+  bsp_translation_table_base = ORIGIN (RAM_MMU);
+  bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
+
+  OUTPUT_FORMAT ("elf32-littleaarch64")
+  OUTPUT_ARCH (aarch64:ilp32)
+
+  INCLUDE linkcmds.base
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/linkcmds_lp64.yml b/spec/build/bsps/aarch64/xilinx-versal/linkcmds_lp64.yml
new file mode 100644
index 0000000000..bd5d1f791b
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/linkcmds_lp64.yml
@@ -0,0 +1,74 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+  /* SPDX-License-Identifier: BSD-2-Clause */
+
+  /*
+   * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org> 
+   *
+   * Redistribution and use in source and binary forms, with or without
+   * modification, are permitted provided that the following conditions
+   * are met:
+   * 1. Redistributions of source code must retain the above copyright
+   *    notice, this list of conditions and the following disclaimer.
+   * 2. Redistributions in binary form must reproduce the above copyright
+   *    notice, this list of conditions and the following disclaimer in the
+   *    documentation and/or other materials provided with the distribution.
+   *
+   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+   * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   * POSSIBILITY OF SUCH DAMAGE.
+   */
+
+  MEMORY {
+    RAM       : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} + ${BSP_XILINX_VERSAL_LOAD_OFFSET}, LENGTH = ${BSP_XILINX_VERSAL_RAM_LENGTH} - ${BSP_XILINX_VERSAL_LOAD_OFFSET} - ${BSP_XILINX_VERSAL_NOCACHE_LENGTH} - (0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES})
+    NOCACHE   : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} + ${BSP_XILINX_VERSAL_RAM_LENGTH} - (0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}) - ${BSP_XILINX_VERSAL_NOCACHE_LENGTH}, LENGTH = ${BSP_XILINX_VERSAL_NOCACHE_LENGTH}
+    RAM_MMU   : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} + ${BSP_XILINX_VERSAL_RAM_LENGTH} - (0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}), LENGTH = 0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}
+  }
+
+  REGION_ALIAS ("REGION_START",          RAM);
+  REGION_ALIAS ("REGION_VECTOR",         RAM);
+  REGION_ALIAS ("REGION_TEXT",           RAM);
+  REGION_ALIAS ("REGION_TEXT_LOAD",      RAM);
+  REGION_ALIAS ("REGION_RODATA",         RAM);
+  REGION_ALIAS ("REGION_RODATA_LOAD",    RAM);
+  REGION_ALIAS ("REGION_DATA",           RAM);
+  REGION_ALIAS ("REGION_DATA_LOAD",      RAM);
+  REGION_ALIAS ("REGION_FAST_TEXT",      RAM);
+  REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
+  REGION_ALIAS ("REGION_FAST_DATA",      RAM);
+  REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
+  REGION_ALIAS ("REGION_BSS",            RAM);
+  REGION_ALIAS ("REGION_WORK",           RAM);
+  REGION_ALIAS ("REGION_STACK",          RAM);
+  REGION_ALIAS ("REGION_NOCACHE",        NOCACHE);
+  REGION_ALIAS ("REGION_NOCACHE_LOAD",   NOCACHE);
+
+  bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ? bsp_stack_exception_size : 1024;
+
+  bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
+
+  bsp_vector_table_in_start_section = 1;
+
+  bsp_translation_table_base = ORIGIN (RAM_MMU);
+  bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
+
+  OUTPUT_FORMAT ("elf64-littleaarch64")
+  OUTPUT_ARCH (aarch64)
+
+  INCLUDE linkcmds.base
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org> 
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/obj.yml b/spec/build/bsps/aarch64/xilinx-versal/obj.yml
new file mode 100644
index 0000000000..79e7000b52
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/obj.yml
@@ -0,0 +1,44 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org> 
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/aarch64/xilinx-versal/include/bsp.h
+  - bsps/aarch64/xilinx-versal/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/aarch64/xilinx-versal/include/bsp/irq.h
+  - bsps/aarch64/include/bsp/aarch64-mmu.h
+- destination: ${BSP_INCLUDEDIR}/dev/serial
+  source:
+  - bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart-regs.h
+  - bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart.h
+links: []
+source:
+- bsps/aarch64/shared/cache/cache.c
+- bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c
+- bsps/aarch64/xilinx-versal/console/console.c
+- bsps/aarch64/xilinx-versal/dev/serial/versal-uart-polled.c
+- bsps/aarch64/xilinx-versal/start/bspstart.c
+- bsps/aarch64/xilinx-versal/start/bspstarthooks.c
+- bsps/aarch64/xilinx-versal/start/bspstartmmu.c
+- bsps/shared/dev/btimer/btimer-cpucounter.c
+- bsps/shared/dev/clock/arm-generic-timer.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/irq/arm-gicv3.c
+- bsps/shared/dev/serial/console-termios-init.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/bspreset-arm-psci.c
+- bsps/shared/start/gettargethash-default.c
+- bsps/shared/start/sbrk.c
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml b/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml
new file mode 100644
index 0000000000..4ba449b8fd
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org> 
+default: 24000000
+default-by-variant:
+- value: 100000000
+  variants:
+  - aarch64/xilinx_versal_ilp32.*
+  - aarch64/xilinx_versal_lp64.*
+description: |
+  Versal UART clock frequency in Hz
+enabled-by: true
+format: '{}'
+links: []
+name: VERSAL_CLOCK_UART
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optconminor.yml b/spec/build/bsps/aarch64/xilinx-versal/optconminor.yml
new file mode 100644
index 0000000000..bb21e8fae7
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/optconminor.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant: []
+description: |
+  minor number of console device
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_CONSOLE_MINOR
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml b/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml
new file mode 100644
index 0000000000..41023dcf3e
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+default: 32768
+default-by-variant:
+- value: 0x0
+  variants:
+  - aarch64/xilinx_versal_lp64_vck190
+  - aarch64/xilinx_versal_ilp32_vck190
+description: |
+  offset of RAM region from memory area base
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_XILINX_VERSAL_LOAD_OFFSET
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optnocachelen.yml b/spec/build/bsps/aarch64/xilinx-versal/optnocachelen.yml
new file mode 100644
index 0000000000..97c1c8bfab
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/optnocachelen.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+default: 0x100000
+default-by-variant: []
+description: |
+  length of nocache RAM region
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_XILINX_VERSAL_NOCACHE_LENGTH
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optramlen.yml b/spec/build/bsps/aarch64/xilinx-versal/optramlen.yml
new file mode 100644
index 0000000000..ebc36d3139
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/optramlen.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+default: 0x10000000
+default-by-variant: []
+description: |
+  length of memory area available to the BSP
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_XILINX_VERSAL_RAM_LENGTH
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optramori.yml b/spec/build/bsps/aarch64/xilinx-versal/optramori.yml
new file mode 100644
index 0000000000..8ab8f5bc13
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/optramori.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+default: 0x20000000
+default-by-variant:
+- value: 0x10000000
+  variants:
+  - aarch64/xilinx_versal_lp64_vck190
+  - aarch64/xilinx_versal_ilp32_vck190
+description: |
+  base address of memory area available to the BSP
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_XILINX_VERSAL_RAM_BASE
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/tstqemu.yml b/spec/build/bsps/aarch64/xilinx-versal/tstqemu.yml
new file mode 100644
index 0000000000..8828185cd8
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/tstqemu.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+    # expected to fail
+    minimum: exclude
+
+    # don't compile due to toolchain issues, see RTEMS issue #4218
+    spconfig01: exclude
+    spmisc01: exclude
+
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links: []
+type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/tstvck190.yml b/spec/build/bsps/aarch64/xilinx-versal/tstvck190.yml
new file mode 100644
index 0000000000..4f9a21e9d7
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/tstvck190.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+    # expected to produce a fatal-error when run
+    minimum: exclude
+
+    # don't compile due to toolchain issues, see RTEMS issue #4218
+    spconfig01: exclude
+    spmisc01: exclude
+
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links: []
+type: build