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authorGedare Bloom <gedare@rtems.org>2021-06-22 19:57:08 -0600
committerGedare Bloom <gedare@rtems.org>2021-06-24 09:37:31 -0600
commit207612957e0e42a5d289aa87c93cf4140dcb990c (patch)
tree67e4b6e55e65a8f97b7ebc7a98c8cbc4ba0e4da0
parentbcad0aaee635d75be9c27b8792f0f69dedd03a57 (diff)
downloadrtems-207612957e0e42a5d289aa87c93cf4140dcb990c.tar.bz2
bsps/aarch64: add physical secure timer
-rw-r--r--bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c8
-rw-r--r--bsps/aarch64/xilinx-versal/include/bsp/irq.h1
-rw-r--r--spec/build/bsps/aarch64/optgtuseps.yml17
-rw-r--r--spec/build/bsps/aarch64/optgtusevirt.yml16
4 files changed, 42 insertions, 0 deletions
diff --git a/bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c b/bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c
index 977910ff3a..9ed1a8ccdd 100644
--- a/bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c
+++ b/bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c
@@ -43,6 +43,8 @@ uint64_t arm_gt_clock_get_compare_value(void)
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"mrs %[val], cntv_cval_el0"
+#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
+ "mrs %[val], cntps_cval_el1"
#else
"mrs %[val], cntp_cval_el0"
#endif
@@ -56,6 +58,8 @@ void arm_gt_clock_set_compare_value(uint64_t cval)
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"msr cntv_cval_el0, %[cval]"
+#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
+ "msr cntps_cval_el1, %[cval]"
#else
"msr cntp_cval_el0, %[cval]"
#endif
@@ -83,6 +87,8 @@ void arm_gt_clock_set_control(uint32_t ctl)
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"msr cntv_ctl_el0, %[ctl]"
+#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
+ "msr cntps_ctl_el1, %[ctl]"
#else
"msr cntp_ctl_el0, %[ctl]"
#endif
@@ -102,6 +108,8 @@ void arm_generic_timer_get_config( uint32_t *frequency, uint32_t *irq )
#ifdef ARM_GENERIC_TIMER_USE_VIRTUAL
*irq = BSP_TIMER_VIRT_PPI;
+#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
+ *irq = BSP_TIMER_PHYS_S_PPI;
#else
*irq = BSP_TIMER_PHYS_NS_PPI;
#endif
diff --git a/bsps/aarch64/xilinx-versal/include/bsp/irq.h b/bsps/aarch64/xilinx-versal/include/bsp/irq.h
index ec39b727d9..c5f199a9ae 100644
--- a/bsps/aarch64/xilinx-versal/include/bsp/irq.h
+++ b/bsps/aarch64/xilinx-versal/include/bsp/irq.h
@@ -51,6 +51,7 @@ extern "C" {
/* Interrupts vectors */
#define BSP_TIMER_VIRT_PPI 27
+#define BSP_TIMER_PHYS_S_PPI 29
#define BSP_TIMER_PHYS_NS_PPI 30
#define VERSAL_IRQ_UART_0 50
#define VERSAL_IRQ_UART_1 51
diff --git a/spec/build/bsps/aarch64/optgtuseps.yml b/spec/build/bsps/aarch64/optgtuseps.yml
new file mode 100644
index 0000000000..3c85f08e17
--- /dev/null
+++ b/spec/build/bsps/aarch64/optgtuseps.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+default: false
+default-by-variant: []
+description: |
+ If set to true, and AARCH64_GENERIC_TIMER_USE_VIRTUAL is false, then
+ the clock driver uses the Physical Secure Timer of the AARCH64
+ Generic Timer, otherwise it uses the Physical Non-Secure Timer (EL1).
+enabled-by: true
+links: []
+name: AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE
+type: build
diff --git a/spec/build/bsps/aarch64/optgtusevirt.yml b/spec/build/bsps/aarch64/optgtusevirt.yml
new file mode 100644
index 0000000000..919eb86c32
--- /dev/null
+++ b/spec/build/bsps/aarch64/optgtusevirt.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
+default: false
+default-by-variant: []
+description: |
+ If set to true, then the clock driver uses the Virtual Timer of the AARCH64
+ Generic Timer, otherwise it uses the Physical Non-Secure Timer (EL1).
+enabled-by: true
+links: []
+name: AARCH64_GENERIC_TIMER_USE_VIRTUAL
+type: build