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-rw-r--r--cpukit/score/cpu/aarch64/aarch64-context-validate.S159
-rw-r--r--cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S19
-rw-r--r--cpukit/score/cpu/aarch64/aarch64-exception-interrupt.S6
-rw-r--r--cpukit/score/cpu/aarch64/cpu.c4
-rw-r--r--cpukit/score/cpu/aarch64/cpu_asm.S78
-rw-r--r--cpukit/score/cpu/aarch64/include/rtems/asm.h5
-rw-r--r--[-rwxr-xr-x]cpukit/score/cpu/aarch64/include/rtems/score/aarch64-system-registers.h0
-rw-r--r--cpukit/score/cpu/aarch64/include/rtems/score/cpu.h17
-rw-r--r--cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h67
-rw-r--r--cpukit/score/cpu/arm/headers.am14
-rw-r--r--cpukit/score/cpu/bfin/headers.am11
-rw-r--r--cpukit/score/cpu/i386/cpu.c8
-rw-r--r--cpukit/score/cpu/i386/headers.am11
-rw-r--r--cpukit/score/cpu/lm32/headers.am8
-rw-r--r--cpukit/score/cpu/m68k/headers.am11
-rw-r--r--cpukit/score/cpu/microblaze/__tls_get_addr.c54
-rw-r--r--cpukit/score/cpu/microblaze/cpu.c121
-rw-r--r--cpukit/score/cpu/microblaze/cpu_asm.S194
-rw-r--r--cpukit/score/cpu/microblaze/include/rtems/asm.h138
-rw-r--r--cpukit/score/cpu/microblaze/include/rtems/score/cpu.h305
-rw-r--r--cpukit/score/cpu/microblaze/include/rtems/score/cpuatomic.h41
-rw-r--r--cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h96
-rw-r--r--cpukit/score/cpu/microblaze/include/rtems/score/microblaze.h57
-rw-r--r--cpukit/score/cpu/microblaze/microblaze-context-switch.S107
-rw-r--r--cpukit/score/cpu/microblaze/microblaze-context-validate.S117
-rw-r--r--cpukit/score/cpu/microblaze/microblaze-context-volatile-clobber.S28
-rw-r--r--cpukit/score/cpu/mips/headers.am9
-rw-r--r--cpukit/score/cpu/moxie/headers.am7
-rw-r--r--cpukit/score/cpu/nios2/headers.am10
-rw-r--r--cpukit/score/cpu/no_cpu/headers.am6
-rw-r--r--cpukit/score/cpu/or1k/headers.am8
-rw-r--r--cpukit/score/cpu/powerpc/headers.am9
-rw-r--r--cpukit/score/cpu/riscv/headers.am11
-rw-r--r--cpukit/score/cpu/sh/headers.am7
-rw-r--r--cpukit/score/cpu/sparc/headers.am11
-rw-r--r--cpukit/score/cpu/sparc64/headers.am6
-rw-r--r--cpukit/score/cpu/v850/headers.am8
-rw-r--r--cpukit/score/cpu/x86_64/headers.am9
-rw-r--r--cpukit/score/src/coremsgseize.c20
-rw-r--r--cpukit/score/src/coretodadjust.c12
-rw-r--r--cpukit/score/src/coretodcheck.c59
-rw-r--r--cpukit/score/src/coretodset.c22
-rw-r--r--cpukit/score/src/coretodtickspersec.c30
-rw-r--r--cpukit/score/src/futex.c42
-rw-r--r--cpukit/score/src/mutex.c16
-rw-r--r--cpukit/score/src/percpujobs.c1
-rw-r--r--cpukit/score/src/rbtreemax.c55
-rw-r--r--cpukit/score/src/rbtreemin.c55
-rw-r--r--cpukit/score/src/rbtreenext.c48
-rw-r--r--cpukit/score/src/rbtreeprev.c47
-rw-r--r--cpukit/score/src/schedulerdefaultaskforhelp.c61
-rw-r--r--cpukit/score/src/schedulerdefaultnodedestroy.c4
-rw-r--r--cpukit/score/src/schedulerdefaultpinunpin.c31
-rw-r--r--cpukit/score/src/schedulerdefaultpinunpindonothing.c73
-rw-r--r--cpukit/score/src/scheduleredfreleasejob.c2
-rw-r--r--cpukit/score/src/semaphore.c28
-rw-r--r--cpukit/score/src/smp.c5
-rw-r--r--cpukit/score/src/stackallocatorforidle.c59
-rw-r--r--cpukit/score/src/threadchangepriority.c45
-rw-r--r--cpukit/score/src/threadcreateidle.c20
-rw-r--r--cpukit/score/src/threaddispatch.c21
-rw-r--r--cpukit/score/src/threadinitialize.c180
-rw-r--r--cpukit/score/src/threadplaindispatch.c60
-rw-r--r--cpukit/score/src/threadqenqueue.c313
-rw-r--r--cpukit/score/src/threadqfirst.c10
-rw-r--r--cpukit/score/src/threadqflush.c22
-rw-r--r--cpukit/score/src/threadqops.c42
-rw-r--r--cpukit/score/src/threadrestart.c44
68 files changed, 2535 insertions, 669 deletions
diff --git a/cpukit/score/cpu/aarch64/aarch64-context-validate.S b/cpukit/score/cpu/aarch64/aarch64-context-validate.S
index 1e71bc5b3a..1daa0d6bf2 100644
--- a/cpukit/score/cpu/aarch64/aarch64-context-validate.S
+++ b/cpukit/score/cpu/aarch64/aarch64-context-validate.S
@@ -44,35 +44,47 @@
#include <rtems/score/cpu.h>
#include <rtems/score/basedefs.h>
-/* These must be 8 byte aligned to avoid misaligned accesses */
-#define FRAME_OFFSET_X4 0x00
-#define FRAME_OFFSET_X5 0x08
-#define FRAME_OFFSET_X6 0x10
-#define FRAME_OFFSET_X7 0x18
-#define FRAME_OFFSET_X8 0x20
-#define FRAME_OFFSET_X9 0x28
-#define FRAME_OFFSET_X10 0x30
-#define FRAME_OFFSET_X11 0x38
-#define FRAME_OFFSET_LR 0x40
+/*
+ * This register size applies to X (integer) registers as well as the D (lower
+ * half floating point) registers. It does not apply to V (full size floating
+ * point) registers or W (lower half integer) registers.
+ */
+#define AARCH64_REGISTER_SIZE 8
+
+/* According to the AAPCS64, X19-X28 are callee-saved registers */
+#define FRAME_OFFSET_X19 0x00
+#define FRAME_OFFSET_X20 0x08
+#define FRAME_OFFSET_X21 0x10
+#define FRAME_OFFSET_X22 0x18
+#define FRAME_OFFSET_X23 0x20
+#define FRAME_OFFSET_X24 0x28
+#define FRAME_OFFSET_X25 0x30
+#define FRAME_OFFSET_X26 0x38
+#define FRAME_OFFSET_X27 0x40
+#define FRAME_OFFSET_X28 0x48
+#define FRAME_OFFSET_LR 0x50
#ifdef AARCH64_MULTILIB_VFP
- /* These must be 16 byte aligned to avoid misaligned accesses */
- #define FRAME_OFFSET_V8 0x50
- #define FRAME_OFFSET_V9 0x60
- #define FRAME_OFFSET_V10 0x70
- #define FRAME_OFFSET_V11 0x80
- #define FRAME_OFFSET_V12 0x90
- #define FRAME_OFFSET_V13 0xA0
- #define FRAME_OFFSET_V14 0xB0
- #define FRAME_OFFSET_V15 0xC0
+ /*
+ * According to the AAPCS64, V8-V15 are callee-saved registers, but only the
+ * bottom 8 bytes are required to be saved which correspond to D8-D15.
+ */
+ #define FRAME_OFFSET_D8 0x58
+ #define FRAME_OFFSET_D9 0x60
+ #define FRAME_OFFSET_D10 0x68
+ #define FRAME_OFFSET_D11 0x70
+ #define FRAME_OFFSET_D12 0x78
+ #define FRAME_OFFSET_D13 0x80
+ #define FRAME_OFFSET_D14 0x88
+ #define FRAME_OFFSET_D15 0x90
/*
* Force 16 byte alignment of the frame size to avoid stack pointer alignment
* exceptions.
*/
- #define FRAME_SIZE RTEMS_ALIGN_UP( FRAME_OFFSET_V15, 16 )
+ #define FRAME_SIZE RTEMS_ALIGN_UP( FRAME_OFFSET_D15 + AARCH64_REGISTER_SIZE, 16 )
#else
- #define FRAME_SIZE RTEMS_ALIGN_UP( FRAME_OFFSET_LR, 16 )
+ #define FRAME_SIZE RTEMS_ALIGN_UP( FRAME_OFFSET_LR + AARCH64_REGISTER_SIZE, 16 )
#endif
.section .text
@@ -83,25 +95,27 @@ FUNCTION_ENTRY(_CPU_Context_validate)
sub sp, sp, #FRAME_SIZE
- str x4, [sp, #FRAME_OFFSET_X4]
- str x5, [sp, #FRAME_OFFSET_X5]
- str x6, [sp, #FRAME_OFFSET_X6]
- str x7, [sp, #FRAME_OFFSET_X7]
- str x8, [sp, #FRAME_OFFSET_X8]
- str x9, [sp, #FRAME_OFFSET_X9]
- str x10, [sp, #FRAME_OFFSET_X10]
- str x11, [sp, #FRAME_OFFSET_X11]
+ str x19, [sp, #FRAME_OFFSET_X19]
+ str x20, [sp, #FRAME_OFFSET_X20]
+ str x21, [sp, #FRAME_OFFSET_X21]
+ str x22, [sp, #FRAME_OFFSET_X22]
+ str x23, [sp, #FRAME_OFFSET_X23]
+ str x24, [sp, #FRAME_OFFSET_X24]
+ str x25, [sp, #FRAME_OFFSET_X25]
+ str x26, [sp, #FRAME_OFFSET_X26]
+ str x27, [sp, #FRAME_OFFSET_X27]
+ str x28, [sp, #FRAME_OFFSET_X28]
str lr, [sp, #FRAME_OFFSET_LR]
#ifdef AARCH64_MULTILIB_VFP
- str d8, [sp, #FRAME_OFFSET_V8]
- str d9, [sp, #FRAME_OFFSET_V9]
- str d10, [sp, #FRAME_OFFSET_V10]
- str d11, [sp, #FRAME_OFFSET_V11]
- str d12, [sp, #FRAME_OFFSET_V12]
- str d13, [sp, #FRAME_OFFSET_V13]
- str d14, [sp, #FRAME_OFFSET_V14]
- str d15, [sp, #FRAME_OFFSET_V15]
+ str d8, [sp, #FRAME_OFFSET_D8]
+ str d9, [sp, #FRAME_OFFSET_D9]
+ str d10, [sp, #FRAME_OFFSET_D10]
+ str d11, [sp, #FRAME_OFFSET_D11]
+ str d12, [sp, #FRAME_OFFSET_D12]
+ str d13, [sp, #FRAME_OFFSET_D13]
+ str d14, [sp, #FRAME_OFFSET_D14]
+ str d15, [sp, #FRAME_OFFSET_D15]
#endif
/* Fill */
@@ -119,7 +133,7 @@ FUNCTION_ENTRY(_CPU_Context_validate)
#ifdef AARCH64_MULTILIB_VFP
- /* X3 contains the FPSCR */
+ /* X3 contains the FPSR */
mrs x3, FPSR
ldr x4, =0xf000001f
bic x3, x3, x4
@@ -139,6 +153,23 @@ FUNCTION_ENTRY(_CPU_Context_validate)
fill_register x10
fill_register x11
fill_register x12
+ fill_register x13
+ fill_register x14
+ fill_register x15
+ fill_register x16
+ fill_register x17
+ fill_register x18
+ fill_register x19
+ fill_register x20
+ fill_register x21
+ fill_register x22
+ fill_register x23
+ fill_register x24
+ fill_register x25
+ fill_register x26
+ fill_register x27
+ fill_register x28
+ fill_register x29
fill_register lr
#ifdef AARCH64_MULTILIB_VFP
@@ -191,7 +222,6 @@ check:
bne restore
.endm
- /* A compare involving the stack pointer is deprecated */
mov x1, sp
cmp x2, x1
bne restore
@@ -211,6 +241,23 @@ check:
check_register x10
check_register x11
check_register x12
+ check_register x13
+ check_register x14
+ check_register x15
+ check_register x16
+ check_register x17
+ check_register x18
+ check_register x19
+ check_register x20
+ check_register x21
+ check_register x22
+ check_register x23
+ check_register x24
+ check_register x25
+ check_register x26
+ check_register x27
+ check_register x28
+ check_register x29
check_register lr
#ifdef AARCH64_MULTILIB_VFP
@@ -222,25 +269,27 @@ check:
/* Restore */
restore:
- ldr x4, [sp, #FRAME_OFFSET_X4]
- ldr x5, [sp, #FRAME_OFFSET_X5]
- ldr x6, [sp, #FRAME_OFFSET_X6]
- ldr x7, [sp, #FRAME_OFFSET_X7]
- ldr x8, [sp, #FRAME_OFFSET_X8]
- ldr x9, [sp, #FRAME_OFFSET_X9]
- ldr x10, [sp, #FRAME_OFFSET_X10]
- ldr x11, [sp, #FRAME_OFFSET_X11]
+ ldr x19, [sp, #FRAME_OFFSET_X19]
+ ldr x20, [sp, #FRAME_OFFSET_X20]
+ ldr x21, [sp, #FRAME_OFFSET_X21]
+ ldr x22, [sp, #FRAME_OFFSET_X22]
+ ldr x23, [sp, #FRAME_OFFSET_X23]
+ ldr x24, [sp, #FRAME_OFFSET_X24]
+ ldr x25, [sp, #FRAME_OFFSET_X25]
+ ldr x26, [sp, #FRAME_OFFSET_X26]
+ ldr x27, [sp, #FRAME_OFFSET_X27]
+ ldr x28, [sp, #FRAME_OFFSET_X28]
ldr lr, [sp, #FRAME_OFFSET_LR]
#ifdef AARCH64_MULTILIB_VFP
- ldr d8, [sp, #FRAME_OFFSET_V8]
- ldr d9, [sp, #FRAME_OFFSET_V9]
- ldr d10, [sp, #FRAME_OFFSET_V10]
- ldr d11, [sp, #FRAME_OFFSET_V11]
- ldr d12, [sp, #FRAME_OFFSET_V12]
- ldr d13, [sp, #FRAME_OFFSET_V13]
- ldr d14, [sp, #FRAME_OFFSET_V14]
- ldr d15, [sp, #FRAME_OFFSET_V15]
+ ldr d8, [sp, #FRAME_OFFSET_D8]
+ ldr d9, [sp, #FRAME_OFFSET_D9]
+ ldr d10, [sp, #FRAME_OFFSET_D10]
+ ldr d11, [sp, #FRAME_OFFSET_D11]
+ ldr d12, [sp, #FRAME_OFFSET_D12]
+ ldr d13, [sp, #FRAME_OFFSET_D13]
+ ldr d14, [sp, #FRAME_OFFSET_D14]
+ ldr d15, [sp, #FRAME_OFFSET_D15]
#endif
add sp, sp, #FRAME_SIZE
diff --git a/cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S b/cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S
index 2be5ce69ff..73472b81ac 100644
--- a/cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S
+++ b/cpukit/score/cpu/aarch64/aarch64-context-volatile-clobber.S
@@ -90,10 +90,29 @@ FUNCTION_ENTRY(_CPU_Context_volatile_clobber)
clobber_vfp_register d31
#endif /* AARCH64_MULTILIB_VFP */
+/*
+ * According to the AAPCS64, X0-X18 and X29 are caller-saved registers. X0 is
+ * already being clobbered.
+ */
clobber_register x1
clobber_register x2
clobber_register x3
+ clobber_register x4
+ clobber_register x5
+ clobber_register x6
+ clobber_register x7
+ clobber_register x8
+ clobber_register x9
+ clobber_register x10
+ clobber_register x11
clobber_register x12
+ clobber_register x13
+ clobber_register x14
+ clobber_register x15
+ clobber_register x16
+ clobber_register x17
+ clobber_register x18
+ clobber_register x29
ret
diff --git a/cpukit/score/cpu/aarch64/aarch64-exception-interrupt.S b/cpukit/score/cpu/aarch64/aarch64-exception-interrupt.S
index cb0954a29b..b206f5764b 100644
--- a/cpukit/score/cpu/aarch64/aarch64-exception-interrupt.S
+++ b/cpukit/score/cpu/aarch64/aarch64-exception-interrupt.S
@@ -47,7 +47,11 @@
.globl _AArch64_Exception_interrupt_nest
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
- #define SELF_CPU_CONTROL_GET_REG w19
+ #ifdef RTEMS_SMP
+ #define SELF_CPU_CONTROL_GET_REG x19
+ #else
+ #define SELF_CPU_CONTROL_GET_REG w19
+ #endif
#else
#define SELF_CPU_CONTROL_GET_REG x19
#endif
diff --git a/cpukit/score/cpu/aarch64/cpu.c b/cpukit/score/cpu/aarch64/cpu.c
index d09403a349..b36f55ae17 100644
--- a/cpukit/score/cpu/aarch64/cpu.c
+++ b/cpukit/score/cpu/aarch64/cpu.c
@@ -146,7 +146,7 @@ void _CPU_Context_Initialize(
}
}
-void _CPU_ISR_Set_level( uint64_t level )
+void _CPU_ISR_Set_level( uint32_t level )
{
/* Set the mask bit if interrupts are disabled */
level = level ? AARCH64_PSTATE_I : 0;
@@ -156,7 +156,7 @@ void _CPU_ISR_Set_level( uint64_t level )
);
}
-uint64_t _CPU_ISR_Get_level( void )
+uint32_t _CPU_ISR_Get_level( void )
{
uint64_t level;
diff --git a/cpukit/score/cpu/aarch64/cpu_asm.S b/cpukit/score/cpu/aarch64/cpu_asm.S
index 9e609e06bd..2379698336 100644
--- a/cpukit/score/cpu/aarch64/cpu_asm.S
+++ b/cpukit/score/cpu/aarch64/cpu_asm.S
@@ -55,13 +55,22 @@
*
*/
+DEFINE_FUNCTION_AARCH64(_CPU_Context_switch)
+ .globl _CPU_Context_switch_no_return
+ .set _CPU_Context_switch_no_return, _CPU_Context_switch
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
-#define reg_2 w2
+/* Sanitize inputs for ILP32 ABI */
+ mov w0, w0
+ mov w1, w1
+ #ifdef RTEMS_SMP
+ #define reg_2 x2
+ #else
+ #define reg_2 w2
+ #endif
#else
#define reg_2 x2
#endif
-DEFINE_FUNCTION_AARCH64(_CPU_Context_switch)
/* Start saving context */
GET_SELF_CPU_CONTROL reg_2
ldr w3, [x2, #PER_CPU_ISR_DISPATCH_DISABLE]
@@ -86,7 +95,30 @@ DEFINE_FUNCTION_AARCH64(_CPU_Context_switch)
str x3, [x0, #AARCH64_CONTEXT_CONTROL_ISR_DISPATCH_DISABLE]
#ifdef RTEMS_SMP
-#error SMP not yet supported
+ /*
+ * The executing thread no longer executes on this processor. Switch
+ * the stack to the temporary interrupt stack of this processor. Mark
+ * the context of the executing thread as not executing.
+ */
+ dmb SY
+ add sp, x2, #(PER_CPU_INTERRUPT_FRAME_AREA + CPU_INTERRUPT_FRAME_SIZE)
+ mov x3, #0
+ strb w3, [x0, #AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET]
+
+.L_check_is_executing:
+
+ /* Check the is executing indicator of the heir context */
+ add x3, x1, #AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET
+ ldaxrb w4, [x3]
+ cmp x4, #0
+ bne .L_get_potential_new_heir
+
+ /* Try to update the is executing indicator of the heir context */
+ mov x4, #1
+ stlxrb w5, w4, [x3]
+ cmp x5, #0
+ bne .L_get_potential_new_heir
+ dmb SY
#endif
/* Start restoring context */
@@ -129,6 +161,46 @@ DEFINE_FUNCTION_AARCH64(_CPU_Context_switch)
*
*/
DEFINE_FUNCTION_AARCH64(_CPU_Context_restore)
+#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
+/* Sanitize input for ILP32 ABI */
+ mov w0, w0
+#endif
+
mov x1, x0
GET_SELF_CPU_CONTROL reg_2
b .L_restore
+
+#ifdef RTEMS_SMP
+.L_get_potential_new_heir:
+
+ /* We may have a new heir */
+
+ /* Read the executing and heir */
+#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
+ ldr w4, [x2, #PER_CPU_OFFSET_EXECUTING]
+ ldr w5, [x2, #PER_CPU_OFFSET_HEIR]
+#else
+ ldr x4, [x2, #PER_CPU_OFFSET_EXECUTING]
+ ldr x5, [x2, #PER_CPU_OFFSET_HEIR]
+#endif
+
+ /*
+ * Update the executing only if necessary to avoid cache line
+ * monopolization.
+ */
+ cmp x4, x5
+ beq .L_check_is_executing
+
+ /* Calculate the heir context pointer */
+ sub x4, x1, x4
+ add x1, x5, x4
+
+ /* Update the executing */
+#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
+ str w5, [x2, #PER_CPU_OFFSET_EXECUTING]
+#else
+ str x5, [x2, #PER_CPU_OFFSET_EXECUTING]
+#endif
+
+ b .L_check_is_executing
+#endif
diff --git a/cpukit/score/cpu/aarch64/include/rtems/asm.h b/cpukit/score/cpu/aarch64/include/rtems/asm.h
index 35bf533c8a..fa53e08291 100644
--- a/cpukit/score/cpu/aarch64/include/rtems/asm.h
+++ b/cpukit/score/cpu/aarch64/include/rtems/asm.h
@@ -81,7 +81,12 @@
.align 8 ; .globl name ; name: ; .globl name ## _aarch64 ; name ## _aarch64:
.macro GET_SELF_CPU_CONTROL REG
+#ifdef RTEMS_SMP
+ /* Use Thread ID Register (TPIDR_EL1) */
+ mrs \REG, TPIDR_EL1
+#else
ldr \REG, =_Per_CPU_Information
+#endif
.endm
/** @} */
diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-system-registers.h b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-system-registers.h
index dc2afdeca8..dc2afdeca8 100755..100644
--- a/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-system-registers.h
+++ b/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-system-registers.h
diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h
index dacc18638e..ae7e2bdcba 100644
--- a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h
@@ -134,9 +134,9 @@
#ifdef RTEMS_SMP
#if defined(AARCH64_MULTILIB_VFP)
- #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x70
+ #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0xb8
#else
- #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x30
+ #define AARCH64_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 0x78
#endif
#endif
@@ -191,12 +191,12 @@ typedef struct {
static inline void _AARCH64_Data_memory_barrier( void )
{
- __asm__ volatile ( "dmb LD" : : : "memory" );
+ __asm__ volatile ( "dmb SY" : : : "memory" );
}
static inline void _AARCH64_Data_synchronization_barrier( void )
{
- __asm__ volatile ( "dsb LD" : : : "memory" );
+ __asm__ volatile ( "dsb SY" : : : "memory" );
}
static inline void _AARCH64_Instruction_synchronization_barrier( void )
@@ -204,9 +204,9 @@ static inline void _AARCH64_Instruction_synchronization_barrier( void )
__asm__ volatile ( "isb" : : : "memory" );
}
-void _CPU_ISR_Set_level( uint64_t level );
+void _CPU_ISR_Set_level( uint32_t level );
-uint64_t _CPU_ISR_Get_level( void );
+uint32_t _CPU_ISR_Get_level( void );
#if defined(AARCH64_DISABLE_INLINE_ISR_DISABLE_ENABLE)
uint64_t AArch64_interrupt_disable( void );
@@ -313,6 +313,11 @@ void _CPU_ISR_install_vector(
*/
void _CPU_Context_switch( Context_Control *run, Context_Control *heir );
+RTEMS_NO_RETURN void _CPU_Context_switch_no_return(
+ Context_Control *executing,
+ Context_Control *heir
+);
+
RTEMS_NO_RETURN void _CPU_Context_restore( Context_Control *new_context );
#ifdef RTEMS_SMP
diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h
index 0536ecd860..90fd48ad4e 100644
--- a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h
@@ -50,7 +50,7 @@
*/
#define CPU_PER_CPU_CONTROL_SIZE 0
-#define CPU_INTERRUPT_FRAME_SIZE 240
+#define CPU_INTERRUPT_FRAME_SIZE 0x2E0
#ifndef ASM
@@ -60,6 +60,71 @@ extern "C" {
RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error );
+typedef struct {
+ uint64_t x0;
+ uint64_t register_lr_original;
+ uint64_t register_lr;
+ uint64_t x1;
+ uint64_t x2;
+ uint64_t x3;
+ uint64_t x4;
+ uint64_t x5;
+ uint64_t x6;
+ uint64_t x7;
+ uint64_t x8;
+ uint64_t x9;
+ uint64_t x10;
+ uint64_t x11;
+ uint64_t x12;
+ uint64_t x13;
+ uint64_t x14;
+ uint64_t x15;
+ uint64_t x16;
+ uint64_t x17;
+ uint64_t x18;
+ uint64_t x19;
+ uint64_t x20;
+ uint64_t x21;
+#ifdef AARCH64_MULTILIB_VFP
+ uint128_t q0;
+ uint128_t q1;
+ uint128_t q2;
+ uint128_t q3;
+ uint128_t q4;
+ uint128_t q5;
+ uint128_t q6;
+ uint128_t q7;
+ uint128_t q8;
+ uint128_t q9;
+ uint128_t q10;
+ uint128_t q11;
+ uint128_t q12;
+ uint128_t q13;
+ uint128_t q14;
+ uint128_t q15;
+ uint128_t q16;
+ uint128_t q17;
+ uint128_t q18;
+ uint128_t q19;
+ uint128_t q20;
+ uint128_t q21;
+ uint128_t q22;
+ uint128_t q23;
+ uint128_t q24;
+ uint128_t q25;
+ uint128_t q26;
+ uint128_t q27;
+ uint128_t q28;
+ uint128_t q29;
+ uint128_t q30;
+ uint128_t q31;
+#endif /* AARCH64_MULTILIB_VFP */
+ uint64_t register_elr;
+ uint64_t register_spsr;
+ uint64_t register_fpsr;
+ uint64_t register_fpcr;
+} CPU_Interrupt_frame;
+
void _CPU_Context_volatile_clobber( uintptr_t pattern );
void _CPU_Context_validate( uintptr_t pattern );
diff --git a/cpukit/score/cpu/arm/headers.am b/cpukit/score/cpu/arm/headers.am
deleted file mode 100644
index cb8976fdbc..0000000000
--- a/cpukit/score/cpu/arm/headers.am
+++ /dev/null
@@ -1,14 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_libcpu_HEADERS += score/cpu/arm/include/libcpu/arm-cp15.h
-include_machine_HEADERS += score/cpu/arm/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/arm/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/arm/include/rtems/score/aarch32-pmsa.h
-include_rtems_score_HEADERS += score/cpu/arm/include/rtems/score/aarch32-system-registers.h
-include_rtems_score_HEADERS += score/cpu/arm/include/rtems/score/arm.h
-include_rtems_score_HEADERS += score/cpu/arm/include/rtems/score/armv4.h
-include_rtems_score_HEADERS += score/cpu/arm/include/rtems/score/armv7m.h
-include_rtems_score_HEADERS += score/cpu/arm/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/arm/include/rtems/score/cpu_asm.h
-include_rtems_score_HEADERS += score/cpu/arm/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/arm/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/arm/include/rtems/score/paravirt.h
diff --git a/cpukit/score/cpu/bfin/headers.am b/cpukit/score/cpu/bfin/headers.am
deleted file mode 100644
index e0f6cfca74..0000000000
--- a/cpukit/score/cpu/bfin/headers.am
+++ /dev/null
@@ -1,11 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_machine_HEADERS += score/cpu/bfin/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/bfin/include/rtems/asm.h
-include_rtems_bfin_HEADERS += score/cpu/bfin/include/rtems/bfin/bf52x.h
-include_rtems_bfin_HEADERS += score/cpu/bfin/include/rtems/bfin/bf533.h
-include_rtems_bfin_HEADERS += score/cpu/bfin/include/rtems/bfin/bfin.h
-include_rtems_score_HEADERS += score/cpu/bfin/include/rtems/score/bfin.h
-include_rtems_score_HEADERS += score/cpu/bfin/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/bfin/include/rtems/score/cpu_asm.h
-include_rtems_score_HEADERS += score/cpu/bfin/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/bfin/include/rtems/score/cpuimpl.h
diff --git a/cpukit/score/cpu/i386/cpu.c b/cpukit/score/cpu/i386/cpu.c
index 77b7a7161c..f4e3e4d754 100644
--- a/cpukit/score/cpu/i386/cpu.c
+++ b/cpukit/score/cpu/i386/cpu.c
@@ -215,16 +215,16 @@ void _CPU_Exception_frame_print (const CPU_Exception_frame *ctx)
{
unsigned int faultAddr = 0;
printk("----------------------------------------------------------\n");
- printk("Exception %" PRIu32 " caught at PC %" PRIx32 " by thread %" PRId32 "\n",
+ printk("Exception %" PRIu32 " caught at PC %" PRIx32 " by thread %" PRIx32 "\n",
ctx->idtIndex,
ctx->eip,
_Thread_Executing->Object.id);
printk("----------------------------------------------------------\n");
printk("Processor execution context at time of the fault was :\n");
printk("----------------------------------------------------------\n");
- printk(" EAX = %" PRIx32 " EBX = %" PRIx32 " ECX = %" PRIx32 " EDX = %" PRIx32 "\n",
+ printk(" EAX = 0x%08" PRIx32 " EBX = 0x%08" PRIx32 " ECX = 0x%08" PRIx32 " EDX = 0x%08" PRIx32 "\n",
ctx->eax, ctx->ebx, ctx->ecx, ctx->edx);
- printk(" ESI = %" PRIx32 " EDI = %" PRIx32 " EBP = %" PRIx32 " ESP = %" PRIx32 "\n",
+ printk(" ESI = 0x%08" PRIx32 " EDI = 0x%08" PRIx32 " EBP = 0x%08" PRIx32 " ESP = 0x%08" PRIx32 "\n",
ctx->esi, ctx->edi, ctx->ebp, ctx->esp0);
printk("----------------------------------------------------------\n");
printk("Error code pushed by processor itself (if not 0) = %" PRIx32 "\n",
@@ -250,7 +250,7 @@ void _CPU_Exception_frame_print (const CPU_Exception_frame *ctx)
printk("Call Stack Trace of EIP:\n");
if ( fp ) {
for ( i=1; fp->up; fp=fp->up, i++ ) {
- printk("0x%08" PRIx32 " ",fp->pc);
+ printk("0x%08" PRIxPTR " ",fp->pc);
if ( ! (i&3) )
printk("\n");
}
diff --git a/cpukit/score/cpu/i386/headers.am b/cpukit/score/cpu/i386/headers.am
deleted file mode 100644
index e984232d9b..0000000000
--- a/cpukit/score/cpu/i386/headers.am
+++ /dev/null
@@ -1,11 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_machine_HEADERS += score/cpu/i386/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/i386/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/i386/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/i386/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/i386/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/i386/include/rtems/score/i386.h
-include_rtems_score_HEADERS += score/cpu/i386/include/rtems/score/idtr.h
-include_rtems_score_HEADERS += score/cpu/i386/include/rtems/score/interrupts.h
-include_rtems_score_HEADERS += score/cpu/i386/include/rtems/score/paravirt.h
-include_rtems_score_HEADERS += score/cpu/i386/include/rtems/score/registers.h
diff --git a/cpukit/score/cpu/lm32/headers.am b/cpukit/score/cpu/lm32/headers.am
deleted file mode 100644
index b77dfb5ab3..0000000000
--- a/cpukit/score/cpu/lm32/headers.am
+++ /dev/null
@@ -1,8 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_machine_HEADERS += score/cpu/lm32/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/lm32/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/lm32/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/lm32/include/rtems/score/cpu_asm.h
-include_rtems_score_HEADERS += score/cpu/lm32/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/lm32/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/lm32/include/rtems/score/lm32.h
diff --git a/cpukit/score/cpu/m68k/headers.am b/cpukit/score/cpu/m68k/headers.am
deleted file mode 100644
index 3fdc6fe2bd..0000000000
--- a/cpukit/score/cpu/m68k/headers.am
+++ /dev/null
@@ -1,11 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_machine_HEADERS += score/cpu/m68k/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/m68k/include/rtems/asm.h
-include_rtems_m68k_HEADERS += score/cpu/m68k/include/rtems/m68k/m68302.h
-include_rtems_m68k_HEADERS += score/cpu/m68k/include/rtems/m68k/m68360.h
-include_rtems_m68k_HEADERS += score/cpu/m68k/include/rtems/m68k/qsm.h
-include_rtems_m68k_HEADERS += score/cpu/m68k/include/rtems/m68k/sim.h
-include_rtems_score_HEADERS += score/cpu/m68k/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/m68k/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/m68k/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/m68k/include/rtems/score/m68k.h
diff --git a/cpukit/score/cpu/microblaze/__tls_get_addr.c b/cpukit/score/cpu/microblaze/__tls_get_addr.c
new file mode 100644
index 0000000000..e779a63488
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/__tls_get_addr.c
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPUMicroBlaze
+ *
+ * @brief MicroBlaze thread-local storage implementation
+ */
+
+/*
+ * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/threadimpl.h>
+#include <rtems/score/tls.h>
+
+#include <assert.h>
+
+void *__tls_get_addr( const TLS_Index *ti );
+
+void *__tls_get_addr( const TLS_Index *ti )
+{
+ const Thread_Control *executing = _Thread_Get_executing();
+ void *tls_block = (char *) executing->Start.tls_area
+ + _TLS_Get_thread_control_block_area_size( (uintptr_t) _TLS_Alignment );
+
+ return (char *) tls_block + ti->offset;
+}
diff --git a/cpukit/score/cpu/microblaze/cpu.c b/cpukit/score/cpu/microblaze/cpu.c
new file mode 100644
index 0000000000..de8fbfbba1
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/cpu.c
@@ -0,0 +1,121 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPUMicroBlaze
+ *
+ * @brief MicroBlaze architecture support implementation
+ */
+
+/*
+ * Copyright (c) 2015, Hesham Almatary
+ * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/isr.h>
+#include <rtems/score/tls.h>
+#include <rtems/score/wkspace.h>
+
+void _CPU_Initialize( void )
+{
+}
+
+void _CPU_Context_Initialize(
+ Context_Control *context,
+ void *stack_area_begin,
+ size_t stack_area_size,
+ uint32_t new_level,
+ void (*entry_point)( void ),
+ bool is_fp,
+ void *tls_area
+)
+{
+ uint32_t stack = (uint32_t) stack_area_begin;
+ uint32_t stack_high = stack + stack_area_size;
+
+ memset( context, 0, sizeof(*context) ) ;
+
+ context->r1 = stack_high - 64;
+ context->r15 = (uint32_t) entry_point;
+
+ uint32_t msr;
+ _CPU_MSR_GET( msr );
+ context->rmsr = msr;
+
+ if ( tls_area != NULL ) {
+ _TLS_TCB_at_area_begin_initialize( tls_area );
+ }
+}
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *ctx )
+{
+}
+
+void _CPU_ISR_Set_level( uint32_t level )
+{
+ uint32_t microblaze_switch_reg;
+
+ _CPU_MSR_GET( microblaze_switch_reg );
+
+ if ( level == 0 ) {
+ microblaze_switch_reg |= (MICROBLAZE_MSR_IE | MICROBLAZE_MSR_EE);
+ } else {
+ microblaze_switch_reg &= ~(MICROBLAZE_MSR_IE | MICROBLAZE_MSR_EE);
+ }
+
+ _CPU_MSR_SET( microblaze_switch_reg );
+}
+
+uint32_t _CPU_ISR_Get_level( void )
+{
+ uint32_t level;
+
+ _CPU_MSR_GET( level );
+
+ /* This is unique. The MSR register contains an interrupt enable flag where
+ * most other architectures have an interrupt disable flag. */
+ return ( level & (MICROBLAZE_MSR_IE | MICROBLAZE_MSR_EE) ) == 0;
+}
+
+void _CPU_ISR_install_vector(
+ uint32_t vector,
+ CPU_ISR_handler new_handler,
+ CPU_ISR_handler *old_handler
+)
+{
+ *old_handler = _ISR_Vector_table[ vector ];
+ _ISR_Vector_table[ vector ] = new_handler;
+}
+
+void *_CPU_Thread_Idle_body( uintptr_t ignored )
+{
+ while ( true ) {
+ __asm__ volatile ( "sleep" );
+ }
+}
diff --git a/cpukit/score/cpu/microblaze/cpu_asm.S b/cpukit/score/cpu/microblaze/cpu_asm.S
new file mode 100644
index 0000000000..d095e62f69
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/cpu_asm.S
@@ -0,0 +1,194 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPUMicroBlaze
+ *
+ * @brief MicroBlaze interrupt handler implementation
+ */
+
+/*
+ * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <rtems/asm.h>
+#include <rtems/score/percpu.h>
+
+ .text
+ .globl _ISR_Handler
+ .align 2
+
+_ISR_Handler:
+ /* Save stack frame */
+ swi r3, r1, MICROBLAZE_INTERRUPT_FRAME_R3
+ swi r4, r1, MICROBLAZE_INTERRUPT_FRAME_R4
+ swi r6, r1, MICROBLAZE_INTERRUPT_FRAME_R6
+ swi r7, r1, MICROBLAZE_INTERRUPT_FRAME_R7
+ swi r8, r1, MICROBLAZE_INTERRUPT_FRAME_R8
+ swi r9, r1, MICROBLAZE_INTERRUPT_FRAME_R9
+ swi r10, r1, MICROBLAZE_INTERRUPT_FRAME_R10
+ swi r11, r1, MICROBLAZE_INTERRUPT_FRAME_R11
+ swi r12, r1, MICROBLAZE_INTERRUPT_FRAME_R12
+ swi r15, r1, MICROBLAZE_INTERRUPT_FRAME_R15
+ swi r18, r1, MICROBLAZE_INTERRUPT_FRAME_R18
+
+ xori r3, r5, 0xFFFF
+ beqi r3, do_exception
+
+ /* Disable dispatching */
+ lwi r3, r0, _Per_CPU_Information + 16
+ addik r3, r3, 1
+ swi r3, r0, _Per_CPU_Information + 16
+
+ swi r14, r1, MICROBLAZE_INTERRUPT_FRAME_R14
+
+ /* Is SP < INTERRUPT_STACK_LOW? */
+ lwi r4, r0, _Per_CPU_Information
+ rsubk r3, r4, r1
+ blei r3, switch_to_interrupt_stack
+
+ /* Is SP > INTERRUPT_STACK_HIGH? */
+ lwi r4, r0, _Per_CPU_Information + 4
+ rsubk r3, r4, r1
+ bgei r3, switch_to_interrupt_stack
+
+ bri on_interrupt_stack
+
+switch_to_interrupt_stack:
+ add r4, r0, r1
+ lwi r1, r0, _Per_CPU_Information + 4
+ addik r1, r1, -52
+ swi r4, r1, 0
+
+on_interrupt_stack:
+ /* Add 1 to ISR_NEST_LEVEL */
+ lwi r3, r0, _Per_CPU_Information + 8
+ addik r3, r3, 1
+ swi r3, r0, _Per_CPU_Information + 8
+
+ bralid r15, bsp_interrupt_dispatch
+ nop
+
+ /* Subtract 1 from ISR_NEST_LEVEL */
+ lwi r3, r0, _Per_CPU_Information + 8
+ addik r3, r3, -1
+ swi r3, r0, _Per_CPU_Information + 8
+
+ /* Is ISR_NEST_LEVEL > 0? */
+ bgti r3, after_stack_switch
+
+ /* Switch back to interrupted thread stack */
+ lwi r1, r1, 0
+
+after_stack_switch:
+ /* Subtract 1 from THREAD_DISPATCH_DISABLE_LEVEL */
+ lwi r3, r0, _Per_CPU_Information + 16
+ addik r3, r3, -1
+ swi r3, r0, _Per_CPU_Information + 16
+
+ /* Is THREAD_DISPATCH_DISABLE_LEVEL != 0? */
+ bnei r3, quick_exit
+
+ /* Is DISPATCH_NEEDED == 0? */
+ lwi r3, r0, _Per_CPU_Information + 20
+ beqi r3, quick_exit
+
+ /* Return to interrupted thread and make it do a dispatch */
+ addik r14, r0, thread_dispatch
+ rtid r14, 0
+ nop
+
+quick_exit:
+ /* Simple return from nested interrupt */
+ /* Restore registers */
+ lwi r3, r1, MICROBLAZE_INTERRUPT_FRAME_R3
+ lwi r4, r1, MICROBLAZE_INTERRUPT_FRAME_R4
+ lwi r5, r1, MICROBLAZE_INTERRUPT_FRAME_R5
+ lwi r6, r1, MICROBLAZE_INTERRUPT_FRAME_R6
+ lwi r7, r1, MICROBLAZE_INTERRUPT_FRAME_R7
+ lwi r8, r1, MICROBLAZE_INTERRUPT_FRAME_R8
+ lwi r9, r1, MICROBLAZE_INTERRUPT_FRAME_R9
+ lwi r10, r1, MICROBLAZE_INTERRUPT_FRAME_R10
+ lwi r11, r1, MICROBLAZE_INTERRUPT_FRAME_R11
+ lwi r12, r1, MICROBLAZE_INTERRUPT_FRAME_R12
+ lwi r14, r1, MICROBLAZE_INTERRUPT_FRAME_R14
+ lwi r15, r1, MICROBLAZE_INTERRUPT_FRAME_R15
+ lwi r18, r1, MICROBLAZE_INTERRUPT_FRAME_R18
+
+ /* Remove stack frame */
+ addik r1, r1, 52
+
+ rtid r14, 0
+ nop
+
+thread_dispatch:
+ /* Reserve stack */
+ addik r1, r1, -52
+ /* Save scratch registers */
+ swi r3, r1, MICROBLAZE_INTERRUPT_FRAME_R3
+ swi r4, r1, MICROBLAZE_INTERRUPT_FRAME_R4
+ swi r5, r1, MICROBLAZE_INTERRUPT_FRAME_R5
+ swi r6, r1, MICROBLAZE_INTERRUPT_FRAME_R6
+ swi r7, r1, MICROBLAZE_INTERRUPT_FRAME_R7
+ swi r8, r1, MICROBLAZE_INTERRUPT_FRAME_R8
+ swi r9, r1, MICROBLAZE_INTERRUPT_FRAME_R9
+ swi r10, r1, MICROBLAZE_INTERRUPT_FRAME_R10
+ swi r11, r1, MICROBLAZE_INTERRUPT_FRAME_R11
+ swi r12, r1, MICROBLAZE_INTERRUPT_FRAME_R12
+ swi r14, r1, MICROBLAZE_INTERRUPT_FRAME_R14
+ swi r15, r1, MICROBLAZE_INTERRUPT_FRAME_R15
+ swi r18, r1, MICROBLAZE_INTERRUPT_FRAME_R18
+
+ bralid r15, _Thread_Dispatch
+ nop
+
+ /* Restore scratch registers */
+ lwi r3, r1, MICROBLAZE_INTERRUPT_FRAME_R3
+ lwi r4, r1, MICROBLAZE_INTERRUPT_FRAME_R4
+ lwi r5, r1, MICROBLAZE_INTERRUPT_FRAME_R5
+ lwi r6, r1, MICROBLAZE_INTERRUPT_FRAME_R6
+ lwi r7, r1, MICROBLAZE_INTERRUPT_FRAME_R7
+ lwi r8, r1, MICROBLAZE_INTERRUPT_FRAME_R8
+ lwi r9, r1, MICROBLAZE_INTERRUPT_FRAME_R9
+ lwi r10, r1, MICROBLAZE_INTERRUPT_FRAME_R10
+ lwi r11, r1, MICROBLAZE_INTERRUPT_FRAME_R11
+ lwi r12, r1, MICROBLAZE_INTERRUPT_FRAME_R12
+ lwi r14, r1, MICROBLAZE_INTERRUPT_FRAME_R14
+ lwi r15, r1, MICROBLAZE_INTERRUPT_FRAME_R15
+ lwi r18, r1, MICROBLAZE_INTERRUPT_FRAME_R18
+ /* Free stack space */
+ addik r1, r1, 52
+
+ bri quick_exit
+
+do_exception:
+ /* exception no longer in progress */
+ mfs r3, rmsr
+ andni r3, r3, 0x200
+ mts rmsr, r3
+ addi r5, r0, 9
+ add r6, r0, r1
+
+ brai _Terminate
diff --git a/cpukit/score/cpu/microblaze/include/rtems/asm.h b/cpukit/score/cpu/microblaze/include/rtems/asm.h
new file mode 100644
index 0000000000..2e35a66294
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/include/rtems/asm.h
@@ -0,0 +1,138 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @brief MicroBlaze assembler support
+ *
+ * This include file attempts to address the problems
+ * caused by incompatible flavors of assemblers and
+ * toolsets. It primarily addresses variations in the
+ * use of leading underscores on symbols and the requirement
+ * that register names be preceded by a %.
+ */
+
+/*
+ * Copyright (c) 2015, Hesham Almatary
+ * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTEMS_ASM_H
+#define _RTEMS_ASM_H
+
+/*
+ * Indicate we are in an assembly file and get the basic CPU definitions.
+ */
+
+#ifndef ASM
+#define ASM
+#endif
+
+#include <rtems/score/cpuopts.h>
+
+#ifndef __USER_LABEL_PREFIX__
+/**
+ * Recent versions of GNU cpp define variables which indicate the
+ * need for underscores and percents. If not using GNU cpp or
+ * the version does not support this, then you will obviously
+ * have to define these as appropriate.
+ *
+ * This symbol is prefixed to all C program symbols.
+ */
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+/**
+ * Recent versions of GNU cpp define variables which indicate the
+ * need for underscores and percents. If not using GNU cpp or
+ * the version does not support this, then you will obviously
+ * have to define these as appropriate.
+ *
+ * This symbol is prefixed to all register names.
+ */
+#define __REGISTER_PREFIX__
+#endif
+
+#include <rtems/concat.h>
+
+/** Use the right prefix for global labels. */
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/** Use the right prefix for registers. */
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/*
+ * define macros for all of the registers on this CPU
+ *
+ * EXAMPLE: #define d0 REG (d0)
+ */
+
+/*
+ * Define macros to handle section beginning and ends.
+ */
+
+
+/** This macro is used to denote the beginning of a code declaration. */
+#define BEGIN_CODE_DCL .text
+/** This macro is used to denote the end of a code declaration. */
+#define END_CODE_DCL
+/** This macro is used to denote the beginning of a data declaration section. */
+#define BEGIN_DATA_DCL .data
+/** This macro is used to denote the end of a data declaration section. */
+#define END_DATA_DCL
+/** This macro is used to denote the beginning of a code section. */
+#define BEGIN_CODE .text
+/** This macro is used to denote the end of a code section. */
+#define END_CODE
+/** This macro is used to denote the beginning of a data section. */
+#define BEGIN_DATA
+/** This macro is used to denote the end of a data section. */
+#define END_DATA
+/** This macro is used to denote the beginning of the
+ * unitialized data section.
+ */
+#define BEGIN_BSS
+/** This macro is used to denote the end of the unitialized data section. */
+#define END_BSS
+/** This macro is used to denote the end of the assembly file. */
+#define END
+
+/**
+ * This macro is used to declare a public global symbol.
+ *
+ * @note This must be tailored for a particular flavor of the C compiler.
+ * They may need to put underscores in front of the symbols.
+ */
+#define PUBLIC(sym) .globl SYM (sym)
+
+/**
+ * This macro is used to prototype a public global symbol.
+ *
+ * @note This must be tailored for a particular flavor of the C compiler.
+ * They may need to put underscores in front of the symbols.
+ */
+#define EXTERN(sym) .globl SYM (sym)
+
+#endif
diff --git a/cpukit/score/cpu/microblaze/include/rtems/score/cpu.h b/cpukit/score/cpu/microblaze/include/rtems/score/cpu.h
new file mode 100644
index 0000000000..4b11625463
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/include/rtems/score/cpu.h
@@ -0,0 +1,305 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPU
+ *
+ * @brief MicroBlaze architecture support
+ */
+
+/*
+ * Copyright (c) 2015, Hesham Almatary
+ * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTEMS_SCORE_CPU_H
+#define _RTEMS_SCORE_CPU_H
+
+#include <rtems/score/basedefs.h>
+#include <rtems/score/microblaze.h>
+
+#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
+
+#define CPU_ISR_PASSES_FRAME_POINTER FALSE
+
+#define CPU_HARDWARE_FP FALSE
+
+#define CPU_SOFTWARE_FP FALSE
+
+#define CPU_ALL_TASKS_ARE_FP FALSE
+
+#define CPU_IDLE_TASK_IS_FP FALSE
+
+#define CPU_USE_DEFERRED_FP_SWITCH FALSE
+
+#define CPU_STACK_GROWS_UP FALSE
+
+/**
+ * The maximum cache-line size is 16 words.
+ */
+#define CPU_CACHE_LINE_BYTES 64
+
+#define CPU_STRUCTURE_ALIGNMENT
+
+#define CPU_MODES_INTERRUPT_MASK 0x00000001
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @ingroup CPUContext Management
+ * This defines the minimal set of integer and processor state registers
+ * that must be saved during a voluntary context switch from one thread
+ * to another.
+ */
+typedef struct {
+ uint32_t r1;
+ uint32_t r13;
+ uint32_t r14;
+ uint32_t r15;
+ uint32_t r16;
+ uint32_t r17;
+ uint32_t r18;
+ uint32_t r19;
+ uint32_t r20;
+ uint32_t r21;
+ uint32_t r22;
+ uint32_t r23;
+ uint32_t r24;
+ uint32_t r25;
+ uint32_t r26;
+ uint32_t r27;
+ uint32_t r28;
+ uint32_t r29;
+ uint32_t r30;
+ uint32_t r31;
+ uint32_t rmsr;
+} Context_Control;
+
+/**
+ * @ingroup CPUContext Management
+ *
+ * This macro returns the stack pointer associated with @a _context.
+ *
+ * @param[in] _context is the thread context area to access
+ *
+ * @return This method returns the stack pointer.
+ */
+#define _CPU_Context_Get_SP( _context ) \
+ (_context)->r1
+
+#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
+
+#define CPU_INTERRUPT_NUMBER_OF_VECTORS 32
+
+#define CPU_USE_LIBC_INIT_FINI_ARRAY TRUE
+
+#define CPU_MAXIMUM_PROCESSORS 32
+
+/**
+ * @ingroup CPUInterrupt
+ * This defines the highest interrupt vector number for this port.
+ */
+#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
+
+#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
+
+#define CPU_STACK_MINIMUM_SIZE (1024*4)
+
+#define CPU_ALIGNMENT 4
+
+#define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT
+
+#define CPU_STACK_ALIGNMENT CPU_ALIGNMENT
+
+#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
+
+#define MICROBLAZE_MSR_IE (1 << 1)
+#define MICROBLAZE_MSR_EE (1 << 8)
+
+#define _CPU_MSR_GET( _msr_value ) \
+ do { \
+ (_msr_value) = 0; \
+ __asm__ volatile ("mfs %0, rmsr" : "=&r" ((_msr_value)) : "0" ((_msr_value))); \
+ } while (0)
+
+#define _CPU_MSR_SET( _msr_value ) \
+{ __asm__ volatile ("mts rmsr, %0" : "=&r" ((_msr_value)) : "0" ((_msr_value))); }
+
+#define _CPU_ISR_Disable( _isr_cookie ) \
+ { \
+ unsigned int _new_msr; \
+ _CPU_MSR_GET(_isr_cookie); \
+ _new_msr = (_isr_cookie) & ~(MICROBLAZE_MSR_IE | MICROBLAZE_MSR_EE); \
+ _CPU_MSR_SET(_new_msr); \
+ }
+
+#define _CPU_ISR_Enable( _isr_cookie ) \
+ { \
+ uint32_t _microblaze_interrupt_enable; \
+ uint32_t _microblaze_switch_reg; \
+ \
+ _microblaze_interrupt_enable = (_isr_cookie) & (MICROBLAZE_MSR_IE | MICROBLAZE_MSR_EE); \
+ _CPU_MSR_GET(_microblaze_switch_reg); \
+ _microblaze_switch_reg &= ~(MICROBLAZE_MSR_IE | MICROBLAZE_MSR_EE); \
+ _microblaze_switch_reg |= _microblaze_interrupt_enable; \
+ _CPU_MSR_SET(_microblaze_switch_reg); \
+ }
+
+#define _CPU_ISR_Flash( _isr_cookie ) \
+ { \
+ unsigned int _new_msr; \
+ _CPU_MSR_SET(_isr_cookie); \
+ _new_msr = (_isr_cookie) & ~(MICROBLAZE_MSR_IE | MICROBLAZE_MSR_EE); \
+ _CPU_MSR_SET(_new_msr); \
+ }
+
+void _CPU_ISR_Set_level( uint32_t level );
+
+uint32_t _CPU_ISR_Get_level( void );
+
+RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level )
+{
+ return ( level & (MICROBLAZE_MSR_IE | MICROBLAZE_MSR_EE) ) != 0;
+}
+
+void _CPU_Context_Initialize(
+ Context_Control *context,
+ void *stack_area_begin,
+ size_t stack_area_size,
+ uint32_t new_level,
+ void (*entry_point)( void ),
+ bool is_fp,
+ void *tls_area
+);
+
+#define _CPU_Context_Restart_self( _the_context ) \
+ _CPU_Context_restore( (_the_context) );
+
+#define _CPU_Context_Initialize_fp( _destination ) \
+ { \
+ *(*(_destination)) = _CPU_Null_fp_context; \
+ }
+
+/* end of Context handler macros */
+
+/* Fatal Error manager macros */
+
+/* TODO */
+#define _CPU_Fatal_halt(_source, _error ) \
+ do { \
+ __asm__ volatile ( "sleep" ); \
+ for(;;) {} \
+ } while (0)
+
+/* end of Fatal Error manager macros */
+
+/* Bitfield handler macros */
+
+#define CPU_USE_GENERIC_BITFIELD_CODE TRUE
+
+#define CPU_SIZEOF_POINTER 4
+
+#define CPU_PER_CPU_CONTROL_SIZE 0
+
+typedef struct {
+ /* TODO: enumerate registers */
+ uint32_t r[32];
+} CPU_Exception_frame;
+
+/* end of Priority handler macros */
+
+/* functions */
+
+void _CPU_Initialize( void );
+
+typedef void ( *CPU_ISR_handler )( uint32_t );
+
+void _CPU_ISR_install_vector(
+ uint32_t vector,
+ CPU_ISR_handler new_handler,
+ CPU_ISR_handler *old_handler
+);
+
+void _CPU_Context_switch(
+ Context_Control *run,
+ Context_Control *heir
+);
+
+RTEMS_NO_RETURN void _CPU_Context_restore(
+ Context_Control *new_context
+);
+
+static inline uint32_t CPU_swap_u32(
+ uint32_t value
+)
+{
+ uint32_t byte1, byte2, byte3, byte4, swapped;
+
+ byte4 = (value >> 24) & 0xff;
+ byte3 = (value >> 16) & 0xff;
+ byte2 = (value >> 8) & 0xff;
+ byte1 = value & 0xff;
+
+ swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4;
+ return swapped;
+}
+
+#define CPU_swap_u16( value ) \
+ (((value&0xff) << 8) | ((value >> 8)&0xff))
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
+typedef uint32_t CPU_Counter_ticks;
+
+uint32_t _CPU_Counter_frequency( void );
+
+CPU_Counter_ticks _CPU_Counter_read( void );
+
+static inline CPU_Counter_ticks _CPU_Counter_difference(
+ CPU_Counter_ticks second,
+ CPU_Counter_ticks first
+)
+{
+ return second - first;
+}
+
+void *_CPU_Thread_Idle_body( uintptr_t ignored );
+
+void bsp_interrupt_dispatch( uint32_t source );
+
+/** Type that can store a 32-bit integer or a pointer. */
+typedef uintptr_t CPU_Uint32ptr;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ASM */
+
+#endif /* _RTEMS_SCORE_CPU_H */
diff --git a/cpukit/score/cpu/microblaze/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/microblaze/include/rtems/score/cpuatomic.h
new file mode 100644
index 0000000000..6dc769b95a
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/include/rtems/score/cpuatomic.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPU
+ *
+ * @brief MicroBlaze atomic support
+ */
+
+/*
+ * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTEMS_SCORE_ATOMIC_CPU_H
+#define _RTEMS_SCORE_ATOMIC_CPU_H
+
+#include <rtems/score/cpustdatomic.h>
+
+#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */
diff --git a/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h
new file mode 100644
index 0000000000..3d0167dd40
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPU
+ *
+ * @brief CPU Port Implementation API
+ */
+
+/*
+ * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTEMS_SCORE_CPUIMPL_H
+#define _RTEMS_SCORE_CPUIMPL_H
+
+#include <rtems/score/cpu.h>
+
+/**
+ * @defgroup RTEMSScoreCPUMicroBlaze MicroBlaze
+ *
+ * @ingroup RTEMSScoreCPU
+ *
+ * @brief MicroBlaze Architecture Support
+ *
+ * @{
+ */
+
+#define CPU_PER_CPU_CONTROL_SIZE 0
+#define CPU_INTERRUPT_FRAME_SIZE 52
+
+#define MICROBLAZE_INTERRUPT_FRAME_R3 0
+#define MICROBLAZE_INTERRUPT_FRAME_R4 4
+#define MICROBLAZE_INTERRUPT_FRAME_R5 8
+#define MICROBLAZE_INTERRUPT_FRAME_R6 12
+#define MICROBLAZE_INTERRUPT_FRAME_R7 16
+#define MICROBLAZE_INTERRUPT_FRAME_R8 20
+#define MICROBLAZE_INTERRUPT_FRAME_R9 24
+#define MICROBLAZE_INTERRUPT_FRAME_R10 28
+#define MICROBLAZE_INTERRUPT_FRAME_R11 32
+#define MICROBLAZE_INTERRUPT_FRAME_R12 36
+#define MICROBLAZE_INTERRUPT_FRAME_R14 40
+#define MICROBLAZE_INTERRUPT_FRAME_R15 44
+#define MICROBLAZE_INTERRUPT_FRAME_R18 48
+
+#ifndef ASM
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void _CPU_Context_volatile_clobber( uintptr_t pattern );
+
+void _CPU_Context_validate( uintptr_t pattern );
+
+RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void )
+{
+ __asm__ volatile ( ".word 0x0" );
+}
+
+RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void )
+{
+ __asm__ volatile ( "nop" );
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ASM */
+
+/** @} */
+
+#endif /* _RTEMS_SCORE_CPUIMPL_H */
diff --git a/cpukit/score/cpu/microblaze/include/rtems/score/microblaze.h b/cpukit/score/cpu/microblaze/include/rtems/score/microblaze.h
new file mode 100644
index 0000000000..6310b4b17d
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/include/rtems/score/microblaze.h
@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPU
+ *
+ * @brief MicroBlaze architecture support
+ */
+
+/*
+ * Copyright (c) 2015, Hesham Almatary
+ * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTEMS_SCORE_MICROBLAZE_H
+#define _RTEMS_SCORE_MICROBLAZE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CPU_MODEL_NAME "MicroBlaze"
+#define NOCPU_HAS_FPU 1
+
+/*
+ * Define the name of the CPU family.
+ */
+
+#define CPU_NAME "MicroBlaze CPU"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTEMS_SCORE_MICROBLAZE_H */
diff --git a/cpukit/score/cpu/microblaze/microblaze-context-switch.S b/cpukit/score/cpu/microblaze/microblaze-context-switch.S
new file mode 100644
index 0000000000..523e836398
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/microblaze-context-switch.S
@@ -0,0 +1,107 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreCPUMicroBlaze
+ *
+ * @brief MicroBlaze context switch implementation
+ */
+
+/*
+ * Copyright (c) 2015, Hesham Almatary
+ * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/asm.h>
+
+.text
+.align 4
+
+PUBLIC(_CPU_Context_switch)
+PUBLIC(_CPU_Context_restore)
+PUBLIC(_CPU_Context_restore_fp)
+PUBLIC(_CPU_Context_save_fp)
+
+SYM(_CPU_Context_switch):
+ swi r1, r5, 0
+ swi r13, r5, 4
+ swi r14, r5, 8
+ swi r15, r5, 12
+ swi r16, r5, 16
+ swi r17, r5, 20
+ swi r18, r5, 24
+ swi r19, r5, 28
+ swi r20, r5, 32
+ swi r21, r5, 36
+ swi r22, r5, 40
+ swi r23, r5, 44
+ swi r24, r5, 48
+ swi r25, r5, 52
+ swi r26, r5, 56
+ swi r27, r5, 60
+ swi r28, r5, 64
+ swi r29, r5, 68
+ swi r30, r5, 72
+ swi r31, r5, 76
+
+ mfs r21, rmsr
+ swi r21, r5, 80
+
+
+SYM(restore):
+ lwi r1, r6, 0
+ lwi r13, r6, 4
+ lwi r14, r6, 8
+ lwi r15, r6, 12
+ lwi r16, r6, 16
+ lwi r17, r6, 20
+ lwi r18, r6, 24
+ lwi r19, r6, 28
+ lwi r20, r6, 32
+ lwi r21, r6, 36
+ lwi r22, r6, 40
+ lwi r23, r6, 44
+ lwi r24, r6, 48
+ lwi r25, r6, 52
+ lwi r26, r6, 56
+ lwi r27, r6, 60
+ lwi r28, r6, 64
+ lwi r29, r6, 68
+ lwi r30, r6, 72
+
+ lwi r31, r6, 80
+ mts rmsr, r31
+
+ lwi r31, r6, 76
+
+ rtsd r15, 8
+
+SYM(_CPU_Context_restore):
+ add r6, r5, r0
+ brai restore
diff --git a/cpukit/score/cpu/microblaze/microblaze-context-validate.S b/cpukit/score/cpu/microblaze/microblaze-context-validate.S
new file mode 100644
index 0000000000..b12d5930f6
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/microblaze-context-validate.S
@@ -0,0 +1,117 @@
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/asm.h>
+
+#define FRAME_OFFSET_R19 0
+#define FRAME_OFFSET_R20 4
+#define FRAME_OFFSET_R21 8
+#define FRAME_OFFSET_R22 12
+#define FRAME_OFFSET_R23 16
+#define FRAME_OFFSET_R24 20
+#define FRAME_OFFSET_R25 24
+#define FRAME_OFFSET_R26 28
+#define FRAME_OFFSET_R27 32
+#define FRAME_OFFSET_R28 36
+#define FRAME_OFFSET_R29 40
+#define FRAME_OFFSET_R30 44
+#define FRAME_OFFSET_R31 48
+
+#define FRAME_SIZE (FRAME_OFFSET_R31 + 4)
+
+.text
+.align 4
+
+PUBLIC(_CPU_Context_validate)
+
+SYM(_CPU_Context_validate):
+
+ /* Save */
+ addik r1, r1, -FRAME_SIZE
+ swi r19, r1, FRAME_OFFSET_R19
+ swi r20, r1, FRAME_OFFSET_R20
+ swi r21, r1, FRAME_OFFSET_R21
+ swi r22, r1, FRAME_OFFSET_R22
+ swi r23, r1, FRAME_OFFSET_R23
+ swi r24, r1, FRAME_OFFSET_R24
+ swi r25, r1, FRAME_OFFSET_R25
+ swi r26, r1, FRAME_OFFSET_R26
+ swi r27, r1, FRAME_OFFSET_R27
+ swi r28, r1, FRAME_OFFSET_R28
+ swi r29, r1, FRAME_OFFSET_R29
+ swi r30, r1, FRAME_OFFSET_R30
+ swi r31, r1, FRAME_OFFSET_R31
+
+ /* Fill */
+
+ add r4, r0, r3
+
+ /* r7 contains the stack pointer */
+ add r7, r0, r1
+
+.macro fill_register reg
+ addi r4, r4, 1
+ add \reg, r0, r4
+.endm
+
+ fill_register r21
+ fill_register r22
+ fill_register r23
+ fill_register r24
+ fill_register r25
+ fill_register r26
+ fill_register r27
+ fill_register r28
+ fill_register r29
+ fill_register r30
+ fill_register r31
+
+ /* Check */
+check:
+
+.macro check_register reg
+ addi r4, r4, 1
+ cmp r6, \reg, r4
+ bnei r6, restore
+.endm
+
+ cmp r6, r7, r1
+ bnei r6, restore
+
+ add r4, r0, r3
+
+ check_register r21
+ check_register r22
+ check_register r23
+ check_register r24
+ check_register r25
+ check_register r26
+ check_register r27
+ check_register r28
+ check_register r29
+ check_register r30
+ check_register r31
+
+ brai check
+
+ /* Restore */
+restore:
+
+ lwi r19, r1, FRAME_OFFSET_R19
+ lwi r20, r1, FRAME_OFFSET_R20
+ lwi r21, r1, FRAME_OFFSET_R21
+ lwi r22, r1, FRAME_OFFSET_R22
+ lwi r23, r1, FRAME_OFFSET_R23
+ lwi r24, r1, FRAME_OFFSET_R24
+ lwi r25, r1, FRAME_OFFSET_R25
+ lwi r26, r1, FRAME_OFFSET_R26
+ lwi r27, r1, FRAME_OFFSET_R27
+ lwi r28, r1, FRAME_OFFSET_R28
+ lwi r29, r1, FRAME_OFFSET_R29
+ lwi r30, r1, FRAME_OFFSET_R30
+ lwi r31, r1, FRAME_OFFSET_R31
+
+ addik r1, r1, FRAME_SIZE
+
+ bra r15
diff --git a/cpukit/score/cpu/microblaze/microblaze-context-volatile-clobber.S b/cpukit/score/cpu/microblaze/microblaze-context-volatile-clobber.S
new file mode 100644
index 0000000000..fb49dc5e40
--- /dev/null
+++ b/cpukit/score/cpu/microblaze/microblaze-context-volatile-clobber.S
@@ -0,0 +1,28 @@
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/asm.h>
+
+.text
+.align 4
+
+PUBLIC(_CPU_Context_volatile_clobber)
+
+SYM(_CPU_Context_volatile_clobber):
+
+.macro clobber_register reg
+ addi r5, r5, -1
+ add \reg, r0, r5
+.endm
+
+ clobber_register r3
+ clobber_register r4
+ clobber_register r6
+ clobber_register r7
+ clobber_register r8
+ clobber_register r9
+ clobber_register r10
+
+ rtsd r15, 8
+ nop
diff --git a/cpukit/score/cpu/mips/headers.am b/cpukit/score/cpu/mips/headers.am
deleted file mode 100644
index 3084000f09..0000000000
--- a/cpukit/score/cpu/mips/headers.am
+++ /dev/null
@@ -1,9 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_machine_HEADERS += score/cpu/mips/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/mips/include/rtems/asm.h
-include_rtems_mips_HEADERS += score/cpu/mips/include/rtems/mips/idtcpu.h
-include_rtems_mips_HEADERS += score/cpu/mips/include/rtems/mips/iregdef.h
-include_rtems_score_HEADERS += score/cpu/mips/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/mips/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/mips/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/mips/include/rtems/score/mips.h
diff --git a/cpukit/score/cpu/moxie/headers.am b/cpukit/score/cpu/moxie/headers.am
deleted file mode 100644
index 6324166c86..0000000000
--- a/cpukit/score/cpu/moxie/headers.am
+++ /dev/null
@@ -1,7 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_machine_HEADERS += score/cpu/moxie/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/moxie/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/moxie/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/moxie/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/moxie/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/moxie/include/rtems/score/moxie.h
diff --git a/cpukit/score/cpu/nios2/headers.am b/cpukit/score/cpu/nios2/headers.am
deleted file mode 100644
index 253f64d03a..0000000000
--- a/cpukit/score/cpu/nios2/headers.am
+++ /dev/null
@@ -1,10 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_machine_HEADERS += score/cpu/nios2/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/nios2/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/nios2/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/nios2/include/rtems/score/cpu_asm.h
-include_rtems_score_HEADERS += score/cpu/nios2/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/nios2/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/nios2/include/rtems/score/nios2-count-zeros.h
-include_rtems_score_HEADERS += score/cpu/nios2/include/rtems/score/nios2-utility.h
-include_rtems_score_HEADERS += score/cpu/nios2/include/rtems/score/nios2.h
diff --git a/cpukit/score/cpu/no_cpu/headers.am b/cpukit/score/cpu/no_cpu/headers.am
deleted file mode 100644
index 6a8c54df42..0000000000
--- a/cpukit/score/cpu/no_cpu/headers.am
+++ /dev/null
@@ -1,6 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_rtems_HEADERS += score/cpu/no_cpu/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/no_cpu/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/no_cpu/include/rtems/score/cpu_asm.h
-include_rtems_score_HEADERS += score/cpu/no_cpu/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/no_cpu/include/rtems/score/no_cpu.h
diff --git a/cpukit/score/cpu/or1k/headers.am b/cpukit/score/cpu/or1k/headers.am
deleted file mode 100644
index e65d66464d..0000000000
--- a/cpukit/score/cpu/or1k/headers.am
+++ /dev/null
@@ -1,8 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_rtems_HEADERS += score/cpu/or1k/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/or1k/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/or1k/include/rtems/score/cpu_asm.h
-include_rtems_score_HEADERS += score/cpu/or1k/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/or1k/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/or1k/include/rtems/score/or1k-utility.h
-include_rtems_score_HEADERS += score/cpu/or1k/include/rtems/score/or1k.h
diff --git a/cpukit/score/cpu/powerpc/headers.am b/cpukit/score/cpu/powerpc/headers.am
deleted file mode 100644
index 5f016a21d1..0000000000
--- a/cpukit/score/cpu/powerpc/headers.am
+++ /dev/null
@@ -1,9 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_machine_HEADERS += score/cpu/powerpc/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/powerpc/include/rtems/asm.h
-include_rtems_powerpc_HEADERS += score/cpu/powerpc/include/rtems/powerpc/registers.h
-include_rtems_score_HEADERS += score/cpu/powerpc/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/powerpc/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/powerpc/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/powerpc/include/rtems/score/paravirt.h
-include_rtems_score_HEADERS += score/cpu/powerpc/include/rtems/score/powerpc.h
diff --git a/cpukit/score/cpu/riscv/headers.am b/cpukit/score/cpu/riscv/headers.am
deleted file mode 100644
index eb863cb28c..0000000000
--- a/cpukit/score/cpu/riscv/headers.am
+++ /dev/null
@@ -1,11 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_libcpu_HEADERS += score/cpu/riscv/include/libcpu/access.h
-include_libcpu_HEADERS += score/cpu/riscv/include/libcpu/byteorder.h
-include_machine_HEADERS += score/cpu/riscv/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/riscv/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/riscv/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/riscv/include/rtems/score/cpu_asm.h
-include_rtems_score_HEADERS += score/cpu/riscv/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/riscv/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/riscv/include/rtems/score/riscv-utility.h
-include_rtems_score_HEADERS += score/cpu/riscv/include/rtems/score/riscv.h
diff --git a/cpukit/score/cpu/sh/headers.am b/cpukit/score/cpu/sh/headers.am
deleted file mode 100644
index ccb3b94eb5..0000000000
--- a/cpukit/score/cpu/sh/headers.am
+++ /dev/null
@@ -1,7 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_rtems_HEADERS += score/cpu/sh/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/sh/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/sh/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/sh/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/sh/include/rtems/score/sh.h
-include_rtems_score_HEADERS += score/cpu/sh/include/rtems/score/sh_io.h
diff --git a/cpukit/score/cpu/sparc/headers.am b/cpukit/score/cpu/sparc/headers.am
deleted file mode 100644
index 25eaeaa74a..0000000000
--- a/cpukit/score/cpu/sparc/headers.am
+++ /dev/null
@@ -1,11 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_libcpu_HEADERS += score/cpu/sparc/include/libcpu/access.h
-include_libcpu_HEADERS += score/cpu/sparc/include/libcpu/byteorder.h
-include_libcpu_HEADERS += score/cpu/sparc/include/libcpu/grlib-tn-0018.h
-include_machine_HEADERS += score/cpu/sparc/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/sparc/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/sparc/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/sparc/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/sparc/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/sparc/include/rtems/score/sparc.h
-include_rtems_score_HEADERS += score/cpu/sparc/include/rtems/score/sparcimpl.h
diff --git a/cpukit/score/cpu/sparc64/headers.am b/cpukit/score/cpu/sparc64/headers.am
deleted file mode 100644
index a2a1c1fb2c..0000000000
--- a/cpukit/score/cpu/sparc64/headers.am
+++ /dev/null
@@ -1,6 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_rtems_HEADERS += score/cpu/sparc64/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/sparc64/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/sparc64/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/sparc64/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/sparc64/include/rtems/score/sparc64.h
diff --git a/cpukit/score/cpu/v850/headers.am b/cpukit/score/cpu/v850/headers.am
deleted file mode 100644
index 547f128401..0000000000
--- a/cpukit/score/cpu/v850/headers.am
+++ /dev/null
@@ -1,8 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_machine_HEADERS += score/cpu/v850/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/v850/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/v850/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/v850/include/rtems/score/cpu_asm.h
-include_rtems_score_HEADERS += score/cpu/v850/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/v850/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/v850/include/rtems/score/v850.h
diff --git a/cpukit/score/cpu/x86_64/headers.am b/cpukit/score/cpu/x86_64/headers.am
deleted file mode 100644
index 3ce32c3317..0000000000
--- a/cpukit/score/cpu/x86_64/headers.am
+++ /dev/null
@@ -1,9 +0,0 @@
-## This file was generated by "./boostrap -H".
-include_machine_HEADERS += score/cpu/x86_64/include/machine/elf_machdep.h
-include_rtems_HEADERS += score/cpu/x86_64/include/rtems/asm.h
-include_rtems_score_HEADERS += score/cpu/x86_64/include/rtems/score/cpu.h
-include_rtems_score_HEADERS += score/cpu/x86_64/include/rtems/score/cpu_asm.h
-include_rtems_score_HEADERS += score/cpu/x86_64/include/rtems/score/cpuatomic.h
-include_rtems_score_HEADERS += score/cpu/x86_64/include/rtems/score/cpuimpl.h
-include_rtems_score_HEADERS += score/cpu/x86_64/include/rtems/score/idt.h
-include_rtems_score_HEADERS += score/cpu/x86_64/include/rtems/score/x86_64.h
diff --git a/cpukit/score/src/coremsgseize.c b/cpukit/score/src/coremsgseize.c
index e44538ee17..148e9dbb3c 100644
--- a/cpukit/score/src/coremsgseize.c
+++ b/cpukit/score/src/coremsgseize.c
@@ -56,7 +56,8 @@ Status_Control _CORE_message_queue_Seize(
return STATUS_SUCCESSFUL;
#else
{
- Thread_Control *the_thread;
+ Thread_queue_Heads *heads;
+ Thread_Control *the_thread;
/*
* There could be a thread waiting to send a message. If there
@@ -65,11 +66,8 @@ Status_Control _CORE_message_queue_Seize(
* NOTE: If we note that the queue was not full before this receive,
* then we can avoid this dequeue.
*/
- the_thread = _Thread_queue_First_locked(
- &the_message_queue->Wait_queue,
- the_message_queue->operations
- );
- if ( the_thread == NULL ) {
+ heads = the_message_queue->Wait_queue.Queue.heads;
+ if ( heads == NULL ) {
_CORE_message_queue_Free_message_buffer(
the_message_queue,
the_message
@@ -78,6 +76,13 @@ Status_Control _CORE_message_queue_Seize(
return STATUS_SUCCESSFUL;
}
+ the_thread = ( *the_message_queue->operations->surrender )(
+ &the_message_queue->Wait_queue.Queue,
+ heads,
+ NULL,
+ queue_context
+ );
+
/*
* There was a thread waiting to send a message. This code
* puts the messages in the message queue on behalf of the
@@ -90,9 +95,8 @@ Status_Control _CORE_message_queue_Seize(
(size_t) the_thread->Wait.option,
(CORE_message_queue_Submit_types) the_thread->Wait.count
);
- _Thread_queue_Extract_critical(
+ _Thread_queue_Resume(
&the_message_queue->Wait_queue.Queue,
- the_message_queue->operations,
the_thread,
queue_context
);
diff --git a/cpukit/score/src/coretodadjust.c b/cpukit/score/src/coretodadjust.c
index a746b0e004..b048aeee71 100644
--- a/cpukit/score/src/coretodadjust.c
+++ b/cpukit/score/src/coretodadjust.c
@@ -22,12 +22,13 @@
#include <rtems/score/todimpl.h>
-void _TOD_Adjust(
+Status_Control _TOD_Adjust(
const struct timespec *delta
)
{
ISR_lock_Context lock_context;
struct timespec tod;
+ Status_Control status;
/*
* Currently, RTEMS does the adjustment in one movement.
@@ -41,6 +42,13 @@ void _TOD_Adjust(
_TOD_Acquire( &lock_context );
_TOD_Get( &tod );
_Timespec_Add_to( &tod, delta );
- _TOD_Set( &tod, &lock_context );
+ status = _TOD_Is_valid_new_time_of_day( &tod );
+
+ if ( status == STATUS_SUCCESSFUL ) {
+ status = _TOD_Set( &tod, &lock_context );
+ }
+
_TOD_Unlock();
+
+ return status;
}
diff --git a/cpukit/score/src/coretodcheck.c b/cpukit/score/src/coretodcheck.c
new file mode 100644
index 0000000000..8c012c5070
--- /dev/null
+++ b/cpukit/score/src/coretodcheck.c
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreTOD
+ *
+ * @brief This source file contains the implementation of
+ * _TOD_Is_valid_new_time_of_day().
+ */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/todimpl.h>
+#include <rtems/score/watchdogimpl.h>
+
+Status_Control _TOD_Is_valid_new_time_of_day( const struct timespec *tod )
+{
+ if ( !_Watchdog_Is_valid_timespec( tod ) ) {
+ return STATUS_INVALID_NUMBER;
+ }
+
+ if ( tod->tv_sec < TOD_SECONDS_1970_THROUGH_1988 ) {
+ return STATUS_INVALID_NUMBER;
+ }
+
+ if ( tod->tv_sec > TOD_SECONDS_1970_THROUGH_2400 ) {
+ return STATUS_INVALID_NUMBER;
+ }
+
+ return STATUS_SUCCESSFUL;
+}
diff --git a/cpukit/score/src/coretodset.c b/cpukit/score/src/coretodset.c
index 5fc01215e0..b04242a0da 100644
--- a/cpukit/score/src/coretodset.c
+++ b/cpukit/score/src/coretodset.c
@@ -23,25 +23,6 @@
#include <rtems/score/assert.h>
#include <rtems/score/watchdogimpl.h>
-static Status_Control _TOD_Check_time_of_day_and_run_hooks(
- const struct timespec *tod
-)
-{
- if ( !_Watchdog_Is_valid_timespec( tod ) ) {
- return STATUS_INVALID_NUMBER;
- }
-
- if ( tod->tv_sec < TOD_SECONDS_1970_THROUGH_1988 ) {
- return STATUS_INVALID_NUMBER;
- }
-
- if ( _Watchdog_Is_far_future_timespec( tod ) ) {
- return STATUS_INVALID_NUMBER;
- }
-
- return _TOD_Hook_Run( TOD_ACTION_SET_CLOCK, tod );
-}
-
Status_Control _TOD_Set(
const struct timespec *tod,
ISR_lock_Context *lock_context
@@ -54,8 +35,9 @@ Status_Control _TOD_Set(
Status_Control status;
_Assert( _TOD_Is_owner() );
+ _Assert( _TOD_Is_valid_new_time_of_day( tod ) == STATUS_SUCCESSFUL );
- status = _TOD_Check_time_of_day_and_run_hooks( tod );
+ status = _TOD_Hook_Run( TOD_ACTION_SET_CLOCK, tod );
if ( status != STATUS_SUCCESSFUL ) {
_TOD_Release( lock_context );
return status;
diff --git a/cpukit/score/src/coretodtickspersec.c b/cpukit/score/src/coretodtickspersec.c
deleted file mode 100644
index f4860975bc..0000000000
--- a/cpukit/score/src/coretodtickspersec.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/**
- * @file
- *
- * @ingroup RTEMSScoreTOD
- *
- * @brief This source file contains the implementation of
- * TOD_TICKS_PER_SECOND_method().
- */
-
-/* COPYRIGHT (c) 1989-2014.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <rtems/score/todimpl.h>
-#include <rtems/config.h>
-
-uint32_t TOD_TICKS_PER_SECOND_method(void)
-{
- return (TOD_MICROSECONDS_PER_SECOND /
- rtems_configuration_get_microseconds_per_tick());
-}
diff --git a/cpukit/score/src/futex.c b/cpukit/score/src/futex.c
index b65a843704..9bf4d8b37e 100644
--- a/cpukit/score/src/futex.c
+++ b/cpukit/score/src/futex.c
@@ -1,11 +1,12 @@
/**
* @file
*
- * @ingroup RTEMSScore
+ * @ingroup RTEMSScoreFutex
*
* @brief This source file contains the implementation of
* _Futex_Wait() and _Futex_Wake().
*/
+
/*
* Copyright (c) 2015, 2016 embedded brains GmbH. All rights reserved.
*
@@ -20,6 +21,18 @@
* http://www.rtems.org/license/LICENSE.
*/
+/**
+ * @defgroup RTEMSScoreFutex Futex Handler
+ *
+ * @ingroup RTEMSScore
+ *
+ * @brief This group contains the Futex Handler implementation.
+ *
+ * The behaviour of the futex operations is defined by Linux, see also:
+ *
+ * https://man7.org/linux/man-pages/man2/futex.2.html
+ */
+
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -84,6 +97,22 @@ static void _Futex_Queue_release(
_ISR_Local_enable( level );
}
+/**
+ * @brief Performs the ``FUTEX_WAIT`` operation.
+ *
+ * @param[in, out] _futex is the futex object.
+ *
+ * @param[in] uaddr is the address to the futex state.
+ *
+ * @param val is the expected futex state value.
+ *
+ * @retval 0 Returns zero if the futex state is equal to the expected value.
+ * In this case the calling thread is enqueued on the thread queue of the
+ * futex object.
+ *
+ * @retval EAGAIN Returns EAGAIN if the futex state is not equal to the
+ * expected value.
+ */
int _Futex_Wait( struct _Futex_Control *_futex, int *uaddr, int val )
{
Futex_Control *futex;
@@ -113,7 +142,7 @@ int _Futex_Wait( struct _Futex_Control *_futex, int *uaddr, int val )
eno = 0;
} else {
_Futex_Queue_release( futex, level, &queue_context );
- eno = EWOULDBLOCK;
+ eno = EAGAIN;
}
return eno;
@@ -143,6 +172,15 @@ static Thread_Control *_Futex_Flush_filter(
return the_thread;
}
+/**
+ * @brief Performs the ``FUTEX_WAKE`` operation.
+ *
+ * @param[in, out] _futex is the futex object.
+ *
+ * @param count is the maximum count of threads to wake up.
+ *
+ * @return Returns the count of woken up threads.
+ */
int _Futex_Wake( struct _Futex_Control *_futex, int count )
{
Futex_Control *futex;
diff --git a/cpukit/score/src/mutex.c b/cpukit/score/src/mutex.c
index f7e35093b2..92bd614967 100644
--- a/cpukit/score/src/mutex.c
+++ b/cpukit/score/src/mutex.c
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup RTEMSScore
+ * @ingroup RTEMSScoreSysLockMutex
*
* @brief This source file contains the implementation of
* _Mutex_Acquire(), _Mutex_Acquire_timed(), _Mutex_Acquire_timed_ticks(),
@@ -36,6 +36,20 @@
#include <rtems/score/threadimpl.h>
#include <rtems/score/todimpl.h>
+/**
+ * @defgroup RTEMSScoreSysLockMutex System Lock Mutex Handler
+ *
+ * @ingroup RTEMSScore
+ *
+ * @brief This group contains the System Lock Mutex Handler implementation.
+ *
+ * The interfaces are defined by Newlib in <sys/lock.h>. The system lock
+ * mutexes are used for Newlib internal locking, the C++ standard library
+ * provided by GCC, the OpenMP support provided by GCC, the self-contained
+ * objects API provided by RTEMS, and the SuperCore internal mutexes such as
+ * the objects allocator lock (see ::API_Mutex_Control).
+ */
+
#define MUTEX_TQ_OPERATIONS &_Thread_queue_Operations_priority_inherit
RTEMS_STATIC_ASSERT(
diff --git a/cpukit/score/src/percpujobs.c b/cpukit/score/src/percpujobs.c
index f273f7d17d..3de3e4a7bd 100644
--- a/cpukit/score/src/percpujobs.c
+++ b/cpukit/score/src/percpujobs.c
@@ -127,7 +127,6 @@ void _Per_CPU_Wait_for_job(
break;
default:
_SMP_Fatal( SMP_FATAL_WRONG_CPU_STATE_TO_PERFORM_JOBS );
- break;
}
}
}
diff --git a/cpukit/score/src/rbtreemax.c b/cpukit/score/src/rbtreemax.c
new file mode 100644
index 0000000000..1b0e463aa2
--- /dev/null
+++ b/cpukit/score/src/rbtreemax.c
@@ -0,0 +1,55 @@
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreRBTree
+ *
+ * @brief This source file contains the implementation of
+ * _RBTree_Maximum().
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/rbtreeimpl.h>
+
+RBTree_Node *_RBTree_Maximum( const RBTree_Control *tree )
+{
+ RBTree_Node *parent;
+ RBTree_Node *node;
+
+ parent = NULL;
+ node = _RBTree_Root( tree );
+
+ while ( node != NULL ) {
+ parent = node;
+ node = _RBTree_Right( node );
+ }
+
+ return parent;
+}
diff --git a/cpukit/score/src/rbtreemin.c b/cpukit/score/src/rbtreemin.c
new file mode 100644
index 0000000000..b3cd4331c1
--- /dev/null
+++ b/cpukit/score/src/rbtreemin.c
@@ -0,0 +1,55 @@
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreRBTree
+ *
+ * @brief This source file contains the implementation of
+ * _RBTree_Minimum().
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/rbtreeimpl.h>
+
+RBTree_Node *_RBTree_Minimum( const RBTree_Control *tree )
+{
+ RBTree_Node *parent;
+ RBTree_Node *node;
+
+ parent = NULL;
+ node = _RBTree_Root( tree );
+
+ while ( node != NULL ) {
+ parent = node;
+ node = _RBTree_Left( node );
+ }
+
+ return parent;
+}
diff --git a/cpukit/score/src/rbtreenext.c b/cpukit/score/src/rbtreenext.c
index 32087955fe..5d43af0068 100644
--- a/cpukit/score/src/rbtreenext.c
+++ b/cpukit/score/src/rbtreenext.c
@@ -9,17 +9,28 @@
*/
/*
- * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2012 embedded brains GmbH (http://www.embedded-brains.de)
*
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef HAVE_CONFIG_H
@@ -29,28 +40,9 @@
#include <rtems/score/rbtreeimpl.h>
#include <rtems/score/basedefs.h>
-RB_GENERATE_MINMAX( RBTree_Control, RBTree_Node, Node, static )
-
RB_GENERATE_NEXT( RBTree_Control, RBTree_Node, Node, static )
-RB_GENERATE_PREV( RBTree_Control, RBTree_Node, Node, static )
-
-RBTree_Node *_RBTree_Minimum( const RBTree_Control *tree )
-{
- return RB_MIN( RBTree_Control, RTEMS_DECONST( RBTree_Control *, tree ) );
-}
-
-RBTree_Node *_RBTree_Maximum( const RBTree_Control *tree )
-{
- return RB_MAX( RBTree_Control, RTEMS_DECONST( RBTree_Control *, tree ) );
-}
-
RBTree_Node *_RBTree_Successor( const RBTree_Node *node )
{
return RB_NEXT( RBTree_Control, NULL, RTEMS_DECONST( RBTree_Node *, node ) );
}
-
-RBTree_Node *_RBTree_Predecessor( const RBTree_Node *node )
-{
- return RB_PREV( RBTree_Control, NULL, RTEMS_DECONST( RBTree_Node *, node ) );
-}
diff --git a/cpukit/score/src/rbtreeprev.c b/cpukit/score/src/rbtreeprev.c
new file mode 100644
index 0000000000..9869cade99
--- /dev/null
+++ b/cpukit/score/src/rbtreeprev.c
@@ -0,0 +1,47 @@
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreRBTree
+ *
+ * @brief This source file contains the implementation of
+ * _RBTree_Predecessor().
+ */
+
+/*
+ * Copyright (C) 2012 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/rbtreeimpl.h>
+#include <rtems/score/basedefs.h>
+
+RB_GENERATE_PREV( RBTree_Control, RBTree_Node, Node, static inline )
+
+RBTree_Node *_RBTree_Predecessor( const RBTree_Node *node )
+{
+ return RB_PREV( RBTree_Control, NULL, RTEMS_DECONST( RBTree_Node *, node ) );
+}
diff --git a/cpukit/score/src/schedulerdefaultaskforhelp.c b/cpukit/score/src/schedulerdefaultaskforhelp.c
deleted file mode 100644
index 17c222eafb..0000000000
--- a/cpukit/score/src/schedulerdefaultaskforhelp.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/**
- * @file
- *
- * @ingroup RTEMSScoreScheduler
- *
- * @brief This source file contains the implementation of
- * _Scheduler_default_Ask_for_help(),
- * _Scheduler_default_Reconsider_help_request(), and
- * _Scheduler_default_Withdraw_node().
- */
-
-/*
- * Copyright (c) 2014, 2016 embedded brains GmbH
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <rtems/score/scheduler.h>
-
-bool _Scheduler_default_Ask_for_help(
- const Scheduler_Control *scheduler,
- Thread_Control *the_thread,
- Scheduler_Node *node
-)
-{
- (void) scheduler;
- (void) the_thread;
- (void) node;
-
- return false;
-}
-
-void _Scheduler_default_Reconsider_help_request(
- const Scheduler_Control *scheduler,
- Thread_Control *the_thread,
- Scheduler_Node *node
-)
-{
- (void) scheduler;
- (void) the_thread;
- (void) node;
-}
-
-void _Scheduler_default_Withdraw_node(
- const Scheduler_Control *scheduler,
- Thread_Control *the_thread,
- Scheduler_Node *node,
- Thread_Scheduler_state next_state
-)
-{
- (void) scheduler;
- (void) the_thread;
- (void) node;
- (void) next_state;
-}
diff --git a/cpukit/score/src/schedulerdefaultnodedestroy.c b/cpukit/score/src/schedulerdefaultnodedestroy.c
index 796896d854..33cdfd4c69 100644
--- a/cpukit/score/src/schedulerdefaultnodedestroy.c
+++ b/cpukit/score/src/schedulerdefaultnodedestroy.c
@@ -21,12 +21,12 @@
#endif
#include <rtems/score/scheduler.h>
+#include <rtems/score/schedulernodeimpl.h>
void _Scheduler_default_Node_destroy(
const Scheduler_Control *scheduler,
Scheduler_Node *node
)
{
- (void) scheduler;
- (void) node;
+ _Scheduler_Node_do_destroy( scheduler, node );
}
diff --git a/cpukit/score/src/schedulerdefaultpinunpin.c b/cpukit/score/src/schedulerdefaultpinunpin.c
index 4aa2169c8e..df41a29dcb 100644
--- a/cpukit/score/src/schedulerdefaultpinunpin.c
+++ b/cpukit/score/src/schedulerdefaultpinunpin.c
@@ -1,18 +1,37 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
* @ingroup RTEMSScoreScheduler
*
* @brief This source file contains the implementation of
- * _Scheduler_default_Pin_or_unpin().
+ * _Scheduler_default_Pin_or_unpin_not_supported().
*/
/*
- * Copyright (c) 2018 embedded brains GmbH
+ * Copyright (C) 2018 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef HAVE_CONFIG_H
@@ -23,7 +42,7 @@
#include <rtems/score/interr.h>
#include <rtems/score/smpimpl.h>
-void _Scheduler_default_Pin_or_unpin(
+void _Scheduler_default_Pin_or_unpin_not_supported(
const Scheduler_Control *scheduler,
Thread_Control *the_thread,
Scheduler_Node *node,
diff --git a/cpukit/score/src/schedulerdefaultpinunpindonothing.c b/cpukit/score/src/schedulerdefaultpinunpindonothing.c
new file mode 100644
index 0000000000..f3ecb0b718
--- /dev/null
+++ b/cpukit/score/src/schedulerdefaultpinunpindonothing.c
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreScheduler
+ *
+ * @brief This source file contains the implementation of
+ * _Scheduler_default_Pin_or_unpin_do_nothing().
+ */
+
+/*
+ * Copyright (C) 2018 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/scheduler.h>
+#include <rtems/score/interr.h>
+#include <rtems/score/smpimpl.h>
+#include <rtems/sysinit.h>
+
+void _Scheduler_default_Pin_or_unpin_do_nothing(
+ const Scheduler_Control *scheduler,
+ Thread_Control *the_thread,
+ Scheduler_Node *node,
+ struct Per_CPU_Control *cpu
+)
+{
+ (void) scheduler;
+ (void) the_thread;
+ (void) node;
+ (void) cpu;
+}
+
+static void _Scheduler_Ensure_exactly_one_processor( void )
+{
+ if ( _SMP_Get_processor_maximum() != 1 ) {
+ _Terminate(
+ RTEMS_FATAL_SOURCE_SMP,
+ SMP_FATAL_SCHEDULER_REQUIRES_EXACTLY_ONE_PROCESSOR
+ );
+ }
+}
+
+RTEMS_SYSINIT_ITEM(
+ _Scheduler_Ensure_exactly_one_processor,
+ RTEMS_SYSINIT_SCHEDULER,
+ RTEMS_SYSINIT_ORDER_MIDDLE
+);
diff --git a/cpukit/score/src/scheduleredfreleasejob.c b/cpukit/score/src/scheduleredfreleasejob.c
index 443fdaeed5..4cccffc952 100644
--- a/cpukit/score/src/scheduleredfreleasejob.c
+++ b/cpukit/score/src/scheduleredfreleasejob.c
@@ -66,7 +66,7 @@ void _Scheduler_EDF_Release_job(
_Thread_Priority_changed(
the_thread,
priority_node,
- false,
+ PRIORITY_GROUP_LAST,
queue_context
);
} else {
diff --git a/cpukit/score/src/semaphore.c b/cpukit/score/src/semaphore.c
index db3c3a91eb..7743939973 100644
--- a/cpukit/score/src/semaphore.c
+++ b/cpukit/score/src/semaphore.c
@@ -159,18 +159,12 @@ void _Semaphore_Post( struct _Semaphore_Control *_sem )
++sem->count;
_Sem_Queue_release( sem, level, &queue_context );
} else {
- const Thread_queue_Operations *operations;
- Thread_Control *first;
-
_Thread_queue_Context_set_ISR_level( &queue_context, level );
- operations = SEMAPHORE_TQ_OPERATIONS;
- first = ( *operations->first )( heads );
-
- _Thread_queue_Extract_critical(
+ _Thread_queue_Surrender_no_priority(
&sem->Queue.Queue,
- operations,
- first,
- &queue_context
+ heads,
+ &queue_context,
+ SEMAPHORE_TQ_OPERATIONS
);
}
}
@@ -192,18 +186,12 @@ void _Semaphore_Post_binary( struct _Semaphore_Control *_sem )
sem->count = 1;
_Sem_Queue_release( sem, level, &queue_context );
} else {
- const Thread_queue_Operations *operations;
- Thread_Control *first;
-
_Thread_queue_Context_set_ISR_level( &queue_context, level );
- operations = SEMAPHORE_TQ_OPERATIONS;
- first = ( *operations->first )( heads );
-
- _Thread_queue_Extract_critical(
+ _Thread_queue_Surrender_no_priority(
&sem->Queue.Queue,
- operations,
- first,
- &queue_context
+ heads,
+ &queue_context,
+ SEMAPHORE_TQ_OPERATIONS
);
}
}
diff --git a/cpukit/score/src/smp.c b/cpukit/score/src/smp.c
index e98249be51..26e6b79058 100644
--- a/cpukit/score/src/smp.c
+++ b/cpukit/score/src/smp.c
@@ -287,6 +287,11 @@ long unsigned _SMP_Process_message(
)
{
if ( ( message & SMP_MESSAGE_SHUTDOWN ) != 0 ) {
+ ISR_Level level;
+
+ _CPU_ISR_Disable( level );
+ (void) level;
+
/* Check the state to prevent recursive shutdowns */
if ( _Per_CPU_Get_state( cpu_self ) != PER_CPU_STATE_SHUTDOWN ) {
_Per_CPU_Set_state( cpu_self, PER_CPU_STATE_SHUTDOWN );
diff --git a/cpukit/score/src/stackallocatorforidle.c b/cpukit/score/src/stackallocatorforidle.c
new file mode 100644
index 0000000000..7c4fd10c7d
--- /dev/null
+++ b/cpukit/score/src/stackallocatorforidle.c
@@ -0,0 +1,59 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (C) 2021 OAR Corporation
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/stack.h>
+#include <rtems/score/thread.h>
+
+/**
+ * @brief Default stack allocator allocate for idle handler.
+ *
+ * The allocate for idle handler is optional even when the user thread stack
+ * allocator and deallocator are configured.
+ *
+ * The default allocator for IDLE thread stacks gets the memory from a
+ * statically allocated area provided via confdefs.h.
+ *
+ * @param cpu Index of the CPU for the IDLE thread using this stack
+ * @param stack_size The size of the stack area to allocate in bytes.
+ *
+ * @retval NULL Not enough memory (never returned).
+ * @retval other Pointer to begin of stack area.
+ */
+static void *_Stack_Allocator_allocate_for_idle_default(
+ uint32_t cpu,
+ size_t stack_size
+)
+{
+ return &_Thread_Idle_stacks[ cpu * stack_size ];
+}
+
+const Stack_Allocator_allocate_for_idle _Stack_Allocator_allocate_for_idle =
+ _Stack_Allocator_allocate_for_idle_default;
diff --git a/cpukit/score/src/threadchangepriority.c b/cpukit/score/src/threadchangepriority.c
index 13e9147916..bd4fef279b 100644
--- a/cpukit/score/src/threadchangepriority.c
+++ b/cpukit/score/src/threadchangepriority.c
@@ -31,13 +31,13 @@
static void _Thread_Set_scheduler_node_priority(
Priority_Aggregation *priority_aggregation,
- bool prepend_it
+ Priority_Group_order priority_group_order
)
{
_Scheduler_Node_set_priority(
SCHEDULER_NODE_OF_WAIT_PRIORITY_NODE( priority_aggregation ),
_Priority_Get_priority( priority_aggregation ),
- prepend_it
+ priority_group_order
);
}
@@ -55,7 +55,10 @@ static void _Thread_Priority_action_add(
the_thread = arg;
_Thread_Scheduler_add_wait_node( the_thread, scheduler_node );
- _Thread_Set_scheduler_node_priority( priority_aggregation, false );
+ _Thread_Set_scheduler_node_priority(
+ priority_aggregation,
+ PRIORITY_GROUP_LAST
+ );
_Priority_Set_action_type( priority_aggregation, PRIORITY_ACTION_ADD );
_Priority_Actions_add( priority_actions, priority_aggregation );
}
@@ -73,7 +76,10 @@ static void _Thread_Priority_action_remove(
the_thread = arg;
_Thread_Scheduler_remove_wait_node( the_thread, scheduler_node );
- _Thread_Set_scheduler_node_priority( priority_aggregation, true );
+ _Thread_Set_scheduler_node_priority(
+ priority_aggregation,
+ PRIORITY_GROUP_FIRST
+ );
_Priority_Set_action_type( priority_aggregation, PRIORITY_ACTION_REMOVE );
_Priority_Actions_add( priority_actions, priority_aggregation );
}
@@ -81,12 +87,15 @@ static void _Thread_Priority_action_remove(
static void _Thread_Priority_action_change(
Priority_Aggregation *priority_aggregation,
- bool prepend_it,
+ Priority_Group_order priority_group_order,
Priority_Actions *priority_actions,
void *arg
)
{
- _Thread_Set_scheduler_node_priority( priority_aggregation, prepend_it );
+ _Thread_Set_scheduler_node_priority(
+ priority_aggregation,
+ priority_group_order
+ );
#if defined(RTEMS_SMP) || defined(RTEMS_DEBUG)
_Priority_Set_action_type( priority_aggregation, PRIORITY_ACTION_CHANGE );
#endif
@@ -97,7 +106,7 @@ static void _Thread_Priority_do_perform_actions(
Thread_Control *the_thread,
Thread_queue_Queue *queue,
const Thread_queue_Operations *operations,
- bool prepend_it,
+ Priority_Group_order priority_group_order,
Thread_queue_Context *queue_context
)
{
@@ -162,7 +171,7 @@ static void _Thread_Priority_do_perform_actions(
_Priority_Changed(
priority_aggregation,
priority_action_node,
- prepend_it,
+ priority_group_order,
&queue_context->Priority.Actions,
_Thread_Priority_action_change,
NULL
@@ -203,7 +212,7 @@ void _Thread_Priority_perform_actions(
*/
the_thread = start_of_path;
- update_count = _Thread_queue_Context_save_priority_updates( queue_context );
+ update_count = _Thread_queue_Context_get_priority_updates( queue_context );
while ( true ) {
Thread_queue_Queue *queue;
@@ -214,7 +223,7 @@ void _Thread_Priority_perform_actions(
the_thread,
queue,
the_thread->Wait.operations,
- false,
+ PRIORITY_GROUP_LAST,
queue_context
);
@@ -244,7 +253,7 @@ static void _Thread_Priority_apply(
Thread_Control *the_thread,
Priority_Node *priority_action_node,
Thread_queue_Context *queue_context,
- bool prepend_it,
+ Priority_Group_order priority_group_order,
Priority_Action_type priority_action_type
)
{
@@ -263,17 +272,17 @@ static void _Thread_Priority_apply(
the_thread,
queue,
the_thread->Wait.operations,
- prepend_it,
+ priority_group_order,
queue_context
);
if ( !_Priority_Actions_is_empty( &queue_context->Priority.Actions ) ) {
#if defined(RTEMS_SMP)
- _Thread_queue_Path_acquire_critical( queue, the_thread, queue_context );
+ (void) _Thread_queue_Path_acquire( queue, the_thread, queue_context );
#endif
_Thread_Priority_perform_actions( queue->owner, queue_context );
#if defined(RTEMS_SMP)
- _Thread_queue_Path_release_critical( queue_context );
+ _Thread_queue_Path_release( queue_context );
#endif
}
}
@@ -288,7 +297,7 @@ void _Thread_Priority_add(
the_thread,
priority_node,
queue_context,
- false,
+ PRIORITY_GROUP_LAST,
PRIORITY_ACTION_ADD
);
}
@@ -303,7 +312,7 @@ void _Thread_Priority_remove(
the_thread,
priority_node,
queue_context,
- true,
+ PRIORITY_GROUP_FIRST,
PRIORITY_ACTION_REMOVE
);
}
@@ -311,7 +320,7 @@ void _Thread_Priority_remove(
void _Thread_Priority_changed(
Thread_Control *the_thread,
Priority_Node *priority_node,
- bool prepend_it,
+ Priority_Group_order priority_group_order,
Thread_queue_Context *queue_context
)
{
@@ -319,7 +328,7 @@ void _Thread_Priority_changed(
the_thread,
priority_node,
queue_context,
- prepend_it,
+ priority_group_order,
PRIORITY_ACTION_CHANGE
);
}
diff --git a/cpukit/score/src/threadcreateidle.c b/cpukit/score/src/threadcreateidle.c
index 395dcc9c12..86e117e70f 100644
--- a/cpukit/score/src/threadcreateidle.c
+++ b/cpukit/score/src/threadcreateidle.c
@@ -38,13 +38,7 @@ static void _Thread_Create_idle_for_CPU( Per_CPU_Control *cpu )
memset( &config, 0, sizeof( config ) );
config.scheduler = _Scheduler_Get_by_CPU( cpu );
-
-#if defined(RTEMS_SMP)
- if ( config.scheduler == NULL ) {
- return;
- }
-#endif
-
+ _Assert( config.scheduler != NULL );
config.priority = _Scheduler_Map_priority(
config.scheduler,
config.scheduler->maximum_priority
@@ -55,9 +49,15 @@ static void _Thread_Create_idle_for_CPU( Per_CPU_Control *cpu )
config.is_preemptible = true;
config.stack_size = _Thread_Idle_stack_size
+ CPU_IDLE_TASK_IS_FP * CONTEXT_FP_SIZE;
- config.stack_area = &_Thread_Idle_stacks[
- _Per_CPU_Get_index( cpu ) * config.stack_size
- ];
+
+ /*
+ * The IDLE thread stacks may be statically allocated or there may be a
+ * custom allocator provided just as with user threads.
+ */
+ config.stack_area = (*_Stack_Allocator_allocate_for_idle)(
+ _Per_CPU_Get_index( cpu ),
+ config.stack_size
+ );
/*
* The entire workspace is zeroed during its initialization. Thus, all
diff --git a/cpukit/score/src/threaddispatch.c b/cpukit/score/src/threaddispatch.c
index fd3f4eda4d..1d317ad2b1 100644
--- a/cpukit/score/src/threaddispatch.c
+++ b/cpukit/score/src/threaddispatch.c
@@ -5,7 +5,7 @@
*
* @brief This source file contains the definition of ::_Thread_Allocated_fp
* and ::_User_extensions_Switches_list and the implementation of
- * _Thread_Dispatch(), _Thread_Dispatch_direct(), _Thread_Dispatch_enable(),
+ * _Thread_Dispatch_direct(), _Thread_Dispatch_enable(),
* and _Thread_Do_dispatch().
*/
@@ -327,25 +327,6 @@ post_switch:
_Thread_Run_post_switch_actions( executing );
}
-void _Thread_Dispatch( void )
-{
- ISR_Level level;
- Per_CPU_Control *cpu_self;
-
- _ISR_Local_disable( level );
-
- cpu_self = _Per_CPU_Get();
-
- if ( cpu_self->dispatch_necessary ) {
- _Profiling_Thread_dispatch_disable( cpu_self, 0 );
- _Assert( cpu_self->thread_dispatch_disable_level == 0 );
- cpu_self->thread_dispatch_disable_level = 1;
- _Thread_Do_dispatch( cpu_self, level );
- } else {
- _ISR_Local_enable( level );
- }
-}
-
void _Thread_Dispatch_direct( Per_CPU_Control *cpu_self )
{
ISR_Level level;
diff --git a/cpukit/score/src/threadinitialize.c b/cpukit/score/src/threadinitialize.c
index 9c1b809c3a..81199a7044 100644
--- a/cpukit/score/src/threadinitialize.c
+++ b/cpukit/score/src/threadinitialize.c
@@ -96,6 +96,113 @@ void _Thread_Free(
_Objects_Free( &information->Objects, &the_thread->Object );
}
+static void _Thread_Initialize_scheduler_and_wait_nodes(
+ Thread_Control *the_thread,
+ const Thread_Configuration *config
+)
+{
+ Scheduler_Node *home_scheduler_node;
+#if defined(RTEMS_SMP)
+ Scheduler_Node *scheduler_node;
+ const Scheduler_Control *scheduler;
+ size_t scheduler_index;
+#endif
+
+#if defined(RTEMS_SMP)
+ home_scheduler_node = NULL;
+ scheduler_node = the_thread->Scheduler.nodes;
+ scheduler = &_Scheduler_Table[ 0 ];
+ scheduler_index = 0;
+
+ /*
+ * In SMP configurations, the thread has exactly one scheduler node for each
+ * configured scheduler. Initialize the scheduler nodes of each scheduler.
+ * The application configuration ensures that we have at least one scheduler
+ * configured.
+ */
+ while ( scheduler_index < _Scheduler_Count ) {
+ Priority_Control priority;
+
+ if ( scheduler == config->scheduler ) {
+ priority = config->priority;
+ home_scheduler_node = scheduler_node;
+ } else {
+ /*
+ * Use the idle thread priority for the non-home scheduler instances by
+ * default.
+ */
+ priority = _Scheduler_Map_priority(
+ scheduler,
+ scheduler->maximum_priority
+ );
+ }
+
+ _Scheduler_Node_initialize(
+ scheduler,
+ scheduler_node,
+ the_thread,
+ priority
+ );
+
+ /*
+ * Since the size of a scheduler node depends on the application
+ * configuration, the _Scheduler_Node_size constant is used to get the next
+ * scheduler node. Using sizeof( Scheduler_Node ) would be wrong.
+ */
+ scheduler_node = (Scheduler_Node *)
+ ( (uintptr_t) scheduler_node + _Scheduler_Node_size );
+ ++scheduler;
+ ++scheduler_index;
+ }
+
+ /*
+ * The thread is initialized to use exactly one scheduler node which is
+ * provided by its home scheduler.
+ */
+ _Assert( home_scheduler_node != NULL );
+ _Chain_Initialize_one(
+ &the_thread->Scheduler.Wait_nodes,
+ &home_scheduler_node->Thread.Wait_node
+ );
+ _Chain_Initialize_one(
+ &the_thread->Scheduler.Scheduler_nodes,
+ &home_scheduler_node->Thread.Scheduler_node.Chain
+ );
+#else
+ /*
+ * In uniprocessor configurations, the thread has exactly one scheduler node.
+ */
+ home_scheduler_node = _Thread_Scheduler_get_home_node( the_thread );
+ _Scheduler_Node_initialize(
+ config->scheduler,
+ home_scheduler_node,
+ the_thread,
+ config->priority
+ );
+#endif
+
+ /*
+ * The current priority of the thread is initialized to exactly the real
+ * priority of the thread. During the lifetime of the thread, it may gain
+ * more priority nodes, for example through locking protocols such as
+ * priority inheritance or priority ceiling.
+ */
+ _Priority_Node_initialize( &the_thread->Real_priority, config->priority );
+ _Priority_Initialize_one(
+ &home_scheduler_node->Wait.Priority,
+ &the_thread->Real_priority
+ );
+
+#if defined(RTEMS_SMP)
+ RTEMS_STATIC_ASSERT( THREAD_SCHEDULER_BLOCKED == 0, Scheduler_state );
+ the_thread->Scheduler.home_scheduler = config->scheduler;
+ _ISR_lock_Initialize( &the_thread->Scheduler.Lock, "Thread Scheduler" );
+ _ISR_lock_Initialize( &the_thread->Wait.Lock.Default, "Thread Wait Default" );
+ _Thread_queue_Gate_open( &the_thread->Wait.Lock.Tranquilizer );
+ _RBTree_Initialize_node( &the_thread->Wait.Link.Registry_node );
+#endif
+}
+
static bool _Thread_Try_initialize(
Thread_Information *information,
Thread_Control *the_thread,
@@ -107,12 +214,6 @@ static bool _Thread_Try_initialize(
char *stack_begin;
char *stack_end;
uintptr_t stack_align;
- Scheduler_Node *scheduler_node;
-#if defined(RTEMS_SMP)
- Scheduler_Node *scheduler_node_for_index;
- const Scheduler_Control *scheduler_for_index;
- size_t scheduler_index;
-#endif
Per_CPU_Control *cpu = _Per_CPU_Get_by_index( 0 );
memset(
@@ -182,78 +283,13 @@ static bool _Thread_Try_initialize(
the_thread->Start.stack_free = config->stack_free;
_Thread_Timer_initialize( &the_thread->Timer, cpu );
+ _Thread_Initialize_scheduler_and_wait_nodes( the_thread, config );
#if defined(RTEMS_SMP)
- scheduler_node = NULL;
- scheduler_node_for_index = the_thread->Scheduler.nodes;
- scheduler_for_index = &_Scheduler_Table[ 0 ];
- scheduler_index = 0;
-
- while ( scheduler_index < _Scheduler_Count ) {
- Priority_Control priority_for_index;
-
- if ( scheduler_for_index == config->scheduler ) {
- priority_for_index = config->priority;
- scheduler_node = scheduler_node_for_index;
- } else {
- /*
- * Use the idle thread priority for the non-home scheduler instances by
- * default.
- */
- priority_for_index = _Scheduler_Map_priority(
- scheduler_for_index,
- scheduler_for_index->maximum_priority
- );
- }
-
- _Scheduler_Node_initialize(
- scheduler_for_index,
- scheduler_node_for_index,
- the_thread,
- priority_for_index
- );
- scheduler_node_for_index = (Scheduler_Node *)
- ( (uintptr_t) scheduler_node_for_index + _Scheduler_Node_size );
- ++scheduler_for_index;
- ++scheduler_index;
- }
-
- _Assert( scheduler_node != NULL );
- _Chain_Initialize_one(
- &the_thread->Scheduler.Wait_nodes,
- &scheduler_node->Thread.Wait_node
- );
- _Chain_Initialize_one(
- &the_thread->Scheduler.Scheduler_nodes,
- &scheduler_node->Thread.Scheduler_node.Chain
- );
-#else
- scheduler_node = _Thread_Scheduler_get_home_node( the_thread );
- _Scheduler_Node_initialize(
- config->scheduler,
- scheduler_node,
- the_thread,
- config->priority
- );
-#endif
-
- _Priority_Node_initialize( &the_thread->Real_priority, config->priority );
- _Priority_Initialize_one(
- &scheduler_node->Wait.Priority,
- &the_thread->Real_priority
- );
-
-#if defined(RTEMS_SMP)
- RTEMS_STATIC_ASSERT( THREAD_SCHEDULER_BLOCKED == 0, Scheduler_state );
- the_thread->Scheduler.home_scheduler = config->scheduler;
- _ISR_lock_Initialize( &the_thread->Scheduler.Lock, "Thread Scheduler" );
_Processor_mask_Assign(
&the_thread->Scheduler.Affinity,
_SMP_Get_online_processors()
);
- _ISR_lock_Initialize( &the_thread->Wait.Lock.Default, "Thread Wait Default" );
- _Thread_queue_Gate_open( &the_thread->Wait.Lock.Tranquilizer );
- _RBTree_Initialize_node( &the_thread->Wait.Link.Registry_node );
_SMP_lock_Stats_initialize( &the_thread->Potpourri_stats, "Thread Potpourri" );
_SMP_lock_Stats_initialize( &the_thread->Join_queue.Lock_stats, "Thread State" );
#endif
diff --git a/cpukit/score/src/threadplaindispatch.c b/cpukit/score/src/threadplaindispatch.c
new file mode 100644
index 0000000000..eeb52ec42d
--- /dev/null
+++ b/cpukit/score/src/threadplaindispatch.c
@@ -0,0 +1,60 @@
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreThread
+ *
+ * @brief This source file contains the implementation of _Thread_Dispatch().
+ */
+
+/*
+ * Copyright (C) 2015, 2017 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/threaddispatch.h>
+#include <rtems/score/assert.h>
+#include <rtems/score/isr.h>
+#include <rtems/score/threadimpl.h>
+
+void _Thread_Dispatch( void )
+{
+ ISR_Level level;
+ Per_CPU_Control *cpu_self;
+
+ _ISR_Local_disable( level );
+
+ cpu_self = _Per_CPU_Get();
+
+ if ( cpu_self->dispatch_necessary ) {
+ _Profiling_Thread_dispatch_disable( cpu_self, 0 );
+ _Assert( cpu_self->thread_dispatch_disable_level == 0 );
+ cpu_self->thread_dispatch_disable_level = 1;
+ _Thread_Do_dispatch( cpu_self, level );
+ } else {
+ _ISR_Local_enable( level );
+ }
+}
diff --git a/cpukit/score/src/threadqenqueue.c b/cpukit/score/src/threadqenqueue.c
index d187e32fbc..5fc357ec82 100644
--- a/cpukit/score/src/threadqenqueue.c
+++ b/cpukit/score/src/threadqenqueue.c
@@ -7,10 +7,10 @@
* _Thread_queue_Deadlock_fatal(), _Thread_queue_Deadlock_status(),
* _Thread_queue_Do_dequeue(), _Thread_queue_Enqueue(),
* _Thread_queue_Enqueue_do_nothing_extra(), _Thread_queue_Enqueue_sticky(),
- * _Thread_queue_Extract(), _Thread_queue_Extract_critical(),
- * _Thread_queue_Extract_locked(), _Thread_queue_Path_acquire_critical(),
- * _Thread_queue_Path_release_critical(), _Thread_queue_Surrender(),
- * _Thread_queue_Surrender_sticky(), and _Thread_queue_Unblock_critical().
+ * _Thread_queue_Extract(), _Thread_queue_Extract_locked(),
+ * _Thread_queue_Path_acquire(), _Thread_queue_Path_release(),
+ * _Thread_queue_Resume(),_Thread_queue_Surrender(),
+ * _Thread_queue_Surrender_no_priority(), _Thread_queue_Surrender_sticky().
*/
/*
@@ -112,7 +112,7 @@ static Thread_queue_Link *_Thread_queue_Link_find(
);
}
-static bool _Thread_queue_Link_add(
+static Thread_queue_Deadlock_status _Thread_queue_Link_add(
Thread_queue_Link *link,
Thread_queue_Queue *source,
Thread_queue_Queue *target
@@ -143,7 +143,7 @@ static bool _Thread_queue_Link_add(
if ( recursive_target == source ) {
_ISR_lock_Release( &links->Lock, &lock_context );
- return false;
+ return THREAD_QUEUE_DEADLOCK_DETECTED;
}
}
@@ -155,7 +155,7 @@ static bool _Thread_queue_Link_add(
);
_ISR_lock_Release( &links->Lock, &lock_context );
- return true;
+ return THREAD_QUEUE_NO_DEADLOCK;
}
static void _Thread_queue_Link_remove( Thread_queue_Link *link )
@@ -174,9 +174,7 @@ static void _Thread_queue_Link_remove( Thread_queue_Link *link )
#if !defined(RTEMS_SMP)
static
#endif
-void _Thread_queue_Path_release_critical(
- Thread_queue_Context *queue_context
-)
+void _Thread_queue_Path_release( Thread_queue_Context *queue_context )
{
#if defined(RTEMS_SMP)
Chain_Node *head;
@@ -259,7 +257,7 @@ static void _Thread_queue_Path_append_deadlock_thread(
#if !defined(RTEMS_SMP)
static
#endif
-bool _Thread_queue_Path_acquire_critical(
+Thread_queue_Deadlock_status _Thread_queue_Path_acquire(
Thread_queue_Queue *queue,
Thread_Control *the_thread,
Thread_queue_Context *queue_context
@@ -271,11 +269,12 @@ bool _Thread_queue_Path_acquire_critical(
Thread_queue_Queue *target;
/*
- * For an overview please look at the non-SMP part below. We basically do
- * the same on SMP configurations. The fact that we may have more than one
- * executing thread and each thread queue has its own SMP lock makes the task
- * a bit more difficult. We have to avoid deadlocks at SMP lock level, since
- * this would result in an unrecoverable deadlock of the overall system.
+ * For an overview please look at the non-SMP part below. In SMP
+ * configurations, we basically do the same. The fact that we may have more
+ * than one executing thread and each thread queue has its own SMP lock makes
+ * the procedure a bit more difficult. We have to avoid deadlocks at SMP
+ * lock level, since this would result in an unrecoverable deadlock of the
+ * overall system.
*/
_Chain_Initialize_empty( &queue_context->Path.Links );
@@ -283,11 +282,11 @@ bool _Thread_queue_Path_acquire_critical(
owner = queue->owner;
if ( owner == NULL ) {
- return true;
+ return THREAD_QUEUE_NO_DEADLOCK;
}
if ( owner == the_thread ) {
- return false;
+ return THREAD_QUEUE_DEADLOCK_DETECTED;
}
_Chain_Initialize_node(
@@ -310,7 +309,11 @@ bool _Thread_queue_Path_acquire_critical(
link->Lock_context.Wait.queue = target;
if ( target != NULL ) {
- if ( _Thread_queue_Link_add( link, queue, target ) ) {
+ Thread_queue_Deadlock_status deadlock_status;
+
+ deadlock_status = _Thread_queue_Link_add( link, queue, target );
+
+ if ( deadlock_status == THREAD_QUEUE_NO_DEADLOCK ) {
_Thread_queue_Gate_add(
&owner->Wait.Lock.Pending_requests,
&link->Lock_context.Wait.Gate
@@ -330,15 +333,15 @@ bool _Thread_queue_Path_acquire_critical(
);
_Thread_Wait_remove_request_locked( owner, &link->Lock_context );
_Assert( owner->Wait.queue == NULL );
- return true;
+ return THREAD_QUEUE_NO_DEADLOCK;
}
} else {
link->Lock_context.Wait.queue = NULL;
_Thread_queue_Path_append_deadlock_thread( owner, queue_context );
- return false;
+ return THREAD_QUEUE_DEADLOCK_DETECTED;
}
} else {
- return true;
+ return THREAD_QUEUE_NO_DEADLOCK;
}
link = &owner->Wait.Link;
@@ -350,18 +353,18 @@ bool _Thread_queue_Path_acquire_critical(
owner = queue->owner;
if ( owner == NULL ) {
- return true;
+ return THREAD_QUEUE_NO_DEADLOCK;
}
if ( owner == the_thread ) {
- return false;
+ return THREAD_QUEUE_DEADLOCK_DETECTED;
}
queue = owner->Wait.queue;
} while ( queue != NULL );
#endif
- return true;
+ return THREAD_QUEUE_NO_DEADLOCK;
}
void _Thread_queue_Enqueue_do_nothing_extra(
@@ -391,8 +394,9 @@ void _Thread_queue_Enqueue(
Thread_queue_Context *queue_context
)
{
- Per_CPU_Control *cpu_self;
- bool success;
+ Thread_queue_Deadlock_status deadlock_status;
+ Per_CPU_Control *cpu_self;
+ bool success;
_Assert( queue_context->enqueue_callout != NULL );
@@ -404,8 +408,11 @@ void _Thread_queue_Enqueue(
_Thread_Wait_claim( the_thread, queue );
- if ( !_Thread_queue_Path_acquire_critical( queue, the_thread, queue_context ) ) {
- _Thread_queue_Path_release_critical( queue_context );
+ deadlock_status =
+ _Thread_queue_Path_acquire( queue, the_thread, queue_context );
+
+ if ( deadlock_status == THREAD_QUEUE_DEADLOCK_DETECTED ) {
+ _Thread_queue_Path_release( queue_context );
_Thread_Wait_restore_default( the_thread );
_Thread_queue_Queue_release( queue, &queue_context->Lock_context.Lock_context );
_Thread_Wait_tranquilize( the_thread );
@@ -418,7 +425,7 @@ void _Thread_queue_Enqueue(
_Thread_Wait_claim_finalize( the_thread, operations );
( *operations->enqueue )( queue, the_thread, queue_context );
- _Thread_queue_Path_release_critical( queue_context );
+ _Thread_queue_Path_release( queue_context );
the_thread->Wait.return_code = STATUS_SUCCESSFUL;
_Thread_Wait_flags_set( the_thread, THREAD_QUEUE_INTEND_TO_BLOCK );
@@ -467,14 +474,18 @@ Status_Control _Thread_queue_Enqueue_sticky(
Thread_queue_Context *queue_context
)
{
- Per_CPU_Control *cpu_self;
+ Thread_queue_Deadlock_status deadlock_status;
+ Per_CPU_Control *cpu_self;
_Assert( queue_context->enqueue_callout != NULL );
_Thread_Wait_claim( the_thread, queue );
- if ( !_Thread_queue_Path_acquire_critical( queue, the_thread, queue_context ) ) {
- _Thread_queue_Path_release_critical( queue_context );
+ deadlock_status =
+ _Thread_queue_Path_acquire( queue, the_thread, queue_context );
+
+ if ( deadlock_status == THREAD_QUEUE_DEADLOCK_DETECTED ) {
+ _Thread_queue_Path_release( queue_context );
_Thread_Wait_restore_default( the_thread );
_Thread_queue_Queue_release( queue, &queue_context->Lock_context.Lock_context );
_Thread_Wait_tranquilize( the_thread );
@@ -486,7 +497,7 @@ Status_Control _Thread_queue_Enqueue_sticky(
_Thread_Wait_claim_finalize( the_thread, operations );
( *operations->enqueue )( queue, the_thread, queue_context );
- _Thread_queue_Path_release_critical( queue_context );
+ _Thread_queue_Path_release( queue_context );
the_thread->Wait.return_code = STATUS_SUCCESSFUL;
_Thread_Wait_flags_set( the_thread, THREAD_QUEUE_INTEND_TO_BLOCK );
@@ -543,6 +554,16 @@ static bool _Thread_queue_MP_set_callout(
}
#endif
+static void _Thread_queue_Force_ready_again( Thread_Control *the_thread )
+{
+ /*
+ * We must set the wait flags under protection of the current thread lock,
+ * otherwise a _Thread_Timeout() running on another processor may interfere.
+ */
+ _Thread_Wait_flags_set( the_thread, THREAD_QUEUE_READY_AGAIN );
+ _Thread_Wait_restore_default( the_thread );
+}
+
static bool _Thread_queue_Make_ready_again( Thread_Control *the_thread )
{
bool success;
@@ -569,6 +590,45 @@ static bool _Thread_queue_Make_ready_again( Thread_Control *the_thread )
return unblock;
}
+/*
+ * This function is used instead of _Thread_queue_Make_ready_again() in
+ * _Thread_queue_Surrender() and _Thread_queue_Surrender_priority_ceiling()
+ * since only the previous owner thread is allowed to surrender the thread
+ * queue.
+ *
+ * In uniprocessor configurations, there is only one executing thread (in this
+ * case the previous owner), so the new owner thread must be fully blocked.
+ *
+ * In SMP configurations, the new owner may execute on another processor in
+ * parallel, so we have to use _Thread_queue_Make_ready_again().
+ */
+static bool _Thread_queue_Make_new_owner_ready_again( Thread_Control *new_owner )
+{
+#if defined(RTEMS_SMP)
+ return _Thread_queue_Make_ready_again( new_owner );
+#else
+ _Assert( _Thread_Wait_flags_get( new_owner ) == THREAD_QUEUE_BLOCKED );
+ _Thread_queue_Force_ready_again( new_owner );
+ return false;
+#endif
+}
+
+static void _Thread_queue_Unblock_new_owner_and_remove_timer(
+ Thread_queue_Queue *queue,
+ Thread_Control *new_owner,
+ bool unblock
+)
+{
+#if defined(RTEMS_SMP)
+ if ( unblock ) {
+ _Thread_Remove_timer_and_unblock( new_owner, queue );
+ }
+#else
+ (void) unblock;
+ _Thread_Remove_timer_and_unblock( new_owner, queue );
+#endif
+}
+
bool _Thread_queue_Extract_locked(
Thread_queue_Queue *queue,
const Thread_queue_Operations *operations,
@@ -583,51 +643,34 @@ bool _Thread_queue_Extract_locked(
return _Thread_queue_Make_ready_again( the_thread );
}
-void _Thread_queue_Unblock_critical(
- bool unblock,
- Thread_queue_Queue *queue,
- Thread_Control *the_thread,
- ISR_lock_Context *lock_context
+void _Thread_queue_Resume(
+ Thread_queue_Queue *queue,
+ Thread_Control *the_thread,
+ Thread_queue_Context *queue_context
)
{
+ bool unblock;
+
+ unblock = _Thread_queue_Make_ready_again( the_thread );
+
if ( unblock ) {
Per_CPU_Control *cpu_self;
- cpu_self = _Thread_Dispatch_disable_critical( lock_context );
- _Thread_queue_Queue_release( queue, lock_context );
+ cpu_self = _Thread_queue_Dispatch_disable( queue_context );
+ _Thread_queue_Queue_release(
+ queue, &queue_context->Lock_context.Lock_context
+ );
_Thread_Remove_timer_and_unblock( the_thread, queue );
_Thread_Dispatch_enable( cpu_self );
} else {
- _Thread_queue_Queue_release( queue, lock_context );
+ _Thread_queue_Queue_release(
+ queue, &queue_context->Lock_context.Lock_context
+ );
}
}
-void _Thread_queue_Extract_critical(
- Thread_queue_Queue *queue,
- const Thread_queue_Operations *operations,
- Thread_Control *the_thread,
- Thread_queue_Context *queue_context
-)
-{
- bool unblock;
-
- unblock = _Thread_queue_Extract_locked(
- queue,
- operations,
- the_thread,
- queue_context
- );
-
- _Thread_queue_Unblock_critical(
- unblock,
- queue,
- the_thread,
- &queue_context->Lock_context.Lock_context
- );
-}
-
void _Thread_queue_Extract( Thread_Control *the_thread )
{
Thread_queue_Context queue_context;
@@ -640,25 +683,20 @@ void _Thread_queue_Extract( Thread_Control *the_thread )
queue = the_thread->Wait.queue;
if ( queue != NULL ) {
- bool unblock;
-
_Thread_Wait_remove_request( the_thread, &queue_context.Lock_context );
_Thread_queue_Context_set_MP_callout(
&queue_context,
_Thread_queue_MP_callout_do_nothing
);
- unblock = _Thread_queue_Extract_locked(
+#if defined(RTEMS_MULTIPROCESSING)
+ _Thread_queue_MP_set_callout( the_thread, &queue_context );
+#endif
+ ( *the_thread->Wait.operations->extract )(
queue,
- the_thread->Wait.operations,
the_thread,
&queue_context
);
- _Thread_queue_Unblock_critical(
- unblock,
- queue,
- the_thread,
- &queue_context.Lock_context.Lock_context
- );
+ _Thread_queue_Resume( queue, the_thread, &queue_context );
} else {
_Thread_Wait_release( the_thread, &queue_context );
}
@@ -694,7 +732,7 @@ void _Thread_queue_Surrender(
_Thread_Resource_count_increment( new_owner );
}
- unblock = _Thread_queue_Make_ready_again( new_owner );
+ unblock = _Thread_queue_Make_new_owner_ready_again( new_owner );
cpu_self = _Thread_queue_Dispatch_disable( queue_context );
_Thread_queue_Queue_release(
@@ -703,12 +741,123 @@ void _Thread_queue_Surrender(
);
_Thread_Priority_update( queue_context );
+ _Thread_queue_Unblock_new_owner_and_remove_timer(
+ queue,
+ new_owner,
+ unblock
+ );
+
+ _Thread_Dispatch_enable( cpu_self );
+}
+
+void _Thread_queue_Surrender_no_priority(
+ Thread_queue_Queue *queue,
+ Thread_queue_Heads *heads,
+ Thread_queue_Context *queue_context,
+ const Thread_queue_Operations *operations
+)
+{
+ Thread_Control *the_thread;
+ bool unblock;
+ Per_CPU_Control *cpu_self;
+
+ _Assert( heads != NULL );
+ _Assert( queue->owner == NULL );
+
+ the_thread = ( *operations->surrender )( queue, heads, NULL, queue_context );
+
+#if defined(RTEMS_MULTIPROCESSING)
+ _Thread_queue_MP_set_callout( the_thread, queue_context );
+#endif
+
+ unblock = _Thread_queue_Make_ready_again( the_thread );
+
+ cpu_self = _Thread_queue_Dispatch_disable( queue_context );
+ _Thread_queue_Queue_release(
+ queue,
+ &queue_context->Lock_context.Lock_context
+ );
if ( unblock ) {
- _Thread_Remove_timer_and_unblock( new_owner, queue );
+ _Thread_Remove_timer_and_unblock( the_thread, queue );
+ }
+
+ _Thread_Dispatch_enable( cpu_self );
+}
+
+Status_Control _Thread_queue_Surrender_priority_ceiling(
+ Thread_queue_Queue *queue,
+ Thread_Control *executing,
+ Priority_Node *priority_ceiling,
+ Thread_queue_Context *queue_context,
+ const Thread_queue_Operations *operations
+)
+{
+ ISR_lock_Context lock_context;
+ Thread_queue_Heads *heads;
+ Thread_Control *new_owner;
+ bool unblock;
+ Per_CPU_Control *cpu_self;
+
+ _Thread_Resource_count_decrement( executing );
+
+ _Thread_queue_Context_clear_priority_updates( queue_context );
+ _Thread_Wait_acquire_default_critical( executing, &lock_context );
+ _Thread_Priority_remove( executing, priority_ceiling, queue_context );
+ _Thread_Wait_release_default_critical( executing, &lock_context );
+
+ heads = queue->heads;
+ queue->owner = NULL;
+
+ if ( heads == NULL ) {
+ cpu_self = _Thread_Dispatch_disable_critical(
+ &queue_context->Lock_context.Lock_context
+ );
+ _Thread_queue_Queue_release(
+ queue,
+ &queue_context->Lock_context.Lock_context
+ );
+ _Thread_Priority_update( queue_context );
+ _Thread_Dispatch_enable( cpu_self );
+ return STATUS_SUCCESSFUL;
}
+ new_owner = ( *operations->surrender )(
+ queue,
+ heads,
+ NULL,
+ queue_context
+ );
+
+ queue->owner = new_owner;
+
+ unblock = _Thread_queue_Make_new_owner_ready_again( new_owner );
+
+#if defined(RTEMS_MULTIPROCESSING)
+ if ( _Objects_Is_local_id( new_owner->Object.id ) )
+#endif
+ {
+ _Thread_Resource_count_increment( new_owner );
+ _Thread_Wait_acquire_default_critical( new_owner, &lock_context );
+ _Thread_Priority_add( new_owner, priority_ceiling, queue_context );
+ _Thread_Wait_release_default_critical( new_owner, &lock_context );
+ }
+
+ cpu_self = _Thread_queue_Dispatch_disable( queue_context );
+ _Thread_queue_Queue_release(
+ queue,
+ &queue_context->Lock_context.Lock_context
+ );
+
+ _Thread_Priority_update( queue_context );
+ _Thread_queue_Unblock_new_owner_and_remove_timer(
+ queue,
+ new_owner,
+ unblock
+ );
+
_Thread_Dispatch_enable( cpu_self );
+ return STATUS_SUCCESSFUL;
}
#if defined(RTEMS_SMP)
@@ -735,11 +884,15 @@ void _Thread_queue_Surrender_sticky(
queue->owner = new_owner;
/*
- * There is no need to check the unblock status, since in the corresponding
+ * There is no need to unblock the thread, since in the corresponding
* _Thread_queue_Enqueue_sticky() the thread is not blocked by the scheduler.
* Instead, the thread busy waits for a change of its thread wait flags.
+ * Timeouts cannot interfere since we hold the thread queue lock.
*/
- (void) _Thread_queue_Make_ready_again( new_owner );
+ _Assert(
+ _Thread_Wait_flags_get( new_owner ) == THREAD_QUEUE_INTEND_TO_BLOCK
+ );
+ _Thread_queue_Force_ready_again( new_owner );
cpu_self = _Thread_queue_Dispatch_disable( queue_context );
_Thread_queue_Queue_release(
diff --git a/cpukit/score/src/threadqfirst.c b/cpukit/score/src/threadqfirst.c
index 9908523298..8edbc1645f 100644
--- a/cpukit/score/src/threadqfirst.c
+++ b/cpukit/score/src/threadqfirst.c
@@ -27,11 +27,19 @@ Thread_Control *_Thread_queue_First(
const Thread_queue_Operations *operations
)
{
+ Thread_queue_Heads *heads;
Thread_Control *the_thread;
Thread_queue_Context queue_context;
_Thread_queue_Acquire( the_thread_queue, &queue_context );
- the_thread = _Thread_queue_First_locked( the_thread_queue, operations );
+ heads = the_thread_queue->Queue.heads;
+
+ if ( heads != NULL ) {
+ the_thread = ( *operations->first )( heads );
+ } else {
+ the_thread = NULL;
+ }
+
_Thread_queue_Release( the_thread_queue, &queue_context );
return the_thread;
diff --git a/cpukit/score/src/threadqflush.c b/cpukit/score/src/threadqflush.c
index 357e3d696e..42b35a499b 100644
--- a/cpukit/score/src/threadqflush.c
+++ b/cpukit/score/src/threadqflush.c
@@ -71,15 +71,15 @@ size_t _Thread_queue_Flush_critical(
Thread_queue_Context *queue_context
)
{
- size_t flushed;
- Chain_Control unblock;
- Thread_Control *owner;
- Chain_Node *node;
- Chain_Node *tail;
+ size_t flushed;
+ size_t priority_updates;
+ Chain_Control unblock;
+ Chain_Node *node;
+ Chain_Node *tail;
flushed = 0;
+ priority_updates = 0;
_Chain_Initialize_empty( &unblock );
- owner = queue->owner;
while ( true ) {
Thread_queue_Heads *heads;
@@ -99,8 +99,7 @@ size_t _Thread_queue_Flush_critical(
/*
* We do not have enough space in the queue context to collect all priority
- * updates, so clear it each time. We unconditionally do the priority
- * update for the owner later if it exists.
+ * updates, so clear it each time and accumulate the priority updates.
*/
_Thread_queue_Context_clear_priority_updates( queue_context );
@@ -120,6 +119,8 @@ size_t _Thread_queue_Flush_critical(
);
}
+ priority_updates +=
+ _Thread_queue_Context_get_priority_updates( queue_context );
++flushed;
}
@@ -145,9 +146,12 @@ size_t _Thread_queue_Flush_critical(
node = next;
} while ( node != tail );
- if ( owner != NULL ) {
+ if ( priority_updates != 0 ) {
+ Thread_Control *owner;
ISR_lock_Context lock_context;
+ owner = queue->owner;
+ _Assert( owner != NULL );
_Thread_State_acquire( owner, &lock_context );
_Scheduler_Update_priority( owner );
_Thread_State_release( owner, &lock_context );
diff --git a/cpukit/score/src/threadqops.c b/cpukit/score/src/threadqops.c
index d6ba9dad57..ce3a8f6a73 100644
--- a/cpukit/score/src/threadqops.c
+++ b/cpukit/score/src/threadqops.c
@@ -59,17 +59,6 @@ void _Thread_queue_Do_nothing_priority_actions(
_Priority_Actions_initialize_empty( priority_actions );
}
-static void _Thread_queue_Do_nothing_extract(
- Thread_queue_Queue *queue,
- Thread_Control *the_thread,
- Thread_queue_Context *queue_context
-)
-{
- (void) queue;
- (void) the_thread;
- (void) queue_context;
-}
-
static void _Thread_queue_Queue_enqueue(
Thread_queue_Queue *queue,
Thread_Control *the_thread,
@@ -700,7 +689,7 @@ static void _Thread_queue_Priority_inherit_do_priority_actions_remove(
static void _Thread_queue_Priority_inherit_do_priority_actions_change(
Priority_Aggregation *priority_aggregation,
- bool prepend_it,
+ Priority_Group_order priority_group_order,
Priority_Actions *priority_actions,
void *arg
)
@@ -787,7 +776,7 @@ static void _Thread_queue_Priority_inherit_priority_actions(
_Priority_Changed(
&priority_queue->Queue,
&scheduler_node->Wait.Priority.Node,
- false,
+ PRIORITY_GROUP_LAST,
priority_actions,
_Thread_queue_Priority_inherit_do_priority_actions_change,
scheduler_node_of_owner
@@ -884,7 +873,7 @@ static void _Thread_queue_Priority_inherit_do_initialize(
static void _Thread_queue_Priority_inherit_do_enqueue_change(
Priority_Aggregation *priority_aggregation,
- bool prepend_it,
+ Priority_Group_order priority_group_order,
Priority_Actions *priority_actions,
void *arg
)
@@ -1079,7 +1068,7 @@ static void _Thread_queue_Priority_inherit_do_extract_remove(
static void _Thread_queue_Priority_inherit_do_extract_change(
Priority_Aggregation *priority_aggregation,
- bool prepend_it,
+ Priority_Group_order priority_group_order,
Priority_Actions *priority_actions,
void *arg
)
@@ -1197,7 +1186,7 @@ static void _Thread_queue_Priority_inherit_extract(
* resolves the deadlock. Thread T1 and T2 can the complete their
* operations.
*/
- _Thread_queue_Path_acquire_critical( queue, the_thread, queue_context );
+ (void) _Thread_queue_Path_acquire( queue, the_thread, queue_context );
#endif
_Thread_queue_Queue_extract(
@@ -1210,7 +1199,7 @@ static void _Thread_queue_Priority_inherit_extract(
);
#if defined(RTEMS_SMP)
- _Thread_queue_Path_release_critical( queue_context );
+ _Thread_queue_Path_release( queue_context );
#endif
}
@@ -1231,7 +1220,7 @@ static void _Thread_queue_Priority_inherit_do_surrender_add(
_Scheduler_Node_set_priority(
scheduler_node,
_Priority_Get_priority( priority_aggregation ),
- false
+ PRIORITY_GROUP_LAST
);
}
@@ -1254,7 +1243,7 @@ static void _Thread_queue_Priority_inherit_do_surrender_remove(
static void _Thread_queue_Priority_inherit_do_surrender_change(
Priority_Aggregation *priority_aggregation,
- bool prepend_it,
+ Priority_Group_order priority_group_order,
Priority_Actions *priority_actions,
void *arg
)
@@ -1270,14 +1259,14 @@ static void _Thread_queue_Priority_inherit_do_surrender_change(
_Scheduler_Node_set_priority(
SCHEDULER_NODE_OF_WAIT_PRIORITY( priority_aggregation ),
_Priority_Get_priority( priority_aggregation ),
- prepend_it
+ priority_group_order
);
}
#if defined(RTEMS_SMP)
static void _Thread_queue_Priority_inherit_do_surrender_change_2(
Priority_Aggregation *priority_aggregation,
- bool prepend_it,
+ Priority_Group_order priority_group_order,
Priority_Actions *priority_actions,
void *arg
)
@@ -1285,7 +1274,7 @@ static void _Thread_queue_Priority_inherit_do_surrender_change_2(
_Scheduler_Node_set_priority(
SCHEDULER_NODE_OF_WAIT_PRIORITY( priority_aggregation ),
_Priority_Get_priority( priority_aggregation ),
- prepend_it
+ priority_group_order
);
}
#endif
@@ -1461,12 +1450,11 @@ static Thread_Control *_Thread_queue_Priority_inherit_surrender(
}
const Thread_queue_Operations _Thread_queue_Operations_default = {
- .priority_actions = _Thread_queue_Do_nothing_priority_actions,
- .extract = _Thread_queue_Do_nothing_extract
+ .priority_actions = _Thread_queue_Do_nothing_priority_actions
/*
- * The default operations are only used in _Thread_Change_priority() and
- * _Thread_Timeout() and don't have a thread queue associated with them, so
- * the enqueue and first operations are superfluous.
+ * The default operations are only used in _Thread_Priority_apply() and
+ * _Thread_Continue() and do not have a thread queue associated with them, so
+ * the enqueue, extract, surrender, and first operations are superfluous.
*/
};
diff --git a/cpukit/score/src/threadrestart.c b/cpukit/score/src/threadrestart.c
index 79a154e3d3..2240d8f713 100644
--- a/cpukit/score/src/threadrestart.c
+++ b/cpukit/score/src/threadrestart.c
@@ -44,14 +44,11 @@ static void _Thread_Life_action_handler(
ISR_lock_Context *lock_context
);
-typedef struct {
- Chain_Control Chain;
- ISR_lock_Control Lock;
-} Thread_Zombie_control;
-
-static Thread_Zombie_control _Thread_Zombies = {
- .Chain = CHAIN_INITIALIZER_EMPTY( _Thread_Zombies.Chain ),
- .Lock = ISR_LOCK_INITIALIZER( "thread zombies" )
+Thread_Zombie_registry _Thread_Zombies = {
+#if defined(RTEMS_SMP)
+ .Lock = ISR_LOCK_INITIALIZER( "Thread Zombies" ),
+#endif
+ .Chain = CHAIN_INITIALIZER_EMPTY( _Thread_Zombies.Chain )
};
static void _Thread_Raise_real_priority(
@@ -70,7 +67,7 @@ static void _Thread_Raise_real_priority(
the_thread,
&the_thread->Real_priority,
priority,
- false,
+ PRIORITY_GROUP_LAST,
&queue_context
);
}
@@ -115,10 +112,10 @@ static void _Thread_Wake_up_joining_threads( Thread_Control *the_thread )
);
}
-static void _Thread_Add_to_zombie_chain( Thread_Control *the_thread )
+static void _Thread_Add_to_zombie_registry( Thread_Control *the_thread )
{
- ISR_lock_Context lock_context;
- Thread_Zombie_control *zombies;
+ ISR_lock_Context lock_context;
+ Thread_Zombie_registry *zombies;
zombies = &_Thread_Zombies;
_ISR_lock_ISR_disable_and_acquire( &zombies->Lock, &lock_context );
@@ -148,12 +145,12 @@ static void _Thread_Make_zombie( Thread_Control *the_thread )
* threads, so that they are able to clean up the thread immediately. This
* matters for SMP configurations.
*/
- _Thread_Add_to_zombie_chain( the_thread );
+ _Thread_Add_to_zombie_registry( the_thread );
_Thread_Wake_up_joining_threads( the_thread );
}
-static void _Thread_Wait_for_execution_stop( Thread_Control *the_thread )
+static void _Thread_Wait_for_execution_stop( const Thread_Control *the_thread )
{
#if defined(RTEMS_SMP)
/*
@@ -169,16 +166,21 @@ static void _Thread_Wait_for_execution_stop( Thread_Control *the_thread )
#endif
}
+static Thread_Control *_Thread_Get_zombie( Thread_Zombie_registry *zombies )
+{
+ return (Thread_Control *) _Chain_Get_unprotected( &zombies->Chain );
+}
+
void _Thread_Kill_zombies( void )
{
- ISR_lock_Context lock_context;
- Thread_Zombie_control *zombies = &_Thread_Zombies;
- Thread_Control *the_thread;
+ ISR_lock_Context lock_context;
+ Thread_Zombie_registry *zombies;
+ Thread_Control *the_thread;
+ zombies = &_Thread_Zombies;
_ISR_lock_ISR_disable_and_acquire( &zombies->Lock, &lock_context );
- the_thread = (Thread_Control *) _Chain_Get_unprotected( &zombies->Chain );
- while ( the_thread != NULL ) {
+ while ( ( the_thread = _Thread_Get_zombie( zombies ) ) != NULL ) {
Thread_Information *information;
_ISR_lock_Release_and_ISR_enable( &zombies->Lock, &lock_context );
@@ -188,8 +190,6 @@ void _Thread_Kill_zombies( void )
_Thread_Free( information, the_thread );
_ISR_lock_ISR_disable_and_acquire( &zombies->Lock, &lock_context );
-
- the_thread = (Thread_Control *) _Chain_Get_unprotected( &zombies->Chain );
}
_ISR_lock_Release_and_ISR_enable( &zombies->Lock, &lock_context );
@@ -576,7 +576,7 @@ Status_Control _Thread_Restart(
the_thread,
&the_thread->Real_priority,
the_thread->Start.initial_priority,
- false,
+ PRIORITY_GROUP_LAST,
&queue_context
);
_Thread_Wait_release( the_thread, &queue_context );