diff options
Diffstat (limited to 'c/src/lib/libbsp/powerpc')
220 files changed, 147 insertions, 30422 deletions
diff --git a/c/src/lib/libbsp/powerpc/Makefile.am b/c/src/lib/libbsp/powerpc/Makefile.am index b28f6d5851..eb482794a4 100644 --- a/c/src/lib/libbsp/powerpc/Makefile.am +++ b/c/src/lib/libbsp/powerpc/Makefile.am @@ -69,3 +69,4 @@ EXTRA_DIST += shared/vme/vmeconfig.c \ include $(top_srcdir)/../../../automake/subdirs.am include $(top_srcdir)/../../../automake/local.am +include $(srcdir)/../../../../../bsps/powerpc/headers.am diff --git a/c/src/lib/libbsp/powerpc/beatnik/Makefile.am b/c/src/lib/libbsp/powerpc/beatnik/Makefile.am index d0eafbf86c..c51965b9a8 100644 --- a/c/src/lib/libbsp/powerpc/beatnik/Makefile.am +++ b/c/src/lib/libbsp/powerpc/beatnik/Makefile.am @@ -8,21 +8,13 @@ noinst_PROGRAMS = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs project_lib_DATA = #include -include_HEADERS = include/bsp.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h -nodist_include_HEADERS += include/tm27.h DISTCLEANFILES += include/bspopts.h -include_bsp_HEADERS = - #start EXTRA_DIST += ../../powerpc/shared/start/rtems_crti.S rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S @@ -50,8 +42,8 @@ project_lib_DATA += motld_start.$(OBJEXT) #startup +project_lib_DATA += linkcmds dist_project_lib_DATA += ../shared/startup/linkcmds.share -dist_project_lib_DATA += startup/linkcmds noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -69,15 +61,10 @@ libbsp_a_SOURCES += startup/bspstart.c \ startup/bspclean.c \ ../../shared/gnatinstallhandler.c -include_bsp_HEADERS += ../shared/motorola/vpd.h - #pclock libbsp_a_SOURCES += ../../powerpc/shared/clock/p_clock.c #console -include_bsp_HEADERS += ../../powerpc/shared/console/consoleIo.h -include_bsp_HEADERS += ../../powerpc/shared/console/uart.h - libbsp_a_SOURCES += \ ../../powerpc/shared/console/uart.c \ ../../powerpc/shared/console/console.c \ @@ -85,43 +72,22 @@ libbsp_a_SOURCES += \ ../../powerpc/shared/console/uart.h #irq -include_bsp_HEADERS += irq/irq.h - libbsp_a_SOURCES += irq/irq_init.c irq/discovery_pic.c #marvell -include_bsp_HEADERS += marvell/gtreg.h marvell/gtintrreg.h \ - marvell/gti2creg.h marvell/gti2c_busdrv.h marvell/gt_timer.h \ - marvell/gtpcireg.h - libbsp_a_SOURCES += marvell/discovery.c marvell/gti2c.c marvell/gt_timer.c #flash -include_bsp_HEADERS += ../shared/flash/flashPgm.h -include_bsp_HEADERS += ../shared/flash/flashPgmPvt.h - libbsp_a_SOURCES += ../shared/flash/flash.c \ ../shared/flash/intelFlash.c \ flash/flashcfg.c #pci -include_bsp_HEADERS += ../../powerpc/shared/pci/pci.h - libbsp_a_SOURCES += ../../powerpc/shared/pci/pci.c \ pci/gt_pci_init.c pci/pci_io_remap.c pci/motload_fixup.c \ ../../powerpc/shared/pci/pcifinddevice.c #vme -include_bsp_HEADERS += vme/VMEConfig.h \ - ../../shared/vmeUniverse/vmeUniverse.h \ - ../../shared/vmeUniverse/vmeUniverseDMA.h \ - ../../shared/vmeUniverse/vme_am_defs.h \ - ../../shared/vmeUniverse/vmeTsi148.h \ - ../../shared/vmeUniverse/vmeTsi148DMA.h \ - ../../shared/vmeUniverse/bspVmeDmaList.h \ - ../../shared/vmeUniverse/VME.h \ - ../../shared/vmeUniverse/VMEDMA.h - libbsp_a_SOURCES += ../shared/vme/vmeconfig.c \ ../shared/vme/vme_universe.c \ ../../shared/vmeUniverse/vmeUniverse.c \ @@ -130,17 +96,12 @@ libbsp_a_SOURCES += ../shared/vme/vmeconfig.c \ #network if HAS_NETWORKING -include_bsp_HEADERS += network/support/early_enet_link_status.h \ - network/support/bsp_bsdnet_attach.h - noinst_PROGRAMS += network_support.rel network_support_rel_SOURCES = network/support/early_link_status.c \ network/support/bsp_attach.c network_support_rel_CPPFLAGS = $(AM_CPPFLAGS) network_support_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) -include_bsp_HEADERS += network/if_mve/if_mve_pub.h - noinst_PROGRAMS += network_if_mve_tmp.rel network_if_mve_tmp_rel_SOURCES = network/if_mve/mv643xx_eth.c network_if_mve_tmp_rel_CPPFLAGS = $(AM_CPPFLAGS) -DDISABLE_DETACHING @@ -169,8 +130,6 @@ network_if_mve.rel: network_if_mve_tmp.rel -G mveth_serial_ctrl_config_val \ $^ $@ -include_bsp_HEADERS += network/if_gfe/if_gfe_pub.h - noinst_PROGRAMS += network_if_gfe_tmp.rel network_if_gfe_tmp_rel_SOURCES = network/if_gfe/if_gfe.c network/if_gfe/if_gfe_rtems.c network_if_gfe_tmp_rel_CPPFLAGS = $(AM_CPPFLAGS) \ @@ -186,8 +145,6 @@ network_if_gfe.rel: network_if_gfe_tmp.rel $^ $@ -include_bsp_HEADERS += network/if_em/if_em_pub.h - noinst_PROGRAMS += network_if_em_tmp.rel network_if_em_tmp_rel_SOURCES = network/if_em/if_em.c \ network/if_em/if_em_hw.c \ @@ -224,5 +181,5 @@ endif EXTRA_DIST += README LICENSE -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/beatnik/headers.am diff --git a/c/src/lib/libbsp/powerpc/beatnik/configure.ac b/c/src/lib/libbsp/powerpc/beatnik/configure.ac index 82c73b03ec..2c6a813fa5 100644 --- a/c/src/lib/libbsp/powerpc/beatnik/configure.ac +++ b/c/src/lib/libbsp/powerpc/beatnik/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-beatnik],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/beatnik.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/beatnik/include/bsp.h b/c/src/lib/libbsp/powerpc/beatnik/include/bsp.h deleted file mode 100644 index e980f1a056..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/include/bsp.h +++ /dev/null @@ -1,297 +0,0 @@ -/* - * bsp.h -- contain BSP API definition. - */ - -/* - * Copyright (C) 1999 Eric Valette. valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - * S. Kate Feng 2003-2007 : Modified it to support the mvme5500 BSP. - * - * Modified for the 'beatnik' BSP by T. Straumann, 2005-2007. - */ - -#ifndef LIBBSP_BEATNIK_BSP_H -#define LIBBSP_BEATNIK_BSP_H - -#ifndef ASM - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <libcpu/io.h> -#include <bsp/vectors.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* Board type */ -typedef enum { - Unknown = 0, - MVME5500, - MVME6100 -} BSP_BoardType; - -BSP_BoardType BSP_getBoardType(void); - -/* Discovery Version */ - -typedef enum { - unknown = 0, - GT_64260_A, /* Revision 0x10 */ - GT_64260_B, /* Revision 0x20 */ - MV_64360, -} DiscoveryVersion; - -/* Determine the type of discovery chip on this board; info - * is cached and repeated calls just return the cached value. - * - * If a non-zero argument is passed, the routine panics - * (rtems_panic) if no recognized bridge is found; - */ -DiscoveryVersion BSP_getDiscoveryVersion(int assertion); - -/* - * confdefs.h overrides for this BSP: - * - Interrupt stack space is not minimum if defined. - */ -#define BSP_INTERRUPT_STACK_SIZE (16 * 1024) - -/* - * base address definitions for several devices - */ -#define BSP_MV64x60_BASE (0xf1000000) -#define BSP_MV64x60_DEV1_BASE (0xf1100000) -#define BSP_UART_IOBASE_COM1 ((BSP_MV64x60_DEV1_BASE)+0x20000) -#define BSP_UART_IOBASE_COM2 ((BSP_MV64x60_DEV1_BASE)+0x21000) -#define BSP_UART_USE_SHARED_IRQS - -#define BSP_NVRAM_BASE_ADDR (0xf1110000) -#define BSP_NVRAM_END_ADDR (0xf1117fff) -#define BSP_NVRAM_RTC_START (0xf1117ff8) - -#define BSP_NVRAM_BOOTPARMS_START (0xf1111000) -#define BSP_NVRAM_BOOTPARMS_END (0xf1111fff) - - -/* This is only active/used during early init. It defines - * the hose0 base for the shared/generic pci code. - * Our own BSP specific pci initialization will then - * override the PCI configuration (see gt_pci_init.c:BSP_pci_initialize) - */ - -#define PCI_CONFIG_ADDR (BSP_MV64x60_BASE + 0xcf8) -#define PCI_CONFIG_DATA (BSP_MV64x60_BASE + 0xcfc) - -/* our wonderful PCI initialization remaps everything to CPU addresses - * - before calling BSP_pci_initialize() this is NOT VALID, however - * and the deprecated inl()/outl() etc won't work! - */ -#define _IO_BASE 0x00000000 -/* wonderful MotLoad has the base address as seen from the - * CPU programmed into config space :-) - */ -#define PCI_MEM_BASE 0 -#define PCI_MEM_BASE_ADJUSTMENT 0 -#define PCI_DRAM_OFFSET 0 - -extern void BSP_motload_pci_fixup(void); - -/* PCI <-> local address mapping - no sophisticated windows - * (i.e., no support for cached regions etc. you read a BAR - * from config space and that's 1:1 where the CPU sees it). - * Our memory is mapped 1:1 to PCI also. - */ -#define BSP_PCI2LOCAL_ADDR(a) ((uint32_t)(a)) -#define BSP_LOCAL2PCI_ADDR(a) ((uint32_t)(a)) - -#define BSP_CONFIG_NUM_PCI_CACHE_SLOTS 32 - -#define BSP_CONSOLE_PORT BSP_UART_COM1 -#define BSP_UART_BAUD_BASE 115200 - -/* I2C Devices */ -/* Note that the i2c addresses stated in the manual are - * left-shifted by one bit. - */ -#define BSP_VPD_I2C_ADDR (0xA8>>1) /* the VPD EEPROM */ -#define BSP_USR_I2C_ADDR (0xAA>>1) /* the user EEPROM */ -#define BSP_THM_I2C_ADDR (0x90>>1) /* the DS1621 temperature sensor & thermostat */ - -#define BSP_I2C_BUS_DESCRIPTOR gt64260_i2c_bus_descriptor - -#define BSP_I2C_BUS0_NAME "/dev/i2c0" - -#define BSP_I2C_VPD_EEPROM_NAME "vpd-eeprom" -#define BSP_I2C_USR_EEPROM_NAME "usr-eeprom" -#define BSP_I2C_DS1621_NAME "ds1621" -#define BSP_I2C_THM_NAME BSP_I2C_DS1621_NAME -#define BSP_I2C_DS1621_RAW_NAME "ds1621-raw" - -#define BSP_I2C_VPD_EEPROM_DEV_NAME (BSP_I2C_BUS0_NAME"."BSP_I2C_VPD_EEPROM_NAME) -#define BSP_I2C_USR_EEPROM_DEV_NAME (BSP_I2C_BUS0_NAME"."BSP_I2C_USR_EEPROM_NAME) -#define BSP_I2C_DS1621_DEV_NAME (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_NAME) -#define BSP_I2C_THM_DEV_NAME BSP_I2C_DS1621_DEV_NAME -#define BSP_I2C_DS1621_RAW_DEV_NAME (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_RAW_NAME) - - -/* Initialize the I2C driver and register all devices - * RETURNS 0 on success, -1 on error. - * - * Access to the VPD and user EEPROMS as well - * as the ds1621 temperature sensor is possible - * by means of file nodes - * - * /dev/i2c0.vpd-eeprom (read-only) - * /dev/i2c0.usr-eeprom (read-write) - * /dev/i2c0.ds1621 (read-only; one byte: board-temp in degC) - * /dev/i2c0.ds1621-raw (read-write; transfer bytes to/from the ds1621) - */ -int BSP_i2c_initialize(void); - -/* Networking; */ -#if defined(RTEMS_NETWORKING) -#include <bsp/bsp_bsdnet_attach.h> -#endif - -/* NOT FOR PUBLIC USE BELOW HERE */ -#define BSP_PCI_HOSE0_MEM_BASE 0x80000000 /* must be aligned to size */ -#define BSP_PCI_HOSE0_MEM_SIZE 0x20000000 - -#define BSP_PCI_HOSE1_MEM_BASE 0xe0000000 - -#define BSP_DEV_AND_PCI_IO_BASE 0xf0000000 -#define BSP_DEV_AND_PCI_IO_SIZE 0x10000000 - -/* maintain coherency between CPU and GT64340 Ethernet - * (andpossibly other Discovery components). - */ -#define BSP_RW_PAGE_ATTRIBUTES TRIV121_ATTR_M - -extern unsigned BSP_pci_hose1_bus_base; - -void BSP_pci_initialize(void); - -/* Exception Handling */ - -/* Use a task notepad to attach user exception handler info; - * may be changed by application startup code (EPICS uses 11) - */ -#define BSP_EXCEPTION_NOTEPAD 14 - -#ifndef ASM - -#define outport_byte(port,value) outb(value,port) -#define outport_word(port,value) outw(value,port) -#define outport_long(port,value) outl(value,port) - -#define inport_byte(port,value) (value = inb(port)) -#define inport_word(port,value) (value = inw(port)) -#define inport_long(port,value) (value = inl(port)) -/* - * Vital Board data Start using DATA RESIDUAL - */ -/* - * Total memory using RESIDUAL DATA - */ -extern unsigned int BSP_mem_size; -/* - * Start of the heap - */ -extern unsigned int BSP_heap_start; -/* - * PCI Bus Frequency - */ -extern unsigned int BSP_bus_frequency; -/* - * processor clock frequency - */ -extern unsigned int BSP_processor_frequency; -/* - * Time base divisior (how many tick for 1 second). - */ -extern unsigned int BSP_time_base_divisor; - -extern char BSP_productIdent[20]; -extern char BSP_serialNumber[20]; - -extern char BSP_enetAddr0[7]; -extern char BSP_enetAddr1[7]; - -/* - * The commandline as passed from the bootloader. - */ -extern char *BSP_commandline_string; - - -#define BSP_Convert_decrementer( _value ) \ - ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value))) - -extern rtems_configuration_table BSP_Configuration; -extern void bsp_reset(void); -extern int BSP_disconnect_clock_handler (void); -extern int BSP_connect_clock_handler (void); - -/* clear hostbridge errors - * - * enableMCP: whether to enable MCP checkstop / machine check interrupts - * on the hostbridge and in HID0. - * - * NOTE: The 5500 and 6100 boards have NO PHYSICAL CONNECTION - * to MCP so 'enableMCP' will always fail! - * - * quiet : be silent - * - * RETURNS : PCI status (hose 0 in byte 0, host 1 in byte 1) and - * VME bridge status (upper 16 bits). - * Zero if no errors were found. - */ -extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet); - -/* clear vme bridge errors and return (bridge-dependent) 16-bit status - * - * quiet : be silent - * - * RETURNS : 0 if there were no errors, non-zero, bridge-dependent - * 16-bit error status on error. - * - */ -extern unsigned short (*_BSP_clear_vmebridge_errors)(int); - -/* - * Prototypes for debug helpers - */ -void discovery_pic_set_debug_irq(int on); -void discovery_pic_install_debug_irq(void); - -/* - * Prototypes for methods called only from .S for dependency tracking - */ -char *save_boot_params( - void *r3, - void *r4, - void *r5, - char *cmdline_start, - char *cmdline_end -); -void zero_bss(void); - -/* - * Prototypes for methods in the BSP that cross file boundaries - */ -uint32_t probeMemoryEnd(void); - -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* !ASM */ - -#endif diff --git a/c/src/lib/libbsp/powerpc/beatnik/include/tm27.h b/c/src/lib/libbsp/powerpc/beatnik/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include <rtems/tm27-default.h> diff --git a/c/src/lib/libbsp/powerpc/beatnik/irq/irq.h b/c/src/lib/libbsp/powerpc/beatnik/irq/irq.h deleted file mode 100644 index e5f9558ecf..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/irq/irq.h +++ /dev/null @@ -1,133 +0,0 @@ -/* irq.h - * - * This include file describe the data structure and the functions implemented - * by rtems to write interrupt handlers. - * - * CopyRight (C) 1999 valette@crf.canon.fr - * - * This code is heavilly inspired by the public specification of STREAM V2 - * that can be found at : - * - * <http://www.chorus.com/Documentation/index.html> by following - * the STREAM API Specification Document link. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - * Modified by T. Straumann for the beatnik BSP, 2005-2007 - * Some information may be based on mvme5500/irq/irq.h by K. Feng. - */ - -#ifndef LIBBSP_POWERPC_MOT_PPC_NEW_IRQ_IRQ_H -#define LIBBSP_POWERPC_MOT_PPC_NEW_IRQ_IRQ_H - -#define BSP_SHARED_HANDLER_SUPPORT 1 -#include <rtems/irq.h> -#include <bsp/vectors.h> - -/* This BSP also passes a pointer to the interrupt frame to the handler. - * The PPC ABI guarantees that this will not mess up handlers written - * without knowledge of this feature. - */ - -typedef void (*BSP_rtems_irq_hdl)(rtems_irq_hdl_param,BSP_Exception_frame*); - - -/* legal priorities are 0 <= priority <= MAX_PRIO; 0 effectively disables the interrupt */ -#define BSP_IRQ_MAX_PRIO 4 -#define BSP_IRQ_MIN_PRIO 1 - -/* Note that priorites are only honoured for 'PCI' interrupt numbers. - * The discovery pic has no support for hardware priorites; hence they - * are handled in software - */ -#define BSP_IRQ_DEFAULT_PRIORITY 2 - - -#define BSP_PCI_IRQ_LOWEST_OFFSET 0 /* IMPLEMENTATION RELIES ON discovery pic INTERRUPTS HAVING NUMBERS 0..95 */ -#define BSP_IRQ_DEV 1 /* device interface interrupt */ -#define BSP_IRQ_DMA 2 /* DMA addres error interrupt (260) */ -#define BSP_IRQ_CPU 3 /* CPU interface interrupt */ -#define BSP_IRQ_IDMA0_1 4 /* IDMA ch. 0..1 complete interrupt (260) */ -#define BSP_IRQ_IDMA2_3 5 /* IDMA ch. 2..3 complete interrupt (260) */ -#define BSP_IRQ_IDMA4_5 6 /* IDMA ch. 4..5 complete interrupt (260) */ -#define BSP_IRQ_IDMA6_7 7 /* IDMA ch. 6..7 complete interrupt (260) */ -#define BSP_IRQ_TIME0_1 8 /* Timer 0..1 interrupt; Timer 0 on 64360 */ -#define BSP_IRQ_TIME2_3 9 /* Timer 2..3 interrupt; Timer 1 on 64360 */ -#define BSP_IRQ_TIME4_5 10 /* Timer 4..5 interrupt; Timer 2 on 64360 */ -#define BSP_IRQ_TIME6_7 11 /* Timer 6..7 interrupt; Timer 3 on 64360 */ -#define BSP_IRQ_PCI0_0 12 /* PCI 0 interrupt 0 summary (PCI 0 interrupt summary on 64360) */ -#define BSP_IRQ_PCI0_1 13 /* PCI 0 interrupt 1 summary (SRAM PAR ERROR on 64360) */ -#define BSP_IRQ_PCI0_2 14 /* PCI 0 interrupt 2 summary */ -#define BSP_IRQ_PCI0_3 15 /* PCI 0 interrupt 3 summary */ -#define BSP_IRQ_PCI1_0 16 /* PCI 1 interrupt 0 summary (PCI 1 interrupt summary on 64360) */ -#define BSP_IRQ_ECC 17 /* ECC error interrupt */ -#define BSP_IRQ_PCI1_1 18 /* PCI 1 interrupt 1 summary */ -#define BSP_IRQ_PCI1_2 19 /* PCI 1 interrupt 2 summary */ -#define BSP_IRQ_PCI1_3 20 /* PCI 1 interrupt 3 summary */ -#define BSP_IRQ_PCI0OUT_LO 21 /* PCI 0 outbound interrupt summary */ -#define BSP_IRQ_PCI0OUT_HI 22 /* PCI 0 outbound interrupt summary */ -#define BSP_IRQ_PCI1OUT_LO 23 /* PCI 1 outbound interrupt summary */ -#define BSP_IRQ_PCI1OUT_HI 24 /* PCI 1 outbound interrupt summary */ -#define BSP_IRQ_PCI0IN_LO 26 /* PCI 0 inbound interrupt summary */ -#define BSP_IRQ_PCI0IN_HI 27 /* PCI 0 inbound interrupt summary */ -#define BSP_IRQ_PCI1IN_LO 28 /* PCI 1 inbound interrupt summary */ -#define BSP_IRQ_PCI1IN_HI 29 /* PCI 1 inbound interrupt summary */ -#define BSP_IRQ_ETH0 (32+0) /* Ethernet controller 0 interrupt */ -#define BSP_IRQ_ETH1 (32+1) /* Ethernet controller 1 interrupt */ -#define BSP_IRQ_ETH2 (32+2) /* Ethernet controller 2 interrupt */ -#define BSP_IRQ_SDMA (32+4) /* SDMA interrupt */ -#define BSP_IRQ_I2C (32+5) /* I2C interrupt */ -#define BSP_IRQ_BRG (32+7) /* Baud Rate Generator interrupt */ -#define BSP_IRQ_MPSC0 (32+8) /* MPSC 0 interrupt */ -#define BSP_IRQ_MPSC1 (32+10) /* MPSC 1 interrupt */ -#define BSP_IRQ_COMM (32+11) /* Comm unit interrupt */ -#define BSP_IRQ_GPP7_0 (32+24) /* GPP[7..0] interrupt summary */ -#define BSP_IRQ_GPP15_8 (32+25) /* GPP[15..8] interrupt summary */ -#define BSP_IRQ_GPP23_16 (32+26) /* GPP[23..16] interrupt summary */ -#define BSP_IRQ_GPP31_24 (32+27) /* GPP[31..24] interrupt summary */ -#define BSP_IRQ_GPP_0 64 - -#define BSP_PCI_IRQ_NUMBER (64+32) -#define BSP_PCI_IRQ_MAX_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1) - -#define BSP_PROCESSOR_IRQ_NUMBER 1 -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET+1) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) - -/* summary */ - -#define BSP_IRQ_NUMBER (BSP_PCI_IRQ_NUMBER + BSP_PROCESSOR_IRQ_NUMBER) -#define BSP_LOWEST_OFFSET 0 -#define BSP_MAX_OFFSET (BSP_LOWEST_OFFSET + BSP_IRQ_NUMBER - 1) -#define BSP_DECREMENTER BSP_PROCESSOR_IRQ_LOWEST_OFFSET - -#define BSP_UART_COM1_IRQ BSP_IRQ_GPP_0 -#define BSP_UART_COM2_IRQ BSP_IRQ_GPP_0 - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - - -#include <bsp/irq_supp.h> - -int BSP_irq_is_enabled_at_pic(rtems_irq_number irq); - -/* set priority of an interrupt; must not be called from ISR level */ -int BSP_irq_set_priority(rtems_irq_number irq, rtems_irq_prio pri); - -/* Not for public use */ -void BSP_rtems_irq_mng_init(unsigned cpuId); - -#ifdef __cplusplus -} -#endif - - -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.h b/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.h deleted file mode 100644 index 4a68971d13..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.h +++ /dev/null @@ -1,133 +0,0 @@ -#ifndef BSP_GT_TIMER_H -#define BSP_GT_TIMER_H - -/* Support for hardware timers in the discovery bridge */ - -/* - * Authorship - * ---------- - * This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was - * created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * The 'beatnik' BSP was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#include <stdint.h> - -#ifdef __cplusplus - extern "C" { -#endif - -/* Obtain the number of hardware timers present - * The 'timer' argument in the routines below addresses - * one of 0..(BSP_timer_instances()-1) - */ -int BSP_timer_instances(void); - -/* Setup timer but don't start yet; interrupts are enabled if an isr argument is passed - * no interrupts are generated otherwise. - * - * If 'reload' is nonzero then the period is automatically restarted. - * - * RETURNS: 0 on success, nonzero on error (argument error) - * - * NOTE: If an ISR is already connected, it must be removed by passing a NULL isr first. - */ -int BSP_timer_setup(uint32_t timer, void (*isr)(void *arg), void *arg, int reload); - -/* Stop timer; - * - * RETURNS: 0 on success, nonzero on argument error - */ -int BSP_timer_stop(uint32_t timer); - -/* Start timer with 'period' (in ticks) - * - * RETURNS: 0 on success, nonzero on argument error - */ -int BSP_timer_start(uint32_t timer, uint32_t period); - -/* read decrementing timer on the fly - * - * RETURNS: current count in ticks - */ -uint32_t BSP_timer_read(uint32_t timer); - -/* get clock rate in Hz */ -uint32_t BSP_timer_clock_get(uint32_t timer); - -/* Initialize timer facility -- to be used by BSP implementors only - * - * RETURNS: 0 on success, nonzero if ISR wrapper couldn't be installed - */ -int BSP_timers_initialize(void); - -/* WATCHDOG TIMER (resets board if enabled and not 'petted' for - * some time). - */ - -/* Enable watchdog and set a timeout (in us) - * RETURNS 0 on success - */ -int BSP_watchdog_enable(uint32_t timeout_us); - -/* Disable watchdog - * RETURNS 0 on success - */ -int BSP_watchdog_disable(void); - -/* Check status -- unfortunately there seems to be no way - * to read the running value... - * - * RETURNS nonzero if enabled/running, zero if disabled/stopped - */ -int BSP_watchdog_status(void); - -/* Pet the watchdog (rearm to configured timeout) - * RETURNS: 0 on success, nonzero on failure (watchdog - * currently not running). - */ -int BSP_watchdog_pet(void); - - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/beatnik/marvell/gti2c_busdrv.h b/c/src/lib/libbsp/powerpc/beatnik/marvell/gti2c_busdrv.h deleted file mode 100644 index b75e16cdf8..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/marvell/gti2c_busdrv.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef GT_64260_BUS_DRIVER_H -#define GT_64260_BUS_DRIVER_H -/* - * Authorship - * ---------- - * This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was - * created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * The 'beatnik' BSP was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#ifdef __cplusplus - extern "C" { -#endif - -#include <rtems.h> -#include <rtems/libi2c.h> - -/* for registration with libi2c */ -extern rtems_libi2c_bus_t *gt64260_i2c_bus_descriptor; - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/beatnik/marvell/gti2creg.h b/c/src/lib/libbsp/powerpc/beatnik/marvell/gti2creg.h deleted file mode 100644 index 33e566f5bc..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/marvell/gti2creg.h +++ /dev/null @@ -1,83 +0,0 @@ -/* $NetBSD: gti2creg.h,v 1.2 2005/02/27 00:27:21 perry Exp $ */ - -/* - * Copyright (c) 2005 Brocade Communcations, inc. - * All rights reserved. - * - * Written by Matt Thomas for Brocade Communcations, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of Brocade Communications, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED - * OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DEV_MARVELL_GTI2CREG_H_ -#define _DEV_MARVELL_GTI2CREG_H_ - -#define I2C_REG_SlaveAddr 0xc000 -#define I2C_REG_ExtSlaveAddr 0xc010 -#define I2C_REG_Data 0xc004 -#define I2C_REG_Control 0xc008 -#define I2C_REG_Status 0xc00c -#define I2C_REG_BaudRate 0xc00c -#define I2C_REG_SoftReset 0xc01c - -#define I2C_SlaveAddr_GCE 0x0001 /* Act as Slave */ -#define I2C_SlaveAddr_SAddr 0x7E - -#define I2C_Control_ACK 0x04 -#define I2C_Control_IFlg 0x08 -#define I2C_Control_Stop 0x10 -#define I2C_Control_Start 0x20 -#define I2C_Control_TWSIEn 0x40 -#define I2C_Control_IntEn 0x80 - -/* - * F(I2C) = F(Tclk) / ( 10 * (M + 1) * (2^(N+1))) - * For Tclk = 100MHz, M = 4, N = 4: F = 62.5KHz - * For Tclk = 100MHz, M = 13, N = 3: F = 96.2KHz - */ -#define I2C_BaudRate(M, N) (((M) << 3) | (N)) -#define I2C_BaudRate_62_5K I2C_BaudRate(4, 4) -#define I2C_BaudRate_96_2K I2C_BaudRate(13, 3) - -#define I2C_Status_BusError 0x00 /* Bus error */ -#define I2C_Status_Started 0x08 /* Start condition xmitted */ -#define I2C_Status_ReStarted 0x10 /* Repeated start condition xmitted */ -#define I2C_Status_AddrWriteAck 0x18 /* Adr + wr bit xmtd, ack rcvd */ -#define I2C_Status_AddrWriteNoAck 0x20 /* Adr + wr bit xmtd, NO ack rcvd */ -#define I2C_Status_MasterWriteAck 0x28 /* Master xmtd data byte, ack rcvd */ -#define I2C_Status_MasterWriteNoAck 0x30 /* Master xmtd data byte, NO ack rcvd*/ -#define I2C_Status_MasterLostArb 0x38 /* Master lost arbitration during - address or data transfer */ -#define I2C_Status_AddrReadAck 0x40 /* Adr + rd bit xmtd, ack rcvd */ -#define I2C_Status_AddrReadNoAck 0x48 /* Adr + rd bit xmtd, NO ack rcvd */ -#define I2C_Status_MasterReadAck 0x50 /* Master rcvd data bye, ack rcvd */ -#define I2C_Status_MasterReadNoAck 0x58 /* Master rcvd data bye, NO ack rcvd */ -#define I2C_Status_2ndAddrWriteAck 0xd0 /* 2nd adr + wr bit xmid, ack rcvd */ -#define I2C_Status_2ndAddrWriteNoAck 0xd8 /* 2nd adr + wr bit xmid, NO ack rcvd */ -#define I2C_Status_2ndAddrReadAck 0xe0 /* 2nd adr + rd bit xmid, ack rcvd */ -#define I2C_Status_2ndAddrReadNoAck 0xe8 /* 2nd adr + rd bit xmtd, NO ack rcvd */ -#define I2C_Status_Idle 0xf8 /* Idle */ - -#endif /* _DEV_MARVELL_GTI2CREG_H_ */ diff --git a/c/src/lib/libbsp/powerpc/beatnik/marvell/gtintrreg.h b/c/src/lib/libbsp/powerpc/beatnik/marvell/gtintrreg.h deleted file mode 100644 index bd3f69514e..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/marvell/gtintrreg.h +++ /dev/null @@ -1,257 +0,0 @@ -/* $NetBSD: gtintrreg.h,v 1.3 2005/02/27 00:27:21 perry Exp $ */ - -/* - * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Allegro Networks, Inc., and Wasabi Systems, Inc. - * 4. The name of Allegro Networks, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * 5. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND - * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC. - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * gt64260intr.h: defines for GT-64260 system controller interrupts - * - * creation Sun Jan 7 18:05:59 PST 2001 cliff - * - * NOTE: - * Galileo GT-64260 manual bit defines assume Little Endian - * ordering of bits within bytes, i.e. - * bit #0 --> 0x01 - * vs. Motorola Big Endian bit numbering where - * bit #0 --> 0x80 - * Consequently we define bits in Little Endian format and plan - * to swizzle bytes during programmed I/O by using lwbrx/swbrx - * to load/store GT-64260 registers. - */ - - -#ifndef _DISCOVERY_GT64260INTR_H -#define _DISCOVERY_GT64260INTR_H - -#define BIT(n) (1<<(n)) - - -/* - * GT-64260 Interrupt Controller Register Map - */ -#define ICR_260_MIC_LO 0xc18 /* main interrupt cause low */ -#define ICR_260_MIC_HI 0xc68 /* main interrupt cause high */ -#define ICR_260_CIM_LO 0xc1c /* CPU interrupt mask low */ -#define ICR_260_CIM_HI 0xc6c /* CPU interrupt mask high */ -#define ICR_260_CSC 0xc70 /* CPU select cause */ -#define ICR_260_P0IM_LO 0xc24 /* PCI_0 interrupt mask low */ -#define ICR_260_P0IM_HI 0xc64 /* PCI_0 interrupt mask high */ -#define ICR_260_P0SC 0xc74 /* PCI_0 select cause */ -#define ICR_260_P1IM_LO 0xca4 /* PCI_1 interrupt mask low */ -#define ICR_260_P1IM_HI 0xce4 /* PCI_1 interrupt mask high */ -#define ICR_260_P1SC 0xcf4 /* PCI_1 select cause */ -#define ICR_260_CI0M 0xe60 /* CPU int[0] mask */ -#define ICR_260_CI1M 0xe64 /* CPU int[1] mask */ -#define ICR_260_CI2M 0xe68 /* CPU int[2] mask */ -#define ICR_260_CI3M 0xe6c /* CPU int[3] mask */ - -/* - * MV64360 Interrupt Controller Register Map - */ -#define ICR_360_MIC_LO 0x004 /* main interrupt cause low */ -#define ICR_360_MIC_HI 0x00c /* main interrupt cause high */ -#define ICR_360_C0IM_LO 0x014 /* CPU 0 interrupt mask low */ -#define ICR_360_C0IM_HI 0x01c /* CPU 0 interrupt mask high */ -#define ICR_360_C0SC 0x024 /* CPU 0 select cause */ -#define ICR_360_C1IM_LO 0x034 /* CPU 1 interrupt mask low */ -#define ICR_360_C1IM_HI 0x03c /* CPU 1 interrupt mask high */ -#define ICR_360_C1SC 0x044 /* CPU 1 select cause */ -#define ICR_360_I0M_LO 0x014 /* Int 0 mask low */ -#define ICR_360_I0M_HI 0x01c /* Int 0 mask high */ -#define ICR_360_I0SC 0x024 /* Int 0 select cause */ -#define ICR_360_I1M_LO 0x034 /* Int 1 mask low */ -#define ICR_360_I1M_HI 0x03c /* Int 1 mask high */ -#define ICR_360_C1SC 0x044 /* Int 1 select cause */ - - -/* - * IRQs: - * we define IRQs based on bit number in the - * ICU_LEN dimensioned hardware portion of the imask_t bit vector - * which consists of 64 bits of Main Cause and Mask register pairs - * (ICR_MIC_LO, ICR_MIC_HI and ICR_CIM_LO, ICR_CIM_HI) - * as well as 32 bits in GPP registers (see intr.h): - * - * IRQs: - * 31.............................0 63.............................32 - * | | | - * imask_t index: | | | - * | | | | - * ^--------- IM_PIC_LO ----------^ ^------ IM_PIC_HI ------------^ - * | | | - * Bitmasks: | | | - * | | | | - * ^--------- IML_* --------------^ ^------ IMH_* ----------------^ - * | | | - * Registers: | | | - * | | | | - * ^--------- ICR_MIC_LO ---------^ ^------ ICR_MIC_HI -----------^ - * ^--------- ICR_CIM_LO ---------^ ^------ ICR_CIM_HI -----------^ - * - * IRQs: - * 95............................64 127............................96 - * | | | - * imask_t index: | | | - * | | | | - * ^-------- IMASK_GPP ----------^ ^----- IMASK_SOFTINT --------^ - * | | | - * Bitmasks: | | | - * | | | | - * ^--------- GPP_* --------------^ ^------ SIBIT(irq) -----------^ - * | | | - * Registers: | | | - * | | | | - * ^--- GT_GPP_Interrupt_Cause ---^ ^------- (none) -----------^ - * ^--- GT_GPP_Interrupt_Mask ---^ - * - * - * Note that GPP interrupts are summarized in the Main Cause Register. - * - * Some IRQs are "resvered" undefined due to gaps in HW register utilization. - */ -#define IRQ_DEV 1 /* device interface interrupt */ -#define IRQ_DMA 2 /* DMA addres error interrupt */ -#define IRQ_CPU 3 /* CPU interface interrupt */ -#define IRQ_IDMA0_1 4 /* IDMA ch. 0..1 complete interrupt */ -#define IRQ_IDMA2_3 5 /* IDMA ch. 2..3 complete interrupt */ -#define IRQ_IDMA4_5 6 /* IDMA ch. 4..5 complete interrupt */ -#define IRQ_IDMA6_7 7 /* IDMA ch. 6..7 complete interrupt */ -#define IRQ_TIME0_1 8 /* Timer 0..1 interrupt */ -#define IRQ_TIME2_3 9 /* Timer 2..3 interrupt */ -#define IRQ_TIME4_5 10 /* Timer 4..5 interrupt */ -#define IRQ_TIME6_7 11 /* Timer 6..7 interrupt */ -#define IRQ_PCI0_0 12 /* PCI 0 interrupt 0 summary */ -#define IRQ_PCI0_1 13 /* PCI 0 interrupt 1 summary */ -#define IRQ_PCI0_2 14 /* PCI 0 interrupt 2 summary */ -#define IRQ_PCI0_3 15 /* PCI 0 interrupt 3 summary */ -#define IRQ_PCI1_0 16 /* PCI 1 interrupt 0 summary */ -#define IRQ_ECC 17 /* ECC error interrupt */ -#define IRQ_PCI1_1 18 /* PCI 1 interrupt 1 summary */ -#define IRQ_PCI1_2 19 /* PCI 1 interrupt 2 summary */ -#define IRQ_PCI1_3 20 /* PCI 1 interrupt 3 summary */ -#define IRQ_PCI0OUT_LO 21 /* PCI 0 outbound interrupt summary */ -#define IRQ_PCI0OUT_HI 22 /* PCI 0 outbound interrupt summary */ -#define IRQ_PCI1OUT_LO 23 /* PCI 1 outbound interrupt summary */ -#define IRQ_PCI1OUT_HI 24 /* PCI 1 outbound interrupt summary */ -#define IRQ_PCI0IN_LO 26 /* PCI 0 inbound interrupt summary */ -#define IRQ_PCI0IN_HI 27 /* PCI 0 inbound interrupt summary */ -#define IRQ_PCI1IN_LO 28 /* PCI 1 inbound interrupt summary */ -#define IRQ_PCI1IN_HI 29 /* PCI 1 inbound interrupt summary */ -#define IRQ_ETH0 (32+0) /* Ethernet controller 0 interrupt */ -#define IRQ_ETH1 (32+1) /* Ethernet controller 1 interrupt */ -#define IRQ_ETH2 (32+2) /* Ethernet controller 2 interrupt */ -#define IRQ_SDMA (32+4) /* SDMA interrupt */ -#define IRQ_I2C (32+5) /* I2C interrupt */ -#define IRQ_BRG (32+7) /* Baud Rate Generator interrupt */ -#define IRQ_MPSC0 (32+8) /* MPSC 0 interrupt */ -#define IRQ_MPSC1 (32+10) /* MPSC 1 interrupt */ -#define IRQ_COMM (32+11) /* Comm unit interrupt */ -#define IRQ_GPP7_0 (32+24) /* GPP[7..0] interrupt */ -#define IRQ_GPP15_8 (32+25) /* GPP[15..8] interrupt */ -#define IRQ_GPP23_16 (32+26) /* GPP[23..16] interrupt */ -#define IRQ_GPP31_24 (32+27) /* GPP[31..24] interrupt */ - -/* - * low word interrupt mask register bits - */ -#define IML_SUM BIT(0) -#define IML_DEV BIT(IRQ_DEV) -#define IML_DMA BIT(IRQ_DMA) -#define IML_CPU BIT(IRQ_CPU) -#define IML_IDMA0_1 BIT(IRQ_IDMA0_1) -#define IML_IDMA2_3 BIT(IRQ_IDMA2_3) -#define IML_IDMA4_5 BIT(IRQ_IDMA4_5) -#define IML_IDMA6_7 BIT(IRQ_IDMA6_7) -#define IML_TIME0_1 BIT(IRQ_TIME0_1) -#define IML_TIME2_3 BIT(IRQ_TIME2_3) -#define IML_TIME4_5 BIT(IRQ_TIME4_5) -#define IML_TIME6_7 BIT(IRQ_TIME6_7) -#define IML_PCI0_0 BIT(IRQ_PCI0_0) -#define IML_PCI0_1 BIT(IRQ_PCI0_1) -#define IML_PCI0_2 BIT(IRQ_PCI0_2) -#define IML_PCI0_3 BIT(IRQ_PCI0_3) -#define IML_PCI1_0 BIT(IRQ_PCI1_0) -#define IML_ECC BIT(IRQ_ECC) -#define IML_PCI1_1 BIT(IRQ_PCI1_1) -#define IML_PCI1_2 BIT(IRQ_PCI1_2) -#define IML_PCI1_3 BIT(IRQ_PCI1_3) -#define IML_PCI0OUT_LO BIT(IRQ_PCI0OUT_LO) -#define IML_PCI0OUT_HI BIT(IRQ_PCI0OUT_HI) -#define IML_PCI1OUT_LO BIT(IRQ_PCI1OUT_LO) -#define IML_PCI1OUT_HI BIT(IRQ_PCI1OUT_HI) -#define IML_PCI0IN_LO BIT(IRQ_PCI0IN_LO) -#define IML_PCI0IN_HI BIT(IRQ_PCI0IN_HI) -#define IML_PCI1IN_LO BIT(IRQ_PCI1IN_LO) -#define IML_PCI1IN_HI BIT(IRQ_PCI1IN_HI) -#define IML_RES (BIT(25)|BIT(30)|BIT(31)) - -/* - * high word interrupt mask register bits - */ -#define IMH_ETH0 BIT(IRQ_ETH0-32) -#define IMH_ETH1 BIT(IRQ_ETH1-32) -#define IMH_ETH2 BIT(IRQ_ETH2-32) -#define IMH_SDMA BIT(IRQ_SDMA-32) -#define IMH_I2C BIT(IRQ_I2C-32) -#define IMH_BRG BIT(IRQ_BRG-32) -#define IMH_MPSC0 BIT(IRQ_MPSC0-32) -#define IMH_MPSC1 BIT(IRQ_MPSC1-32) -#define IMH_COMM BIT(IRQ_COMM-32) -#define IMH_GPP7_0 BIT(IRQ_GPP7_0-32) -#define IMH_GPP15_8 BIT(IRQ_GPP15_8-32) -#define IMH_GPP23_16 BIT(IRQ_GPP23_16-32) -#define IMH_GPP31_24 BIT(IRQ_GPP31_24-32) -#define IMH_GPP_SUM (IMH_GPP7_0|IMH_GPP15_8|IMH_GPP23_16|IMH_GPP31_24) -#define IMH_RES (BIT(3) |BIT(6) |BIT(9) |BIT(12)|BIT(13)|BIT(14) \ - |BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)|BIT(20) \ - |BIT(21)|BIT(22)|BIT(23)|BIT(28)|BIT(29)|BIT(30) \ - |BIT(31)) - -/* - * ICR_CSC "Select Cause" register bits - */ -#define CSC_SEL BIT(30) /* HI/LO select */ -#define CSC_STAT BIT(31) /* ? "irq active" : "irq none" */ -#define CSC_CAUSE ~(CSC_SEL|CSC_STAT) - - -/* - * CPU Int[n] Mask bit(s) - */ -#define CPUINT_SEL 0x80000000 /* HI/LO select */ - -#endif /* _DISCOVERY_GT64260INTR_H */ diff --git a/c/src/lib/libbsp/powerpc/beatnik/marvell/gtpcireg.h b/c/src/lib/libbsp/powerpc/beatnik/marvell/gtpcireg.h deleted file mode 100644 index d01fc702ac..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/marvell/gtpcireg.h +++ /dev/null @@ -1,964 +0,0 @@ -/* $NetBSD: gtpcireg.h,v 1.4 2005/12/11 12:22:16 christos Exp $ */ - -/* - * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Allegro Networks, Inc., and Wasabi Systems, Inc. - * 4. The name of Allegro Networks, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * 5. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND - * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC. - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DEV_GTPCIREG_H -#define _DEV_GTPCIREG_H - -#define PCI__BIT(bit) (1U << (bit)) -#define PCI__MASK(bit) (PCI__BIT(bit) - 1) -#define PCI__GEN(bus, off, num) (((off)^((bus) << 7))+((num) << 4)) -#define PCI__EXT(data, bit, len) (((data) >> (bit)) & PCI__MASK(len)) -#define PCI__CLR(data, bit, len) ((data) &= ~(PCI__MASK(len) << (bit))) -#define PCI__INS(bit, new) ((new) << (bit)) - -#define PCI_SYNC_REG(bus) (0xc0 | ((bus) << 3)) - -/* - * Table 185: PCI Slave ADDRess Decoding Register Map - */ -#define PCI_SCS0_BAR_SIZE(bus) PCI__GEN(bus, 0x0c08, 0) -#define PCI_SCS2_BAR_SIZE(bus) PCI__GEN(bus, 0x0c0c, 0) -#define PCI_CS0_BAR_SIZE(bus) PCI__GEN(bus, 0x0c10, 0) -#define PCI_CS3_BAR_SIZE(bus) PCI__GEN(bus, 0x0c14, 0) -#define PCI_SCS1_BAR_SIZE(bus) PCI__GEN(bus, 0x0d08, 0) -#define PCI_SCS3_BAR_SIZE(bus) PCI__GEN(bus, 0x0d0c, 0) -#define PCI_CS1_BAR_SIZE(bus) PCI__GEN(bus, 0x0d10, 0) -#define PCI_BOOTCS_BAR_SIZE(bus) PCI__GEN(bus, 0x0d14, 0) -#define PCI_CS2_BAR_SIZE(bus) PCI__GEN(bus, 0x0d18, 0) -#define PCI_P2P_MEM0_BAR_SIZE(bus) PCI__GEN(bus, 0x0d1c, 0) -#define PCI_P2P_MEM1_BAR_SIZE(bus) PCI__GEN(bus, 0x0d20, 0) -#define PCI_P2P_IO_BAR_SIZE(bus) PCI__GEN(bus, 0x0d24, 0) -#define PCI_CPU_BAR_SIZE(bus) PCI__GEN(bus, 0x0d28, 0) -#define PCI_EXPANSION_ROM_BAR_SIZE(bus) PCI__GEN(bus, 0x0d2c, 0) -#define PCI_DAC_SCS0_BAR_SIZE(bus) PCI__GEN(bus, 0x0e00, 0) -#define PCI_DAC_SCS1_BAR_SIZE(bus) PCI__GEN(bus, 0x0e04, 0) -#define PCI_DAC_SCS2_BAR_SIZE(bus) PCI__GEN(bus, 0x0e08, 0) -#define PCI_DAC_SCS3_BAR_SIZE(bus) PCI__GEN(bus, 0x0e0c, 0) -#define PCI_DAC_CS0_BAR_SIZE(bus) PCI__GEN(bus, 0x0e10, 0) -#define PCI_DAC_CS1_BAR_SIZE(bus) PCI__GEN(bus, 0x0e14, 0) -#define PCI_DAC_CS2_BAR_SIZE(bus) PCI__GEN(bus, 0x0e18, 0) -#define PCI_DAC_CS3_BAR_SIZE(bus) PCI__GEN(bus, 0x0e1c, 0) -#define PCI_DAC_BOOTCS_BAR_SIZE(bus) PCI__GEN(bus, 0x0e20, 0) -#define PCI_DAC_P2P_MEM0_BAR_SIZE(bus) PCI__GEN(bus, 0x0e24, 0) -#define PCI_DAC_P2P_MEM1_BAR_SIZE(bus) PCI__GEN(bus, 0x0e28, 0) -#define PCI_DAC_CPU_BAR_SIZE(bus) PCI__GEN(bus, 0x0e2c, 0) -#define PCI_BASE_ADDR_REGISTERS_ENABLE(bus) PCI__GEN(bus, 0x0c3c, 0) -#define PCI_SCS0_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0c48, 0) -#define PCI_SCS1_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0d48, 0) -#define PCI_SCS2_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0c4c, 0) -#define PCI_SCS3_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0d4c, 0) -#define PCI_CS0_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0c50, 0) -#define PCI_CS1_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0d50, 0) -#define PCI_CS2_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0d58, 0) -#define PCI_CS3_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0c54, 0) -#define PCI_ADDR_DECODE_CONTROL(bus) PCI__GEN(bus, 0x0d3c, 0) -#define PCI_BOOTCS_ADDR_REMAP(bus) PCI__GEN(bus, 0x0d54, 0) -#define PCI_P2P_MEM0_BASE_ADDR_REMAP_LOW(bus) PCI__GEN(bus, 0x0d5c, 0) -#define PCI_P2P_MEM0_BASE_ADDR_REMAP_HIGH(bus) PCI__GEN(bus, 0x0d60, 0) -#define PCI_P2P_MEM1_BASE_ADDR_REMAP_LOW(bus) PCI__GEN(bus, 0x0d64, 0) -#define PCI_P2P_MEM1_BASE_ADDR_REMAP_HIGH(bus) PCI__GEN(bus, 0x0d68, 0) -#define PCI_P2P_IO_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0d6c, 0) -#define PCI_CPU_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0d70, 0) -#define PCI_DAC_SCS0_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f00, 0) -#define PCI_DAC_SCS1_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f04, 0) -#define PCI_DAC_SCS2_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f08, 0) -#define PCI_DAC_SCS3_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f0c, 0) -#define PCI_DAC_CS0_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f10, 0) -#define PCI_DAC_CS1_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f14, 0) -#define PCI_DAC_CS2_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f18, 0) -#define PCI_DAC_CS3_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f1c, 0) -#define PCI_DAC_BOOTCS_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f20, 0) -#define PCI_DAC_P2P_MEM0_BASE_ADDR_REMAP_LOW(bus) PCI__GEN(bus, 0x0f24, 0) -#define PCI_DAC_P2P_MEM0_BASE_ADDR_REMAP_HIGH(bus) PCI__GEN(bus, 0x0f28, 0) -#define PCI_DAC_P2P_MEM1_BASE_ADDR_REMAP_LOW(bus) PCI__GEN(bus, 0x0f2c, 0) -#define PCI_DAC_P2P_MEM1_BASE_ADDR_REMAP_HIGH(bus) PCI__GEN(bus, 0x0f30, 0) -#define PCI_DAC_CPU_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f34, 0) -#define PCI_EXPANSION_ROM_BASE_ADDR_REMAP(bus) PCI__GEN(bus, 0x0f38, 0) - -/* - * Table 186: PCI Control Register Map - */ -#define PCI_COMMAND(bus) PCI__GEN(bus, 0x0c00, 0) -#define PCI_MODE(bus) PCI__GEN(bus, 0x0d00, 0) -#define PCI_TIMEOUT_RETRY(bus) PCI__GEN(bus, 0x0c04, 0) -#define PCI_READ_BUFFER_DISCARD_TIMER(bus) PCI__GEN(bus, 0x0d04, 0) -#define PCI_MSI_TRIGGER_TIMER(bus) PCI__GEN(bus, 0x0c38, 0) -#define PCI_ARBITER_CONTROL(bus) PCI__GEN(bus, 0x1d00, 0) -#define PCI_INTERFACE_XBAR_CONTROL_LOW(bus) PCI__GEN(bus, 0x1d08, 0) -#define PCI_INTERFACE_XBAR_CONTROL_HIGH(bus) PCI__GEN(bus, 0x1d0c, 0) -#define PCI_INTERFACE_XBAR_TIMEOUT(bus) PCI__GEN(bus, 0x1d04, 0) -#define PCI_READ_RESPONSE_XBAR_CONTROL_LOW(bus) PCI__GEN(bus, 0x1d18, 0) -#define PCI_READ_RESPONSE_XBAR_CONTROL_HIGH(bus) PCI__GEN(bus, 0x1d1c, 0) -#define PCI_SYNC_BARRIER(bus) PCI__GEN(bus, 0x1d10, 0) -#define PCI_P2P_CONFIGURATION(bus) PCI__GEN(bus, 0x1d14, 0) -#define PCI_P2P_SWAP_CONTROL(bus) PCI__GEN(bus, 0x1d54, 0) -#define PCI_ACCESS_CONTROL_BASE_LOW(bus, n) PCI__GEN(bus, 0x1e00, n) -#define PCI_ACCESS_CONTROL_BASE_HIGH(bus, n) PCI__GEN(bus, 0x1e04, n) -#define PCI_ACCESS_CONTROL_TOP(bus, n) PCI__GEN(bus, 0x1e08, n) - - -/* - * Table 187: PCI Snoop Control Register Map - */ -#define PCI_SNOOP_CONTROL_BASE_LOW(bus, n) PCI__GEN(bus, 0x1f00, n) -#define PCI_SNOOP_CONTROL_BASE_HIGH(bus, n) PCI__GEN(bus, 0x1f04, n) -#define PCI_SNOOP_CONTROL_TOP(bus, n) PCI__GEN(bus, 0x1f08, n) - -/* - * Table 188: PCI Configuration ACCESS_Register Map - */ -#define PCI_CONFIG_ADDR(bus) PCI__GEN(bus, 0x0cf8, 0) -#define PCI_CONFIG_DATA(bus) PCI__GEN(bus, 0x0cfc, 0) -#define PCI_INTR_ACK(bus) PCI__GEN(bus, 0x0c34, 0) - -/* - * Table 189: PCI ERROR Report Register Map - */ -#define PCI_SERR_MASK(bus) PCI__GEN(bus, 0x0c28, 0) -#define PCI_ERROR_ADDRESS_LOW(bus) PCI__GEN(bus, 0x1d40, 0) -#define PCI_ERROR_ADDRESS_HIGH(bus) PCI__GEN(bus, 0x1d44, 0) -#define PCI_ERROR_DATA_LOW(bus) PCI__GEN(bus, 0x1d48, 0) -#define PCI_ERROR_DATA_HIGH(bus) PCI__GEN(bus, 0x1d4c, 0) -#define PCI_ERROR_COMMAND(bus) PCI__GEN(bus, 0x1d50, 0) -#define PCI_ERROR_CAUSE(bus) PCI__GEN(bus, 0x1d58, 0) -#define PCI_ERROR_MASK(bus) PCI__GEN(bus, 0x1d5c, 0) - - - -/* - * Table 223: PCI Base Address Registers Enable - * If a bit is clear, the BAR is enabled. If set, disabled. The GT64260] - * prevents disabling both memory mapped and I/O mapped BARs (bits 9 and 10 - * cannot simultaneously be set to 1). - */ -#define PCI_BARE_SCS0En PCI__BIT(0) /* SCS[0]* BAR Enable */ -#define PCI_BARE_SCS1En PCI__BIT(1) /* SCS[1]* BAR Enable */ -#define PCI_BARE_SCS2En PCI__BIT(2) /* SCS[2]* BAR Enable */ -#define PCI_BARE_SCS3En PCI__BIT(3) /* SCS[3]* BAR Enable */ -#define PCI_BARE_CS0En PCI__BIT(4) /* CS[0]* BAR Enable */ -#define PCI_BARE_CS1En PCI__BIT(5) /* CS[1]* BAR Enable */ -#define PCI_BARE_CS2En PCI__BIT(6) /* CS[2]* BAR Enable */ -#define PCI_BARE_CS3En PCI__BIT(7) /* CS[3]* BAR Enable */ -#define PCI_BARE_BootCSEn PCI__BIT(8) /* BootCS* BAR Enable */ -#define PCI_BARE_IntMemEn PCI__BIT(9) /* Memory Mapped Internal - * Registers BAR Enable */ -#define PCI_BARE_IntIOEn PCI__BIT(10) /* I/O Mapped Internal - * Registers BAR Enable */ -#define PCI_BARE_P2PMem0En PCI__BIT(11) /* P2P Mem0 BAR Enable */ -#define PCI_BARE_P2PMem1En PCI__BIT(12) /* P2P Mem1 BAR Enable */ -#define PCI_BARE_P2PIOEn PCI__BIT(13) /* P2P IO BAR Enable */ -#define PCI_BARE_CPUEn PCI__BIT(14) /* CPU BAR Enable */ -#define PCI_BARE_DSCS0En PCI__BIT(15) /* DAC SCS[0]* BAR Enable */ -#define PCI_BARE_DSCS1En PCI__BIT(16) /* DAC SCS[1]* BAR Enable */ -#define PCI_BARE_DSCS2En PCI__BIT(17) /* DAC SCS[2]* BAR Enable */ -#define PCI_BARE_DSCS3En PCI__BIT(18) /* DAC SCS[3]* BAR Enable */ -#define PCI_BARE_DCS0En PCI__BIT(19) /* DAC CS[0]* BAR Enable */ -#define PCI_BARE_DCS1En PCI__BIT(20) /* DAC CS[1]* BAR Enable */ -#define PCI_BARE_DCS2En PCI__BIT(21) /* DAC CS[2]* BAR Enable */ -#define PCI_BARE_DCS3En PCI__BIT(22) /* DAC CS[3]* BAR Enable */ -#define PCI_BARE_DBootCSEn PCI__BIT(23) /* DAC BootCS* BAR Enable */ -#define PCI_BARE_DP2PMem0En PCI__BIT(24) /* DAC P2P Mem0 BAR Enable */ -#define PCI_BARE_DP2PMem1En PCI__BIT(25) /* DAC P2P Mem1 BAR Enable */ -#define PCI_BARE_DCPUEn PCI__BIT(26) /* DAC CPU BAR Enable */ - -/* - * Table 254: PCI Address Decode Control - * Bits 7:4 and 31:25 are reserved - * 00:00 RemapWrDis Address Remap Registers Write Disable - * 0: Writes to a BAR result in updating the - * corresponding remap register with the BAR's - * new value. - * 1: Writes to a BAR have no affect on the - * corresponding Remap register value. - * 01:01 ExpRomDev Expansion ROM Device (0: CS[3]; 1: BootCS) - * 02:02 VPDDev VPD Device (0: CS[3]; 1: BootCS) - * 03:03 MsgAcc Messaging registers access - * 0: Messaging unit registers are accessible on - * lowest 4Kbyte of SCS[0] BAR space. - * 1: Messaging unit registers are only accessible - * as part of the GT64260 internal space. - * 07:04 Reserved - * 24:08 VPDHighAddr VPD High Address bits - * [31:15] of VPD the address. - * 31:25 Reserved - */ -#define PCI_ADC_RemapWrDis PCI__BIT(0) -#define PCI_ADC_ExpRomDev PCI__BIT(1) -#define PCI_ADC_VPDDev PCI__BIT(2) -#define PCI_ADC_MsgAcc PCI__BIT(3) -#define PCI_ADC_VPDHighAddr_GET(v) PCI__EXT(v, 8, 16) - - -/* - * Table 255: PCI Command - * 00:00 MByteSwap PCI Master Byte Swap - * NOTE: GT-64120 and GT-64130 compatible. - * When set to 0, the GTO64260 PCI master swaps the bytes - * of the incoming and outgoing PCI data (swap the 8 bytes - * of a longword). - * 01:01 Reserved - * 02:02 Reserved Must be 0. - * 03:03 Reserved - * 04:04 MWrCom PCI Master Write Combine Enable - * When set to 1, write combining is enabled. - * 05:05 MRdCom PCI Master Read Combine Enable - * When set to 1, read combining is enabled. - * 06:06 MWrTrig PCI Master Write Trigger - * 0: Accesses the PCI bus only when the whole burst is - * written into the master write buffer. - * 1: Accesses the PCI bus when the first data is written - * into the master write buffer. - * 07:07 MRdTrig PCI Master Read Trigger - * 0: Returns read data to the initiating unit only when - * the whole burst is written into master read buffer. - * 1: Returns read data to the initiating unit when the - * first read data is written into master read buffer. - * 08:08 MRdLine PCI Master Memory Read Line Enable - * (0: Disable; 1: Enable) - * 09:09 MRdMul PCI Master Memory Read Multiple Enable - * (0: Disable; 1: Enable) - * 10:10 MWordSwap PCI Master Word Swap - * NOTE: GT-64120 and GT-64130 compatible. - * When set to 1, the GT64260 PCI master swaps the 32-bit - * words of the incoming and outgoing PCI data. - * 11:11 SWordSwap PCI Slave Word Swap - * NOTE: GT-64120 and GT-64130 compatible. - * When set to 1, the GT64260 PCI slave swaps the 32-bit - * words of the incoming and outgoing PCI data. - * 12:12 IntBusCtl PCI Interface Unit Internal Bus Control - * NOTE: Reserved for Galileo Technology usage - * 0: Enable internal bus sharing between master and - * slave interfaces. - * 1: Disable internal bus sharing between master and - * slave interfaces. - * 13:13 SBDis PCI Slave Sync Barrier Disable - * When set to 1, the PCI configuration read transaction - * will stop act as sync barrier transaction. - * 14:14 Reserved Must be 0 - * 15:15 MReq64 PCI Master REQ64* Enable (0: Disable; 1: Enable) - * 16:16 SByteSwap PCI Slave Byte Swap - * NOTE: GT-64120 and GT-64130 compatible. - * When set to 0, the GT64260 PCI slave swaps the bytes of - * the incoming and outgoing PCI data (swap the 8 bytes of - * a long-word). - * 17:17 MDACEn PCI Master DAC Enable - * 0: Disable (The PCI master never drives the DAC cycle) - * 1: Enable (In case the upper 32-bit address is not 0, - * the PCI master drives the DAC cycle) - * 18:18 M64Allign PCI Master REQ64* assertion on non-aligned - * 0: Disable (The master asserts REQ64* only if - * the address is 64-bit aligned) - * 1: Enable (The master asserts REQ64* even if - * the address is not 64-bit aligned) - * 19:19 PErrProp Parity/ECC Errors Propagation Enable - * 0: Disable (The PCI interface always drives - * correct parity on the PAR signal) - * 1: Enable (In case of slave read bad ECC from - * SDRAM, or master write with bad parity/ECC - * indication from the initiator, the PCI interface - * drives bad parity on the PAR signal) - * 20:20 SSwapEn PCI Slave Swap Enable - * NOTE: Even if the SSwapEn bit is set to 1 and - * the PCI address does not match any of the - * Access Control registers, slave data swapping - * works according to SByteSwap and SWordSwap bits. - * 0: PCI slave data swapping is determined via - * SByteSwap and SWordSwap bits (bits 16 and 11), - * as in the GT-64120/130. - * 1: PCI slave data swapping is determined via PCISwap - * bits [25:24] in the PCI Access Control registers. - * 21:21 MSwapEn PCI Master Swap Enable - * 0: PCI master data swapping is determined via - * MByteSwap and MWordSwap bits (bits 0 and 10), - * as in the GT-64120/130. - * 1: PCI master data swapping is determined via - * PCISwap bits in CPU to PCI Address Decoding - * registers. - * 22:22 MIntSwapEn PCI Master Configuration Transactions Data Swap Enable - * NOTE: Reserved for Galileo Technology usage. - * 0: Disable (The PCI master configuration transaction - * to the PCI bus is always in Little Endian convention) - * 1: Enable (The PCI master configuration transaction to - * the PCI bus is determined according to the setting - * of MSwapEn bit) - * 23:23 LBEn PCI Loop Back Enable - * NOTE: Reserved for Galileo Technology usage. - * 0: Disable (The PCI slave does not respond to - * transactions initiated by the PCI master) - * 1: Enable (The PCI slave does respond to - * transactions initiated by the PCI master, - * if targeted to the slave (address match) - * 26:24 SIntSwap PCI Slave data swap control on PCI accesses to the - * GT64260 internal and configuration registers. - * Bits encoding are the same as bits[26:24] in PCI Access - * Control registers. - * 27:27 Reserved Must be 0. - * 31:28 Reserved Read only. - */ -#define PCI_CMD_MByteSwap PCI__BIT(0) -#define PCI_CMD_MBZ0_2 PCI__BIT(2) -#define PCI_CMD_MWrCom PCI__BIT(4) -#define PCI_CMD_MRdCom PCI__BIT(5) -#define PCI_CMD_MWrTrig PCI__BIT(6) -#define PCI_CMD_MRdTrig PCI__BIT(7) -#define PCI_CMD_MRdLine PCI__BIT(8) -#define PCI_CMD_MRdMul PCI__BIT(9) -#define PCI_CMD_MWordSwap PCI__BIT(10) -#define PCI_CMD_SWordSwap PCI__BIT(11) -#define PCI_CMD_IntBusCtl PCI__BIT(12) -#define PCI_CMD_SBDis PCI__BIT(13) -#define PCI_CMD_MBZ0_14 PCI__BIT(14) -#define PCI_CMD_MReq64 PCI__BIT(15) -#define PCI_CMD_SByteSwap PCI__BIT(16) -#define PCI_CMD_MDCAEn PCI__BIT(17) -#define PCI_CMD_M64Allign PCI__BIT(18) -#define PCI_CMD_PErrProp PCI__BIT(19) -#define PCI_CMD_SSwapEn PCI__BIT(20) -#define PCI_CMD_MSwapEn PCI__BIT(21) -#define PCI_CMD_MIntSwapEn PCI__BIT(22) -#define PCI_CMD_LBEn PCI__BIT(23) -#define PCI_CMD_SIntSwap_GET(v) PCI__EXT(v, 24, 3) -#define PCI_CMD_MBZ0_27 PCI__BIT(27) - - -/* - * Table 256: PCI Mode - * 00:00 PciID PCI Interface ID -- Read Only (PCI_0: 0x0; PCI_1: 0x1) - * 01:01 Reserved - * 02:02 Pci64 64-bit PCI Interface -- Read Only - * When set to 1, the PCI interface is configured to a - * 64 bit interface. - * 07:03 Reserved - * 08:08 ExpRom Expansion ROM Enable -- Read Only from PCI - * When set to 1, the expansion ROM BAR is enabled. - * 09:09 VPD VPD Enable -- Read Only from PCI - * When set to 1, VPD is supported. - * 10:10 MSI MSI Enable -- Read Only from PCI - * When set to 1, MSI is supported. - * 11:11 PMG Power Management Enable -- Read Only from PCI - * When set to 1, PMG is supported. - * 12:12 HotSwap CompactPCI Hot Swap Enable -- Read Only from PCI - * When set to 1, HotSwap is supported. - * 13:13 BIST BIST Enable -- Read only from PCI - * If set to 1, BIST is enabled. - * 30:14 Reserved - * 31:31 PRst PCI Interface Reset Indication -- Read Only - * Set to 0 as long as the RST* pin is asserted. - */ -#define PCI_MODE_PciID_GET(v) PCI__EXT(v, 0, 1) -#define PCI_MODE_Pci64 PCI__BIT(2) -#define PCI_MODE_ExpRom PCI__BIT(8) -#define PCI_MODE_VPD PCI__BIT(9) -#define PCI_MODE_MSI PCI__BIT(10) -#define PCI_MODE_PMG PCI__BIT(11) -#define PCI_MODE_HotSwap PCI__BIT(12) -#define PCI_MODE_BIST PCI__BIT(13) -#define PCI_MODE_PRst PCI__BIT(31) - -/* - * Table 257: PCI Timeout and Retry - * 07:00 Timeout0 Specifies the number of PClk cycles the GT64260 slave - * holds the PCI bus before terminating a transaction - * with RETRY. - * 15:08 Timeout1 Specifies the number of PClk cycles the GT64260 slave - * holds the PCI bus before terminating a transaction - * with DISCONNECT. - * 23:16 RetryCtr Retry Counter - * Specifies the number of retries of the GT64260 Master. - * The GT64260 generates an interrupt when this timer - * expires. A 0x00 value means a retry forever. - * 31:24 Reserved - */ -#define PCI_TMORTRY_Timeout0_GET(v) PCI__EXT(v, 0, 8) -#define PCI_TMORTRY_Timeout1_GET(v) PCI__EXT(v, 8, 8) -#define PCI_TMORTRY_RetryCtr_GET(v) PCI__EXT(v, 16, 8) - - -/* - * Table 258: PCI Read Buffer Discard Timer - * 15:00 Timer Specifies the number of PClk cycles the GT64260 - * slave keeps an non-accessed read buffers (non com- - * pleted delayed read) before invalidating the buffer. - * 23:16 RdBufEn Slave Read Buffers Enable - * Each bit corresponds to one of the eight read buffers. - * If set to 1, buffer is enabled. - * 31:24 Reserved - */ -#define PCI_RdBufDisTmr_Timer_GET(v) PCI__EXT(v, 0, 16) -#define PCI_RdBufDisTmr_RdBufEn_GET(v) PCI__EXT(v, 16, 8) -#define PCI_RdBufDisTmr_RdBufEn0(v) PCI__BIT(16) -#define PCI_RdBufDisTmr_RdBufEn1(v) PCI__BIT(17) -#define PCI_RdBufDisTmr_RdBufEn2(v) PCI__BIT(18) -#define PCI_RdBufDisTmr_RdBufEn3(v) PCI__BIT(19) -#define PCI_RdBufDisTmr_RdBufEn4(v) PCI__BIT(20) -#define PCI_RdBufDisTmr_RdBufEn5(v) PCI__BIT(21) -#define PCI_RdBufDisTmr_RdBufEn6(v) PCI__BIT(22) -#define PCI_RdBufDisTmr_RdBufEn7(v) PCI__BIT(23) - -/* - * Table 259: MSI Trigger Timer - * 15:00 Timer Specifies the number of TClk cycles between consecutive - * MSI requests. - * 31:16 Reserved - */ -#define PCI_MSITrigger_Timer_GET(v) PCI__EXT(v, 0, 16) - -/* - * Table 260: PCI Arbiter Control - * NOTE: If HPPV (bits [28:21]) is set to 0 and PAEn is set to 1, - * priority scheme is reversed. This means that high priority - * requests are granted if no low priority request is pending. - * 00:00 Reserved Must be 0. 0x0 - * 01:01 BDEn Broken Detection Enable - * If set to 1, broken master detection is enabled. A mas- - * ter is said to be broken if it fails to respond to grant - * assertion within a window specified in BV (bits [6:3]). - * 02:02 PAEn Priority Arbitration Enable - * 0: Low priority requests are granted only when no high - * priority request is pending - * 1: Weighted round robin arbitration is performed - * between high priority and low priority groups. - * 06:03 BV Broken Value - * This value sets the maximum number of cycles that the - * arbiter waits for a PCI master to respond to its grant - * assertion. If a PCI master fails to assert FRAME* within - * this time, the PCI arbiter aborts the transaction and - * performs a new arbitration cycle and a maskable - * interrupt is generated. Must be greater than 0. - * NOTE: The PCI arbiter waits for the current - * transaction to end before starting to - * count the wait-for-broken cycles. - * Must be greater than 1 for masters that performs address - * stepping (such as the GTO 64260 PCI master), since they - * require GNT* assertion for two cycles. - * 13:07 P[6:0] Priority - * These bits assign priority levels to the requests - * connected to the PCI arbiter. When a PM bit is set to - * 1, priority of the associated request is high. The - * mapping between P[6:0] bits and the request/grant pairs - * are as follows: - * P[0]: internal PCI master P[1]: external REQ0/GNT0 - * P[2]: external REQ1/GNT1 P[3]: external REQ2/GNT2 - * P[4]: external REQ3/GNT3 P[5]: external REQ4/GNT4 - * P[6]: external REQ5/GNT5 - * 20:14 PD[6:0] Parking Disable - * Use these bits to disable parking on any of the PCI - * masters. When a PD bit is set to 1, parking on the - * associated PCI master is disabled. - * NOTE: The arbiter parks on the last master granted - * unless disabled through the PD bit. Also, if - * PD bits are all 1, the PCI arbiter parks on - * the internal PCI master. - * 28:21 HPPV High Priority Preset Value - * This is the preset value of the high priority counter - * (High_cnt). This counter decrements each time a high - * priority request is granted. When the counter reaches - * zero, it reloads with this preset value. The counter - * reloads when a low priority request is granted. - * 30:29 Reserved - * 31:31 EN Enable - * Setting this bit to 1 enables operation of the arbiter. - */ -#define PCI_ARBCTL_MBZ0_0 PCI__BIT(0) -#define PCI_ARBCTL_BDEn PCI__BIT(1) -#define PCI_ARBCTL_PAEn PCI__BIT(2) -#define PCI_ARBCTL_BV_GET(v) PCI__EXT(v, 3, 4) -#define PCI_ARBCTL_P_GET(v) PCI__EXT(v, 7, 7) -#define PCI_ARBCTL_PD_GET(v) PCI__EXT(v, 14, 7) -#define PCI_ARBCTL_HPPV_GET(v) PCI__EXT(v, 21, 7) -#define PCI_ARBCTL_EN PCI__BIT(31) - -#define PCI_ARBPRI_IntPci PCI__BIT(0) -#define PCI_ARBPRI_ExtReqGnt0 PCI__BIT(1) -#define PCI_ARBPRI_ExtReqGnt1 PCI__BIT(2) -#define PCI_ARBPRI_EXtReqGnt2 PCI__BIT(3) -#define PCI_ARBPRI_EXtReqGnt3 PCI__BIT(4) -#define PCI_ARBPRI_EXtReqGnt4 PCI__BIT(5) -#define PCI_ARBPRI_EXtReqGnt5 PCI__BIT(6) - -/* - * Table 261: PCI Interface Crossbar Control (Low) - * 03:00 Arb0 Slice 0 of PCI master pizza arbiter. - * 07:04 Arb1 Slice 1 of PCI master pizza arbiter. - * 11:08 Arb2 Slice 2 of PCI master pizza arbiter. - * 15:12 Arb3 Slice 3 of PCI master pizza arbiter. - * 19:16 Arb4 Slice 4 of PCI master pizza arbiter. - * 23:20 Arb5 Slice 5 of PCI master pizza arbiter. - * 27:24 Arb6 Slice 6 of PCI master pizza arbiter. - * 31:28 Arb7 Slice 7 of PCI master pizza arbiter. - */ -#define PCI_IFXBRCTL_GET_SLICE(v, n) PCI__EXT(v, (n) * 4, 4) -#define PCI_IFXBRCTL_SET_SLICE(v, n, s) ((void)(PCI__CLR(v, (n)*4, 4),\ - (v) |= PCI__INS((n)*4, s))) - -/* - * Table 262: PCI Interface Crossbar Control (High) - * 03:00 Arb8 Slice 8 of PCI master pizza arbiter. - * 07:04 Arb9 Slice 9 of PCI master pizza arbiter. - * 11:08 Arb10 Slice 10 of PCI master pizza arbiter. - * 15:12 Arb11 Slice 11 of PCI master pizza arbiter. - * 19:16 Arb12 Slice 12 of PCI master pizza arbiter. - * 23:20 Arb13 Slice 13 of PCI master pizza arbiter. - * 27:24 Arb14 Slice 14 of PCI master pizza arbiter. - * 31:28 Arb15 Slice 15 of PCI master pizza arbiter. - */ -#define PCI_IFXBRCH_GET_SLICE(v, n) PCI__EXT(v, ((n) - 8) * 4, 4) -#define PCI_IFXBRCH_SET_SLICE(v, n, s) ((void)(PCI__CLR(v, ((n)*-8)4, 4),\ - (v) |= PCI__INS(((n)-8)*4, s))) - -/* - * Table 263: PCI Interface Crossbar Timeout - (NOTE: Reserved for Galileo Technology usage.) - * 07:00 Timeout Crossbar Arbiter Timeout Preset Value - * 15:08 Reserved - * 16:16 TimeoutEn Crossbar Arbiter Timer Enable (1: Disable) - * 31:17 Reserved - */ -#define PCI_IFXBRTMO_Timeout_GET(v) PCI__EXT(v, 0, 8) -#define PCI_IFXBRTMO_TimeoutEn PCI__BIT(16) - -/* - * Table 264: PCI Read Response Crossbar Control (Low) - * 03:00 Arb0 Slice 0 of PCI slave pizza arbiter. - * 07:04 Arb1 Slice 1 of PCI slave pizza arbiter. - * 11:08 Arb2 Slice 2 of PCI slave pizza arbiter. - * 15:12 Arb3 Slice 3 of PCI slave pizza arbiter. - * 19:16 Arb4 Slice 4 of PCI slave pizza arbiter. - * 23:20 Arb5 Slice 5 of PCI slave pizza arbiter. - * 27:24 Arb6 Slice 6 of PCI slave pizza arbiter. - * 31:28 Arb7 Slice 7 of PCI slave pizza arbiter. - */ -#define PCI_RRXBRCL_GET_SLICE(v, n) PCI__EXT(v, (n) * 4, 4) -#define PCI_RRXBRCL_SET_SLICE(v, n, s) ((void)(PCI__CLR(v, (n)*4, 4),\ - (v) |= PCI__INS((n)*4, s))) - - -/* - * Table 265: PCI Read Response Crossbar Control (High) - * 03:00 Arb8 Slice 8 of PCI slave pizza arbiter. - * 07:04 Arb9 Slice 9 of PCI slave pizza arbiter. - * 11:08 Arb10 Slice 10 of PCI slave pizza arbiter. - * 15:12 Arb11 Slice 11 of PCI slave pizza arbiter. - * 19:16 Arb12 Slice 12 of PCI slave pizza arbiter. - * 23:20 Arb13 Slice 13 of PCI slave pizza arbiter. - * 27:24 Arb14 Slice 14 of PCI slave pizza arbiter. - * 31:28 Arb15 Slice 15 of PCI slave pizza arbiter. - */ -#define PCI_RRXBRCH_GET_SLICE(v, n) PCI__EXT(v, ((n) - 8) * 4, 4) -#define PCI_RRXBRCH_SET_SLICE(v, n, s) ((void)(PCI__CLR(v, ((n)*-8)4, 4),\ - (v) |= PCI__INS(((n)-8)*4, s))) - -/* - * Table 266: PCI Sync Barrier Virtual Register - * 31:0 SyncReg Sync Barrier Virtual Register - * PCI read from this register results in PCI slave sync barrier - * action. The returned data is un-deterministic. Read Only. - */ - -/* - * Table 267: PCI P2P Configuration - * 07:00 2ndBusL Secondary PCI Interface Bus Range Lower Boundary - * 15:08 2ndBusH Secondary PCI Interface Bus Range Upper Boundary - * 23:16 BusNum The PCI bus number to which the PCI interface - * is connected. - * 28:24 DevNum The PCI interface's device number. - * 31:29 Reserved Reserved. - */ -#define PCI_P2PCFG_2ndBusL_GET(v) PCI__EXT(v, 0, 8) -#define PCI_P2PCFG_2ndBusH_GET(v) PCI__EXT(v, 8, 8) -#define PCI_P2PCFG_BusNum_GET(v) PCI__EXT(v, 16, 8) -#define PCI_P2PCFG_DevNum_GET(v) PCI__EXT(v, 24, 5) - -/* - * Table 268: PCI P2P Swap Control - * 02:00 M0Sw P2P Mem0 BAR Swap Control - * 03:03 M0Req64 P2P Mem0 BAR Force REQ64 - * 06:04 M1Sw P2P Mem1 BAR Swap Control - * 07:07 M1Req64 P2P Mem1 BAR Force REQ64 - * 10:08 DM0Sw P2P DAC Mem0 BAR Swap Control - * 11:11 DM0Req64 P2P DAC Mem0 BAR Force REQ64 - * 14:12 DM1Sw P2P DAC Mem1 BAR Swap Control - * 15:15 DM1Req64 P2P DAC Mem1 BAR Force REQ64 - * 18:16 IOSw P2P I/O BAR Swap Control - * 19:19 Reserved - * 22:20 CfgSw P2P Configuration Swap Control - * 31:19 Reserved - */ -#define PCI_P2PSWAP_M0Sw_GET(v) PCI__EXT(v, 0, 3) -#define PCI_P2PSWAP_M0Req64 PCI__BIT(3) -#define PCI_P2PSWAP_M1Sw_GET(v) PCI__EXT(v, 4, 3) -#define PCI_P2PSWAP_M1Req64 PCI__BIT(7) -#define PCI_P2PSWAP_DM0Sw_GET(v) PCI__EXT(v, 8, 3) -#define PCI_P2PSWAP_DM0Req64 PCI__BIT(11) -#define PCI_P2PSWAP_DM1Sw_GET(v) PCI__EXT(v, 12, 3) -#define PCI_P2PSWAP_DM1Req64 PCI__BIT(15) -#define PCI_P2PSWAP_CfgSw_GET(v) PCI__EXT(v, 20, 3) - - - -/* - * Table 269: PCI Access Control Base (Low) - * 11:00 Addr Base Address Corresponds to address bits[31:20]. - * 12:12 PrefetchEn Read Prefetch Enable - * 0: Prefetch disabled (The PCI slave reads single words) - * 1: Prefetch enabled. - * 14:14 Reserved Must be 0 - * 15:15 Reserved - * 16:16 RdPrefetch PCI Read Aggressive Prefetch Enable; 0: Disable; - * 1: Enable (The PCI slave prefetches two - * bursts in advance) - * 17:17 RdLinePrefetch PCI Read Line Aggressive Prefetch Enable; 0: Disable; - * 1: Enable (PCI slave prefetch two bursts in advance) - * 18:18 RdMulPrefetch PCI Read Multiple Aggressive Prefetch Enable - * 0: Disable; 1: Enable (PCI slave prefetch two bursts in - * advance) - * 19:19 Reserved - * 21:20 MBurst PCI Max Burst - * Specifies the maximum burst size for a single transac- - * tion between a PCI slave and the other interfaces - * 00 - 4 64-bit words - * 01 - 8 64-bit words - * 10 - 16 64-bit words - * 11 - Reserved - * 23:22 Reserved - * 25:24 PCISwap Data Swap Control - * 00 - Byte Swap - * 01 - No swapping - * 10 - Both byte and word swap - * 11 - Word swap - * 26:26 Reserved Must be 0 - * 27:27 Reserved - * 28:28 AccProt Access Protect (0: PCI access is allowed; 1; Region is - not accessible from PCI) - * 29:29 WrProt Write Protect (0: PCI write is allowed; 1: Region is - * not writeable from PCI) - * 31:30 Reserved - */ -#define PCI_ACCCTLBASEL_Addr_GET(v) PCI__EXT(v, 0, 12) -#define PCI_ACCCTLBASEL_PrefetchEn PCI__BIT(12) -#define PCI_ACCCTLBASEL_MBZ0_14 PCI__BIT(14) -#define PCI_ACCCTLBASEL_RdPrefetch PCI__BIT(16) -#define PCI_ACCCTLBASEL_RdLinePrefetch PCI__BIT(17) -#define PCI_ACCCTLBASEL_RdMulPrefetch PCI__BIT(18) -#define PCI_ACCCTLBASEL_WBurst PCI__EXT(v, 20, 2) -#define PCI_ACCCTLBASEL_WBurst_8_QW PCI__INS(20, PCI_WBURST_8_QW) -#define PCI_ACCCTLBASEL_PCISwap PCI__EXT(v, 24, 2) -#define PCI_ACCCTLBASEL_PCISwap_NoSwap PCI__INS(24, PCI_PCISWAP_NoSwap) -#define PCI_ACCCTLBASEL_MBZ0_26 PCI__BIT(26) -#define PCI_ACCCTLBASEL_AccProt PCI__BIT(28) -#define PCI_ACCCTLBASEL_WrProt PCI__BIT(29) - -#define PCI_WBURST_4_QW 0x00 -#define PCI_WBURST_8_QW 0x01 -#define PCI_WBURST_16_QW 0x02 -#define PCI_WBURST_Reserved 0x04 - -#define PCI_PCISWAP_ByteSwap 0x00 -#define PCI_PCISWAP_NoSwap 0x01 -#define PCI_PCISWAP_ByteWordSwap 0x02 -#define PCI_PCISWAP_WordSwap 0x04 - -/* - * Table 293: PCI Snoop Control Base (Low) - * 11:00 Addr Base Address Corresponds to address bits[31:20]. - * 13:12 Snoop Snoop Type - * 31:14 Reserved - */ -#define PCI_SNOOPCTL_ADDR(v) PCI__EXT(v, 0, 12) -#define PCI_SNOOPCTL_TYPE(v) PCI__EXT(v, 12, 2) - -#define PCI_SNOOP_None 0 /* no snoop */ -#define PCI_SNOOP_WT 1 /* Snoop to WT region */ -#define PCI_SNOOP_WB 2 /* Snoop to WB region */ - - -/* - * Table 305: PCI Configuration Address - * - * 07:02 RegNum Register number. - * 10:08 FunctNum Function number. - * 15:11 DevNum Device number. - * 23:16 BusNum Bus number. - * 31:31 ConfigEn When set, an access to the Configuration Data - * register is translated into a Configuration - * or Special cycle on the PCI bus. - */ -#define PCI_CFG_MAKE_TAG(bus, dev, fun, reg) (PCI__BIT(31)|\ - PCI__INS(16, (bus))|\ - PCI__INS(11, (dev))|\ - PCI__INS( 8, (fun))|\ - PCI__INS( 0, (reg))) -#define PCI_CFG_GET_BUSNO(tag) PCI__EXT(tag, 16, 8) -#define PCI_CFG_GET_DEVNO(tag) PCI__EXT(tag, 11, 5) -#define PCI_CFG_GET_FUNCNO(tag) PCI__EXT(tag, 8, 3) -#define PCI_CFG_GET_REGNO(tag) PCI__EXT(tag, 0, 8) - -/* - * Table 306: PCI Configuration Data - * - * 31:00 ConfigData The data is transferred to/from the PCI bus when - * the CPU accesses this register and the ConfigEn - * bit in the Configuration Address register is set - * - * A CPU access to this register causes the GT64260 to perform a Configuration - * or Special cycle on the PCI bus. - */ - - -/* - * Table 307: PCI Interrupt Acknowledge (This register is READ ONLY) - * 31:00 IntAck A CPU read access to this register forces an - * interrupt acknowledge cycle on the PCI bus. - */ - - -/* - * Table 308: PCI SERR* Mask - * - * NOTE: The GT64260 asserts SERR* only if SERR* is enabled via the PCI Status - * and Command register. - * If the corresponding bit is set, then asserts SERR* upon ... - */ -#define PCI_SERRMSK_SAPerr PCI__BIT(0) /* PCI slave detection of bad - * address parity. */ -#define PCI_SERRMSK_SWrPerr PCI__BIT(1) /* PCI slave detection of bad - * write data parity. */ -#define PCI_SERRMSK_SRdPerr PCI__BIT(2) /* a PERR* response to read - * data driven by the PCI - * slave. */ -#define PCI_SERRMSK_MAPerr PCI__BIT(4) /* a PERR* response to an - * address driven by the PCI - * master. */ -#define PCI_SERRMSK_MWrPerr PCI__BIT(5) /* a PERR* response to write - * data driven by the PCI - * master. */ -#define PCI_SERRMSK_MRdPerr PCI__BIT(6) /* bad data parity detection - * during a PCI master read - * transaction. */ -#define PCI_SERRMSK_MMabort PCI__BIT(8) /* a PCI master generation of - * master abort. */ -#define PCI_SERRMSK_MTabort PCI__BIT(9) /* a PCI master detection of - * target abort. */ -#define PCI_SERRMSK_MRetry PCI__BIT(11) /* a PCI master reaching retry - * counter limit. */ -#define PCI_SERRMSK_SMabort PCI__BIT(16) /* a PCI slave detection of - * master abort. */ -#define PCI_SERRMSK_STabort PCI__BIT(17) /* a PCI slave termination of - * a transaction with Target - * Abort. */ -#define PCI_SERRMSK_SAccProt PCI__BIT(18) /* a PCI slave access protect - * violation. */ -#define PCI_SERRMSK_SWrProt PCI__BIT(19) /* a PCI slave write protect - * violation. */ -#define PCI_SERRMSK_SRdBuf PCI__BIT(20) /* the PCI slave's read buffer, - * discard timer expires */ -#define PCI_SERRMSK_Arb PCI__BIT(21) /* the internal PCI arbiter - * detection of a broken PCI - * master. */ - -#define PCI_SERRMSK_ALL_ERRS \ - (PCI_SERRMSK_SAPerr|PCI_SERRMSK_SWrPerr|PCI_SERRMSK_SRdPerr \ - |PCI_SERRMSK_MAPerr|PCI_SERRMSK_MWrPerr|PCI_SERRMSK_MRdPerr \ - |PCI_SERRMSK_MMabort|PCI_SERRMSK_MTabort|PCI_SERRMSK_MRetry \ - |PCI_SERRMSK_SMabort|PCI_SERRMSK_STabort|PCI_SERRMSK_SAccProt \ - |PCI_SERRMSK_SWrProt|PCI_SERRMSK_SRdBuf|PCI_SERRMSK_Arb) - - - -/* - * Table 309: PCI Error Address (Low) -- Read Only. - * 31:00 ErrAddr PCI address bits [31:0] are latched upon an error - * condition. Upon address latch, no new addresses can - * be registered (due to additional error condition) until - * the register is being read. - */ - - - -/* - * Table 310: PCI Error Address (High) Applicable only when running DAC cycles. - * 31:00 ErrAddr PCI address bits [63:32] are latched upon - * error condition. - * - * NOTE: Upon data sample, no new data is latched until the PCI Error Low - * Address register is read. This means that PCI Error Low Address - * register must bethe last register read by the interrupt handler. - */ - -/* - * Table 311: PCI Error Data (Low) - * 31:00 ErrData PCI data bits [31:00] are latched upon error condition. - */ - -/* - * Table 312: PCI Error Data (High) Applicable only when running - * 64-bit cycles. - * 31:00 ErrData PCI data bits [63:32] are latched upon error condition. - */ - -/* - * Table 313: PCI Error Command - * 03:00 ErrCmd PCI command is latched upon error condition. - * 07:04 Reserved - * 15:08 ErrBE PCI byte enable is latched upon error condition. - * 16:16 ErrPAR PCI PAR is latched upon error condition. - * 17:17 ErrPAR64 PCI PAR64 is latched upon error condition. - * Applicable only when running 64-bit cycles. - * 31:18 Reserved - * NOTE: Upon data sample, no new data is latched until the PCI Error Low - * Address register is read. This means that PCI Error Low Address register - * must be the last register read by the interrupt handler. - */ -#define PCI_ERRCMD_Cmd_GET(v) PCI__EXT(v, 0, 4) -#define PCI_ERRCMD_ByteEn_GET(v) PCI__EXT(v, 8, 8) -#define PCI_ERRCMD_PAR PCI__BIT(16) -#define PCI_ERRCMD_PAR64 PCI__BIT(17) - -/* - * Table 314: PCI Interrupt Cause - * 1. All bits are Clear Only. A cause bit set upon error event occurrence. - * A write of 0 clears the bit. A write of 1 has no affect. - * 2. PCI Interrupt bits are organized in four groups: - * bits[ 7: 0] for address and data parity errors, - * bits[15: 8] for PCI master transaction failure (possible external - * target problem), - * bits[23:16] for slave response failure (possible external master problem), - * bits[26:24] for external PCI events that require CPU handle. - */ -#define PCI_IC_SAPerr PCI__BIT(0) /* The PCI slave detected - * bad address parity. */ -#define PCI_IC_SWrPerr PCI__BIT(1) /* The PCI slave detected - * bad write data parity. */ -#define PCI_IC_SRdPerr PCI__BIT(2) /* PERR* response to read - * data driven by PCI slave. */ -#define PCI_IC_MAPerr PCI__BIT(4) /* PERR* response to address - * driven by the PCI master. */ -#define PCI_IC_MWrPerr PCI__BIT(5) /* PERR* response to write data - * driven by the PCI master. */ -#define PCI_IC_MRdPerr PCI__BIT(6) /* Bad data parity detected - * during the PCI master read - * transaction. */ -#define PCI_IC_MMabort PCI__BIT(8) /* The PCI master generated - * master abort. */ -#define PCI_IC_MTabort PCI__BIT(9) /* The PCI master detected - * target abort. */ -#define PCI_IC_MMasterEn PCI__BIT(10) /* An attempt to generate a PCI - * transaction while master is - * not enabled. */ -#define PCI_IC_MRetry PCI__BIT(11) /* The PCI master reached - * retry counter limit. */ -#define PCI_IC_SMabort PCI__BIT(16) /* The PCI slave detects an il- - * legal master termination. */ -#define PCI_IC_STabort PCI__BIT(17) /* The PCI slave terminates a - * transaction with Target - * Abort. */ -#define PCI_IC_SAccProt PCI__BIT(18) /* A PCI slave access protect - * violation. */ -#define PCI_IC_SWrProt PCI__BIT(19) /* A PCI slave write protect - * violation. */ -#define PCI_IC_SRdBuf PCI__BIT(20) /* A PCI slave read buffer - * discard timer expired. */ -#define PCI_IC_Arb PCI__BIT(21) /* Internal PCI arbiter detec- - * tion of a broken master. */ -#define PCI_IC_BIST PCI__BIT(24) /* PCI BIST Interrupt */ -#define PCI_IC_PMG PCI__BIT(25) /* PCI Power Management - * Interrupt */ -#define PCI_IC_PRST PCI__BIT(26) /* PCI Reset Assert */ - -/* -31:27 Sel Specifies the error event currently being reported in the -Error Address, Error Data, and Error Command registers. -*/ -#define PCI_IC_SEL_GET(v) PCI__EXT((v), 27, 5) -#define PCI_IC_SEL_SAPerr 0x00 -#define PCI_IC_SEL_SWrPerr 0x01 -#define PCI_IC_SEL_SRdPerr 0x02 -#define PCI_IC_SEL_MAPerr 0x04 -#define PCI_IC_SEL_MWrPerr 0x05 -#define PCI_IC_SEL_MRdPerr 0x06 -#define PCI_IC_SEL_MMabort 0x08 -#define PCI_IC_SEL_MTabort 0x09 -#define PCI_IC_SEL_MMasterEn 0x0a -#define PCI_IC_SEL_MRetry 0x0b -#define PCI_IC_SEL_SMabort 0x10 -#define PCI_IC_SEL_STabort 0x11 -#define PCI_IC_SEL_SAccProt 0x12 -#define PCI_IC_SEL_SWrProt 0x13 -#define PCI_IC_SEL_SRdBuf 0x14 -#define PCI_IC_SEL_Arb 0x15 -#define PCI_IC_SEL_BIST 0x18 -#define PCI_IC_SEL_PMG 0x19 -#define PCI_IC_SEL_PRST 0x1a - -#define PCI_IC_SEL_Strings { \ - "SAPerr", "SWrPerr", "SRdPerr", "Rsvd#03", \ - "MAPerr", "MWrPerr", "MRdPerr", "Rsvd#07", \ - "MMabort", "MTabort", "MMasterEn", "MRetry", \ - "Rsvd#0c", "Rsvd#0d", "Rsvd#0e", "Rsvd#0f", \ - "SMabort", "STabort", "SAccProt", "SWrProt", \ - "SRdBuf", "Arb", "Rsvd#16", "Rsvd#17", \ - "BIST", "PMG", "PRST", "Rsvd#1b", \ - "Rsvd#1c", "Rsvd#1d", "Rsvd#1e", "Rsvd#1f" } - -/* - * Table 315: PCI Error Mask - * If the corresponding bit is 1, that interrupt is enabled - * Bits 3, 7, 12:15, 22:23, 27:31 are reserved. - */ -#define PCI_ERRMASK_SAPErr PCI__BIT(0) -#define PCI_ERRMASK_SWrPErr PCI__BIT(1) -#define PCI_ERRMASK_SRdPErr PCI__BIT(2) -#define PCI_ERRMASK_MAPErr PCI__BIT(4) -#define PCI_ERRMASK_MWRPErr PCI__BIT(5) -#define PCI_ERRMASK_MRDPErr PCI__BIT(6) -#define PCI_ERRMASK_MMAbort PCI__BIT(8) -#define PCI_ERRMASK_MTAbort PCI__BIT(9) -#define PCI_ERRMASK_MMasterEn PCI__BIT(10) -#define PCI_ERRMASK_MRetry PCI__BIT(11) -#define PCI_ERRMASK_SMAbort PCI__BIT(16) -#define PCI_ERRMASK_STAbort PCI__BIT(17) -#define PCI_ERRMASK_SAccProt PCI__BIT(18) -#define PCI_ERRMASK_SWrProt PCI__BIT(19) -#define PCI_ERRMASK_SRdBuf PCI__BIT(20) -#define PCI_ERRMASK_Arb PCI__BIT(21) -#define PCI_ERRMASK_BIST PCI__BIT(24) -#define PCI_ERRMASK_PMG PCI__BIT(25) -#define PCI_ERRMASK_PRST PCI__BIT(26) - -#endif /* _DEV_GTPCIREG_H_ */ diff --git a/c/src/lib/libbsp/powerpc/beatnik/marvell/gtreg.h b/c/src/lib/libbsp/powerpc/beatnik/marvell/gtreg.h deleted file mode 100644 index a6c87e2047..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/marvell/gtreg.h +++ /dev/null @@ -1,854 +0,0 @@ -/* $NetBSD: gtreg.h,v 1.2 2005/02/27 00:27:21 perry Exp $ */ - -/* - * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. - * All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Allegro Networks, Inc., and Wasabi Systems, Inc. - * 4. The name of Allegro Networks, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * 5. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND - * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC. - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DISCOVERY_DEV_GTREG_H_ -#define _DISCOVERY_DEV_GTREG_H_ - - -#define GT__BIT(bit) (1U << (bit)) -#define GT__MASK(bit) (GT__BIT(bit) - 1) -#define GT__EXT(data, bit, len) (((data) >> (bit)) & GT__MASK(len)) -#define GT__CLR(data, bit, len) ((data) &= ~(GT__MASK(len) << (bit))) -#define GT__INS(new, bit) ((new) << (bit)) - - -/* - * Table 30: CPU Address Decode Register Map - */ -#define GT_SCS0_Low_Decode 0x0008 -#define GT_SCS0_High_Decode 0x0010 -#define GT_SCS1_Low_Decode 0x0208 -#define GT_SCS1_High_Decode 0x0210 -#define GT_SCS2_Low_Decode 0x0018 -#define GT_SCS2_High_Decode 0x0020 -#define GT_SCS3_Low_Decode 0x0218 -#define GT_SCS3_High_Decode 0x0220 -#define GT_CS0_Low_Decode 0x0028 -#define GT_CS0_High_Decode 0x0030 -#define GT_CS1_Low_Decode 0x0228 -#define GT_CS1_High_Decode 0x0230 -#define GT_CS2_Low_Decode 0x0248 -#define GT_CS2_High_Decode 0x0250 -#define GT_CS3_Low_Decode 0x0038 -#define GT_CS3_High_Decode 0x0040 -#define GT_BootCS_Low_Decode 0x0238 -#define GT_BootCS_High_Decode 0x0240 -#define GT_PCI0_IO_Low_Decode 0x0048 -#define GT_PCI0_IO_High_Decode 0x0050 -#define GT_PCI0_Mem0_Low_Decode 0x0058 -#define GT_PCI0_Mem0_High_Decode 0x0060 -#define GT_PCI0_Mem1_Low_Decode 0x0080 -#define GT_PCI0_Mem1_High_Decode 0x0088 -#define GT_PCI0_Mem2_Low_Decode 0x0258 -#define GT_PCI0_Mem2_High_Decode 0x0260 -#define GT_PCI0_Mem3_Low_Decode 0x0280 -#define GT_PCI0_Mem3_High_Decode 0x0288 -#define GT_PCI1_IO_Low_Decode 0x0090 -#define GT_PCI1_IO_High_Decode 0x0098 -#define GT_PCI1_Mem0_Low_Decode 0x00a0 -#define GT_PCI1_Mem0_High_Decode 0x00a8 -#define GT_PCI1_Mem1_Low_Decode 0x00b0 -#define GT_PCI1_Mem1_High_Decode 0x00b8 -#define GT_PCI1_Mem2_Low_Decode 0x02a0 -#define GT_PCI1_Mem2_High_Decode 0x02a8 -#define GT_PCI1_Mem3_Low_Decode 0x02b0 -#define GT_PCI1_Mem3_High_Decode 0x02b8 -#define GT_Internal_Decode 0x0068 -#define GT_CPU0_Low_Decode 0x0290 -#define GT_CPU0_High_Decode 0x0298 -#define GT_CPU1_Low_Decode 0x02c0 -#define GT_CPU1_High_Decode 0x02c8 -/* ts, 2005/8: it seems that these are implicitely written - * when setting the 'Low_Decode' regs... - */ -#define GT_PCI0_IO_Remap 0x00f0 -#define GT_PCI0_Mem0_Remap_Low 0x00f8 -#define GT_PCI0_Mem0_Remap_High 0x0320 -#define GT_PCI0_Mem1_Remap_Low 0x0100 -#define GT_PCI0_Mem1_Remap_High 0x0328 -#define GT_PCI0_Mem2_Remap_Low 0x02f8 -#define GT_PCI0_Mem2_Remap_High 0x0330 -#define GT_PCI0_Mem3_Remap_Low 0x0300 -#define GT_PCI0_Mem3_Remap_High 0x0338 -#define GT_PCI1_IO_Remap 0x0108 -#define GT_PCI1_Mem0_Remap_Low 0x0110 -#define GT_PCI1_Mem0_Remap_High 0x0340 -#define GT_PCI1_Mem1_Remap_Low 0x0118 -#define GT_PCI1_Mem1_Remap_High 0x0348 -#define GT_PCI1_Mem2_Remap_Low 0x0310 -#define GT_PCI1_Mem2_Remap_High 0x0350 -#define GT_PCI1_Mem3_Remap_Low 0x0318 -#define GT_PCI1_Mem3_Remap_High 0x0358 - - -/* - * Table 31: CPU Control Register Map - */ -#define GT_CPU_Cfg 0x0000 -#define GT_CPU_Mode 0x0120 -#define GT_CPU_Master_Ctl 0x0160 -#define GT_CPU_If_Xbar_Ctl_Low 0x0150 -#define GT_CPU_If_Xbar_Ctl_High 0x0158 -#define GT_CPU_If_Xbar_Timeout 0x0168 -#define GT_260_CPU_Rd_Rsp_Xbar_Ctl_Low 0x0170 -#define GT_260_CPU_Rd_Rsp_Xbar_Ctl_High 0x0178 - -/* - * Table 32: CPU Sync Barrier Register Map - */ -#define GT_260_PCI_Sync_Barrier(bus) (0x00c0 | ((bus) << 3)) -#define GT_260_PCI0_Sync_Barrier 0x00c0 -#define GT_260_PCI1_Sync_Barrier 0x00c8 - -/* - * Table 33: CPU Access Protection Register Map - */ -#define GT_Protect_Low_0 0x0180 -#define GT_Protect_High_0 0x0188 -#define GT_Protect_Low_1 0x0190 -#define GT_Protect_High_1 0x0198 -#define GT_Protect_Low_2 0x01a0 -#define GT_Protect_High_2 0x01a8 -#define GT_Protect_Low_3 0x01b0 -#define GT_Protect_High_3 0x01b8 -#define GT_260_Protect_Low_4 0x01c0 -#define GT_260_Protect_High_4 0x01c8 -#define GT_260_Protect_Low_5 0x01d0 -#define GT_260_Protect_High_5 0x01d8 -#define GT_260_Protect_Low_6 0x01e0 -#define GT_260_Protect_High_6 0x01e8 -#define GT_260_Protect_Low_7 0x01f0 -#define GT_260_Protect_High_7 0x01f8 - -/* - * Table 34: Snoop Control Register Map - */ -#define GT_260_Snoop_Base_0 0x0380 -#define GT_260_Snoop_Top_0 0x0388 -#define GT_260_Snoop_Base_1 0x0390 -#define GT_260_Snoop_Top_1 0x0398 -#define GT_260_Snoop_Base_2 0x03a0 -#define GT_260_Snoop_Top_2 0x03a8 -#define GT_260_Snoop_Base_3 0x03b0 -#define GT_260_Snoop_Top_3 0x03b8 - -/* - * Table 35: CPU Error Report Register Map - */ -#define GT_CPU_Error_Address_Low 0x0070 -#define GT_CPU_Error_Address_High 0x0078 -#define GT_CPU_Error_Data_Low 0x0128 -#define GT_CPU_Error_Data_High 0x0130 -#define GT_CPU_Error_Parity 0x0138 -#define GT_CPU_Error_Cause 0x0140 -#define GT_CPU_Error_Mask 0x0148 - -#define GT_DecodeAddr_SET(g, r, v) \ - do { \ - gt_read((g), GT_Internal_Decode); \ - gt_write((g), (r), ((v) & 0xfff00000) >> 20); \ - while ((gt_read((g), (r)) & 0xfff) != ((v) >> 20)); \ - } while (0) - -#define GT_LowAddr_GET(v) (GT__EXT((v), 0, 12) << 20) -#define GT_HighAddr_GET(v) ((GT__EXT((v), 0, 12) << 20) | 0xfffff) - -#define GT_MPP_Control0 0xf000 -#define GT_MPP_Control1 0xf004 -#define GT_MPP_Control2 0xf008 -#define GT_MPP_Control3 0xf00c - -#define GT_GPP_IO_Control 0xf100 -#define GT_GPP_Level_Control 0xf110 -#define GT_GPP_Value 0xf104 -#define GT_GPP_Interrupt_Cause 0xf108 -#define GT_GPP_Interrupt_Mask 0xf10c -/* - * Table 36: SCS[0]* Low Decode Address, Offset: 0x008 - * Table 38: SCS[1]* Low Decode Address, Offset: 0x208 - * Table 40: SCS[2]* Low Decode Address, Offset: 0x018 - * Table 42: SCS[3]* Low Decode Address, Offset: 0x218 - * Table 44: CS[0]* Low Decode Address, Offset: 0x028 - * Table 46: CS[1]* Low Decode Address, Offset: 0x228 - * Table 48: CS[2]* Low Decode Address, Offset: 0x248 - * Table 50: CS[3]* Low Decode Address, Offset: 0x038 - * Table 52: BootCS* Low Decode Address, Offset: 0x238 - * Table 75: CPU 0 Low Decode Address, Offset: 0x290 - * Table 77: CPU 1 Low Decode Address, Offset: 0x2c0 - * - * 11:00 LowAddr SCS[0] Base Address - * 31:12 Reserved Must be 0. - */ - -/* - * Table 37: SCS[0]* High Decode Address, Offset: 0x010 - * Table 39: SCS[1]* High Decode Address, Offset: 0x210 - * Table 41: SCS[2]* High Decode Address, Offset: 0x020 - * Table 43: SCS[3]* High Decode Address, Offset: 0x220 - * Table 45: CS[0]* High Decode Address, Offset: 0x030 - * Table 47: CS[1]* High Decode Address, Offset: 0x230 - * Table 49: CS[2]* High Decode Address, Offset: 0x250 - * Table 51: CS[3]* High Decode Address, Offset: 0x040 - * Table 53: BootCS* High Decode Address, Offset: 0x240 - * Table 76: CPU 0 High Decode Address, Offset: 0x298 - * Table 78: CPU 1 High Decode Address, Offset: 0x2c8 - * - * 11:00 HighAddr SCS[0] Top Address - * 31:12 Reserved - */ - -/* - * Table 54: PCI_0 I/O Low Decode Address, Offset: 0x048 - * Table 56: PCI_0 Memory 0 Low Decode Address, Offset: 0x058 - * Table 58: PCI_0 Memory 1 Low Decode Address, Offset: 0x080 - * Table 60: PCI_0 Memory 2 Low Decode Address, Offset: 0x258 - * Table 62: PCI_0 Memory 3 Low Decode Address, Offset: 0x280 - * Table 64: PCI_1 I/O Low Decode Address, Offset: 0x090 - * Table 66: PCI_1 Memory 0 Low Decode Address, Offset: 0x0a0 - * Table 68: PCI_1 Memory 1 Low Decode Address, Offset: 0x0b0 - * Table 70: PCI_1 Memory 2 Low Decode Address, Offset: 0x2a0 - * Table 72: PCI_1 Memory 3 Low Decode Address, Offset: 0x2b0 - * - * 11:00 LowAddr PCI IO/Memory Space Base Address - * 23:12 Reserved - * 26:24 PCISwap PCI Master Data Swap Control (0: Byte Swap; - * 1: No swapping; 2: Both byte and word swap; - * 3: Word swap; 4..7: Reserved) - * 27:27 PCIReq64 PCI master REQ64* policy (Relevant only when - * configured to 64-bit PCI bus and not I/O) - * 0: Assert s REQ64* only when transaction - * is longer than 64-bits. - * 1: Always assert REQ64*. - * 31:28 Reserved - */ -#define GT_PCISwap_GET(v) GT__EXT((v), 24, 3) -#define GT_PCISwap_ByteSwap 0 -#define GT_PCISwap_NoSwap 1 -#define GT_PCISwap_ByteWordSwap 2 -#define GT_PCISwap_WordSwap 3 -#define GT_PCI_LowDecode_PCIReq64 GT__BIT(27) - -/* - * Table 55: PCI_0 I/O High Decode Address, Offset: 0x050 - * Table 57: PCI_0 Memory 0 High Decode Address, Offset: 0x060 - * Table 59: PCI_0 Memory 1 High Decode Address, Offset: 0x088 - * Table 61: PCI_0 Memory 2 High Decode Address, Offset: 0x260 - * Table 63: PCI_0 Memory 3 High Decode Address, Offset: 0x288 - * Table 65: PCI_1 I/O High Decode Address, Offset: 0x098 - * Table 67: PCI_1 Memory 0 High Decode Address, Offset: 0x0a8 - * Table 69: PCI_1 Memory 1 High Decode Address, Offset: 0x0b8 - * Table 71: PCI_1 Memory 2 High Decode Address, Offset: 0x2a8 - * Table 73: PCI_1 Memory 3 High Decode Address, Offset: 0x2b8 - * - * 11:00 HighAddr PCI_0 I/O Space Top Address - * 31:12 Reserved - */ - -/* - * Table 74: Internal Space Decode, Offset: 0x068 - * 15:00 IntDecode GT64260 Internal Space Base Address - * 23:16 Reserved - * 26:24 PCISwap Same as PCI_0 Memory 0 Low Decode Address. - * NOTE: Reserved for Galileo Technology usage. - * Relevant only for PCI master configuration - * transactions on the PCI bus. - * 31:27 Reserved - */ - -/* - * Table 79: PCI_0 I/O Address Remap, Offset: 0x0f0 - * Table 80: PCI_0 Memory 0 Address Remap Low, Offset: 0x0f8 - * Table 82: PCI_0 Memory 1 Address Remap Low, Offset: 0x100 - * Table 84: PCI_0 Memory 2 Address Remap Low, Offset: 0x2f8 - * Table 86: PCI_0 Memory 3 Address Remap Low, Offset: 0x300 - * Table 88: PCI_1 I/O Address Remap, Offset: 0x108 - * Table 89: PCI_1 Memory 0 Address Remap Low, Offset: 0x110 - * Table 91: PCI_1 Memory 1 Address Remap Low, Offset: 0x118 - * Table 93: PCI_1 Memory 2 Address Remap Low, Offset: 0x310 - * Table 95: PCI_1 Memory 3 Address Remap Low, Offset: 0x318 - * - * 11:00 Remap PCI IO/Memory Space Address Remap (31:20) - * 31:12 Reserved - */ - -/* - * Table 81: PCI_0 Memory 0 Address Remap High, Offset: 0x320 - * Table 83: PCI_0 Memory 1 Address Remap High, Offset: 0x328 - * Table 85: PCI_0 Memory 2 Address Remap High, Offset: 0x330 - * Table 87: PCI_0 Memory 3 Address Remap High, Offset: 0x338 - * Table 90: PCI_1 Memory 0 Address Remap High, Offset: 0x340 - * Table 92: PCI_1 Memory 1 Address Remap High, Offset: 0x348 - * Table 94: PCI_1 Memory 2 Address Remap High, Offset: 0x350 - * Table 96: PCI_1 Memory 3 Address Remap High, Offset: 0x358 - * - * 31:00 Remap PCI Memory Address Remap (high 32 bits) - */ - -/* - * Table 97: CPU Configuration, Offset: 0x000 - * 07:00 NoMatchCnt CPU Address Miss Counter - * 08:08 NoMatchCntEn CPU Address Miss Counter Enable - * NOTE: Relevant only if multi-GT is enabled. - * (0: Disabled; 1: Enabled) - * 09:09 NoMatchCntExt CPU address miss counter MSB - * 10:10 Reserved - * 11:11 AACKDelay Address Acknowledge Delay - * 0: AACK* is asserted one cycle after TS*. - * 1: AACK* is asserted two cycles after TS*. - * 12:12 Endianess Must be 0 - * NOTE: The GT64260 does not support the PowerPC - * Little Endian convention - * 13:13 Pipeline Pipeline Enable - * 0: Disabled. The GT64260 will not respond with - * AACK* to a new CPU transaction, before the - * previous transaction data phase completes. - * 1: Enabled. - * 14:14 Reserved - * 15:15 TADelay Transfer Acknowledge Delay - * 0: TA* is asserted one cycle after AACK* - * 1: TA* is asserted two cycles after AACK* - * 16:16 RdOOO Read Out of Order Completion - * 0: Not Supported, Data is always returned in - * order (DTI[0-2] is always driven - * 1: Supported - * 17:17 StopRetry Relevant only if PCI Retry is enabled - * 0: Keep Retry all PCI transactions targeted - * to the GT64260. - * 1: Stop Retry of PCI transactions. - * 18:18 MultiGTDec Multi-GT Address Decode - * 0: Normal address decoding - * 1: Multi-GT address decoding - * 19:19 DPValid CPU DP[0-7] Connection. CPU write parity ... - * 0: is not checked. (Not connected) - * 1: is checked (Connected) - * 21:20 Reserved - * 22:22 PErrProp Parity Error Propagation - * 0: GT64260 always drives good parity on - * DP[0-7] during CPU reads. - * 1: GT64260 drives bad parity on DP[0-7] in case - * the read response from the target interface - * comes with erroneous data indication - * (e.g. ECC error from SDRAM interface). - * 25:23 Reserved - * 26:26 APValid CPU AP[0-3] Connection. CPU address parity ... - * 0: is not checked. (Not connected) - * 1: is checked (Connected) - * 27:27 RemapWrDis Address Remap Registers Write Control - * 0: Write to Low Address decode register. - * Results in writing of the corresponding - * Remap register. - * 1: Write to Low Address decode register. No - * affect on the corresponding Remap register. - * 28:28 ConfSBDis Configuration Read Sync Barrier Disable - * 0: enabled; 1: disabled - * 29:29 IOSBDis I/O Read Sync Barrier Disable - * 0: enabled; 1: disabled - * 30:30 ClkSync Clocks Synchronization - * 0: The CPU interface is running with SysClk, - * which is asynchronous to TClk. - * 1: The CPU interface is running with TClk. - * 31:31 Reserved - */ -#define GT_CPUCfg_NoMatchCnt_GET(v) GT__EXT((v), 0, 8) -#define GT_CPUCfg_NoMatchCntEn GT__BIT( 9) -#define GT_CPUCfg_NoMatchCntExt GT__BIT(10) -#define GT_CPUCfg_AACKDelay GT__BIT(11) -#define GT_CPUCfg_Endianess GT__BIT(12) -#define GT_CPUCfg_Pipeline GT__BIT(13) -#define GT_CPUCfg_TADelay GT__BIT(15) -#define GT_CPUCfg_RdOOO GT__BIT(16) -#define GT_CPUCfg_StopRetry GT__BIT(17) -#define GT_CPUCfg_MultiGTDec GT__BIT(18) -#define GT_CPUCfg_DPValid GT__BIT(19) -#define GT_CPUCfg_PErrProp GT__BIT(22) -#define GT_CPUCfg_APValid GT__BIT(26) -#define GT_CPUCfg_RemapWrDis GT__BIT(27) -#define GT_CPUCfg_ConfSBDis GT__BIT(28) -#define GT_CPUCfg_IOSBDis GT__BIT(29) -#define GT_CPUCfg_ClkSync GT__BIT(30) - -/* - * Table 98: CPU Mode, Offset: 0x120, Read only - * 01:00 MultiGTID Multi-GT ID - * Represents the ID to which the GT64260 responds - * to during a multi-GT address decoding period. - * 02:02 MultiGT (0: Single; 1: Multiple) GT configuration - * 03:03 RetryEn (0: Don't; 1: Do) Retry PCI transactions - * 07:04 CPUType - * 0x0-0x3: Reserved - * 0x4: 64-bit PowerPC CPU, 60x bus - * 0x5: 64-bit PowerPC CPU, MPX bus - * 0x6-0xf: Reserved - * 31:08 Reserved - */ -#define GT_CPUMode_MultiGTID_GET(v) GT__EXT(v, 0, 2) -#define GT_CPUMode_MultiGT GT__BIT(2) -#define GT_CPUMode_RetryEn GT__BIT(3) -#define GT_CPUMode_CPUType_GET(v) GT__EXT(v, 4, 4) - -/* - * Table 99: CPU Master Control, Offset: 0x160 - * 07:00 Reserved - * 08:08 IntArb CPU Bus Internal Arbiter Enable - * NOTE: Only relevant to 60x bus mode. When - * running MPX bus, the GT64260 internal - * arbiter must be used. - * 0: Disabled. External arbiter is required. - * 1: Enabled. Use the GT64260 CPU bus arbiter. - * 09:09 IntBusCtl CPU Interface Unit Internal Bus Control - * NOTE: This bit must be set to 1. It is reserved - * for Galileo Technology usage. - * 0: Enable internal bus sharing between master - * and slave interfaces. - * 1: Disable internal bus sharing between master - * and slave interfaces. - * 10:10 MWrTrig Master Write Transaction Trigger - * 0: With first valid write data - * 1: With last valid write data - * 11:11 MRdTrig Master Read Response Trigger - * 0: With first valid read data - * 1: With last valid read data - * 12:12 CleanBlock Clean Block Snoop Transaction Support - * 0: CPU does not support clean block (603e,750) - * 1: CPU supports clean block (604e,G4) - * 13:13 FlushBlock Flush Block Snoop Transaction Support - * 0: CPU does not support flush block (603e,750) - * 1: CPU supports flush block (604e,G4) - * 31:14 Reserved - */ -#define GT_CPUMstrCtl_IntArb GT__BIT(8) -#define GT_CPUMstrCtl_IntBusCtl GT__BIT(9) -#define GT_CPUMstrCtl_MWrTrig GT__BIT(10) -#define GT_CPUMstrCtl_MRdTrig GT__BIT(11) -#define GT_CPUMstrCtl_CleanBlock GT__BIT(12) -#define GT_CPUMstrCtl_FlushBlock GT__BIT(13) - -#define GT_ArbSlice_SDRAM 0x0 /* SDRAM interface snoop request */ -#define GT_ArbSlice_DEVICE 0x1 /* Device request */ -#define GT_ArbSlice_NULL 0x2 /* NULL request */ -#define GT_ArbSlice_PCI0 0x3 /* PCI_0 access */ -#define GT_ArbSlice_PCI1 0x4 /* PCI_1 access */ -#define GT_ArbSlice_COMM 0x5 /* Comm unit access */ -#define GT_ArbSlice_IDMA0123 0x6 /* IDMA channels 0/1/2/3 access */ -#define GT_ArbSlice_IDMA4567 0x7 /* IDMA channels 4/5/6/7 access */ - /* 0x8-0xf: Reserved */ - -/* Pass in the slice number (from 0..16) as 'n' - */ -#define GT_XbarCtl_GET_ArbSlice(v, n) GT__EXT((v), (((n) & 7)*4, 4) - -/* - * Table 100: CPU Interface Crossbar Control Low, Offset: 0x150 - * 03:00 Arb0 Slice 0 of CPU Master pizza Arbiter - * 07:04 Arb1 Slice 1 of CPU Master pizza Arbiter - * 11:08 Arb2 Slice 2 of CPU Master pizza Arbiter - * 15:12 Arb3 Slice 3 of CPU Master pizza Arbiter - * 19:16 Arb4 Slice 4 of CPU Master pizza Arbiter - * 23:20 Arb5 Slice 5 of CPU Master pizza Arbiter - * 27:24 Arb6 Slice 6 of CPU Master pizza Arbiter - * 31:28 Arb7 Slice 7 of CPU Master pizza Arbiter - */ - -/* - * Table 101: CPU Interface Crossbar Control High, Offset: 0x158 - * 03:00 Arb8 Slice 8 of CPU Master pizza Arbiter - * 07:04 Arb9 Slice 9 of CPU Master pizza Arbiter - * 11:08 Arb10 Slice 10 of CPU Master pizza Arbiter - * 15:12 Arb11 Slice 11 of CPU Master pizza Arbiter - * 19:16 Arb12 Slice 12 of CPU Master pizza Arbiter - * 23:20 Arb13 Slice 13 of CPU Master pizza Arbiter - * 27:24 Arb14 Slice 14 of CPU Master pizza Arbiter - * 31:28 Arb15 Slice 15 of CPU Master pizza Arbiter - */ - -/* - * Table 102: CPU Interface Crossbar Timeout, Offset: 0x168 - * NOTE: Reserved for Galileo Technology usage. - * 07:00 Timeout Crossbar Arbiter Timeout Preset Value - * 15:08 Reserved - * 16:16 TimeoutEn Crossbar Arbiter Timer Enable - * (0: Enable; 1: Disable) - * 31:17 Reserved - */ - -/* - * Table 103: CPU Read Response Crossbar Control Low, Offset: 0x170 - * 03:00 Arb0 Slice 0 of CPU Slave pizza Arbiter - * 07:04 Arb1 Slice 1 of CPU Slave pizza Arbiter - * 11:08 Arb2 Slice 2 of CPU Slave pizza Arbiter - * 15:12 Arb3 Slice 3 of CPU Slave pizza Arbiter - * 19:16 Arb4 Slice 4 of CPU Slave pizza Arbiter - * 23:20 Arb5 Slice 5 of CPU Slave pizza Arbiter - * 27:24 Arb6 Slice 6 of CPU Slave pizza Arbiter - * 31:28 Arb7 Slice 7 of CPU Slave pizza Arbiter - */ -/* - * Table 104: CPU Read Response Crossbar Control High, Offset: 0x178 - * 03:00 Arb8 Slice 8 of CPU Slave pizza Arbiter - * 07:04 Arb9 Slice 9 of CPU Slave pizza Arbiter - * 11:08 Arb10 Slice 10 of CPU Slave pizza Arbiter - * 15:12 Arb11 Slice 11 of CPU Slave pizza Arbiter - * 19:16 Arb12 Slice 12 of CPU Slave pizza Arbiter - * 23:20 Arb13 Slice 13 of CPU Slave pizza Arbiter - * 27:24 Arb14 Slice 14 of CPU Slave pizza Arbiter - * 31:28 Arb15 Slice 15 of CPU Slave pizza Arbiter - */ - -/* - * Table 105: PCI_0 Sync Barrier Virtual Register, Offset: 0x0c0 - * Table 106: PCI_1 Sync Barrier Virtual Register, Offset: 0x0c8 - * NOTE: The read data is random and should be ignored. - * 31:00 SyncBarrier A CPU read from this register creates a - * synchronization barrier cycle. - */ - -/* - * Table 107: CPU Protect Address 0 Low, Offset: 0x180 - * Table 109: CPU Protect Address 1 Low, Offset: 0x190 - * Table 111: CPU Protect Address 2 Low, Offset: 0x1a0 - * Table 113: CPU Protect Address 3 Low, Offset: 0x1b0 - * Table 115: CPU Protect Address 4 Low, Offset: 0x1c0 - * Table 117: CPU Protect Address 5 Low, Offset: 0x1d0 - * Table 119: CPU Protect Address 6 Low, Offset: 0x1e0 - * Table 121: CPU Protect Address 7 Low, Offset: 0x1f0 - * - * 11:00 LowAddr CPU Protect Region Base Address - * Corresponds to address bits[31:20]. - * 15:12 Reserved. Must be 0 - * 16:16 AccProtect CPU Access Protect - * Access is (0: allowed; 1: forbidden) - * 17:17 WrProtect CPU Write Protect - * Writes are (0: allowed; 1: forbidden) - * 18:18 CacheProtect CPU caching protect. Caching (block read) - * is (0: allowed; 1: forbidden) - * 31:19 Reserved - */ -#define GT_CPU_AccProtect GT__BIT(16) -#define GT_CPU_WrProtect GT__BIT(17) -#define GT_CPU_CacheProtect GT__BIT(18) - -/* - * Table 108: CPU Protect Address 0 High, Offset: 0x188 - * Table 110: CPU Protect Address 1 High, Offset: 0x198 - * Table 112: CPU Protect Address 2 High, Offset: 0x1a8 - * Table 114: CPU Protect Address 3 High, Offset: 0x1b8 - * Table 116: CPU Protect Address 4 High, Offset: 0x1c8 - * Table 118: CPU Protect Address 5 High, Offset: 0x1d8 - * Table 120: CPU Protect Address 6 High, Offset: 0x1e8 - * Table 122: CPU Protect Address 7 High, Offset: 0x1f8 - * - * 11:00 HighAddr CPU Protect Region Top Address - * Corresponds to address bits[31:20] - * 31:12 Reserved - */ - -/* - * Table 123: Snoop Base Address 0, Offset: 0x380 - * Table 125: Snoop Base Address 1, Offset: 0x390 - * Table 127: Snoop Base Address 2, Offset: 0x3a0 - * Table 129: Snoop Base Address 3, Offset: 0x3b0 - * - * 11:00 LowAddr Snoop Region Base Address [31:20] - * 15:12 Reserved Must be 0. - * 17:16 Snoop Snoop Type - * 0x0: No Snoop - * 0x1: Snoop to WT region - * 0x2: Snoop to WB region - * 0x3: Reserved - * 31:18 Reserved - */ -#define GT_Snoop_GET(v) GT__EXT((v), 16, 2) -#define GT_Snoop_INS(v) GT__INS((v), 16) -#define GT_Snoop_None 0 -#define GT_Snoop_WT 1 -#define GT_Snoop_WB 2 - - -/* - * Table 124: Snoop Top Address 0, Offset: 0x388 - * Table 126: Snoop Top Address 1, Offset: 0x398 - * Table 128: Snoop Top Address 2, Offset: 0x3a8 - * Table 130: Snoop Top Address 3, Offset: 0x3b8 - * 11:00 HighAddr Snoop Region Top Address [31:20] - * 31:12 Reserved - */ - - -/* - * Table 131: CPU Error Address Low, Offset: 0x070, Read Only. - * In case of multiple errors, only the first one is latched. New error - * report latching is enabled only after the CPU Error Address Low register - * is being read. - * 31:00 ErrAddr Latched address bits [31:0] of a CPU - * transaction in case of: - * o illegal address (failed address decoding) - * o access protection violation - * o bad data parity - * o bad address parity - * Upon address latch, no new address are - * registered (due to additional error condition), - * until the register is being read. - */ - -/* - * Table 132: CPU Error Address High, Offset: 0x078, Read Only. - * Once data is latched, no new data can be registered (due to additional - * error condition), until CPU Error Low Address is being read (which - * implies, it should be the last being read by the interrupt handler). - * 03:00 Reserved - * 07:04 ErrPar Latched address parity bits in case - * of bad CPU address parity detection. - * 31:08 Reserved - */ -#define GT_CPUErrorAddrHigh_ErrPar_GET(v) GT__EXT((v), 4, 4) - -/* - * Table 133: CPU Error Data Low, Offset: 0x128, Read only. - * 31:00 PErrData Latched data bits [31:0] in case of bad data - * parity sampled on write transactions or on - * master read transactions. - */ - -/* - * Table 134: CPU Error Data High, Offset: 0x130, Read only. - * 31:00 PErrData Latched data bits [63:32] in case of bad data - * parity sampled on write transactions or on - * master read transactions. - */ - -/* - * Table 135: CPU Error Parity, Offset: 0x138, Read only. - * 07:00 PErrPar Latched data parity bus in case of bad data - * parity sampled on write transactions or on - * master read transactions. - * 31:10 Reserved - */ -#define GT_CPUErrorParity_PErrPar_GET(v) GT__EXT((v), 0, 8) - -/* - * Table 136: CPU Error Cause, Offset: 0x140 - * Bits[7:0] are clear only. A cause bit is set upon an error condition - * occurrence. Write a 0 value to clear the bit. Writing a 1 value has - * no affect. - * 00:00 AddrOut CPU Address Out of Range - * 01:01 AddrPErr Bad Address Parity Detected - * 02:02 TTErr Transfer Type Violation. - * The CPU attempts to burst (read or write) to an - * internal register. - * 03:03 AccErr Access to a Protected Region - * 04:04 WrErr Write to a Write Protected Region - * 05:05 CacheErr Read from a Caching protected region - * 06:06 WrDataPErr Bad Write Data Parity Detected - * 07:07 RdDataPErr Bad Read Data Parity Detected - * 26:08 Reserved - * 31:27 Sel Specifies the error event currently being - * reported in Error Address, Error Data, and - * Error Parity registers. - * 0x0: AddrOut - * 0x1: AddrPErr - * 0x2: TTErr - * 0x3: AccErr - * 0x4: WrErr - * 0x5: CacheErr - * 0x6: WrDataPErr - * 0x7: RdDataPErr - * 0x8-0x1f: Reserved - */ -#define GT_CPUError_AddrOut GT__BIT(GT_CPUError_Sel_AddrOut) -#define GT_CPUError_AddrPErr GT__BIT(GT_CPUError_Sel_AddrPErr) -#define GT_CPUError_TTErr GT__BIT(GT_CPUError_Sel_TTErr) -#define GT_CPUError_AccErr GT__BIT(GT_CPUError_Sel_AccErr) -#define GT_CPUError_WrErr GT__BIT(GT_CPUError_Sel_WrPErr) -#define GT_CPUError_CacheErr GT__BIT(GT_CPUError_Sel_CachePErr) -#define GT_CPUError_WrDataPErr GT__BIT(GT_CPUError_Sel_WrDataPErr) -#define GT_CPUError_RdDataPErr GT__BIT(GT_CPUError_Sel_RdDataPErr) - -#define GT_CPUError_Sel_AddrOut 0 -#define GT_CPUError_Sel_AddrPErr 1 -#define GT_CPUError_Sel_TTErr 2 -#define GT_CPUError_Sel_AccErr 3 -#define GT_CPUError_Sel_WrErr 4 -#define GT_CPUError_Sel_CacheErr 5 -#define GT_CPUError_Sel_WrDataPErr 6 -#define GT_CPUError_Sel_RdDataPErr 7 - -#define GT_CPUError_Sel_GET(v) GT__EXT((v), 27, 5) - -/* - * Table 137: CPU Error Mask, Offset: 0x148 - * 00:00 AddrOut If set to 1, enables AddrOut interrupt. - * 01:01 AddrPErr If set to 1, enables AddrPErr interrupt. - * 02:02 TTErr If set to 1, enables TTErr interrupt. - * 03:03 AccErr If set to 1, enables AccErr interrupt. - * 04:04 WrErr If set to 1, enables WrErr interrupt. - * 05:05 CacheErr If set to 1, enables CacheErr interrupt. - * 06:06 WrDataPErr If set to 1, enables WrDataPErr interrupt. - * 07:07 RdDataPErr If set to 1, enables RdDataPErr interrupt. - * 31:08 Reserved - */ - -/* - * Comm Unit Interrupt registers - */ - -/* Comm Unit Arbiter Control */ -#define GT_CommUnitArb_Ctrl 0xf300 -/* GPP IRQs level vs. edge sensitivity */ -#define GT_CommUnitArb_Ctrl_GPP_Ints_Level_Sensitive (1<<10) - -#define GT_CommUnitIntr_Cause 0xf310 -#define GT_CommUnitIntr_Mask 0xf314 -#define GT_CommUnitIntr_ErrAddr 0xf318 - -#define GT_CommUnitIntr_E0 0x00000007 -#define GT_CommUnitIntr_E1 0x00000070 -#define GT_CommUnitIntr_E2 0x00000700 -#define GT_CommUnitIntr_S0 0x00070000 -#define GT_CommUnitIntr_S1 0x00700000 -#define GT_CommUnitIntr_Sel 0x70000000 - -/* - * SDRAM Error Report (ECC) Registers - */ -#define GT_260_ECC_Data_Lo 0x484 /* latched Error Data (low) */ -#define GT_260_ECC_Data_Hi 0x480 /* latched Error Data (high) */ -#define GT_260_ECC_Addr 0x490 /* latched Error Address */ -#define GT_260_ECC_Rec 0x488 /* latched ECC code from SDRAM */ -#define GT_260_ECC_Calc 0x48c /* latched ECC code from SDRAM */ -#define GT_260_ECC_Ctl 0x494 /* ECC Control */ -#define GT_260_ECC_Count 0x498 /* ECC 1-bit error count */ - -/* Timer/Counter Registers (t. straumann) - */ -#define GT_TIMER_0 0x0850 /* preset / running value */ -#define GT_TIMER_1 0x0854 -#define GT_TIMER_2 0x0858 -#define GT_TIMER_3 0x085c - -#define GT_TIMER_0_3_Ctl 0x0864 - -#define GT_TIMER_0_Ctl_Enb 0x00000001 /* enable timer */ -#define GT_TIMER_0_Ctl_Rld 0x00000002 /* reload after expiration */ -#define GT_TIMER_1_Ctl_Enb 0x00000100 /* enable timer */ -#define GT_TIMER_1_Ctl_Rld 0x00000200 /* reload after expiration */ -#define GT_TIMER_2_Ctl_Enb 0x00010000 /* enable timer */ -#define GT_TIMER_2_Ctl_Rld 0x00020000 /* reload after expiration */ -#define GT_TIMER_3_Ctl_Enb 0x01000000 /* enable timer */ -#define GT_TIMER_3_Ctl_Rld 0x02000000 /* reload after expiration */ - -#define GT_TIMER_0_3_Intr_Cse 0x0868 -#define GT_TIMER_0_Intr 0x00000001 -#define GT_TIMER_1_Intr 0x00000002 -#define GT_TIMER_2_Intr 0x00000004 -#define GT_TIMER_3_Intr 0x00000008 -#define GT_TIMER_Intr_Smry 0x80000000 /* Interrupt Summary */ - -#define GT_TIMER_0_3_Intr_Msk 0x086c - -/* - * Watchdog Registers - */ -#define GT_WDOG_Config 0xb410 -#define GT_WDOG_Value 0xb414 -#define GT_WDOG_Value_NMI GT__MASK(24) -#define GT_WDOG_Config_Preset GT__MASK(24) -#define GT_WDOG_Config_Ctl1a GT__BIT(24) -#define GT_WDOG_Config_Ctl1b GT__BIT(25) -#define GT_WDOG_Config_Ctl2a GT__BIT(26) -#define GT_WDOG_Config_Ctl2b GT__BIT(27) -#define GT_WDOG_Config_Enb GT__BIT(31) - -#define GT_WDOG_NMI_DFLT (GT__MASK(24) & GT_WDOG_Value_NMI) -#define GT_WDOG_Preset_DFLT (GT__MASK(22) & GT_WDOG_Config_Preset) - -/* - * Device Bus Interrupts - */ -#define GT_DEVBUS_ICAUSE 0x4d0 /* Device Interrupt Cause */ -#define GT_DEVBUS_IMASK 0x4d4 /* Device Interrupt Mask */ -#define GT_DEVBUS_ERR_ADDR 0x4d8 /* Device Error Address */ - -/* - * bit defines for GT_DEVBUS_ICAUSE, GT_DEVBUS_IMASK - */ -#define GT_DEVBUS_DBurstErr GT__BIT(0) -#define GT_DEVBUS_DRdyErr GT__BIT(1) -#define GT_DEVBUS_Sel GT__BIT(27) -#define GT_DEVBUS_RES ~(GT_DEVBUS_DBurstErr|GT_DEVBUS_DRdyErr|GT_DEVBUS_Sel) - -/* MV64360 */ -/* Enable individual CPU windows by *clearing* respective bits - * in MV_64360_BASE_ADDR_DISBL - * - * Bit ordering is: - * - * SDRAM_CS_0..3 (1<<0..3) - * DEV_CS_0..3 (1<<4..7) - * BOOT_CS_0..3 (1<<8) - * PCI_0_IO (1<<9) - * PCI_0_MEM_0..3 (1<<10..13) - * PCI_1_IO (1<<14) - * PCI_1_MEM_0..3 (1<<15..18) - * INTERNAL_SRAM (1<<19) - * MV64x60_REGS (1<<20) - */ -#define MV_64360_BASE_ADDR_DISBL (0x278) - -/* Internal SRAM */ -#define MV_64360_SRAM_BASE (0x268) -#define MV_64360_SRAM_CTRL (0x380) -/* Control register bits */ -#define MV_64360_SRAM_CacheWb GT__BIT(1) -/* default setup used by linux, motload (uses 90 instead of b0), ... - * Comments say: - * - parity enabled, - * - parity error propagation - * - arbitration not parked for CPU only - * - other bits are reserved - */ -#define MV_64360_SRAM_Ctl_Setup (0x001600b0) - -#define MV_64360_SRAM_TEST_MODE (0x3f4) -#define MV_64340_SRAM_ERR_CAUSE (0x388) -#define MV_64340_SRAM_ERR_ADDR (0x390) -#define MV_64340_SRAM_ERR_ADDR_HI (0X3f8) -#define MV_64340_SRAM_ERR_DATA_LO (0x398) -#define MV_64340_SRAM_ERR_DATA_HI (0x3a0) -#define MV_64340_SRAM_ERR_DATA_PARITY (0x3a8) - -#endif /* !_DISCOVERY_DEV_GTREG_H */ diff --git a/c/src/lib/libbsp/powerpc/beatnik/network/if_em/if_em_pub.h b/c/src/lib/libbsp/powerpc/beatnik/network/if_em/if_em_pub.h deleted file mode 100644 index eb970e465b..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/network/if_em/if_em_pub.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef RTEMS_BSDNET_IF_EM_PUBLIC_SYMBOLS_H -#define RTEMS_BSDNET_IF_EM_PUBLIC_SYMBOLS_H - -#include <rtems.h> -#include <rtems/rtems_bsdnet.h> -#include <bsp/early_enet_link_status.h> - -#ifdef __cplusplus - extern "C" { -#endif - -extern int rtems_em_attach(struct rtems_bsdnet_ifconfig *, int); -extern int rtems_em_pci_setup(int); -extern rtems_bsdnet_early_link_check_ops rtems_em_early_link_check_ops; - -#ifdef __cplusplus - } -#endif - -#endif - - diff --git a/c/src/lib/libbsp/powerpc/beatnik/network/if_gfe/if_gfe_pub.h b/c/src/lib/libbsp/powerpc/beatnik/network/if_gfe/if_gfe_pub.h deleted file mode 100644 index 8ea849efb1..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/network/if_gfe/if_gfe_pub.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef RTEMS_BSDNET_IF_GFE_PUBLIC_SYMBOLS_H -#define RTEMS_BSDNET_IF_GFE_PUBLIC_SYMBOLS_H - -#include <rtems.h> -#include <rtems/rtems_bsdnet.h> -#include <bsp/early_enet_link_status.h> -#include <net/ethernet.h> - -#ifdef __cplusplus - extern "C" { -#endif - -extern int -rtems_gfe_attach(struct rtems_bsdnet_ifconfig *, int); - - -/* enet_addr must be 6 bytes long */ -int -rtems_gfe_setup(int unit, char *enet_addr, uint32_t base_addr); - -extern rtems_bsdnet_early_link_check_ops -rtems_gfe_early_link_check_ops; - -#ifdef __cplusplus - } -#endif - -#endif - - diff --git a/c/src/lib/libbsp/powerpc/beatnik/network/if_mve/if_mve_pub.h b/c/src/lib/libbsp/powerpc/beatnik/network/if_mve/if_mve_pub.h deleted file mode 100644 index 0a84310d72..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/network/if_mve/if_mve_pub.h +++ /dev/null @@ -1,422 +0,0 @@ -#ifndef RTEMS_BSDNET_IF_MVE_PUBLIC_SYMBOLS_H -#define RTEMS_BSDNET_IF_MVE_PUBLIC_SYMBOLS_H - -/* - * Authorship - * ---------- - * This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was - * created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * The 'beatnik' BSP was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ -#include <rtems.h> -#include <rtems/rtems_bsdnet.h> -#include <bsp/early_enet_link_status.h> -#include <stdint.h> - -#ifdef __cplusplus - extern "C" { -#endif - -extern int rtems_mve_attach(struct rtems_bsdnet_ifconfig *, int); -extern rtems_bsdnet_early_link_check_ops rtems_mve_early_link_check_ops; - -/* Low-level Driver API. - * This provides driver access to applications that want to use e.g., the second - * ethernet interface w/o running the BSD TCP/IP stack. - */ - -/* Opaque handle */ -struct mveth_private; - -/* Direct assignment of MVE flags to user API relies on irqs and x-irqs not overlapping */ -#define BSP_MVE_IRQ_RX (1<<2) -#define BSP_MVE_IRQ_TX (1<<0) -#define BSP_MVE_IRQ_LINK (1<<16) - -/* Setup an interface. - * Allocates resources for descriptor rings and sets up the driver software structure. - * - * Arguments: - * unit: - * interface # (1..2). The interface must not be attached to BSD. - * - * driver_tid: - * ISR posts RTEMS event # ('unit' - 1) to task with ID 'driver_tid' and disables interrupts - * from this interface. - * - * void (*cleanup_txbuf)(void *user_buf, void *cleanup_txbuf_arg, int error_on_tx_occurred): - * Pointer to user-supplied callback to release a buffer that had been sent - * by BSP_mve_send_buf() earlier. The callback is passed 'cleanup_txbuf_arg' - * and a flag indicating whether the send had been successful. - * The driver no longer accesses 'user_buf' after invoking this callback. - * CONTEXT: This callback is executed either by BSP_mve_swipe_tx() or - * BSP_mve_send_buf(), BSP_mve_init_hw(), BSP_mve_stop_hw() (the latter - * ones calling BSP_mve_swipe_tx()). - * void *cleanup_txbuf_arg: - * Closure argument that is passed on to 'cleanup_txbuf()' callback; - * - * void *(*alloc_rxbuf)(int *p_size, unsigned long *p_data_addr), - * Pointer to user-supplied callback to allocate a buffer for subsequent - * insertion into the RX ring by the driver. - * RETURNS: opaque handle to the buffer (which may be a more complex object - * such as an 'mbuf'). The handle is not used by the driver directly - * but passed back to the 'consume_rxbuf()' callback. - * Size of the available data area and pointer to buffer's data area - * in '*psize' and '*p_data_area', respectively. - * If no buffer is available, this routine should return NULL in which - * case the driver drops the last packet and re-uses the last buffer - * instead of handing it out to 'consume_rxbuf()'. - * CONTEXT: Called when initializing the RX ring (BSP_mve_init_hw()) or when - * swiping it (BSP_mve_swipe_rx()). - * - * - * void (*consume_rxbuf)(void *user_buf, void *consume_rxbuf_arg, int len); - * Pointer to user-supplied callback to pass a received buffer back to - * the user. The driver no longer accesses the buffer after invoking this - * callback (with 'len'>0, see below). 'user_buf' is the buffer handle - * previously generated by 'alloc_rxbuf()'. - * The callback is passed 'cleanup_rxbuf_arg' and a 'len' - * argument giving the number of bytes that were received. - * 'len' may be <=0 in which case the 'user_buf' argument is NULL. - * 'len' == 0 means that the last 'alloc_rxbuf()' had failed, - * 'len' < 0 indicates a receiver error. In both cases, the last packet - * was dropped/missed and the last buffer will be re-used by the driver. - * NOTE: the data are 'prefixed' with two bytes, i.e., the ethernet packet header - * is stored at offset 2 in the buffer's data area. Also, the FCS (4 bytes) - * is appended. 'len' accounts for both. - * CONTEXT: Called from BSP_mve_swipe_rx(). - * void *cleanup_rxbuf_arg: - * Closure argument that is passed on to 'consume_rxbuf()' callback; - * - * rx_ring_size, tx_ring_size: - * How many big to make the RX and TX descriptor rings. Note that the sizes - * may be 0 in which case a reasonable default will be used. - * If either ring size is < 0 then the RX or TX will be disabled. - * Note that it is illegal in this case to use BSP_mve_swipe_rx() or - * BSP_mve_swipe_tx(), respectively. - * - * irq_mask: - * Interrupts to enable. OR of flags from above. - * - */ -struct mveth_private * -BSP_mve_setup( - int unit, - rtems_id driver_tid, - void (*cleanup_txbuf)(void *user_buf, void *cleanup_txbuf_arg, int error_on_tx_occurred), - void *cleanup_txbuf_arg, - void *(*alloc_rxbuf)(int *p_size, uintptr_t *p_data_addr), - void (*consume_rxbuf)(void *user_buf, void *consume_rxbuf_arg, int len), - void *consume_rxbuf_arg, - int rx_ring_size, - int tx_ring_size, - int irq_mask -); - -/* - * Alternate 'setup' routine allowing the user to install an ISR rather - * than a task ID. - * All parameters (other than 'isr' / 'isr_arg') and the return value - * are identical to the BSP_mve_setup() entry point. - */ -struct mveth_private * -BSP_mve_setup_1( - int unit, - void (*isr)(void *isr_arg), - void *isr_arg, - void (*cleanup_txbuf)(void *user_buf, void *cleanup_txbuf_arg, int error_on_tx_occurred), - void *cleanup_txbuf_arg, - void *(*alloc_rxbuf)(int *p_size, uintptr_t *p_data_addr), - void (*consume_rxbuf)(void *user_buf, void *consume_rxbuf_arg, int len), - void *consume_rxbuf_arg, - int rx_ring_size, - int tx_ring_size, - int irq_mask -); - - -/* - * Initialize interface hardware - * - * 'mp' handle obtained by from BSP_mve_setup(). - * 'promisc' whether to set promiscuous flag. - * 'enaddr' pointer to six bytes with MAC address. Read - * from the device if NULL. - * - * Note: Multicast filters are cleared by this routine. - * However, in promiscuous mode the mcast filters - * are programmed to accept all multicast frames. - */ -void -BSP_mve_init_hw(struct mveth_private *mp, int promisc, unsigned char *enaddr); - -/* - * Clear multicast hash filter. No multicast frames are accepted - * after executing this routine (unless the hardware was initialized - * in 'promiscuous' mode). - */ -void -BSP_mve_mcast_filter_clear(struct mveth_private *mp); - -/* - * Program multicast filter to accept all multicast frames - */ -void -BSP_mve_mcast_filter_accept_all(struct mveth_private *mp); - -/* - * Add a MAC address to the multicast filter. - * Existing entries are not changed but note that - * the filter is imperfect, i.e., multiple MAC addresses - * may alias to a single filter entry. Hence software - * filtering must still be performed. - * - * If a higher-level driver implements IP multicasting - * then multiple IP addresses may alias to the same MAC - * address. This driver maintains a 'reference-count' - * which is incremented every time the same MAC-address - * is passed to this routine; the address is only removed - * from the filter if BSP_mve_mcast_filter_accept_del() - * is called the same number of times (or by BSP_mve_mcast_filter_clear). - */ -void -BSP_mve_mcast_filter_accept_add(struct mveth_private *mp, unsigned char *enaddr); - -/* - * Remove a MAC address from the multicast filter. - * This routine decrements the reference count of the given - * MAC-address and removes it from the filter once the - * count reaches zero. - */ -void -BSP_mve_mcast_filter_accept_del(struct mveth_private *mp, unsigned char *enaddr); - -/* - * Shutdown hardware and clean out the rings - */ -void -BSP_mve_stop_hw(struct mveth_private *mp); - -/* calls BSP_mve_stop_hw(), releases all resources and marks the interface - * as unused. - * RETURNS 0 on success, nonzero on failure. - * NOTE: the handle MUST NOT be used after successful execution of this - * routine. - */ -int -BSP_mve_detach(struct mveth_private *mp); - -/* - * Enqueue a mbuf chain or a raw data buffer for transmission; - * RETURN: #bytes sent or -1 if there are not enough free descriptors - * - * If 'len' is <=0 then 'm_head' is assumed to point to a mbuf chain. - * OTOH, a raw data packet (or a different type of buffer) - * may be send (non-BSD driver) by pointing data_p to the start of - * the data and passing 'len' > 0. - * 'm_head' is passed back to the 'cleanup_txbuf()' callback. - * - * Comments: software cache-flushing incurs a penalty if the - * packet cannot be queued since it is flushed anyways. - * The algorithm is slightly more efficient in the normal - * case, though. - * - * RETURNS: # bytes enqueued to device for transmission or -1 if no - * space in the TX ring was available. - */ -int -BSP_mve_send_buf(struct mveth_private *mp, void *m_head, void *data_p, int len); - -/* Descriptor scavenger; cleanup the TX ring, passing all buffers - * that have been sent to the cleanup_tx() callback. - * This routine is called from BSP_mve_send_buf(), BSP_mve_init_hw(), - * BSP_mve_stop_hw(). - * - * RETURNS: number of buffers processed. - */ -int -BSP_mve_swipe_tx(struct mveth_private *mp); - -/* Retrieve all received buffers from the RX ring, replacing them - * by fresh ones (obtained from the alloc_rxbuf() callback). The - * received buffers are passed to consume_rxbuf(). - * - * RETURNS: number of buffers processed. - */ -int -BSP_mve_swipe_rx(struct mveth_private *mp); - -/* read ethernet address from hw to buffer */ -void -BSP_mve_read_eaddr(struct mveth_private *mp, unsigned char *eaddr); - -/* read/write media word. - * 'cmd': can be SIOCGIFMEDIA, SIOCSIFMEDIA, 0 or 1. The latter - * are aliased to the former for convenience. - * 'parg': pointer to media word. - * - * RETURNS: 0 on success, nonzero on error - * - * NOTE: This routine is thread-safe. - */ -int -BSP_mve_media_ioctl(struct mveth_private *mp, int cmd, int *parg); - -/* Interrupt related routines */ - -/* Note: the BSP_mve_enable/disable/ack_irqs() entry points - * are deprecated. - * The newer API where the user passes a mask allows - * for more selective control. - */ - -/* Enable all supported interrupts at device */ -void -BSP_mve_enable_irqs(struct mveth_private *mp); - -/* Disable all supported interrupts at device */ -void -BSP_mve_disable_irqs(struct mveth_private *mp); - -/* Acknowledge (and clear) all supported interrupts. - * RETURNS: interrupts that were raised. - */ -uint32_t -BSP_mve_ack_irqs(struct mveth_private *mp); - -/* Enable interrupts included in 'mask' (leaving - * already enabled interrupts on). If the mask - * includes bits that were not passed to the 'setup' - * routine then the behavior is undefined. - */ -void -BSP_mve_enable_irq_mask(struct mveth_private *mp, uint32_t irq_mask); - -/* Disable interrupts included in 'mask' (leaving - * other ones that are currently enabled on). If the - * mask includes bits that were not passed to the 'setup' - * routine then the behavior is undefined. - * - * RETURNS: Bitmask of interrupts that were enabled upon entry - * into this routine. This can be used to restore the - * previous state. - */ -uint32_t -BSP_mve_disable_irq_mask(struct mveth_private *mp, uint32_t irq_mask); - -/* Acknowledge and clear selected interrupts. - * - * RETURNS: All pending interrupts. - * - * NOTE: Only pending interrupts contained in 'mask' - * are cleared. Others are left pending. - * - * This routine can be used to check for pending - * interrupts (pass mask == 0) or to clear all - * interrupts (pass mask == -1). - */ -uint32_t -BSP_mve_ack_irq_mask(struct mveth_private *mp, uint32_t mask); - -/* If the PHY link status changes then some - * internal settings in the ethernet controller's - * serial port need to be updated to match the - * PHY settings. Use this routine to perform the - * necessary steps after a link change has been - * detected. - * - * RETURNS: 0 on success, -1 if the PHY state - * could not be determined. - * - * The current state of the media as read - * by BSP_mve_media_ioctl() is returned in - * *pmedia. - * - * NOTE: This routine calls BSP_mve_media_ioctl(). - */ -int -BSP_mve_ack_link_chg(struct mveth_private *mp, int *pmedia); - -/* Retrieve the driver daemon TID that was passed to - * BSP_mve_setup(). - */ - -rtems_id -BSP_mve_get_tid(struct mveth_private *mp); - -/* Dump statistics to file (stdout if NULL) - * - * NOTE: this routine is not thread safe - */ -void -BSP_mve_dump_stats(struct mveth_private *mp, FILE *f); - -/* - * - * Example driver task loop (note: no synchronization of - * buffer access shown!). - * RTEMS_EVENTx = 0,1 or 2 depending on IF unit. - * - * / * setup (obtain handle) and initialize hw here * / - * - * do { - * / * ISR disables IRQs and posts event * / - * rtems_event_receive( RTEMS_EVENTx, RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &evs ); - * irqs = BSP_mve_ack_irqs(handle); - * if ( irqs & BSP_MVE_IRQ_TX ) { - * BSP_mve_swipe_tx(handle); / * cleanup_txbuf() callback executed * / - * } - * if ( irqs & BSP_MVE_IRQ_RX ) { - * BSP_mve_swipe_rx(handle); / * alloc_rxbuf() and consume_rxbuf() executed * / - * } - * if ( irqs & BSP_MVE_IRQ_LINK ) { - * / * update serial port settings from current link status * / - * BSP_mve_ack_link_chg(handle, 0); - * } - * BSP_mve_enable_irqs(handle); - * } while (1); - * - */ - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/beatnik/network/support/bsp_bsdnet_attach.h b/c/src/lib/libbsp/powerpc/beatnik/network/support/bsp_bsdnet_attach.h deleted file mode 100644 index a12e9e2c86..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/network/support/bsp_bsdnet_attach.h +++ /dev/null @@ -1,79 +0,0 @@ -#ifndef BSP_BSDNET_ATTACH_INFO_H -#define BSP_BSDNET_ATTACH_INFO_H - -/* Author: Till Straumann, 2005; see ../../LICENSE */ - -/* Rationale: traditionally, BSPs only supported a single networking interface - * the BSP defined RTEMS_NETWORK_DRIVER_NAME & friends macros - * for applications to use. - * If more than one interface is present, this simple approach is - * not enough. - * Hence, this BSP exports a routine declaring all available interfaces - * so the application can make a choice. - */ - -#ifdef __cplusplus - extern "C" { -#endif - -/* Fwd. decl just in case */ -struct rtems_bsdnet_ifconfig; - -typedef struct { - /* name of the interface */ - const char *name; - /* optional description (to be used by chooser 'help' function etc.) */ - const char *description; - /* driver 'attach' function */ - int (*attach_fn)(struct rtems_bsdnet_ifconfig*, int); -} BSP_NetIFDescRec, *BSP_NetIFDesc; - -/* Return a pointer to the (static) list of network interface descriptions - * of this board. - * - * NOTES: A NULL value is returned if e.g., the board type cannot be determined - * or for other reasons. - * The 'description' field is optional, i.e., may be NULL. - * The list is terminated by an element with a NULL name field. - * The interfaces are listed in the order they are labelled. - */ - -BSP_NetIFDesc -BSP_availableNetIFs(); - -/* Define this macro so applications can conditionally compile this API */ -#define BSP_HAS_MULTIPLE_NETIFS(x) BSP_availableNetIFs() - -/* Legacy macro; applications should use BSP_Available_NetIfs() to choose - * an interface and attach function. - */ -extern char BSP_auto_network_driver_name[20]; -#define RTEMS_BSP_NETWORK_DRIVER_NAME BSP_auto_network_driver_name - -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH BSP_auto_enet_attach - -/* This routine checks the name field passed in the 'ifconfig'. - * If the name is NULL or points to the BSP_auto_network_driver_name - * array, the routine checks all interfaces for an active link and - * attaches the first alive one. - * It also updates 'ifconfig' to reflect the chosen interface's name - * and attach function. - * - * If another name is passed in, the routine scans - * the available interfaces for that name and uses it, if found. - * Eventually, a default interface is chosen (provided that - * the board type is successfully detected). - * - * Note that only ONE interface chained into rtems_bsdnet_config - * may use the "auto" name. - * - */ - -int -BSP_auto_enet_attach(struct rtems_bsdnet_ifconfig *ifconfig, int attaching); - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/beatnik/network/support/early_enet_link_status.h b/c/src/lib/libbsp/powerpc/beatnik/network/support/early_enet_link_status.h deleted file mode 100644 index 74160a3b84..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/network/support/early_enet_link_status.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef BSP_EARLY_ENET_LINK_STATUS_H -#define BSP_EARLY_ENET_LINK_STATUS_H - -/* Determine link status of ethernet device before network is initialized */ - -/* T. Straumann, 2005; see ../../LICENSE */ - -#include <rtems.h> - -#ifdef __cplusplus - extern "C" { -#endif - -typedef struct { - int (*init)(int idx); /* perform enough initialization to access (default) phy */ - int (*read_phy)(int idx, unsigned reg); - int (*write_phy)(int idx, unsigned reg, unsigned val); - const char *name; /* driver name */ - unsigned char num_slots; /* max number of supported devices */ - unsigned char initialized; /* must be initialized to 0; */ -} rtems_bsdnet_early_link_check_ops; - -int -BSP_early_check_link_status(int unit, rtems_bsdnet_early_link_check_ops *ops); - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/beatnik/preinstall.am b/c/src/lib/libbsp/powerpc/beatnik/preinstall.am deleted file mode 100644 index aaf5448354..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/preinstall.am +++ /dev/null @@ -1,180 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES += $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/motld_start.$(OBJEXT): motld_start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/motld_start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/motld_start.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds.share: ../shared/startup/linkcmds.share $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.share -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.share - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_INCLUDE)/bsp/vpd.h: ../shared/motorola/vpd.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vpd.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vpd.h - -$(PROJECT_INCLUDE)/bsp/consoleIo.h: ../../powerpc/shared/console/consoleIo.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/consoleIo.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/consoleIo.h - -$(PROJECT_INCLUDE)/bsp/uart.h: ../../powerpc/shared/console/uart.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h - -$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/gtreg.h: marvell/gtreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gtreg.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/gtreg.h - -$(PROJECT_INCLUDE)/bsp/gtintrreg.h: marvell/gtintrreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gtintrreg.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/gtintrreg.h - -$(PROJECT_INCLUDE)/bsp/gti2creg.h: marvell/gti2creg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gti2creg.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/gti2creg.h - -$(PROJECT_INCLUDE)/bsp/gti2c_busdrv.h: marvell/gti2c_busdrv.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gti2c_busdrv.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/gti2c_busdrv.h - -$(PROJECT_INCLUDE)/bsp/gt_timer.h: marvell/gt_timer.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gt_timer.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/gt_timer.h - -$(PROJECT_INCLUDE)/bsp/gtpcireg.h: marvell/gtpcireg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gtpcireg.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/gtpcireg.h - -$(PROJECT_INCLUDE)/bsp/flashPgm.h: ../shared/flash/flashPgm.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/flashPgm.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/flashPgm.h - -$(PROJECT_INCLUDE)/bsp/flashPgmPvt.h: ../shared/flash/flashPgmPvt.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/flashPgmPvt.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/flashPgmPvt.h - -$(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h - -$(PROJECT_INCLUDE)/bsp/VMEConfig.h: vme/VMEConfig.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEConfig.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEConfig.h - -$(PROJECT_INCLUDE)/bsp/vmeUniverse.h: ../../shared/vmeUniverse/vmeUniverse.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverse.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverse.h - -$(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h: ../../shared/vmeUniverse/vmeUniverseDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h - -$(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vme_am_defs.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vme_am_defs.h - -$(PROJECT_INCLUDE)/bsp/vmeTsi148.h: ../../shared/vmeUniverse/vmeTsi148.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeTsi148.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeTsi148.h - -$(PROJECT_INCLUDE)/bsp/vmeTsi148DMA.h: ../../shared/vmeUniverse/vmeTsi148DMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeTsi148DMA.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeTsi148DMA.h - -$(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h: ../../shared/vmeUniverse/bspVmeDmaList.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h - -$(PROJECT_INCLUDE)/bsp/VME.h: ../../shared/vmeUniverse/VME.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VME.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VME.h - -$(PROJECT_INCLUDE)/bsp/VMEDMA.h: ../../shared/vmeUniverse/VMEDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEDMA.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEDMA.h - -if HAS_NETWORKING -$(PROJECT_INCLUDE)/bsp/early_enet_link_status.h: network/support/early_enet_link_status.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/early_enet_link_status.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/early_enet_link_status.h - -$(PROJECT_INCLUDE)/bsp/bsp_bsdnet_attach.h: network/support/bsp_bsdnet_attach.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bsp_bsdnet_attach.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bsp_bsdnet_attach.h - -$(PROJECT_INCLUDE)/bsp/if_mve_pub.h: network/if_mve/if_mve_pub.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/if_mve_pub.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/if_mve_pub.h - -$(PROJECT_INCLUDE)/bsp/if_gfe_pub.h: network/if_gfe/if_gfe_pub.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/if_gfe_pub.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/if_gfe_pub.h - -$(PROJECT_INCLUDE)/bsp/if_em_pub.h: network/if_em/if_em_pub.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/if_em_pub.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/if_em_pub.h -endif diff --git a/c/src/lib/libbsp/powerpc/beatnik/bsp_specs b/c/src/lib/libbsp/powerpc/beatnik/startup/bsp_specs index 99ca0adb61..99ca0adb61 100644 --- a/c/src/lib/libbsp/powerpc/beatnik/bsp_specs +++ b/c/src/lib/libbsp/powerpc/beatnik/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/beatnik/vme/VMEConfig.h b/c/src/lib/libbsp/powerpc/beatnik/vme/VMEConfig.h deleted file mode 100644 index 986a01674e..0000000000 --- a/c/src/lib/libbsp/powerpc/beatnik/vme/VMEConfig.h +++ /dev/null @@ -1,114 +0,0 @@ -#ifndef RTEMS_BSP_VME_CONFIG_H -#define RTEMS_BSP_VME_CONFIG_H - -/* BSP specific address space configuration parameters */ - -/* - * Authorship - * ---------- - * This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was - * created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * The 'beatnik' BSP was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#define _VME_DRIVER_TSI148 -#define _VME_DRIVER_UNIVERSE - -/* - * NOTE: the BSP (startup/bspstart.c) uses - * hardcoded window lengths that match this - * layout when setting BATs: - */ -#define _VME_A32_WIN0_ON_PCI 0x90000000 -/* If _VME_CSR_ON_PCI is defined then the A32 window is reduced to accommodate - * CSR for space. - */ -#define _VME_CSR_ON_PCI 0x9e000000 -#define _VME_A24_ON_PCI 0x9f000000 -#define _VME_A16_ON_PCI 0x9fff0000 - -/* start of the A32 window on the VME bus - * TODO: this should perhaps be a configuration option - */ -#define _VME_A32_WIN0_ON_VME 0x20000000 - -/* if _VME_DRAM_OFFSET is defined, the BSP - * will map our RAM onto the VME bus, starting - * at _VME_DRAM_OFFSET - */ -#define _VME_DRAM_OFFSET 0x90000000 - -extern int BSP_VMEInit(void); -extern int BSP_VMEIrqMgrInstall(void); - -#define BSP_VME_INSTALL_IRQ_MGR(err) \ - do { \ - err = -1; \ - switch (BSP_getBoardType()) { \ - case MVME6100: \ - err = theOps->install_irq_mgr( \ - VMETSI148_IRQ_MGR_FLAG_SHARED, \ - 0, BSP_IRQ_GPP_0 + 20, \ - 1, BSP_IRQ_GPP_0 + 21, \ - 2, BSP_IRQ_GPP_0 + 22, \ - 3, BSP_IRQ_GPP_0 + 23, \ - -1); \ - break; \ -\ - case MVME5500: \ - err = theOps->install_irq_mgr( \ - VMEUNIVERSE_IRQ_MGR_FLAG_SHARED | \ - VMEUNIVERSE_IRQ_MGR_FLAG_PW_WORKAROUND, \ - 0, BSP_IRQ_GPP_0 + 12, \ - 1, BSP_IRQ_GPP_0 + 13, \ - 2, BSP_IRQ_GPP_0 + 14, \ - 3, BSP_IRQ_GPP_0 + 15, \ - -1); \ - break; \ -\ - default: \ - printk("WARNING: unknown board; "); \ - break; \ - } \ - if ( err ) \ - printk("VME interrupt manager NOT INSTALLED (error: %i)\n", err); \ - } while (0) - -#endif diff --git a/c/src/lib/libbsp/powerpc/configure.ac b/c/src/lib/libbsp/powerpc/configure.ac index bf3947cd11..2725b86d1c 100644 --- a/c/src/lib/libbsp/powerpc/configure.ac +++ b/c/src/lib/libbsp/powerpc/configure.ac @@ -4,6 +4,8 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([qoriq]) RTEMS_TOP(../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/gen5200/Makefile.am b/c/src/lib/libbsp/powerpc/gen5200/Makefile.am index 88e8d5191b..a727020c0a 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/Makefile.am +++ b/c/src/lib/libbsp/powerpc/gen5200/Makefile.am @@ -4,18 +4,8 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp -include_bestcommdir = $(include_bspdir)/bestcomm -include_bestcomm_includedir = $(include_bestcommdir)/include -include_bestcomm_include_mgt5200dir = $(include_bestcomm_includedir)/mgt5200 -include_bestcomm_task_apidir = $(include_bestcommdir)/task_api +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h DISTCLEANFILES = include/bspopts.h noinst_PROGRAMS = @@ -31,14 +21,14 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA += rtems_crti.$(OBJEXT) +project_lib_DATA += linkcmds +dist_project_lib_DATA += startup/linkcmds.brs5l +dist_project_lib_DATA += startup/linkcmds.brs6l +dist_project_lib_DATA += startup/linkcmds.dp2 dist_project_lib_DATA += startup/linkcmds.gen5200_base -project_lib_DATA += startup/linkcmds -EXTRA_DIST += startup/linkcmds.brs5l -EXTRA_DIST += startup/linkcmds.brs6l -EXTRA_DIST += startup/linkcmds.icecube -EXTRA_DIST += startup/linkcmds.pm520_cr825 -EXTRA_DIST += startup/linkcmds.pm520_ze30 -EXTRA_DIST += startup/linkcmds.dp2 +dist_project_lib_DATA += startup/linkcmds.icecube +dist_project_lib_DATA += startup/linkcmds.pm520_cr825 +dist_project_lib_DATA += startup/linkcmds.pm520_ze30 noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -61,19 +51,6 @@ libbsp_a_SOURCES += bestcomm/include/ppctypes.h \ bestcomm/task_api/bestcomm_api_mem.h bestcomm/task_api/bestcomm_cntrl.h \ bestcomm/task_api/tasksetup_bdtable.h \ bestcomm/task_api/tasksetup_general.h -include_bestcomm_HEADERS = bestcomm/bestcomm_priv.h \ - bestcomm/dma_image.h \ - bestcomm/dma_image.capi.h \ - bestcomm/bestcomm_api.h \ - bestcomm/bestcomm_glue.h -include_bestcomm_include_HEADERS = bestcomm/include/ppctypes.h -include_bestcomm_include_mgt5200_HEADERS = bestcomm/include/mgt5200/mgt5200.h \ - bestcomm/include/mgt5200/sdma.h -include_bestcomm_task_api_HEADERS = bestcomm/task_api/tasksetup_general.h \ - bestcomm/task_api/tasksetup_bdtable.h \ - bestcomm/task_api/bestcomm_cntrl.h \ - bestcomm/task_api/bestcomm_api_mem.h - # clock # clock libbsp_a_SOURCES += ../shared/clock/clock.c @@ -87,24 +64,6 @@ libbsp_a_SOURCES += ide/ata.c libbsp_a_SOURCES += ide/ata-instance.c libbsp_a_SOURCES += ide/ata-dma-pio-single.c -include_bsp_HEADERS = -include_bsp_HEADERS += ../../shared/include/bootcard.h -include_bsp_HEADERS += ../../shared/include/irq-generic.h -include_bsp_HEADERS += ../../shared/include/irq-info.h -include_bsp_HEADERS += ../../shared/include/u-boot.h -include_bsp_HEADERS += ../../shared/include/utility.h -include_bsp_HEADERS += ../shared/include/u-boot-board-info.h -include_bsp_HEADERS += include/ata.h -include_bsp_HEADERS += include/bestcomm.h -include_bsp_HEADERS += include/bestcomm_ops.h -include_bsp_HEADERS += include/i2cdrv.h -include_bsp_HEADERS += include/i2c.h -include_bsp_HEADERS += include/irq.h -include_bsp_HEADERS += include/mpc5200.h -include_bsp_HEADERS += include/mscan-base.h -include_bsp_HEADERS += include/u-boot-config.h -include_bsp_HEADERS += mscan/mscan.h - # irq libbsp_a_SOURCES += include/irq.h \ irq/irq.c \ @@ -117,11 +76,9 @@ libbsp_a_SOURCES += include/irq.h \ # mscan libbsp_a_SOURCES += mscan/mscan.c mscan/mscan-base.c mscan/mscan.h mscan/mscan_int.h -include_bsp_HEADERS += nvram/nvram.h # nvram libbsp_a_SOURCES += nvram/nvram.c nvram/nvram.h nvram/m93cxx.h -include_bsp_HEADERS += slicetimer/slicetimer.h # slicetimer libbsp_a_SOURCES += slicetimer/slicetimer.c slicetimer/slicetimer.h @@ -161,5 +118,5 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/gen5200/headers.am diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/bestcomm_api.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/bestcomm_api.h deleted file mode 100644 index f1fa22d1d5..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/bestcomm_api.h +++ /dev/null @@ -1,460 +0,0 @@ -#ifndef __BESTCOMM_API_H -#define __BESTCOMM_API_H 1 - -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - -/*! - * \file bestcomm_api.h - * - * Bestcomm_api.h is the only header necessary for inclusion by user - * code. The include path the C compiler searches to find .h files - * should contain bestcomm/capi and one of bestcomm/code_dma/image_*. - * This second entry selects which set of BestComm tasks will be used. - * Of course the appropriate files in image_* must also be compiled and - * linked. - */ - -#include <rtems.h> - -#include "include/ppctypes.h" -#include "include/mgt5200/sdma.h" -#include "task_api/tasksetup_bdtable.h" -#include "task_api/bestcomm_cntrl.h" -#include "task_api/bestcomm_api_mem.h" - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/*! - * \brief TaskSetup() debugging - * - * Define this macro as follows for debugging printf()s to see - * what the API receives and sets from the TaskSetupParamSet_t - * struct. Implemented in capi/task_api/tasksetup_general.h. - * - * \verbatim - * >0 : print basic debug messages - * >=10: also print C-API interface variables - * >=20: also print task API interface variables - * else: do nothing - * \endverbatim - */ -#define DEBUG_BESTCOMM_API 0 - -/*! - * \brief Maximum number of tasks in the system. - * This number is hardware-dependent and not user configuration. - */ -#define MAX_TASKS 16 - -/* - * This may need to be removed in certain implementations. - */ -#ifndef NULL -# define NULL ((void *)0) -#endif /* NULL */ - -typedef sint8 TaskId; -typedef sint32 BDIdx; - -/* - * Special "task IDs" for interrupt handling API functions - */ -/*! \brief Debug interrupt "task ID" */ -#define DEBUG_INTR_ID SDMA_INT_BIT_DBG - -/*! \brief TEA interrupt "task ID" */ -#define TEA_INTR_ID SDMA_INT_BIT_TEA - -/*! \brief Task start autostart enable */ -#define TASK_AUTOSTART_ENABLE 1 - -/*! \brief Task start autostart disable */ -#define TASK_AUTOSTART_DISABLE 0 - -/*! \brief Task start interrupt enable */ -#define TASK_INTERRUPT_ENABLE 1 - -/*! \brief Task start interrupt disable */ -#define TASK_INTERRUPT_DISABLE 0 - -/* - * Buffer descriptor flags to pass to TaskBDAssign(). - */ -/*! \brief Transmit frame done */ -#define TASK_BD_TFD (1 << SDMA_DRD_BIT_TFD) - -/*! \brief Interrupt on frame done */ -#define TASK_BD_INT (1 << SDMA_DRD_BIT_INT) - -/*! - * \brief Data transfer size - */ -typedef enum { - SZ_FLEX = 3, /*!< invalid for TaskSetupParamSet_t */ - SZ_UINT8 = 1, /*!< 1-byte */ - SZ_UINT16 = 2, /*!< 2-byte */ - SZ_UINT32 = 4 /*!< 4-byte */ -} Sz_t; - -/*! - * \brief API error codes - */ -typedef enum { - TASK_ERR_NO_ERR = -1, /*!< No error */ - TASK_ERR_NO_INTR = TASK_ERR_NO_ERR, - /*!< No interrupt */ - TASK_ERR_INVALID_ARG = -2, /*!< Invalid function argument */ - TASK_ERR_BD_RING_FULL = -3, /*!< Buffer descriptor ring full*/ - TASK_ERR_API_ALREADY_INITIALIZED - = -4, /*!< API has already been initialized */ - TASK_ERR_SIZE_TOO_LARGE = -5, /*!< Buffer descriptor cannot support size parameter */ - TASK_ERR_BD_RING_EMPTY = -6, /*!< Buffer descriptor ring is empty*/ - TASK_ERR_BD_BUSY = -7, /*!< The buffer descriptor is in use - by the BestComm */ - TASK_ERR_TASK_RUNNING = -8 /*!< The task is running. */ - -} TaskErr_t; - -/*! - * \brief BestComm initiators - * - * These are assigned by TaskSetup(). - */ -typedef enum { - - INITIATOR_ALWAYS = 0, - INITIATOR_SCTMR_0 = 1, - INITIATOR_SCTMR_1 = 2, - INITIATOR_FEC_RX = 3, - INITIATOR_FEC_TX = 4, - INITIATOR_ATA_RX = 5, - INITIATOR_ATA_TX = 6, - INITIATOR_SCPCI_RX = 7, - INITIATOR_SCPCI_TX = 8, - INITIATOR_PSC3_RX = 9, - INITIATOR_PSC3_TX = 10, - INITIATOR_PSC2_RX = 11, - INITIATOR_PSC2_TX = 12, - INITIATOR_PSC1_RX = 13, - INITIATOR_PSC1_TX = 14, - INITIATOR_SCTMR_2 = 15, - - INITIATOR_SCLPC = 16, - INITIATOR_PSC5_RX = 17, - INITIATOR_PSC5_TX = 18, - INITIATOR_PSC4_RX = 19, - INITIATOR_PSC4_TX = 20, - INITIATOR_I2C2_RX = 21, - INITIATOR_I2C2_TX = 22, - INITIATOR_I2C1_RX = 23, - INITIATOR_I2C1_TX = 24, - INITIATOR_PSC6_RX = 25, - INITIATOR_PSC6_TX = 26, - INITIATOR_IRDA_RX = 25, - INITIATOR_IRDA_TX = 26, - INITIATOR_SCTMR_3 = 27, - INITIATOR_SCTMR_4 = 28, - INITIATOR_SCTMR_5 = 29, - INITIATOR_SCTMR_6 = 30, - INITIATOR_SCTMR_7 = 31 - -} MPC5200Initiator_t; - -/*! - * \brief Parameters for TaskSetup() - * - * All parameters can be hard-coded by the task API. Hard-coded values - * will be changed in the struct passed to TaskSetup() for the user to - * examine later. - */ -typedef struct { - uint32 NumBD; /*!< Number of buffer descriptors */ - - union { - uint32 MaxBuf; /*!< Maximum buffer size */ - uint32 NumBytes; /*!< Number of bytes to transfer */ - } Size; /*!< Buffer size union for BD and non-BD tasks */ - - MPC5200Initiator_t - Initiator; /*!< BestComm initiator (ignored if hard-wired) */ - uint32 StartAddrSrc; /*!< Address of the DMA source (e.g. a FIFO) */ - sint16 IncrSrc; /*!< Amount to increment source pointer */ - Sz_t SzSrc; /*!< Size of source data access */ - uint32 StartAddrDst; /*!< Address of the DMA destination (e.g. a FIFO) */ - sint16 IncrDst; /*!< Amount to increment data pointer */ - Sz_t SzDst; /*!< Size of destination data access */ -} TaskSetupParamSet_t; - -/*! - * \brief Parameters for TaskDebug() - * - * TaskDebug() and the contents of this data structure are yet to be - * determined. - */ -typedef struct { - int dummy; /* Some compilers don't like empty struct typedefs */ -} TaskDebugParamSet_t; - -/*! - * \brief Generic buffer descriptor. - * - * It is generally used as a pointer which should be cast to one of the - * other BD types based on the number of buffers per descriptor. - */ -typedef struct { - uint32 Status; /*!< Status and length bits */ -} TaskBD_t; - -/*! - * \brief Single buffer descriptor. - */ -typedef struct { - uint32 Status; /*!< Status and length bits */ - uint32 DataPtr[1]; /*!< Pointer to data buffer */ -} TaskBD1_t; - -/*! - * \brief Dual buffer descriptor. - */ -typedef struct { - uint32 Status; /*!< Status and length bits */ - uint32 DataPtr[2]; /*!< Pointer to data buffers */ -} TaskBD2_t; - - - -/*************************** - * Start of API Prototypes - ***************************/ - -#include "bestcomm_priv.h" -#include "dma_image.capi.h" - -/*! - * \brief Initialize a single task. - * \param TaskName Type of task to initialize. E.g. PCI transmit, - * ethernet receive, general purpose dual-pointer. - * Values expected can be found in the TaskName_t - * enum defined in dma_image.capi.h. - * \param TaskSetupParams Task-specific parameters. The user must fill out - * the pertinent parts of a TaskSetupParamSet_t - * data structure. - * \returns TaskId task identification token which is a required - * parameter for most other API functions. - * - * This function returns a task identification token which is a required - * parameter for most other API functions. - * - * Certain values of the structure pointed to by TaskParams are set - * as a side-effect based on task type. These may be examined after - * a successful call to TaskSetup(). User-specified values may be - * overridden. - * - * TaskId TaskSetup( TaskName_t TaskName, - * TaskSetupParamSet_t *TaskSetupParams ); - */ -#define TaskSetupHelper(TaskName, TaskSetupParams) \ - TaskSetup_ ## TaskName (TaskName ## _api, TaskSetupParams) -#define TaskSetup(TaskName, TaskSetupParams) \ - TaskSetupHelper(TaskName, TaskSetupParams) - -const char *TaskVersion(void); - -int TasksInitAPI(uint8 *MBarRef); - -int TasksInitAPI_VM(uint8 *MBarRef, uint8 *MBarPhys); - -void TasksLoadImage(sdma_regs *sdma); -int TasksAttachImage(sdma_regs *sdma); - -int TaskStart(TaskId taskId, uint32 autoStartEnable, - TaskId autoStartTask, uint32 intrEnable); -int TaskStop(TaskId taskId); -static int TaskStatus(TaskId taskId); -BDIdx TaskBDAssign(TaskId taskId, void *buffer0, void *buffer1, - int size, uint32 bdFlags); -BDIdx TaskBDRelease(TaskId taskId); -BDIdx TaskBDReset(TaskId taskId); -static TaskBD_t *TaskGetBD(TaskId taskId, BDIdx bd); -static TaskBD_t *TaskGetBDRing(TaskId taskId); -int TaskDebug(TaskId taskId, TaskDebugParamSet_t *paramSet); -static int TaskIntClear(TaskId taskId); -static TaskId TaskIntStatus(TaskId taskId); -static int TaskIntPending(TaskId taskId); -static TaskId TaskIntSource(void); -static uint16 TaskBDInUse(TaskId taskId); - - -/*! - * \brief Get the enable/disable status of a task. - * \param taskId Task handle passed back from a successful TaskSetup() - * \returns Boolean true indicates enabled or false indicates disabled - * or invalid taskId. - */ -static inline int TaskStatus(TaskId taskId) -{ - return SDMA_TASK_STATUS(SDMA_TCR, taskId) & 0x8000; -} - -/*! - * \brief Return a pointer to a buffer descriptor at index BDIdx - * \param taskId Task handle passed back from a successful TaskSetup() - * \param bd Buffer descriptor handle returned by - * TaskBDAssign() or TaskBDRelease(). - * \returns Pointer to the requested buffer descriptor or NULL on error. - * - * The returned pointer should be cast to the appropriate buffer - * descriptor type, TaskBD1_t or TaskBD2_t. - */ -static inline TaskBD_t *TaskGetBD(TaskId taskId, BDIdx bd) -{ - void *bdTab; - - bdTab = TaskBDIdxTable[taskId].BDTablePtr; - if (TaskBDIdxTable[taskId].numPtr == 1) { - return (TaskBD_t *)&(((TaskBD1_t *)bdTab)[bd]); - } else { - return (TaskBD_t *)&(((TaskBD2_t *)bdTab)[bd]); - } -} - -/*! - * \brief Return a pointer to the first buffer descriptor in the ring. - * \param taskId Task handle passed back from a successful TaskSetup() - * \returns Pointer to the array of buffer descriptors making up the - * ring or NULL on error. - * - * A device driver author may choose to use this in lieu of - * TaskBDAssign()/TaskBDRelease() to get direct access to the - * BD ring with the warning that the underlying data structure may change. - * Use at one's own discretion. - */ -static inline TaskBD_t *TaskGetBDRing(TaskId taskId) -{ - return (TaskBD_t *) TaskBDIdxTable[taskId].BDTablePtr; -} - -/*! - * \brief Clear the interrupt for a given BestComm task. - * \param taskId Task handle passed back from a successful TaskSetup() - * \returns TASK_ERR_NO_ERR (which is not really an error) for success - */ -static inline int TaskIntClear(TaskId taskId) -{ - SDMA_CLEAR_IEVENT(SDMA_INT_PEND, taskId); - return TASK_ERR_NO_ERR; /* success */ -} - -/*! - * \brief Get the interrupt status for a given task. - * \param taskId Task handle passed back from a successful TaskSetup() - * \returns TASK_ERR_NO_INTR (which is not really an error) for no interrupt - * pending, taskId for a regular interrupt, DEBUG_INTR_ID for - * a debug interrupt and TEA_INTR_ID for a TEA interrupt. - * \b Note: TaskIntStatus() may return 0, but this means that that - * taskId 0 is interrupt pending. - */ -static inline TaskId TaskIntStatus(TaskId taskId) -{ - uint32 pending; - - pending = SDMA_INT_PENDING(SDMA_INT_PEND, SDMA_INT_MASK); - - if (SDMA_INT_TEST(pending, taskId)) { - return taskId; - } else if (SDMA_INT_TEST(pending, DEBUG_INTR_ID)) { - return DEBUG_INTR_ID; - } else if (SDMA_INT_TEST(pending, TEA_INTR_ID)) { - return TEA_INTR_ID; - } - - return TASK_ERR_NO_INTR; -} - -/*! - * \brief Get the interrupt pending status for a given task. - * \param taskId Task handle passed back from a successful TaskSetup() - * \returns 0 if task does not have a pending interrupt. 1 if the task - * has an interrupt pending. - */ -static inline int TaskIntPending(TaskId taskId) -{ - uint32 pending; - - pending = SDMA_INT_PENDING(SDMA_INT_PEND, SDMA_INT_MASK); - if (SDMA_INT_TEST(pending, taskId)) { - return 1; - } else { - return 0; - } -} - -/*! - * \brief Returns the task ID of an interrupting BestComm task. - * \returns TASK_ERR_NO_INTR (which is not really an error) for no interrupt - * pending or the taskId of the interrupting task. - * - * The user must query TaskIntStatus() to discover if this is a debug - * or TEA interrupt. This function is designed for use by an operating - * system interrupt handler. - */ -static inline TaskId TaskIntSource(void) -{ - uint32 pending; - uint32 mask = 1 << (MAX_TASKS - 1); - TaskId i; - - pending = SDMA_INT_PENDING(SDMA_INT_PEND, SDMA_INT_MASK); - - if (SDMA_INT_TEST(pending, SDMA_INT_BIT_TEA)) { - return (TaskId)SDMA_TEA_SOURCE(SDMA_INT_PEND); - } - - for (i = (MAX_TASKS - 1); i >= 0; --i, mask >>= 1) { - if (pending & mask) { - return i; - } - } - - return TASK_ERR_NO_INTR; -} - -/*! - * \brief Get a count of in-use buffer descriptors. - * \param taskId Task handle passed back from a successful TaskSetup() - * \returns Count of the current number of BDs in use by the given task. - */ -static inline uint16 TaskBDInUse(TaskId taskId) -{ - return TaskBDIdxTable[taskId].currBDInUse; -} - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* __BESTCOMM_API_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/bestcomm_glue.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/bestcomm_glue.h deleted file mode 100644 index 18827b77c7..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/bestcomm_glue.h +++ /dev/null @@ -1,114 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic MPC5200 BSP | -+-----------------------------------------------------------------+ -| Copyright (c) 2004-2005 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file declares glue functions to the Freescale BestComm API | -\*===============================================================*/ -#ifndef _BESTCOMM_GLUE_H -#define _BESTCOMM_GLUE_H - -#include <rtems/irq-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/*=========================================================================*\ -| Function: | -\*-------------------------------------------------------------------------*/ -void bestcomm_glue_irq_enable -( -/*-------------------------------------------------------------------------*\ -| Purpose: | -| enable interrupt for given task number | -+---------------------------------------------------------------------------+ -| Input Parameters: | -\*-------------------------------------------------------------------------*/ - int bestcomm_taskno /* task number to enable */ - ); -/*-------------------------------------------------------------------------*\ -| Return Value: | -| none | -\*=========================================================================*/ - -/*=========================================================================*\ -| Function: | -\*-------------------------------------------------------------------------*/ -void bestcomm_glue_irq_disable -( -/*-------------------------------------------------------------------------*\ -| Purpose: | -| disable interrupt for given task number | -+---------------------------------------------------------------------------+ -| Input Parameters: | -\*-------------------------------------------------------------------------*/ - int bestcomm_taskno /* task number to disable */ - ); -/*-------------------------------------------------------------------------*\ -| Return Value: | -| none | -\*=========================================================================*/ - -/*=========================================================================*\ -| Function: | -\*-------------------------------------------------------------------------*/ -void bestcomm_glue_irq_install -( -/*-------------------------------------------------------------------------*\ -| Purpose: | -| install given function as bestcomm interrupt handler | -+---------------------------------------------------------------------------+ -| Input Parameters: | -\*-------------------------------------------------------------------------*/ - int bestcomm_taskno, /* task number for handler */ - rtems_interrupt_handler handler, /* function to call */ - void *arg - ); -/*-------------------------------------------------------------------------*\ -| Return Value: | -| none | -\*=========================================================================*/ - -/*=========================================================================*\ -| Function: | -\*-------------------------------------------------------------------------*/ -void bestcomm_glue_init -( -/*-------------------------------------------------------------------------*\ -| Purpose: | -| initialize the bestcomm module (if not yet done): | -| - load code | -| - initialize registers | -| - initialize bus arbiter | -| - initialize interrupt control | -+---------------------------------------------------------------------------+ -| Input Parameters: | -\*-------------------------------------------------------------------------*/ - void /* none */ - ); -/*-------------------------------------------------------------------------*\ -| Return Value: | -| none | -\*=========================================================================*/ - -void *bestcomm_malloc(size_t size); - -void bestcomm_free(void *ptr); - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* _BESTCOMM_GLUE_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/bestcomm_priv.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/bestcomm_priv.h deleted file mode 100644 index 102fc082cb..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/bestcomm_priv.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef __BESTCOMM_PRIV_H -#define __BESTCOMM_PRIV_H 1 - -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - -/* - * Global variables necessitated by the TaskSetup_*() location in - * separate files from the main code and the inline functions. These are - * private data structures that should not be manipulated by API users. - */ - -extern TaskBDIdxTable_t TaskBDIdxTable[MAX_TASKS]; -extern int TaskRunning[MAX_TASKS]; -extern sint64 MBarPhysOffsetGlobal; - -#endif /* __BESTCOMM_PRIV_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/dma_image.capi.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/dma_image.capi.h deleted file mode 100644 index 6b07cbcb2a..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/dma_image.capi.h +++ /dev/null @@ -1,84 +0,0 @@ -#ifndef __DMA_IMAGE_CAPI_H -#define __DMA_IMAGE_CAPI_H 1 - -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - - -#include "dma_image.h" - -typedef enum { - TASK_PCI_TX, - TASK_PCI_RX, - TASK_FEC_TX, - TASK_FEC_RX, - TASK_LPC, - TASK_ATA, - TASK_CRC16_DP_0, - TASK_CRC16_DP_1, - TASK_GEN_DP_0, - TASK_GEN_DP_1, - TASK_GEN_DP_2, - TASK_GEN_DP_3, - TASK_GEN_TX_BD, - TASK_GEN_RX_BD, - TASK_GEN_DP_BD_0, - TASK_GEN_DP_BD_1 -} TaskName_t; - -TaskId TaskSetup_TASK_PCI_TX (TASK_PCI_TX_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_PCI_RX (TASK_PCI_RX_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_FEC_TX (TASK_FEC_TX_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_FEC_RX (TASK_FEC_RX_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_LPC (TASK_LPC_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_ATA (TASK_ATA_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_CRC16_DP_0(TASK_CRC16_DP_0_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_CRC16_DP_1(TASK_CRC16_DP_1_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_GEN_DP_0 (TASK_GEN_DP_0_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_GEN_DP_1 (TASK_GEN_DP_1_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_GEN_DP_2 (TASK_GEN_DP_2_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_GEN_DP_3 (TASK_GEN_DP_3_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_GEN_TX_BD (TASK_GEN_TX_BD_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_GEN_RX_BD (TASK_GEN_RX_BD_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_GEN_DP_BD_0(TASK_GEN_DP_BD_0_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); -TaskId TaskSetup_TASK_GEN_DP_BD_1(TASK_GEN_DP_BD_1_api_t *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams); - -#endif /* __DMA_IMAGE_CAPI_H */ - diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/dma_image.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/dma_image.h deleted file mode 100644 index 1f8b86cded..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/dma_image.h +++ /dev/null @@ -1,472 +0,0 @@ -#ifndef __DMA_IMAGE_H -#define __DMA_IMAGE_H 1 - -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - - -#include "include/ppctypes.h" - -void init_dma_image_TASK_PCI_TX(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_PCI_RX(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_FEC_TX(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_FEC_RX(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_LPC(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_ATA(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_CRC16_DP_0(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_CRC16_DP_1(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_GEN_DP_0(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_GEN_DP_1(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_GEN_DP_2(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_GEN_DP_3(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_GEN_TX_BD(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_GEN_RX_BD(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_GEN_DP_BD_0(uint8 *vMem_taskBar, sint64 vMemOffset); -void init_dma_image_TASK_GEN_DP_BD_1(uint8 *vMem_taskBar, sint64 vMemOffset); - -/* MBAR_TASK_TABLE is the first address of task table */ -#ifndef MBAR_TASK_TABLE -#define MBAR_TASK_TABLE 0xf0008000UL -#endif - -/* MBAR_DMA_FREE is the first free address after task table */ -#define MBAR_DMA_FREE MBAR_TASK_TABLE + 0x00001500UL - -/* TASK_BAR is the first address of the Entry table */ -#define TASK_BAR MBAR_TASK_TABLE + 0x00000000UL -#define TASK_BAR_OFFSET 0x00000000UL - -typedef struct task_info0 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[7]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *AddrDstFIFO; - volatile sint16 *IncrBytes; - volatile uint32 *AddrPktSizeReg; - volatile sint16 *IncrSrc; - volatile uint32 *AddrSCStatusReg; - volatile uint32 *Bytes; - volatile uint32 *IterExtra; - volatile uint32 *StartAddrSrc; -} TASK_PCI_TX_api_t; -extern TASK_PCI_TX_api_t *TASK_PCI_TX_api; - -typedef struct task_info1 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[5]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *AddrPktSizeReg; - volatile sint16 *IncrBytes; - volatile uint32 *AddrSrcFIFO; - volatile sint16 *IncrDst; - volatile uint32 *Bytes; - volatile uint32 *IterExtra; - volatile uint32 *StartAddrDst; -} TASK_PCI_RX_api_t; -extern TASK_PCI_RX_api_t *TASK_PCI_RX_api; - -typedef struct task_info2 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[22]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *AddrDRD; - volatile uint32 AddrDRDIdx; - volatile sint16 *IncrBytes; - volatile uint32 *AddrDstFIFO; - volatile sint16 *IncrSrc; - volatile uint32 *AddrEnable; - volatile sint16 *IncrSrcMA; - volatile uint32 *BDTableBase; - volatile uint32 *BDTableLast; - volatile uint32 *BDTableStart; - volatile uint32 *Bytes; -} TASK_FEC_TX_api_t; -extern TASK_FEC_TX_api_t *TASK_FEC_TX_api; - -typedef struct task_info3 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[13]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *AddrEnable; - volatile sint16 *IncrBytes; - volatile uint32 *AddrSrcFIFO; - volatile sint16 *IncrDst; - volatile uint32 *BDTableBase; - volatile sint16 *IncrDstMA; - volatile uint32 *BDTableLast; - volatile uint32 *BDTableStart; - volatile uint32 *Bytes; -} TASK_FEC_RX_api_t; -extern TASK_FEC_RX_api_t *TASK_FEC_RX_api; - -typedef struct task_info4 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[4]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *Bytes; - volatile sint16 *IncrBytes; - volatile uint32 *IterExtra; - volatile sint16 *IncrDst; - volatile sint16 *IncrDstMA; - volatile sint16 *IncrSrc; - volatile uint32 *StartAddrDst; - volatile sint16 *IncrSrcMA; - volatile uint32 *StartAddrSrc; -} TASK_LPC_api_t; -extern TASK_LPC_api_t *TASK_LPC_api; - -typedef struct task_info5 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[7]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *AddrEnable; - volatile sint16 *IncrBytes; - volatile uint32 *BDTableBase; - volatile sint16 *IncrDst; - volatile uint32 *BDTableLast; - volatile sint16 *IncrSrc; - volatile uint32 *BDTableStart; - volatile uint32 *Bytes; -} TASK_ATA_api_t; -extern TASK_ATA_api_t *TASK_ATA_api; - -typedef struct task_info6 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[9]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *Bytes; - volatile sint16 *IncrBytes; - volatile uint32 *IterExtra; - volatile sint16 *IncrDst; - volatile sint16 *IncrDstMA; - volatile sint16 *IncrSrc; - volatile uint32 *StartAddrDst; - volatile sint16 *IncrSrcMA; - volatile uint32 *StartAddrSrc; -} TASK_CRC16_DP_0_api_t; -extern TASK_CRC16_DP_0_api_t *TASK_CRC16_DP_0_api; - -typedef struct task_info7 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[9]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *Bytes; - volatile sint16 *IncrBytes; - volatile uint32 *IterExtra; - volatile sint16 *IncrDst; - volatile sint16 *IncrDstMA; - volatile sint16 *IncrSrc; - volatile uint32 *StartAddrDst; - volatile sint16 *IncrSrcMA; - volatile uint32 *StartAddrSrc; -} TASK_CRC16_DP_1_api_t; -extern TASK_CRC16_DP_1_api_t *TASK_CRC16_DP_1_api; - -typedef struct task_info8 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[4]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *Bytes; - volatile sint16 *IncrBytes; - volatile uint32 *IterExtra; - volatile sint16 *IncrDst; - volatile sint16 *IncrDstMA; - volatile sint16 *IncrSrc; - volatile uint32 *StartAddrDst; - volatile sint16 *IncrSrcMA; - volatile uint32 *StartAddrSrc; -} TASK_GEN_DP_0_api_t; -extern TASK_GEN_DP_0_api_t *TASK_GEN_DP_0_api; - -typedef struct task_info9 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[4]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *Bytes; - volatile sint16 *IncrBytes; - volatile uint32 *IterExtra; - volatile sint16 *IncrDst; - volatile sint16 *IncrDstMA; - volatile sint16 *IncrSrc; - volatile uint32 *StartAddrDst; - volatile sint16 *IncrSrcMA; - volatile uint32 *StartAddrSrc; -} TASK_GEN_DP_1_api_t; -extern TASK_GEN_DP_1_api_t *TASK_GEN_DP_1_api; - -typedef struct task_info10 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[4]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *Bytes; - volatile sint16 *IncrBytes; - volatile uint32 *IterExtra; - volatile sint16 *IncrDst; - volatile sint16 *IncrDstMA; - volatile sint16 *IncrSrc; - volatile uint32 *StartAddrDst; - volatile sint16 *IncrSrcMA; - volatile uint32 *StartAddrSrc; -} TASK_GEN_DP_2_api_t; -extern TASK_GEN_DP_2_api_t *TASK_GEN_DP_2_api; - -typedef struct task_info11 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[4]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *Bytes; - volatile sint16 *IncrBytes; - volatile uint32 *IterExtra; - volatile sint16 *IncrDst; - volatile sint16 *IncrDstMA; - volatile sint16 *IncrSrc; - volatile uint32 *StartAddrDst; - volatile sint16 *IncrSrcMA; - volatile uint32 *StartAddrSrc; -} TASK_GEN_DP_3_api_t; -extern TASK_GEN_DP_3_api_t *TASK_GEN_DP_3_api; - -typedef struct task_info12 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[8]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *AddrDstFIFO; - volatile sint16 *IncrBytes; - volatile uint32 *AddrEnable; - volatile sint16 *IncrSrc; - volatile uint32 *BDTableBase; - volatile sint16 *IncrSrcMA; - volatile uint32 *BDTableLast; - volatile uint32 *BDTableStart; - volatile uint32 *Bytes; -} TASK_GEN_TX_BD_api_t; -extern TASK_GEN_TX_BD_api_t *TASK_GEN_TX_BD_api; - -typedef struct task_info13 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[7]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *AddrEnable; - volatile sint16 *IncrBytes; - volatile uint32 *AddrSrcFIFO; - volatile sint16 *IncrDst; - volatile uint32 *BDTableBase; - volatile uint32 *BDTableLast; - volatile uint32 *BDTableStart; - volatile uint32 *Bytes; -} TASK_GEN_RX_BD_api_t; -extern TASK_GEN_RX_BD_api_t *TASK_GEN_RX_BD_api; - -typedef struct task_info14 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[7]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *AddrEnable; - volatile sint16 *IncrBytes; - volatile uint32 *BDTableBase; - volatile sint16 *IncrDst; - volatile uint32 *BDTableLast; - volatile sint16 *IncrSrc; - volatile uint32 *BDTableStart; - volatile uint32 *Bytes; -} TASK_GEN_DP_BD_0_api_t; -extern TASK_GEN_DP_BD_0_api_t *TASK_GEN_DP_BD_0_api; - -typedef struct task_info15 { - volatile uint32 TaskNum; - volatile uint32 *PtrStartTDT; - volatile uint32 *PtrEndTDT; - volatile uint32 *PtrVarTab; - volatile uint32 *PtrFDT; - volatile uint32 *PtrCSave; - volatile uint32 NumDRD; - volatile uint32 *DRD[7]; - volatile uint32 NumVar; - volatile uint32 *var; - volatile uint32 NumInc; - volatile uint32 *inc; - volatile uint8 *TaskPragma; - volatile uint32 *AddrEnable; - volatile sint16 *IncrBytes; - volatile uint32 *BDTableBase; - volatile sint16 *IncrDst; - volatile uint32 *BDTableLast; - volatile sint16 *IncrSrc; - volatile uint32 *BDTableStart; - volatile uint32 *Bytes; -} TASK_GEN_DP_BD_1_api_t; -extern TASK_GEN_DP_BD_1_api_t *TASK_GEN_DP_BD_1_api; - - -#endif /* __DMA_IMAGE_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/include/mgt5200/mgt5200.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/include/mgt5200/mgt5200.h deleted file mode 100644 index 9e4b94cd10..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/include/mgt5200/mgt5200.h +++ /dev/null @@ -1,61 +0,0 @@ -#ifndef __MGT5200_MGT5200_H -#define __MGT5200_MGT5200_H - -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - -#define MBAR_CS 0x0000 -#define MBAR_SDRAM 0x0100 -#define MBAR_CDM 0x0200 -#define MBAR_LPC 0x0300 -#define MBAR_SCTMR 0x0400 -#define MBAR_INT_CTRL 0x0500 -#define MBAR_GPTIMER 0x0600 -#define MBAR_SLTIMER 0x0700 -#define MBAR_RTCLOCK 0x0800 -#define MBAR_MSCAN 0x0900 -#define MBAR_GPIO_STD 0x0B00 -#define MBAR_GPIO_WKUP 0x0C00 -#define MBAR_XCPCI 0x0D00 -#define MBAR_SPI 0x0F00 -#define MBAR_USB 0x1000 -#define MBAR_SDMA 0x1200 -#define MBAR_BDLC 0x1300 -#define MBAR_IR 0x1400 -#define MBAR_XLB_ARB 0x1F00 -#define MBAR_PSC1 0x2000 -#define MBAR_PSC2 0x2200 -#define MBAR_PSC3 0x2400 -#define MBAR_PSC4 0x2600 -#define MBAR_PSC5 0x2800 -#define MBAR_PSC6 0x2C00 -#define MBAR_IRDA 0x2C00 -#define MBAR_ETHERNET 0x3000 -#define MBAR_SCPCI 0x3800 -#define MBAR_ATA 0x3A00 -#define MBAR_SCLPC 0x3C00 -#define MBAR_I2C 0x3D00 -#define MBAR_SRAM 0x8000 - -#endif /* __MGT5200_MGT5200_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/include/mgt5200/sdma.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/include/mgt5200/sdma.h deleted file mode 100644 index 52d84777ad..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/include/mgt5200/sdma.h +++ /dev/null @@ -1,153 +0,0 @@ -#ifndef __MGT5200_SDMA_H -#define __MGT5200_SDMA_H - -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - -typedef struct sdma_register_set { - volatile uint32 taskBar; /* MBAR_SDMA + 0x00 sdTpb */ - volatile uint32 currentPointer; /* MBAR_SDMA + 0x04 sdMdeComplex */ - volatile uint32 endPointer; /* MBAR_SDMA + 0x08 sdMdeComplex */ - volatile uint32 variablePointer; /* MBAR_SDMA + 0x0c sdMdeComplex */ - - volatile uint8 IntVect1; /* MBAR_SDMA + 0x10 sdPtd */ - volatile uint8 IntVect2; /* MBAR_SDMA + 0x11 sdPtd */ - volatile uint16 PtdCntrl; /* MBAR_SDMA + 0x12 sdPtd */ - - volatile uint32 IntPend; /* MBAR_SDMA + 0x14 sdPtd */ - volatile uint32 IntMask; /* MBAR_SDMA + 0x18 sdPtd */ - - volatile uint32 TCR01; /* MBAR_SDMA + 0x1c sdPtd */ - volatile uint32 TCR23; /* MBAR_SDMA + 0x20 sdPtd */ - volatile uint32 TCR45; /* MBAR_SDMA + 0x24 sdPtd */ - volatile uint32 TCR67; /* MBAR_SDMA + 0x28 sdPtd */ - volatile uint32 TCR89; /* MBAR_SDMA + 0x2c sdPtd */ - volatile uint32 TCRAB; /* MBAR_SDMA + 0x30 sdPtd */ - volatile uint32 TCRCD; /* MBAR_SDMA + 0x34 sdPtd */ - volatile uint32 TCREF; /* MBAR_SDMA + 0x38 sdPtd */ - - volatile uint8 IPR0; /* MBAR_SDMA + 0x3c sdPtd */ - volatile uint8 IPR1; /* MBAR_SDMA + 0x3d sdPtd */ - volatile uint8 IPR2; /* MBAR_SDMA + 0x3e sdPtd */ - volatile uint8 IPR3; /* MBAR_SDMA + 0x3f sdPtd */ - volatile uint8 IPR4; /* MBAR_SDMA + 0x40 sdPtd */ - volatile uint8 IPR5; /* MBAR_SDMA + 0x41 sdPtd */ - volatile uint8 IPR6; /* MBAR_SDMA + 0x42 sdPtd */ - volatile uint8 IPR7; /* MBAR_SDMA + 0x43 sdPtd */ - volatile uint8 IPR8; /* MBAR_SDMA + 0x44 sdPtd */ - volatile uint8 IPR9; /* MBAR_SDMA + 0x45 sdPtd */ - volatile uint8 IPR10; /* MBAR_SDMA + 0x46 sdPtd */ - volatile uint8 IPR11; /* MBAR_SDMA + 0x47 sdPtd */ - volatile uint8 IPR12; /* MBAR_SDMA + 0x48 sdPtd */ - volatile uint8 IPR13; /* MBAR_SDMA + 0x49 sdPtd */ - volatile uint8 IPR14; /* MBAR_SDMA + 0x4a sdPtd */ - volatile uint8 IPR15; /* MBAR_SDMA + 0x4b sdPtd */ - volatile uint8 IPR16; /* MBAR_SDMA + 0x4c sdPtd */ - volatile uint8 IPR17; /* MBAR_SDMA + 0x4d sdPtd */ - volatile uint8 IPR18; /* MBAR_SDMA + 0x4e sdPtd */ - volatile uint8 IPR19; /* MBAR_SDMA + 0x4f sdPtd */ - volatile uint8 IPR20; /* MBAR_SDMA + 0x50 sdPtd */ - volatile uint8 IPR21; /* MBAR_SDMA + 0x51 sdPtd */ - volatile uint8 IPR22; /* MBAR_SDMA + 0x52 sdPtd */ - volatile uint8 IPR23; /* MBAR_SDMA + 0x53 sdPtd */ - volatile uint8 IPR24; /* MBAR_SDMA + 0x54 sdPtd */ - volatile uint8 IPR25; /* MBAR_SDMA + 0x55 sdPtd */ - volatile uint8 IPR26; /* MBAR_SDMA + 0x56 sdPtd */ - volatile uint8 IPR27; /* MBAR_SDMA + 0x57 sdPtd */ - volatile uint8 IPR28; /* MBAR_SDMA + 0x58 sdPtd */ - volatile uint8 IPR29; /* MBAR_SDMA + 0x59 sdPtd */ - volatile uint8 IPR30; /* MBAR_SDMA + 0x5a sdPtd */ - volatile uint8 IPR31; /* MBAR_SDMA + 0x5b sdPtd */ - - volatile uint32 cReqSelect; /* MBAR_SDMA + 0x5c sdPtd */ - volatile uint32 taskSize0; /* MBAR_SDMA + 0x60 sdPtd */ - volatile uint32 taskSize1; /* MBAR_SDMA + 0x64 sdPtd */ - volatile uint32 MDEDebug; /* MBAR_SDMA + 0x68 sdMdeComplex */ - volatile uint32 ADSDebug; /* MBAR_SDMA + 0x6c sdAdsTop */ - volatile uint32 Value1; /* MBAR_SDMA + 0x70 sdDbg */ - volatile uint32 Value2; /* MBAR_SDMA + 0x74 sdDbg */ - volatile uint32 Control; /* MBAR_SDMA + 0x78 sdDbg */ - volatile uint32 Status; /* MBAR_SDMA + 0x7c sdDbg */ - volatile uint32 PTDDebug; /* MBAR_SDMA + 0x80 sdPtd */ -} sdma_regs; - -#define SDMA_PTDCNTRL_TI 0x8000 -#define SDMA_PTDCNTRL_TEA 0x4000 -#define SDMA_PTDCNTRL_HE 0x2000 -#define SDMA_PTDCNTRL_PE 0x0001 - -#define SDMA_CREQSELECT_REQ31_MASK (~0xC0000000UL) -#define SDMA_CREQSELECT_REQ30_MASK (~0x30000000UL) -#define SDMA_CREQSELECT_REQ29_MASK (~0x0C000000UL) -#define SDMA_CREQSELECT_REQ28_MASK (~0x03000000UL) -#define SDMA_CREQSELECT_REQ27_MASK (~0x00C00000UL) -#define SDMA_CREQSELECT_REQ26_MASK (~0x00300000UL) -#define SDMA_CREQSELECT_REQ25_MASK (~0x000C0000UL) -#define SDMA_CREQSELECT_REQ24_MASK (~0x00030000UL) -#define SDMA_CREQSELECT_REQ23_MASK (~0x0000C000UL) -#define SDMA_CREQSELECT_REQ22_MASK (~0x00003000UL) -#define SDMA_CREQSELECT_REQ21_MASK (~0x00000C00UL) -#define SDMA_CREQSELECT_REQ20_MASK (~0x00000300UL) -#define SDMA_CREQSELECT_REQ19_MASK (~0x000000C0UL) -#define SDMA_CREQSELECT_REQ18_MASK (~0x00000030UL) -#define SDMA_CREQSELECT_REQ17_MASK (~0x0000000CUL) -#define SDMA_CREQSELECT_REQ16_MASK (~0x00000003UL) - -#define SDMA_CREQSELECT_REQ31_ALWAYS31 0xC0000000UL -#define SDMA_CREQSELECT_REQ30_ALWAYS30 0x30000000UL -#define SDMA_CREQSELECT_REQ29_ALWAYS29 0x0C000000UL -#define SDMA_CREQSELECT_REQ28_ALWAYS28 0x03000000UL -#define SDMA_CREQSELECT_REQ27_ALWAYS27 0x00C00000UL -#define SDMA_CREQSELECT_REQ26_ALWAYS26 0x00300000UL -#define SDMA_CREQSELECT_REQ25_ALWAYS25 0x000C0000UL -#define SDMA_CREQSELECT_REQ24_ALWAYS24 0x00030000UL -#define SDMA_CREQSELECT_REQ23_ALWAYS23 0x0000C000UL -#define SDMA_CREQSELECT_REQ22_ALWAYS22 0x00003000UL -#define SDMA_CREQSELECT_REQ21_ALWAYS21 0x00000C00UL -#define SDMA_CREQSELECT_REQ20_ALWAYS20 0x00000300UL -#define SDMA_CREQSELECT_REQ19_ALWAYS19 0x000000C0UL -#define SDMA_CREQSELECT_REQ18_ALWAYS18 0x00000030UL -#define SDMA_CREQSELECT_REQ17_ALWAYS17 0x0000000CUL -#define SDMA_CREQSELECT_REQ16_ALWAYS16 0x00000003UL - -#define SDMA_CREQSELECT_REQ31_SCTIMER7 0x00000000UL -#define SDMA_CREQSELECT_REQ30_SCTIMER6 0x00000000UL -#define SDMA_CREQSELECT_REQ29_SCTIMER5 0x00000000UL -#define SDMA_CREQSELECT_REQ28_SCTIMER4 0x00000000UL -#define SDMA_CREQSELECT_REQ27_SCTIMER3 0x00000000UL -#define SDMA_CREQSELECT_REQ26_PSC6_TX 0x00000000UL -#define SDMA_CREQSELECT_REQ25_PSC6_RX 0x00000000UL -#define SDMA_CREQSELECT_REQ24_I2C1_TX 0x00000000UL -#define SDMA_CREQSELECT_REQ23_I2C1_RX 0x00000000UL -#define SDMA_CREQSELECT_REQ22_I2C2_TX 0x00000000UL -#define SDMA_CREQSELECT_REQ21_I2C2_RX 0x00000000UL -#define SDMA_CREQSELECT_REQ20_PSC4_TX 0x00000000UL -#define SDMA_CREQSELECT_REQ19_PSC4_RX 0x00000000UL -#define SDMA_CREQSELECT_REQ18_PSC5_TX 0x00000000UL -#define SDMA_CREQSELECT_REQ17_PSC5_RX 0x00000000UL -#define SDMA_CREQSELECT_REQ16_LP 0x00000000UL - -#define SDMA_CREQSELECT_ALWAYS30 0xC0000000UL - -#endif /* __MGT5200_SDMA_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/include/ppctypes.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/include/ppctypes.h deleted file mode 100644 index ff2aed1997..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/include/ppctypes.h +++ /dev/null @@ -1,43 +0,0 @@ -#ifndef __PPCTYPES_H -#define __PPCTYPES_H - -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - -typedef unsigned char uint8; -typedef unsigned short uint16; -typedef unsigned long uint32; -typedef unsigned long long uint64; - -typedef signed char sint8; -typedef signed short sint16; -typedef signed long sint32; -typedef signed long long sint64; - -typedef volatile unsigned char reg8; -typedef volatile unsigned short reg16; -typedef volatile unsigned long reg32; -typedef volatile unsigned long long reg64; - -#endif /* __PPCTYPES_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/bestcomm_api_mem.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/bestcomm_api_mem.h deleted file mode 100644 index dc529d6a22..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/bestcomm_api_mem.h +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef __TASK_API_BESTCOMM_API_MEM_H -#define __TASK_API_BESTCOMM_API_MEM_H 1 - -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - -#include "../include/mgt5200/mgt5200.h" - -/* - * An extern global variable is used here for the MBAR since it must - * be passed into the API for processes that use virtual memory. - */ -extern uint8 *MBarGlobal; - -#define SDMA_TASK_BAR (MBarGlobal+MBAR_SDMA+0x000) -#define SDMA_INT_PEND (MBarGlobal+MBAR_SDMA+0x014) -#define SDMA_INT_MASK (MBarGlobal+MBAR_SDMA+0x018) -#define SDMA_TCR (MBarGlobal+MBAR_SDMA+0x01C) -#define SDMA_TASK_SIZE (MBarGlobal+MBAR_SDMA+0x060) - -#define PCI_TX_PKT_SIZE (MBarGlobal+MBAR_SCPCI+0x000) -#define PCI_TX_NTBIT (MBarGlobal+MBAR_SCPCI+0x01C) -#define PCI_TX_FIFO (MBarGlobal+MBAR_SCPCI+0x040) -#define PCI_TX_FIFO_STAT (MBarGlobal+MBAR_SCPCI+0x045) -#define PCI_TX_FIFO_GRAN (MBarGlobal+MBAR_SCPCI+0x048) -#define PCI_TX_FIFO_ALARM (MBarGlobal+MBAR_SCPCI+0x04E) - -#define PCI_RX_PKT_SIZE (MBarGlobal+MBAR_SCPCI+0x080) -#define PCI_RX_NTBIT (MBarGlobal+MBAR_SCPCI+0x09C) -#define PCI_RX_FIFO (MBarGlobal+MBAR_SCPCI+0x0C0) -#define PCI_RX_FIFO_STAT (MBarGlobal+MBAR_SCPCI+0x0C5) -#define PCI_RX_FIFO_GRAN (MBarGlobal+MBAR_SCPCI+0x0C8) -#define PCI_RX_FIFO_ALARM (MBarGlobal+MBAR_SCPCI+0x0CE) - - -#define FEC_RX_FIFO (MBarGlobal+MBAR_ETHERNET+0x184) -#define FEC_RX_FIFO_STAT (MBarGlobal+MBAR_ETHERNET+0x188) -#define FEC_RX_FIFO_GRAN (MBarGlobal+MBAR_ETHERNET+0x18C) -#define FEC_RX_FIFO_ALARM (MBarGlobal+MBAR_ETHERNET+0x198) - -#define FEC_TX_FIFO (MBarGlobal+MBAR_ETHERNET+0x1A4) -#define FEC_TX_FIFO_STAT (MBarGlobal+MBAR_ETHERNET+0x1A8) -#define FEC_TX_FIFO_GRAN (MBarGlobal+MBAR_ETHERNET+0x1AC) -#define FEC_TX_FIFO_ALARM (MBarGlobal+MBAR_ETHERNET+0x1B8) - -#endif /* __TASK_API_BESTCOMM_API_MEM_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/bestcomm_cntrl.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/bestcomm_cntrl.h deleted file mode 100644 index 3712bae3d0..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/bestcomm_cntrl.h +++ /dev/null @@ -1,282 +0,0 @@ -#ifndef __TASK_API_BESTCOMM_CNTRL_H -#define __TASK_API_BESTCOMM_CNTRL_H 1 - -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - -/******************************************************************************* - * Defines to control SmartDMA and its tasks. These defines are used for the - * task build process to minimize disconnects at the task/driver interface. - ******************************************************************************/ - -#define SDMA_INT_BIT_DBG 31 /* debug interrupt bit */ -#define SDMA_INT_BIT_TEA 28 /* TEA interrupt bit */ -#define SDMA_INT_BIT_TEA_TASK 24 /* lsb for TEA task number */ -#define SDMA_INT_BIT_IMPL 0x9000FFFF - -#define SDMA_PTDCTRL_BIT_TEA 14 /* TEA detection enable bit */ - -#define SDMA_TCR_BIT_AUTO 15 /* auto start bit */ -#define SDMA_TCR_BIT_HOLD 5 /* hold initiator bit */ - -#define SDMA_STAT_BIT_ALARM 17 -#define SDMA_FIFO_ALARM_MASK 0x0020000 - -#define SDMA_DRD_BIT_TFD 27 /* mark last buffer of frame */ -#define SDMA_DRD_BIT_INT 26 /* interrupt after buffer processed */ -#define SDMA_DRD_BIT_INIT 21 /* lsb position of initiator */ -#define SDMA_DRD_MASK_FLAGS 0x0C000000 /* BD_FLAGS flag bits */ -#define SDMA_DRD_MASK_LENGTH 0x03FFFFFF /* BD_FLAGS length mask */ -#define SDMA_BD_BIT_READY 30 /* Status BD ready bit */ -#ifdef SAS_COMPILE - #define SDMA_BD_MASK_READY constant(1<<SDMA_BD_BIT_READY) -#else - #define SDMA_BD_MASK_READY (1<<SDMA_BD_BIT_READY) -#endif -#define SDMA_BD_MASK_SIGN 0x7FFFFFFF /* task code needs Status>0 */ - -#define SDMA_PRAGMA_BIT_RSV 7 /* reserved pragma bit */ -#define SDMA_PRAGMA_BIT_PRECISE_INC 6 /* increment 0=when possible, 1=iter end */ -#define SDMA_PRAGMA_BIT_RST_ERROR_NO 5 /* don't reset errors on task enable */ -#define SDMA_PRAGMA_BIT_PACK 4 /* pack data enable */ -#define SDMA_PRAGMA_BIT_INTEGER 3 /* data alignment 0=frac(msb), 1=int(lsb) */ -#define SDMA_PRAGMA_BIT_SPECREAD 2 /* XLB speculative read enable */ -#define SDMA_PRAGMA_BIT_CW 1 /* write line buffer enable */ -#define SDMA_PRAGMA_BIT_RL 0 /* read line buffer enable */ - -#define SDMA_TASK_ENTRY_BYTES 32 /* Bytes per task in entry table */ -#define SDMA_TASK_GROUP_NUM 16 /* Number of tasks per task group */ -#define SDMA_TASK_GROUP_BYTES (SDMA_TASK_ENTRY_BYTES*SDMA_TASK_GROUP_NUM) - - -/******************************************************************************* - * Task group control macros, use when TaskNum > 15 - ******************************************************************************/ -#define SDMA_TASKNUM_EXT(OldTaskNum) (OldTaskNum%16) - -#define SDMA_TASKBAR_CHANGE(sdma, OldTaskNum) { \ - sdma->taskBar += (((int)(OldTaskNum/SDMA_TASK_GROUP_NUM))*SDMA_TASK_GROUP_BYTES); \ -} - -#define SDMA_TASKBAR_RESTORE(sdma, OldTaskNum) { \ - sdma->taskBar -= (((int)(OldTaskNum/SDMA_TASK_GROUP_NUM))*SDMA_TASK_GROUP_BYTES); \ -} - - -/******************************************************************************* - * Task control macros - ******************************************************************************/ -#define SDMA_TASK_CFG(RegAddr, TaskNum, AutoStart, AutoStartNum) { \ - *(((volatile uint16 *)RegAddr)+TaskNum) = (uint16)(0x0000 | \ - ((AutoStart!=0)<<7) | \ - (AutoStartNum&0xF) ); \ -} - -#define SDMA_TASK_AUTO_START(RegAddr, TaskNum, AutoStart, AutoStartNum) { \ - *(((volatile uint16 *)RegAddr)+TaskNum) = (uint16)((*(((volatile uint16 *)RegAddr)+TaskNum) & \ - (uint16) 0xff30) | ((uint16)(0x0000 | \ - ((AutoStart!=0)<<7) | \ - (AutoStartNum&0xF)) )); \ -} - -#define SDMA_TASK_ENABLE(RegAddr, TaskNum) { \ - *(((volatile uint16 *)RegAddr)+TaskNum) |= (uint16)0x8000; \ -} - -#define SDMA_TASK_DISABLE(RegAddr, TaskNum) { \ - *(((volatile uint16 *)RegAddr)+TaskNum) &= ~(uint16)0x8000; \ -} - -#define SDMA_TASK_STATUS(RegAddr, TaskNum) \ - *(((volatile uint16 *)RegAddr)+TaskNum) - - -/******************************************************************************* - * Interrupt control macros - ******************************************************************************/ -#define SDMA_INT_ENABLE(RegAddr, Bit) \ - do { \ - rtems_interrupt_level level; \ - rtems_interrupt_disable(level); \ - *((volatile uint32 *) RegAddr) &= ~((uint32) (1 << Bit)); \ - rtems_interrupt_enable(level); \ - } while (0) - -#define SDMA_INT_DISABLE(RegAddr, Bit) \ - do { \ - rtems_interrupt_level level; \ - rtems_interrupt_disable(level); \ - *((volatile uint32 *) (RegAddr)) |= ((uint32)(1 << Bit)); \ - rtems_interrupt_enable(level); \ - } while (0) - -#define SDMA_INT_SOURCE(RegPend, RegMask) \ - (*((volatile uint32 *)(RegPend)) & (~*((volatile uint32 *)(RegMask))) & (uint32)SDMA_INT_BIT_IMPL) - -#define SDMA_INT_PENDING(RegPend, RegMask) \ - (*((volatile uint32 *)(RegPend)) & (~*((volatile uint32 *)(RegMask)))) - -#define SDMA_INT_TEST(IntSource, Bit) \ - (((uint32)IntSource) & ((uint32)(1<<Bit))) - -/* - * define SDMA_INT_FIND to get int bit rather than scan all bits use - * cntlzw - */ - -/* Clear the IntPend bit */ -#define SDMA_CLEAR_IEVENT(RegAddr, Bit) { \ - *((volatile uint32 *)RegAddr) = ((uint32)(1<<Bit)); \ -} - -#define SDMA_GET_PENDINGBIT(sdma, Bit) \ - (sdma->IntPend & (uint32)(1<<Bit)) - -#define SDMA_GET_MASKBIT(sdma, Bit) \ - (sdma->IntMask & (uint32)(1<<Bit)) - - -/******************************************************************************* - * SmartDMA FIFO control macros - ******************************************************************************/ - -/******************************************************************************* - * SmartDMA TEA detection control macros - ******************************************************************************/ -/* Enable SmartDMA TEA detection and TEA interrupt */ -#define SDMA_TEA_ENABLE(sdma) { \ - SDMA_INT_ENABLE(sdma, SDMA_INT_BIT_TEA); \ - sdma->PtdCntrl &= ~((uint32)(1<<SDMA_PTDCTRL_BIT_TEA)); \ -} - -/* Disable SmartDMA TEA detection and TEA interrupt */ -#define SDMA_TEA_DISABLE(sdma) { \ - SDMA_INT_DISABLE(sdma, SDMA_INT_BIT_TEA); \ - sdma->PtdCntrl |= ((uint32)(1<<SDMA_PTDCTRL_BIT_TEA)); \ -} - -/* Clear the TEA interrupt */ -#define SDMA_TEA_CLEAR(sdma) { \ - sdma->IntPend = ((uint32)(0x1F<<SDMA_INT_BIT_TEA_TASK)); \ -} - -/* Determine which task caused a TEA on the XLB */ -#define SDMA_TEA_SOURCE(RegPend) \ - (uint32)(((*(volatile uint32 *)RegPend)>>SDMA_INT_BIT_TEA_TASK) & 0xF) - - -/******************************************************************************* - * SmartDMA debug control macros - ******************************************************************************/ -/* Enable the SmartDMA debug unit and DBG interrupt */ -/* add sdma->dbg_regs setup? */ -#define SDMA_DBG_ENABLE(sdma) { \ - SDMA_INT_ENABLE(sdma, SDMA_INT_BIT_DBG); \ -} - -#define SDMA_DBG_DISABLE(sdma) { \ - SDMA_INT_DISABLE(sdma, SDMA_INT_BIT_DBG); \ -} - -/* Clear the debug interrupt */ -#define SDMA_DBG_CLEAR(sdma) { \ - SDMA_CLEAR_IEVENT(sdma, SDMA_INT_BIT_DBG); \ -} - -#define SDMA_DBG_MDE(dst, sdma, addr) { \ - sdma->MDEDebug = addr; \ - dst = sdma->MDEDebug; \ -} - -#define SDMA_DBG_ADS(dst, sdma, addr) { \ - sdma->ADSDebug = addr; \ - dst = sdma->ADSDebug; \ -} - -#define SDMA_DBG_PTD(dst, sdma, addr) { \ - sdma->PTDDebug = addr; \ - dst = sdma->PTDDebug; \ -} - - -/******************************************************************************* - * Initiator control macros - ******************************************************************************/ - -/* This macro may not work, getting compile errors */ -/* Set the Transfer Size */ -/* Note that masking the size w/ 0x3 gives the desired value for uint32 */ -/* (expressed as 4), namely 0. */ -#define SDMA_SET_SIZE(RegAddr, TaskNum, SrcSize, DstSize) \ - *(((volatile uint8 *)RegAddr)+((uint32)(TaskNum/2))) = \ - (uint8)((*(((volatile uint8 *)RegAddr)+((uint32)(TaskNum/2))) & \ - ((TaskNum%2) ? 0xf0 : 0x0f)) | \ - ((uint8)(((SrcSize & 0x3)<<2) | \ - ( DstSize & 0x3 ) ) <<(4*((int)(1-(TaskNum%2)))))); - -/* This macro may not work */ -/* Set the Initiator in TCR */ -#define SDMA_SET_INIT(RegAddr, TaskNum, Initiator) \ -{ \ - *(((volatile uint16 *)RegAddr)+TaskNum) &= (uint16)0xE0FF; \ - *(((volatile uint16 *)RegAddr)+TaskNum) |= (((0x01F & Initiator)<<8) | \ - (0<<SDMA_TCR_BIT_HOLD)); \ -} - -/* Change DRD initiator number */ -#define SDMA_INIT_CHANGE(task, oldInitiator, newInitiator) { \ - int i; \ - for (i=0; i<task->NumDRD; i++) { \ - if (SDMA_INIT_READ(task->DRD[i]) == (uint32)oldInitiator) { \ - SDMA_INIT_WRITE(task->DRD[i],newInitiator); \ - } \ - } \ -} - -/* Set the Initiator Priority */ -#define SDMA_SET_INITIATOR_PRIORITY(sdma, initiator, priority) \ - *(((volatile uint8 *)&sdma->IPR0)+initiator) = priority; - - -/* Read DRD initiator number */ -#define SDMA_INIT_READ(PtrDRD) \ - (((*(volatile uint32 *)PtrDRD)>>SDMA_DRD_BIT_INIT) & (uint32)0x1F) - -/* Write DRD initiator number */ -#define SDMA_INIT_WRITE(PtrDRD, Initiator) { \ - *(volatile uint32 *)PtrDRD = ((*(volatile uint32 *)PtrDRD) & 0xFC1FFFFF) | \ - (Initiator<<SDMA_DRD_BIT_INIT); \ -} - -/* Change DRD initiator number */ -#define SDMA_INIT_CHANGE(task, oldInitiator, newInitiator) { \ - int i; \ - for (i=0; i<task->NumDRD; i++) { \ - if (SDMA_INIT_READ(task->DRD[i]) == (uint32)oldInitiator) { \ - SDMA_INIT_WRITE(task->DRD[i],newInitiator); \ - } \ - } \ -} - -#endif /* __TASK_API_BESTCOMM_CNTRL_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/tasksetup_bdtable.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/tasksetup_bdtable.h deleted file mode 100644 index 7f261d21ee..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/tasksetup_bdtable.h +++ /dev/null @@ -1,86 +0,0 @@ -#ifndef __TASK_API_TASKSETUP_BDTABLE_H -#define __TASK_API_TASKSETUP_BDTABLE_H 1 - -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - -/* - * Table of BD rings for all BestComm tasks indexed by task ID. - * - * +-----+------+--------------+ +------+-------+ - * 0: |numBD|numPtr|BDTablePtr ---|--->|status|dataPtr| - * +-----+------+--------------+ +------+-------+ - * 1: |numBD|numPtr|BDTablePtr | |status|dataPtr| - * +-----+------+--------------+ . . . - * 2: |numBD|numPtr|BDTablePtr ---|-+ . . . - * . . . | . . . - * . . . | |status|dataPtr| - * . . . | +------+-------+ - * 15:|numBD|numPtr|BDTablePtr | | - * +-----+------+--------------+ | - * | - * V - * +------+--------+--------+ - * |status|dataPtr0|dataPtr1| - * +------+--------+--------+ - * |status|dataPtr0|dataPtr1| - * . . . . - * . . . . - * . . . . - * |status|dataPtr0|dataPtr1| - * +------+--------+--------+ - */ -typedef struct { - uint16 numBD; /* Size of BD ring */ - uint8 numPtr; /* Number of data buffer pointers per BD */ - uint8 apiConfig; /* API configuration flags */ - void *BDTablePtr; /* Pointer to BD tables, must be cast to TaskBD1_t */ - /* or TaskBD2_t */ - volatile uint32 - *BDStartPtr; /* Task's current BD pointer. This pointer is - * used to set a task's BD pointer upon startup. - * It is only valid for BD tasks and only after - * TaskSetup() or TaskBDReset() are called. You - * cannot use this to track a task's BD pointer. - */ - uint16 currBDInUse; /* Current number of buffer descriptors assigned but*/ - /* not released yet. */ -} TaskBDIdxTable_t; - -typedef enum { - API_CONFIG_NONE = 0x00, - API_CONFIG_BD_FLAG = 0x01 -} ApiConfig_t; - -/* - * Allocates BD table if needed and updates the BD index table. - * Do we want to hide this from the C API since it operates on task API? - */ -void TaskSetup_BDTable(volatile uint32 *BasePtr, - volatile uint32 *LastPtr, - volatile uint32 *StartPtr, - int TaskNum, uint32 NumBD, uint16 MaxBD, - uint8 NumPtr, ApiConfig_t ApiConfig, uint32 Status ); - -#endif /* __TASK_API_TASKSETUP_BDTABLE_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/tasksetup_general.h b/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/tasksetup_general.h deleted file mode 100644 index be7bb9d7b0..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/bestcomm/task_api/tasksetup_general.h +++ /dev/null @@ -1,624 +0,0 @@ -/****************************************************************************** -* -* Copyright (c) 2004 Freescale Semiconductor, Inc. -* -* Permission is hereby granted, free of charge, to any person obtaining a -* copy of this software and associated documentation files (the "Software"), -* to deal in the Software without restriction, including without limitation -* the rights to use, copy, modify, merge, publish, distribute, sublicense, -* and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included -* in all copies or substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -* OTHER DEALINGS IN THE SOFTWARE. -* -******************************************************************************/ - -/* - * Task builder generates a set #defines per configured task to - * condition this templete file. - */ - -/********************************************************** - * - * Required #defines: - * ------------------ - * TASKSETUP_NAME: - * TaskSetup function name, set to TaskSetup_<TASK_NAME> - * TASK_API: - * task API defined in dma_image.h - * MAX_BD: - * <=0 : non-BD task - * else: number of BD in BD table - * BD_FLAG: - * 0 : no flag implemented for BD - * else: flags can be passed on a per BD basis - * MISALIGNED: - * 0 : task API supports Bytes%IncrBytes==0 - * else: task API supports any parameter settings - * AUTO_START: - * <-1 : do not start a task after task completion - * -1 : auto start the task after task completion - * <MAX_TASKS: auto start task with the TaskID = AUTO_START - * else : do not start a task after task completion - * INITIATOR_DATA: - * <0 : runtime configurable - * else: assume INITATOR_DATA equal hard-coded task initiator - * TYPE_SRC: (needs to be consistent with Task API) - * FLEX_T : Task API TYPE_SRC = flex, SzSrc defines size - * UINT8_T : Task API TYPE_SRC = char - * UINT16_T: Task API TASK_SRC = short - * UINT32_T: Task API TASK_SRC = int - * INCR_TYPE_SRC: - * 0 : FIFO address, do not implement data pointer - * 1 : automatic, set INCR_SRC based on SzSrc parameter - * 2 : runtime, set INCR_SRC to IncrSrc parameter - * else: used hard-coded INCR_SRC - * INCR_SRC: - * INCR_TYPE_SRC=0: force INCR_SRC=0 - * else : use for src pointer increment - * TYPE_DST: (needs to be consistent with Task API) - * FLEX_T : Task API TYPE_DST = flex, SzDst defines size - * UINT8_T : Task API TYPE_DST = char - * UINT16_T: Task API TASK_DST = short - * UINT32_T: Task API TASK_DST = int - * INCR_TYPE_DST: - * 0 : FIFO address, do not implement data pointer - * 1 : automatic, set INCR_DST based on SzDst parameter - * 2 : runtime, set INCR_DST to IncrDst parameter - * else: used hard-coded INCR_DST - * INCR_DST: - * INCR_TYPE_DST=0: force INCR_DST=0 - * else : use for dst pointer increment - * PRECISE_INCREMENT: - * 0 : increment when possible - * else: increment at end of iteration - * NO_ERROR_RESET: - * 0 : reset error flags on task enable - * else: leave error flags unmodified on task enable - * PACK_DATA: - * 0 : do not pack data - * else: pack data based on data type - * INTEGER_MODE: - * 0 : type conversions handle as fixed point numbers - * else: type conversions handle as integers - * WRITE_LINE_BUFFER: - * 0 : do not use write line buffers - * else: enable write line buffers - * READ_LINE_BUFFER: - * 0 : do not use read line buffers - * else: enable read line buffers - * SPEC_READS: - * 0 : do not speculatively read - * else: speculatively read data ahead of DMA engine - * - * Optional #defines: - * ------------------ - * MAX_TASKS: - * 1 : #define MAX_TASKS>0 - * else: 16 - * ITERATIONS: - * 1 : #define ITERATIONS>0 - * else: 1 - * INCR_BYTES: - * This macro is defined based on following priority: - * 1 : INCR_SRC != 0 - * 2 : DST_TYPE != 0 - * 3 : #defined INCR_BYTES<0 - * else: -4 (SZ_UINT32) - * DEBUG_BESTCOMM_API: - * >0 : print basic debug messages - * >=10: also print C-API interface variables - * >=20: also print task API interface variables - * else: do nothing - * - **********************************************************/ - -#if defined(__rtems__) || defined(MPC5200_BAPI_LIBC_HEADERS) -#include <stdlib.h> -#endif - -#include "../dma_image.h" - -#include "../bestcomm_api.h" -#include "tasksetup_bdtable.h" - -#include "bestcomm_api_mem.h" -#include "bestcomm_cntrl.h" - -#ifndef DEBUG_BESTCOMM_API - #define DEBUG_BESTCOMM_API 0 -#endif - -#ifdef FLEX_T - #undef FLEX_T -#endif -#define FLEX_T SZ_FLEX - -#ifdef UINT8_T - #undef UINT8_T -#endif -#define UINT8_T SZ_UINT8 - -#ifdef UINT16_T - #undef UINT16_T -#endif -#define UINT16_T SZ_UINT16 - -#ifdef UINT32_T - #undef UINT32_T -#endif -#define UINT32_T SZ_UINT32 - -#if (INCR_TYPE_SRC==0) /* FIFO address, no data pointer */ - #undef INCR_SRC - #define INCR_SRC 0 -#endif - -#if (INCR_TYPE_DST==0) /* FIFO address, no data pointer */ - #undef INCR_DST - #define INCR_DST 0 -#endif - -#ifndef MAX_TASKS - #define MAX_TASKS 16 -#else - #if (MAX_TASKS<=0) - #undef MAX_TASKS - #define MAX_TASKS 16 - #endif -#endif - -#ifndef ITERATIONS - #define ITERATIONS 1 -#else - #if (ITERATIONS<=0) - #undef ITERATIONS - #define ITERATIONS 1 - #endif -#endif - -#ifndef INCR_BYTES - #define INCR_BYTES -4 -#else - #if (INCR_BYTES>=0) - #undef INCR_BYTES - #define INCR_BYTES -4 - #endif -#endif - -/* - * These ifndefs will go away when support in task_capi wrappers - * in the image directories - */ -#ifndef PRECISE_INCREMENT - #define PRECISE_INCREMENT 0 /* bit=6 SAS->1, increment 0=when possible, 1=at the end of interation */ -#endif -#ifndef NO_ERROR_RESET - #define NO_ERROR_RESET 0 /* bit=5 SAS->0, do not reset error codes on task enable */ -#endif -#ifndef PACK_DATA - #define PACK_DATA 0 /* bit=4 SAS->0, pack data enable */ -#endif -#ifndef INTEGER_MODE - #define INTEGER_MODE 0 /* bit=3 SAS->0, 0=fractional(msb aligned), 1=integer(lsb aligned) */ -#endif -#ifndef SPEC_READS - #define SPEC_READS 1 /* bit=2 SAS->0, XLB speculative read enable */ -#endif -#ifndef WRITE_LINE_BUFFER - #define WRITE_LINE_BUFFER 1 /* bit=1 SAS->0, write line buffer enable */ -#endif -#ifndef READ_LINE_BUFFER - #define READ_LINE_BUFFER 1 /* bit=0 SAS->0, read line buffer enable */ -#endif -#define SDMA_PRAGMA (0 <<SDMA_PRAGMA_BIT_RSV ) | \ - (PRECISE_INCREMENT<<SDMA_PRAGMA_BIT_PRECISE_INC ) | \ - (NO_ERROR_RESET <<SDMA_PRAGMA_BIT_RST_ERROR_NO) | \ - (PACK_DATA <<SDMA_PRAGMA_BIT_PACK ) | \ - (INTEGER_MODE <<SDMA_PRAGMA_BIT_INTEGER ) | \ - (SPEC_READS <<SDMA_PRAGMA_BIT_SPECREAD ) | \ - (WRITE_LINE_BUFFER<<SDMA_PRAGMA_BIT_CW ) | \ - (READ_LINE_BUFFER <<SDMA_PRAGMA_BIT_RL ) - -#ifndef TASKSETUP_NAME - #define PREPEND_TASKSETUP(name) TaskSetup_ ## name - #define FUNC_PREPEND_TASKSETUP(name) PREPEND_TASKSETUP(name) - #define TASKSETUP_NAME FUNC_PREPEND_TASKSETUP(TASK_BASE) -#endif - -#ifndef TASK_API - #define APPEND_API(name) name ## _api_t - #define FUNC_APPEND_API(name) APPEND_API(name) - #define TASK_API FUNC_APPEND_API(TASK_BASE) -#endif - -#ifndef INIT_DMA_IMAGE - #define PREPEND_INITDMA(name) init_dma_image_ ## name - #define FUNC_PREPEND_INITDMA(name) PREPEND_INITDMA(name) - #define INIT_DMA_IMAGE FUNC_PREPEND_INITDMA(TASK_BASE) -#endif - -#define DRD_INIT_MASK 0xfc1fffff -#define DRD_EXT_FLAG 0x40000000 -#define DRD_INIT_OFFSET 21 - -TaskId TASKSETUP_NAME(TASK_API *TaskAPI, - TaskSetupParamSet_t *TaskSetupParams) -{ - TaskId TaskNum; -#if ((MAX_BD>0)||(DEBUG_BESTCOMM_API>0)) - uint32 Status = 0; -#endif -#if ((MAX_BD>0)&&((INCR_TYPE_SRC!=0)||(INCR_TYPE_DST!=0))||(DEBUG_BESTCOMM_API>0)) - uint8 NumPtr = 0; -#endif -#if (INITIATOR_DATA<0) /* runtime configurable */ - uint32 i, ext; -#endif - - INIT_DMA_IMAGE((uint8 *)(((sdma_regs *)(SDMA_TASK_BAR))->taskBar), MBarPhysOffsetGlobal); - - TaskNum = (TaskId)SDMA_TASKNUM_EXT(TaskAPI->TaskNum); - - TaskRunning[TaskNum] = 0; - -#if (DEBUG_BESTCOMM_API>0) - printf("\nBestComm API Debug Display Mode Enabled\n\n"); - printf("TaskSetup: TaskID=%d\n", TaskNum); - if (Status!=0) { - printf("TaskSetup: Rx task\n"); - } else { - printf("TaskSetup: Tx or DP task\n"); - } -#endif - - /* Set the task pragma settings */ - *(TaskAPI->TaskPragma)= (uint8) SDMA_PRAGMA; - -#if (MAX_BD>0) /* Buffer Descriptors */ - - #if (INCR_TYPE_SRC!=0) - ++NumPtr; - #endif - #if (INCR_TYPE_DST!=0) - ++NumPtr; - #endif - - #if (DEBUG_BESTCOMM_API>0) - printf("TaskSetup: Using %d buffer descriptors, each with %d data pointers\n", MAX_BD, NumPtr); - #endif - - /* Allocate BD table SRAM storage, - * and pass addresses to task API */ - - TaskSetup_BDTable(TaskAPI->BDTableBase, - TaskAPI->BDTableLast, - TaskAPI->BDTableStart, - TaskNum, - TaskSetupParams->NumBD, - MAX_BD, NumPtr, - BD_FLAG, Status); - - *TaskAPI->AddrEnable = (uint32)((uint32)(((uint16 *)SDMA_TCR)+TaskNum) + MBarPhysOffsetGlobal); - - #if BD_FLAG - - #if (DEBUG_BESTCOMM_API>0) - printf("TaskSetup: Buffer descriptor flags are enabled\n"); - #endif - - /* always assume 2nd to last DRD */ - *((TaskAPI->AddrDRD)) = (uint32)((uint32)TaskAPI->DRD[TaskAPI->AddrDRDIdx] + MBarPhysOffsetGlobal); - #endif /* #if BD_FLAG */ - -#else /* No Buffer Descriptors */ - -/* #error ATA should not be non-BD */ - - #if (DEBUG_BESTCOMM_API>0) - printf("TaskSetup: Task will complete %d iterations before disabling\n"); - #endif - - *((TaskAPI->IterExtra)) = (uint32)(ITERATIONS-1); -#endif /* #if (MAX_BD>0) */ - -/* Setup auto start */ -#if (AUTO_START <= -2 ) /* do not start a task */ - #if (DEBUG_BESTCOMM_API>0) - printf("TaskSetup: Auto task start disabled\n"); - #endif - SDMA_TASK_CFG(SDMA_TCR, TaskNum, 0, TaskNum); -#elif (AUTO_START <= -1 ) /* restart task */ - #if (DEBUG_BESTCOMM_API>0) - printf("TaskSetup: Auto start task\n"); - #endif - SDMA_TASK_CFG(SDMA_TCR, TaskNum, 1, TaskNum); -#elif (AUTO_START < MAX_TASKS) /* start specific task */ - #if (DEBUG_BESTCOMM_API>0) - printf("TaskSetup: Auto start task with TaskID=%d\n", AUTO_START); - #endif - SDMA_TASK_CFG(SDMA_TCR, TaskNum, 1, AUTO_START); -#else /* do not start a task */ - #if (DEBUG_BESTCOMM_API>0) - printf("TaskSetup: Auto task start disabled\n"); - #endif - SDMA_TASK_CFG(SDMA_TCR, TaskNum, 0, TaskNum); -#endif - -#if (INITIATOR_DATA<0) /* runtime configurable */ - SDMA_SET_INIT(SDMA_TCR, TaskNum, TaskSetupParams->Initiator); - - /* - * Hard-code the task initiator in the DRD to avoid a problem w/ the - * hold initiator bit in the TCR. - */ - ext = 0; - for (i = 0; i < TaskAPI->NumDRD; i++) { - if (ext == 0) - { -#if (DEBUG_BESTCOMM_API>=10) - printf("TaskSetup: DRD[%d] initiator = %d\n", i, ((*(TaskAPI->DRD[i]) & ~DRD_INIT_MASK) >> DRD_INIT_OFFSET)); -#endif - if (((*(TaskAPI->DRD[i]) & ~DRD_INIT_MASK) >> DRD_INIT_OFFSET) != INITIATOR_ALWAYS) { -#if (DEBUG_BESTCOMM_API>=10) - printf("TaskSetup: Replacing DRD[%d] initiator with %d\n", i, TaskSetupParams->Initiator); -#endif - *(TaskAPI->DRD[i]) = (*(TaskAPI->DRD[i]) & DRD_INIT_MASK) - | (TaskSetupParams->Initiator << DRD_INIT_OFFSET); - } - - if ((*(TaskAPI->DRD[i]) & DRD_EXT_FLAG) != 0) - { - ext = 1; - } - } - else - { - if ((*(TaskAPI->DRD[i]) & DRD_EXT_FLAG) == 0) - { - ext = 0; - } - } - } - -#else /* INITIATOR_DATA >= 0 */ - TaskSetupParams->Initiator = INITIATOR_DATA; -#endif - -#if (DEBUG_BESTCOMM_API>=10) - printf("\nTaskSetup: C-API Parameter Settings Passed to TaskSetup:\n"); - printf("TaskSetup: NumBD = %d\n", TaskSetupParams->NumBD); - #if (MAX_BD>0) - printf("TaskSetup: MaxBuf = %d\n", TaskSetupParams->Size.MaxBuf); - #else - printf("TaskSetup: NumBytes = %d\n", TaskSetupParams->Size.NumBytes); - #endif - printf("TaskSetup: Initiator = %d\n", TaskSetupParams->Initiator); - printf("TaskSetup: StartAddrSrc = 0x%08X\n", TaskSetupParams->StartAddrSrc); - printf("TaskSetup: IncrSrc = %d\n", TaskSetupParams->IncrSrc); - printf("TaskSetup: SzSrc = %d\n", TaskSetupParams->SzSrc); - printf("TaskSetup: StartAddrDst = 0x%08X\n", TaskSetupParams->StartAddrDst); - printf("TaskSetup: IncrDst = %d\n", TaskSetupParams->IncrDst); - printf("TaskSetup: SzDst = %d\n", TaskSetupParams->SzDst); -#endif - -#if (DEBUG_BESTCOMM_API>=20) - printf("\nTaskSetup: Task-API Parameter Settings Before TaskSetup Initialization:\n"); - printf("TaskSetup: TaskNum = %d\n", (TaskAPI->TaskNum)); - printf("TaskSetup: TaskPragma = 0x%02X\n", *((TaskAPI->TaskPragma))); - printf("TaskSetup: TCR = 0x%04x\n", SDMA_TASK_STATUS(SDMA_TCR, TaskNum)); - - #if (MAX_BD>0) - printf("TaskSetup: BDTableBase = 0x%08X\n", *((TaskAPI->BDTableBase))); - printf("TaskSetup: BDTableLast = 0x%08X\n", *((TaskAPI->BDTableLast))); - printf("TaskSetup: BDTableStart = 0x%08X\n", *((TaskAPI->BDTableStart))); - printf("TaskSetup: AddrEnable = 0x%08X\n", *((TaskAPI->AddrEnable))); - #if (INCR_TYPE_SRC==0) - printf("TaskSetup: AddrSrcFIFO = 0x%08X\n", *((TaskAPI->AddrSrcFIFO))); - #endif - #if (INCR_TYPE_DST==0) - printf("TaskSetup: AddrDstFIFO = 0x%08X\n", *((TaskAPI->AddrDstFIFO))); - #endif - #if (BD_FLAG) - printf("TaskSetup: AddrDRD = 0x%08X\n", *((TaskAPI->AddrDRD))); - printf("TaskSetup: AddrDRDIdx = %d\n", ((TaskAPI->AddrDRDIdx))); - #endif - #else - printf("TaskSetup: IterExtra = %d\n", *((TaskAPI->IterExtra))); - #if (INCR_TYPE_SRC==0) - printf("TaskSetup: AddrSrcFIFO = 0x%08X\n", *((TaskAPI->AddrSrcFIFO))); - #else - printf("TaskSetup: StartAddrSrc = 0x%08X\n", *((TaskAPI->StartAddrSrc))); - #endif - #if (INCR_TYPE_DST==0) - printf("TaskSetup: AddrDstFIFO = 0x%08X\n", *((TaskAPI->AddrDstFIFO))); - #else - printf("TaskSetup: StartAddrDst = 0x%08X\n", *((TaskAPI->StartAddrDst))); - #endif - #endif - #if (INCR_TYPE_SRC!=0) - printf("TaskSetup: IncrSrc = 0x%04X\n", *((TaskAPI->IncrSrc))); - #if (MISALIGNED | MISALIGNED_START) - printf("TaskSetup: IncrSrcMA = 0x%04X\n", *((TaskAPI->IncrSrcMA))); - #endif - #endif - #if (INCR_TYPE_DST!=0) - printf("TaskSetup: IncrDst = 0x%04X\n", *((TaskAPI->IncrDst))); - #if (MISALIGNED | MISALIGNED_START) - printf("TaskSetup: IncrDstMA = 0x%04X\n", *((TaskAPI->IncrDstMA))); - #endif - #endif - printf("TaskSetup: Bytes = %d\n", *((TaskAPI->Bytes))); - printf("TaskSetup: IncrBytes = %d\n", *((TaskAPI->IncrBytes))); -#endif - - - *((TaskAPI->Bytes)) = (uint32)TaskSetupParams->Size.MaxBuf; - - -#if (TYPE_SRC!=FLEX_T) /* size fixed in task code */ - TaskSetupParams->SzSrc = TYPE_SRC; -#endif - -#if (INCR_TYPE_SRC==0) /* no data pointer */ - TaskSetupParams->IncrSrc = (sint16)0; - *((TaskAPI->AddrSrcFIFO)) = (uint32)TaskSetupParams->StartAddrSrc; -#else - - #if (INCR_TYPE_SRC==1) /* automatic */ - if (TaskSetupParams->IncrSrc!=0) { - TaskSetupParams->IncrSrc = (sint16)+TaskSetupParams->SzSrc; - } else { - TaskSetupParams->IncrSrc = (sint16)+TaskSetupParams->IncrSrc; - } - #elif (INCR_TYPE_SRC!=2) /* hard-coded */ - TaskSetupParams->IncrSrc = (sint16)INCR_SRC; - #endif - *((TaskAPI->IncrSrc)) = (sint16)TaskSetupParams->IncrSrc; - - #if (MAX_BD>0) /* pointer in BD Table */ - /* pass back address of first BD */ - TaskSetupParams->StartAddrSrc = (uint32)TaskGetBDRing(TaskNum); - #else - *((TaskAPI->StartAddrSrc)) = (uint32)TaskSetupParams->StartAddrSrc; - #endif - - #if MISALIGNED | MISALIGNED_START - if (TaskSetupParams->IncrSrc < 0) { - *((TaskAPI->IncrSrcMA)) = (sint16)-1; - } else if (TaskSetupParams->IncrSrc > 0) { - *((TaskAPI->IncrSrcMA)) = (sint16)+1; - } else { - *((TaskAPI->IncrSrcMA)) = (sint16)0; - } - #endif -#endif - - -#if (TYPE_DST!=FLEX_T) /* size fixed in task code */ - TaskSetupParams->SzDst = TYPE_DST; -#endif - -#if (INCR_TYPE_DST==0) /* no data pointer */ - TaskSetupParams->IncrDst = (sint16)0; - *((TaskAPI->AddrDstFIFO)) = (uint32)TaskSetupParams->StartAddrDst; -#else - #if (INCR_TYPE_DST==1) /* automatic */ - if (TaskSetupParams->IncrDst!=0) { - TaskSetupParams->IncrDst = (sint16)+TaskSetupParams->SzDst; - } else { - TaskSetupParams->IncrDst = (sint16)+TaskSetupParams->IncrDst; - } - #elif (INCR_TYPE_DST!=2) /* hard-coded */ - TaskSetupParams->IncrDst = (sint16)INCR_DST; - #endif - *((TaskAPI->IncrDst)) = (sint16)TaskSetupParams->IncrDst; - - #if (MAX_BD>0) - /* pass back address of first BD */ - TaskSetupParams->StartAddrDst = (uint32)TaskGetBDRing(TaskNum); - #else - *((TaskAPI->StartAddrDst)) = (uint32)TaskSetupParams->StartAddrDst; - #endif - - #if MISALIGNED | MISALIGNED_START - if (TaskSetupParams->IncrDst < 0) { - *((TaskAPI->IncrDstMA)) = (sint16)-1; - } else if (TaskSetupParams->IncrDst > 0) { - *((TaskAPI->IncrDstMA)) = (sint16)+1; - } else { - *((TaskAPI->IncrDstMA)) = (sint16)0; - } - #endif -#endif - -/* always use macro, only affect code with #define TYPE_? flex */ - SDMA_SET_SIZE(SDMA_TASK_SIZE, TaskNum, TaskSetupParams->SzSrc, TaskSetupParams->SzDst); - - - if (TaskSetupParams->IncrSrc != 0) { - *((TaskAPI->IncrBytes)) = (sint16)-abs(TaskSetupParams->IncrSrc); - } else if (TaskSetupParams->IncrDst != 0) { - *((TaskAPI->IncrBytes)) = (sint16)-abs(TaskSetupParams->IncrDst); - } else { - *((TaskAPI->IncrBytes)) = (sint16)-abs(INCR_BYTES); - } - - -#if (DEBUG_BESTCOMM_API>=10) - printf("\nTaskSetup: C-API Parameter Settings Returned from TaskSetup:\n"); - printf("TaskSetup: NumBD = %d\n", TaskSetupParams->NumBD); - #if (MAX_BD>0) - printf("TaskSetup: MaxBuf = %d\n", TaskSetupParams->Size.MaxBuf); - #else - printf("TaskSetup: NumBytes = %d\n", TaskSetupParams->Size.NumBytes); - #endif - printf("TaskSetup: Initiator = %d\n", TaskSetupParams->Initiator); - printf("TaskSetup: StartAddrSrc = 0x%08X\n", TaskSetupParams->StartAddrSrc); - printf("TaskSetup: IncrSrc = %d\n", TaskSetupParams->IncrSrc); - printf("TaskSetup: SzSrc = %d\n", TaskSetupParams->SzSrc); - printf("TaskSetup: StartAddrDst = 0x%08X\n", TaskSetupParams->StartAddrDst); - printf("TaskSetup: IncrDst = %d\n", TaskSetupParams->IncrDst); - printf("TaskSetup: SzDst = %d\n", TaskSetupParams->SzDst); -#endif - -#if (DEBUG_BESTCOMM_API>=20) - printf("\nTaskSetup: Task-API Parameter Settings After TaskSetup Initialization:\n"); - printf("TaskSetup: TaskNum = %d\n", ((TaskAPI->TaskNum))); - printf("TaskSetup: TaskPragma = 0x%02X\n", *((TaskAPI->TaskPragma))); - - #if (MAX_BD>0) - printf("TaskSetup: BDTableBase = 0x%08X\n", *((TaskAPI->BDTableBase))); - printf("TaskSetup: BDTableLast = 0x%08X\n", *((TaskAPI->BDTableLast))); - printf("TaskSetup: BDTableStart = 0x%08X\n", *((TaskAPI->BDTableStart))); - printf("TaskSetup: AddrEnable = 0x%08X\n", *((TaskAPI->AddrEnable))); - #if (INCR_TYPE_SRC==0) - printf("TaskSetup: AddrSrcFIFO = 0x%08X\n", *((TaskAPI->AddrSrcFIFO))); - #endif - #if (INCR_TYPE_DST==0) - printf("TaskSetup: AddrDstFIFO = 0x%08X\n", *((TaskAPI->AddrDstFIFO))); - #endif - #if (BD_FLAG) - printf("TaskSetup: AddrDRD = 0x%08X\n", *((TaskAPI->AddrDRD))); - printf("TaskSetup: AddrDRDIdx = %d\n", ((TaskAPI->AddrDRDIdx))); - #endif - #else - printf("TaskSetup: IterExtra = %d\n", *((TaskAPI->IterExtra))); - #if (INCR_TYPE_SRC==0) - printf("TaskSetup: AddrSrcFIFO = 0x%08X\n", *((TaskAPI->AddrSrcFIFO))); - #else - printf("TaskSetup: StartAddrSrc = 0x%08X\n", *((TaskAPI->StartAddrSrc))); - #endif - #if (INCR_TYPE_DST==0) - printf("TaskSetup: AddrDstFIFO = 0x%08X\n", *((TaskAPI->AddrDstFIFO))); - #else - printf("TaskSetup: StartAddrDst = 0x%08X\n", *((TaskAPI->StartAddrDst))); - #endif - #endif - #if (INCR_TYPE_SRC!=0) - printf("TaskSetup: IncrSrc = 0x%04X\n", *((TaskAPI->IncrSrc))); - #if (MISALIGNED | MISALIGNED_START) - printf("TaskSetup: IncrSrcMA = 0x%04X\n", *((TaskAPI->IncrSrcMA))); - #endif - #endif - #if (INCR_TYPE_DST!=0) - printf("TaskSetup: IncrDst = 0x%04X\n", *((TaskAPI->IncrDst))); - #if (MISALIGNED | MISALIGNED_START) - printf("TaskSetup: IncrDstMA = 0x%04X\n", *((TaskAPI->IncrDstMA))); - #endif - #endif - printf("TaskSetup: Bytes = %d\n", *((TaskAPI->Bytes))); - printf("TaskSetup: IncrBytes = %d\n", *((TaskAPI->IncrBytes))); -#endif - - return TaskNum; -} diff --git a/c/src/lib/libbsp/powerpc/gen5200/configure.ac b/c/src/lib/libbsp/powerpc/gen5200/configure.ac index 74b7440f44..b5cf38f8de 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/configure.ac +++ b/c/src/lib/libbsp/powerpc/gen5200/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-gen5200],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/brs5l.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) @@ -129,7 +132,6 @@ AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") AC_CONFIG_FILES([Makefile]) RTEMS_BSP_CLEANUP_OPTIONS -RTEMS_BSP_LINKCMDS RTEMS_PPC_EXCEPTIONS diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/ata.h b/c/src/lib/libbsp/powerpc/gen5200/include/ata.h deleted file mode 100644 index 3d8ccfc49a..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/ata.h +++ /dev/null @@ -1,338 +0,0 @@ -/* - * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef GEN5200_ATA_H -#define GEN5200_ATA_H - -#include "bestcomm.h" - -#include <assert.h> - -#include <rtems.h> -#include <rtems/diskdevs.h> -#include <rtems/bdbuf.h> - -#include <libchip/ata_internal.h> -#include <libchip/ide_ctrl_io.h> -#include <libchip/ide_ctrl_cfg.h> - -#include <libcpu/powerpc-utility.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define DCTRL_SRST BSP_BBIT8(5) -#define DCTRL_NIEN BSP_BBIT8(6) - -#define DAST_BSY BSP_BBIT8(0) -#define DAST_DRDY BSP_BBIT8(1) -#define DAST_DRQ BSP_BBIT8(4) -#define DAST_ERR BSP_BBIT8(7) - -#define DST_BSY BSP_BBIT16(0) -#define DST_DRDY BSP_BBIT16(1) -#define DST_DRQ BSP_BBIT16(4) -#define DST_ERR BSP_BBIT16(7) - -#define DDMA_HUT BSP_BBIT8(1) -#define DDMA_FR BSP_BBIT8(2) -#define DDMA_FE BSP_BBIT8(3) -#define DDMA_IE BSP_BBIT8(4) -#define DDMA_UDMA BSP_BBIT8(5) -#define DDMA_READ BSP_BBIT8(6) -#define DDMA_WRITE BSP_BBIT8(7) - -#define ATA_SECTOR_SHIFT 9 - -#define ATA_PER_TRANSFER_SECTOR_COUNT_MAX 256 - -typedef union { - struct { - uint8_t alternate_status; - uint8_t reserved_0[3]; - uint16_t data; - uint8_t reserved_1[2]; - uint8_t error; - uint8_t reserved_2[3]; - uint8_t sector_count; - uint8_t reserved_3[3]; - uint8_t sector; - uint8_t reserved_4[3]; - uint8_t cylinder_low; - uint8_t reserved_5[3]; - uint8_t cylinder_high; - uint8_t reserved_6[3]; - uint8_t head; - uint8_t reserved_7[3]; - uint16_t status; - uint8_t reserved_8[2]; - } read; - - struct { - uint8_t control; - uint8_t reserved_0[3]; - uint16_t data; - uint8_t reserved_1[2]; - uint8_t feature; - uint8_t reserved_2[3]; - uint8_t sector_count; - uint8_t reserved_3[3]; - uint8_t sector; - uint8_t reserved_4[3]; - uint8_t cylinder_low; - uint8_t reserved_5[3]; - uint8_t cylinder_high; - uint8_t reserved_6[3]; - uint8_t head; - uint8_t reserved_7[3]; - uint8_t command; - uint8_t dma_control; - uint8_t reserved_8[2]; - } write; -} ata_drive_registers; - -#define ATA ((volatile ata_drive_registers *) 0xf0003a5c) - -static inline bool ata_is_data_request(void) -{ - return (ATA->read.alternate_status & DAST_DRQ) != 0; -} - -static inline bool ata_is_drive_ready_for_selection(void) -{ - return (ATA->read.alternate_status & (DAST_BSY | DAST_DRQ)) == 0; -} - -static inline void ata_wait_400_nano_seconds(void) -{ - ATA->read.alternate_status; -} - -static inline void ata_wait_for_drive_ready(void) -{ - while ((ATA->read.alternate_status & (DAST_BSY | DAST_DRQ | DAST_DRDY)) != DAST_DRDY) { - /* Wait */ - } -} - -static inline void ata_wait_for_not_busy(void) -{ - ata_wait_400_nano_seconds(); - - while ((ATA->read.alternate_status & DAST_BSY) != 0) { - /* Wait */ - } -} - -static inline bool ata_wait_for_data_request(void) -{ - ata_wait_400_nano_seconds(); - - uint8_t alternate_status; - do { - alternate_status = ATA->read.alternate_status; - } while ((alternate_status & DAST_BSY) == DAST_BSY); - - return (alternate_status & (DAST_ERR | DAST_DRQ)) == DAST_DRQ; -} - -static inline bool ata_check_status(void) -{ - return (ATA->read.status & (DST_BSY | DST_ERR)) == 0; -} - -static inline void ata_clear_interrupts(void) -{ - ATA->read.status; -} - -static inline uint8_t ata_read_or_write_sectors_command(bool read) -{ - return read ? 0x20 : 0x30; -} - -static inline rtems_blkdev_bnum ata_max_transfer_count(rtems_blkdev_bnum sector_count) -{ - return sector_count > ATA_PER_TRANSFER_SECTOR_COUNT_MAX ? - ATA_PER_TRANSFER_SECTOR_COUNT_MAX - : sector_count; -} - -static inline void ata_flush_sector(uint16_t *begin) -{ - /* XXX: The dcbi operation does not work properly */ - rtems_cache_flush_multiple_data_lines(begin, ATA_SECTOR_SIZE); -} - -void ata_reset_device(void); - -bool ata_set_transfer_mode(uint8_t mode); - -bool ata_execute_io_command(uint8_t command, uint32_t lba, uint32_t sector_count); - -static inline bool ata_execute_io_command_with_sg(uint8_t command, const rtems_blkdev_sg_buffer *sg) -{ - uint32_t lba = sg->block; - uint32_t sector_count = sg->length / ATA_SECTOR_SIZE; - return ata_execute_io_command(command, lba, sector_count); -} - -typedef struct { - const rtems_blkdev_sg_buffer *sg; - - size_t sg_count; - - rtems_blkdev_bnum sg_buffer_offset_mask; - - int sg_index_shift; -} ata_sg_context; - -static inline void ata_sg_reset(ata_sg_context *self, const rtems_blkdev_sg_buffer *sg, size_t sg_count) -{ - self->sg = sg; - self->sg_count = sg_count; - uint32_t sectors_per_buffer = self->sg[0].length >> ATA_SECTOR_SHIFT; - self->sg_buffer_offset_mask = sectors_per_buffer - 1; - self->sg_index_shift = __builtin_ffs((int) sectors_per_buffer) - 1; -} - -static inline void ata_sg_create_default(ata_sg_context *self) -{ - ata_sg_reset(self, NULL, 0); -} - -static inline void ata_sg_create(ata_sg_context *self, const rtems_blkdev_sg_buffer *sg, size_t sg_count) -{ - ata_sg_reset(self, sg, sg_count); -} - -static inline rtems_blkdev_bnum ata_sg_get_start_sector(const ata_sg_context *self) -{ - return self->sg[0].block; -} - -static inline rtems_blkdev_bnum ata_sg_get_sector_count(const ata_sg_context *self) -{ - return (self->sg_buffer_offset_mask + 1) * self->sg_count; -} - -static inline uint16_t *ata_sg_get_sector_data_begin(const ata_sg_context *self, rtems_blkdev_bnum relative_sector) -{ - uint16_t *begin = (uint16_t *)(self->sg[relative_sector >> self->sg_index_shift].buffer); - - return begin + ((relative_sector & self->sg_buffer_offset_mask) << (ATA_SECTOR_SHIFT - 1)); -} - -static inline uint16_t *ata_sg_get_sector_data_end(const ata_sg_context *self, uint16_t *begin) -{ - return begin + ATA_SECTOR_SIZE / 2; -} - -typedef struct { - rtems_id lock; - - bool card_present; -} ata_driver; - -void ata_driver_create(ata_driver *self, const char *device_file_path, rtems_block_device_ioctl io_control); - -void ata_driver_destroy(ata_driver *self); - -static inline void ata_driver_lock(const ata_driver *self) -{ - rtems_status_code sc = rtems_semaphore_obtain(self->lock, RTEMS_WAIT, RTEMS_NO_TIMEOUT); - assert(sc == RTEMS_SUCCESSFUL); -} - -static inline void ata_driver_unlock(const ata_driver *self) -{ - rtems_status_code sc = rtems_semaphore_release(self->lock); - assert(sc == RTEMS_SUCCESSFUL); -} - -static inline bool ata_driver_is_card_present(const ata_driver *self) -{ - return self->card_present; -} - -static inline void ata_driver_io_request( - ata_driver *self, - rtems_blkdev_request *request, - bool (*transfer)(ata_driver *, bool, rtems_blkdev_sg_buffer *, size_t) -) -{ - assert(request->req == RTEMS_BLKDEV_REQ_READ || request->req == RTEMS_BLKDEV_REQ_WRITE); - bool read = request->req != RTEMS_BLKDEV_REQ_WRITE; - rtems_blkdev_sg_buffer *sg = &request->bufs[0]; - uint32_t sg_count = request->bufnum; - ata_driver_lock(self); - bool ok = (*transfer)(self, read, sg, sg_count); - ata_driver_unlock(self); - rtems_status_code sc = ok ? RTEMS_SUCCESSFUL : RTEMS_IO_ERROR; - rtems_blkdev_request_done(request, sc); -} - -static inline int ata_driver_io_control( - rtems_disk_device *dd, - uint32_t cmd, - void *arg, - bool (*transfer)(ata_driver *, bool, rtems_blkdev_sg_buffer *, size_t) -) -{ - ata_driver *self = (ata_driver *) rtems_disk_get_driver_data(dd); - - switch (cmd) { - case RTEMS_BLKIO_REQUEST: - ata_driver_io_request(self, (rtems_blkdev_request *) arg, transfer); - return 0; - case RTEMS_BLKIO_CAPABILITIES: - *(uint32_t *) arg = RTEMS_BLKDEV_CAP_MULTISECTOR_CONT; - return 0; - default: - return rtems_blkdev_ioctl(dd, cmd, arg); - } -} - -int ata_driver_io_control_pio_polled( - rtems_disk_device *dd, - uint32_t cmd, - void *arg -); - -typedef struct { - ata_driver super; - - bestcomm_task task; - - bool read; - - ata_sg_context sg_context; - - rtems_blkdev_bnum transfer_current; - - rtems_blkdev_bnum transfer_end; -} ata_driver_dma_pio_single; - -void ata_driver_dma_pio_single_create( - ata_driver_dma_pio_single *self, - const char *device_file_path, - TaskId task_index -); - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* GEN5200_ATA_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/bestcomm.h b/c/src/lib/libbsp/powerpc/gen5200/include/bestcomm.h deleted file mode 100644 index 366465565a..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/bestcomm.h +++ /dev/null @@ -1,370 +0,0 @@ -/* - * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef GEN5200_BESTCOMM_H -#define GEN5200_BESTCOMM_H - -#include "bestcomm_ops.h" - -#include <assert.h> - -#include <rtems.h> - -#include <bsp/mpc5200.h> -#include <bsp/bestcomm/bestcomm_api.h> -#include <bsp/bestcomm/bestcomm_glue.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup BestComm BestComm Support - * - * @ingroup BestCommm - * - * @brief BestComm support. - * - * @{ - */ - -typedef struct { - uint32_t *tdt_begin; - uint32_t *tdt_last; - volatile uint32_t (*var_table)[32]; - uint32_t fdt_and_pragmas; - uint32_t reserved_0; - uint32_t reserved_1; - uint32_t *context_begin; - uint32_t reserved_2; -} bestcomm_task_entry; - -#define BESTCOMM_TASK_ENTRY_TABLE ((volatile bestcomm_task_entry *) 0xf0008000) - -#define BESTCOMM_IRQ_EVENT RTEMS_EVENT_13 - -typedef struct { - int task_index; - rtems_id event_task_id; -} bestcomm_irq; - -void bestcomm_irq_create(bestcomm_irq *self, int task_index); - -void bestcomm_irq_destroy(const bestcomm_irq *self); - -static inline void bestcomm_irq_enable(const bestcomm_irq *self) -{ - bestcomm_glue_irq_enable(self->task_index); -} - -static inline void bestcomm_irq_disable(const bestcomm_irq *self) -{ - bestcomm_glue_irq_disable(self->task_index); -} - -static inline void bestcomm_irq_clear(const bestcomm_irq *self) -{ - SDMA_CLEAR_IEVENT(&mpc5200.sdma.IntPend, self->task_index); -} - -static inline int bestcomm_irq_get_task_index(const bestcomm_irq *self) -{ - return self->task_index; -} - -static inline rtems_id bestcomm_irq_get_event_task_id(const bestcomm_irq *self) -{ - return self->event_task_id; -} - -static inline void bestcomm_irq_set_event_task_id(bestcomm_irq *self, rtems_id id) -{ - self->event_task_id = id; -} - -static inline void bestcomm_irq_wakeup_event_task(const bestcomm_irq *self) -{ - rtems_status_code sc = rtems_event_send(self->event_task_id, BESTCOMM_IRQ_EVENT); - assert(sc == RTEMS_SUCCESSFUL); -} - -static inline void bestcomm_irq_wait(const bestcomm_irq *self) -{ - rtems_event_set events; - rtems_status_code sc = rtems_event_receive( - BESTCOMM_IRQ_EVENT, - RTEMS_EVENT_ALL | RTEMS_WAIT, - RTEMS_NO_TIMEOUT, - &events - ); - assert(sc == RTEMS_SUCCESSFUL); - assert(events == BESTCOMM_IRQ_EVENT); -} - -static inline bool bestcomm_irq_peek(const bestcomm_irq *self) -{ - rtems_event_set events; - rtems_status_code sc = rtems_event_receive(0, 0, 0, &events); - assert(sc == RTEMS_SUCCESSFUL); - - return (events & BESTCOMM_IRQ_EVENT) != 0; -} - -typedef struct { - volatile uint16_t *task_control_register; - - volatile uint32_t (*variable_table)[32]; - - TaskId task_index; - - bestcomm_irq irq; - - uint32_t *tdt_begin; - - size_t tdt_opcode_count; -} bestcomm_task; - -void bestcomm_task_create(bestcomm_task *self, TaskId task_index); - -void bestcomm_task_create_and_load( - bestcomm_task *self, - TaskId task_index, - const uint32_t *tdt_source_begin, - size_t tdt_size -); - -void bestcomm_task_destroy(bestcomm_task *self); - -void bestcomm_task_load(bestcomm_task *self, const uint32_t *tdt_source_begin, size_t tdt_size); - -static inline void bestcomm_task_set_priority(bestcomm_task *self, int priority) -{ - /* Allow higher priority initiator to block current initiator */ - mpc5200.sdma.ipr[self->task_index] = SDMA_IPR_PRIOR(priority); -} - -static inline void bestcomm_task_irq_enable(const bestcomm_task *self) -{ - bestcomm_irq_enable(&self->irq); -} - -static inline void bestcomm_task_irq_disable(const bestcomm_task *self) -{ - bestcomm_irq_disable(&self->irq); -} - -static inline void bestcomm_task_irq_clear(const bestcomm_task *self) -{ - bestcomm_irq_clear(&self->irq); -} - -static inline rtems_id bestcomm_task_get_event_task_id(const bestcomm_task *self) -{ - return bestcomm_irq_get_event_task_id(&self->irq); -} - -static inline void bestcomm_task_set_event_task_id(bestcomm_task *self, rtems_id id) -{ - bestcomm_irq_set_event_task_id(&self->irq, id); -} - -static inline void bestcomm_task_associate_with_current_task(bestcomm_task *self) -{ - bestcomm_task_set_event_task_id(self, rtems_task_self()); -} - -static inline void bestcomm_task_start(const bestcomm_task *self) -{ - *self->task_control_register = SDMA_TCR_EN | SDMA_TCR_HIGH_EN; -} - -static inline void bestcomm_task_start_with_autostart(const bestcomm_task *self) -{ - *self->task_control_register = (uint16_t) - (SDMA_TCR_EN | SDMA_TCR_HIGH_EN | SDMA_TCR_AUTO_START | SDMA_TCR_AS(self->task_index)); -} - -static inline void bestcomm_task_stop(const bestcomm_task *self) -{ - *self->task_control_register = 0; -} - -static inline void bestcomm_task_wakeup_event_task(const bestcomm_task *self) -{ - bestcomm_irq_wakeup_event_task(&self->irq); -} - -static inline void bestcomm_task_wait(const bestcomm_task *self) -{ - bestcomm_irq_wait(&self->irq); -} - -static inline bool bestcomm_task_peek(const bestcomm_task *self) -{ - return bestcomm_irq_peek(&self->irq); -} - -static inline bool bestcomm_task_is_running(const bestcomm_task *self) -{ - return (*self->task_control_register & SDMA_TCR_EN) != 0; -} - -static inline uint32_t bestcomm_get_task_variable(const bestcomm_task *self, size_t index) -{ - assert(index < VAR_COUNT); - return (*self->variable_table)[index]; -} - -static inline volatile uint32_t *bestcomm_task_get_address_of_variable(const bestcomm_task *self, size_t index) -{ - assert(index < VAR_COUNT); - return &(*self->variable_table)[index]; -} - -static inline void bestcomm_task_set_variable(const bestcomm_task *self, size_t index, uint32_t value) -{ - assert(index < VAR_COUNT); - (*self->variable_table)[index] = value; -} - -static inline uint32_t bestcomm_task_get_increment_and_condition(const bestcomm_task *self, size_t index) -{ - assert(index < INC_COUNT); - return (*self->variable_table)[INC(index)]; -} - -static inline void bestcomm_task_set_increment_and_condition_32( - const bestcomm_task *self, - size_t index, - uint32_t inc_and_cond -) -{ - assert(index < INC_COUNT); - (*self->variable_table)[INC(index)] = inc_and_cond; -} - -static inline void bestcomm_task_set_increment_and_condition( - const bestcomm_task *self, - size_t index, - int16_t inc, - int cond -) -{ - bestcomm_task_set_increment_and_condition_32(self, index, INC_INIT(cond, inc)); -} - -static inline void bestcomm_task_set_increment(const bestcomm_task *self, size_t index, int16_t inc) -{ - bestcomm_task_set_increment_and_condition_32(self, index, INC_INIT(0, inc)); -} - -void bestcomm_task_clear_variables(const bestcomm_task *self); - -static inline uint32_t bestcomm_task_get_opcode(const bestcomm_task *self, size_t index) -{ - assert(index < self->tdt_opcode_count); - return self->tdt_begin[index]; -} - -static inline void bestcomm_task_set_opcode(bestcomm_task *self, size_t index, uint32_t opcode) -{ - assert(index < self->tdt_opcode_count); - self->tdt_begin[index] = opcode; -} - -static inline void bestcomm_task_set_initiator(const bestcomm_task *self, int initiator) -{ - rtems_interrupt_level level; - rtems_interrupt_disable(level); - *self->task_control_register = BSP_BFLD16SET(*self->task_control_register, initiator, 3, 7); - rtems_interrupt_enable(level); -} - -static inline volatile bestcomm_task_entry *bestcomm_task_get_task_entry(const bestcomm_task *self) -{ - return &BESTCOMM_TASK_ENTRY_TABLE[self->task_index]; -} - -static inline void bestcomm_task_set_pragma(const bestcomm_task *self, int bit_pos, bool enable) -{ - volatile bestcomm_task_entry *entry = bestcomm_task_get_task_entry(self); - uint32_t mask = BSP_BIT32(bit_pos); - uint32_t bit = enable ? mask : 0; - entry->fdt_and_pragmas = (entry->fdt_and_pragmas & ~mask) | bit; -} - -static inline void bestcomm_task_enable_precise_increment(const bestcomm_task *self, bool enable) -{ - bestcomm_task_set_pragma(self, SDMA_PRAGMA_BIT_PRECISE_INC, enable); -} - -static inline void bestcomm_task_enable_error_reset(const bestcomm_task *self, bool enable) -{ - bestcomm_task_set_pragma(self, SDMA_PRAGMA_BIT_RST_ERROR_NO, !enable); -} - -static inline void bestcomm_task_enable_pack_data(const bestcomm_task *self, bool enable) -{ - bestcomm_task_set_pragma(self, SDMA_PRAGMA_BIT_PACK, enable); -} - -static inline void bestcomm_task_enable_integer_mode(const bestcomm_task *self, bool enable) -{ - bestcomm_task_set_pragma(self, SDMA_PRAGMA_BIT_INTEGER, enable); -} - -static inline void bestcomm_task_enable_speculative_read(const bestcomm_task *self, bool enable) -{ - bestcomm_task_set_pragma(self, SDMA_PRAGMA_BIT_SPECREAD, enable); -} - -static inline void bestcomm_task_enable_combined_write(const bestcomm_task *self, bool enable) -{ - bestcomm_task_set_pragma(self, SDMA_PRAGMA_BIT_CW, enable); -} - -static inline void bestcomm_task_enable_read_buffer(const bestcomm_task *self, bool enable) -{ - bestcomm_task_set_pragma(self, SDMA_PRAGMA_BIT_RL, enable); -} - -static inline volatile uint16_t *bestcomm_task_get_task_control_register(const bestcomm_task *self) -{ - return self->task_control_register; -} - -static inline int bestcomm_task_get_task_index(const bestcomm_task *self) -{ - return self->task_index; -} - -static inline void bestcomm_task_free_tdt(bestcomm_task *self) -{ - bestcomm_free(self->tdt_begin); - self->tdt_begin = NULL; -} - -static inline void bestcomm_task_clear_pragmas(const bestcomm_task *self) -{ - volatile bestcomm_task_entry *entry = bestcomm_task_get_task_entry(self); - entry->fdt_and_pragmas &= ~0xffU; -} - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* GEN5200_BESTCOMM_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/bestcomm_ops.h b/c/src/lib/libbsp/powerpc/gen5200/include/bestcomm_ops.h deleted file mode 100644 index 2b74adf366..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/bestcomm_ops.h +++ /dev/null @@ -1,224 +0,0 @@ -/* - * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef BESTCOMM_OPS_H -#define BESTCOMM_OPS_H - -#include <bsp/utility.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup BestCommOps BestComm Ops - * - * @ingroup BestComm - * - * @brief BestComm ops. - * - * @{ - */ - -#define VAR(i) (i) -#define VAR_COUNT 24 -#define INC(i) (24 + (i)) -#define INC_COUNT 8 -#define IDX(i) (48 + (i)) -#define IDX_COUNT 8 - -#define COND_ONCE 0 -#define COND_LT 1 -#define COND_GT 2 -#define COND_NE 3 -#define COND_EQ 4 -#define COND_LE 5 -#define COND_GE 6 -#define COND_FOREVER 7 - -#define INC_INIT(cond, val) \ - (BSP_FLD32(cond, 29, 31) \ - | BSP_FLD32((int16_t) (val), 0, 15)) - -#define TERM_FIRST 0 -#define TERM_SECOND 1 -#define TERM_INIT 2 -#define TERM_UNUSED 3 - -#define DEREF 1 - -#define LCD_TERM(val) BSP_FLD32(val, 13, 14) - -#define LCD(deref0, iniidx0, deref1, iniidx1, term, termop, inc0, inc1) \ - (BSP_BIT32(31) \ - | BSP_FLD32(deref0, 29, 29) \ - | BSP_FLD32(iniidx0, 23, 28) \ - | BSP_FLD32(deref1, 21, 21) \ - | BSP_FLD32(iniidx1, 15, 20) \ - | LCD_TERM(term) \ - | BSP_FLD32(termop, 6, 11) \ - | BSP_FLD32(inc0, 3, 5) \ - | BSP_FLD32(inc1, 0, 2)) - -#define LCDEXT(deref0, iniidx0, deref1, iniidx1, term, termop, inc0, inc1) \ - (BSP_BIT32(30) \ - | LCD(deref0, iniidx0, deref1, iniidx1, term, termop, inc0, inc1)) - -#define LCDPLUS(deref0, iniidx0, deref1, iniidx1, term, termop, inc0, inc1) \ - (BSP_BIT32(22) \ - | LCD(deref0, iniidx0, deref1, iniidx1, term, termop, inc0, inc1)) - -#define LCDINIT(val) \ - (BSP_BIT32(31) \ - | BSP_FLD32((val) >> 13, 15, 29) \ - | LCD_TERM(TERM_INIT) \ - | BSP_FLD32(val, 0, 12)) - -#define MORE 0x4 - -#define TFD 0x2 - -#define INT 0x1 - -#define DRD_FLAGS(val) BSP_FLD32(val, 26, 28) - -#define INIT_ALWAYS 0 -#define INIT_SCTMR_0 1 -#define INIT_SCTMR_1 2 -#define INIT_FEC_RX 3 -#define INIT_FEC_TX 4 -#define INIT_ATA_RX 5 -#define INIT_ATA_TX 6 -#define INIT_SCPCI_RX 7 -#define INIT_SCPCI_TX 8 -#define INIT_PSC3_RX 9 -#define INIT_PSC3_TX 10 -#define INIT_PSC2_RX 11 -#define INIT_PSC2_TX 12 -#define INIT_PSC1_RX 13 -#define INIT_PSC1_TX 14 -#define INIT_SCTMR_2 15 -#define INIT_SCLPC 16 -#define INIT_PSC5_RX 17 -#define INIT_PSC5_TX 18 -#define INIT_PSC4_RX 19 -#define INIT_PSC4_TX 20 -#define INIT_I2C2_RX 21 -#define INIT_I2C2_TX 22 -#define INIT_I2C1_RX 23 -#define INIT_I2C1_TX 24 -#define INIT_PSC6_RX 25 -#define INIT_PSC6_TX 26 -#define INIT_IRDA_RX 25 -#define INIT_IRDA_TX 26 -#define INIT_SCTMR_3 27 -#define INIT_SCTMR_4 28 -#define INIT_SCTMR_5 29 -#define INIT_SCTMR_6 30 -#define INIT_SCTMR_7 31 - -#define DRD_INIT(val) BSP_FLD32(val, 21, 25) - -#define SZ_8 1 -#define SZ_16 2 -#define SZ_32 0 -#define SZ_DYN 3 - -#define DRD_RS(val) BSP_FLD32(val, 19, 20) - -#define DRD_WS(val) BSP_FLD32(val, 17, 18) - -#define DEST_VAR(val) (val) -#define DEST_IDX(val) (BSP_BIT32(5) | (val)) -#define DEST_DEREF_IDX(val) (BSP_BIT32(5) | BSP_BIT32(4) | (val)) - -#define SRC_VAR(val) (val) -#define SRC_INC(val) (BSP_BIT32(5) | (val)) -#define SRC_EU_RESULT (BSP_BIT32(5) | BSP_BIT32(4) | BSP_BIT32(1) | BSP_BIT32(0)) -#define SRC_DEREF_EU_RESULT (BSP_BIT32(6) | BSP_BIT32(4) | BSP_BIT32(1) | BSP_BIT32(0)) -#define SRC_IDX(val) (BSP_BIT32(6) | BSP_BIT32(5) | (val)) -#define SRC_DEREF_IDX(val) (BSP_BIT32(6) | BSP_BIT32(5) | BSP_BIT32(4) | (val)) -#define SRC_NONE (BSP_BIT32(5) | BSP_BIT32(4) | BSP_BIT32(3) | BSP_BIT32(2) | BSP_BIT32(1) | BSP_BIT32(0)) - -#define DRD1A(flags, init, dest, ws, src, rs) \ - (DRD_FLAGS(flags) \ - | DRD_INIT(init) \ - | DRD_RS(rs) \ - | DRD_WS(ws) \ - | BSP_FLD32(dest, 10, 15) \ - | BSP_FLD32(src, 3, 9)) - -#define DRD1AEURESULT(flags, init, dest, ws, rs) \ - (DRD1A(flags, init, rs, ws, dest, SRC_EU_RESULT) \ - | BSP_FLD32(1, 0, 3)) - -#define FUNC_LOAD_ACC 0 -#define FUNC_UNLOAD_ACC 1 -#define FUNC_AND 2 -#define FUNC_OR 3 -#define FUNC_XOR 4 -#define FUNC_ANDN 5 -#define FUNC_NOT 6 -#define FUNC_ADD 7 -#define FUNC_SUB 8 -#define FUNC_LSH 9 -#define FUNC_RSH 10 -#define FUNC_CRC8 11 -#define FUNC_CRC16 12 -#define FUNC_CRC32 13 -#define FUNC_ENDIAN32 14 -#define FUNC_ENDIAN16 15 - -#define DRD2A(flags, func) \ - (BSP_BIT32(30) | BSP_BIT32(29) \ - | DRD_FLAGS(flags) \ - | BSP_FLD32(func, 0, 3)) - -#define DRD2A5(flags, init, func, ws, rs) \ - (DRD2A(flags, func) \ - | DRD_RS(rs) \ - | DRD_WS(ws) \ - | DRD_INIT(init)) - -#define OP_VAR(val) (val) -#define OP_EU_RESULT (BSP_BIT32(4) | BSP_BIT32(3) | BSP_BIT32(1) | BSP_BIT32(0)) -#define OP_NONE (BSP_BIT32(4) | BSP_BIT32(3) | BSP_BIT32(2) | BSP_BIT32(1) | BSP_BIT32(0)) -#define OP_IDX(val) (BSP_BIT32(5) | (val)) -#define OP_DEREF_IDX(val) (BSP_BIT32(5) | BSP_BIT32(4) | (val)) - -#define DRD2B1(dest, op0, op1) \ - (BSP_FLD32(dest, 22, 27) \ - | BSP_FLD32(SRC_EU_RESULT, 14, 20) \ - | BSP_FLD32(3, 12, 13) \ - | BSP_FLD32(op0, 6, 11) \ - | BSP_FLD32(op1, 0, 5)) - -#define DRD2B2(op0, op1) \ - (BSP_BIT32(29) \ - | BSP_FLD32(3, 26, 27) \ - | BSP_FLD32(op0, 20, 25) \ - | BSP_FLD32(op1, 14, 19) \ - | BSP_FLD32(0, 12, 13) \ - | BSP_FLD32(OP_NONE, 6, 11) \ - | BSP_FLD32(OP_NONE, 0, 5)) - -#define NOP 0x1f8 - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* BESTCOMM_OPS_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h b/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h deleted file mode 100644 index 40ac1116c5..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/bsp.h +++ /dev/null @@ -1,266 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic MPC5200 BSP | -+-----------------------------------------------------------------+ -| Partially based on the code references which are named below. | -| Adaptions, modifications, enhancements and any recent parts of | -| the code are: | -| Copyright (c) 2005 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains board specific definitions | -\*===============================================================*/ - -#ifndef LIBBSP_POWERPC_GEN5200_BSP_H -#define LIBBSP_POWERPC_GEN5200_BSP_H - -#include <bspopts.h> - -#include <libcpu/powerpc-utility.h> - -/* - * Some symbols defined in the linker command file. - */ - -LINKER_SYMBOL(bsp_ram_start); -LINKER_SYMBOL(bsp_ram_end); -LINKER_SYMBOL(bsp_ram_size); - -LINKER_SYMBOL(bsp_rom_start); -LINKER_SYMBOL(bsp_rom_end); -LINKER_SYMBOL(bsp_rom_size); - -LINKER_SYMBOL(bsp_dpram_start); -LINKER_SYMBOL(bsp_dpram_end); -LINKER_SYMBOL(bsp_dpram_size); - -LINKER_SYMBOL(bsp_section_text_start); -LINKER_SYMBOL(bsp_section_text_end); -LINKER_SYMBOL(bsp_section_text_size); - -LINKER_SYMBOL(bsp_section_data_start); -LINKER_SYMBOL(bsp_section_data_end); -LINKER_SYMBOL(bsp_section_data_size); - -LINKER_SYMBOL(bsp_section_bss_start); -LINKER_SYMBOL(bsp_section_bss_end); -LINKER_SYMBOL(bsp_section_bss_size); - -LINKER_SYMBOL(bsp_interrupt_stack_start); -LINKER_SYMBOL(bsp_interrupt_stack_end); -LINKER_SYMBOL(bsp_interrupt_stack_size); - -LINKER_SYMBOL(bsp_work_area_start); - -LINKER_SYMBOL(MBAR); - -/* Provide legacy defines */ - -#ifdef MPC5200_BOARD_PM520_ZE30 -#define PM520_ZE30 -#endif - -#ifdef MPC5200_BOARD_PM520_CR825 -#define PM520_CR825 -#endif - -#ifdef MPC5200_BOARD_ICECUBE -#define icecube -#endif - -#ifdef MPC5200_BOARD_BRS5L -#define BRS5L -#endif - -/* - * distinguish board characteristics - */ -/* - * for PM520 mdule on a ZE30 carrier - */ -#if defined(MPC5200_BOARD_PM520_ZE30) -#define PM520 -#endif -/* - * for PM520 mdule on a CR825 carrier - */ -#if defined(MPC5200_BOARD_PM520_CR825) -#define PM520 -#endif - -#if !defined(HAS_UBOOT) - /* we need the low level initialization in start.S*/ - #define NEED_LOW_LEVEL_INIT -#endif - -#if defined(MPC5200_BOARD_BRS5L) -/* - * IMD Custom Board BRS5L - */ - -#define HAS_NVRAM_93CXX - -#elif defined(MPC5200_BOARD_BRS6L) - #define MPC5200_BRS6L_FPGA_BEGIN 0x800000 - #define MPC5200_BRS6L_FPGA_SIZE (64 * 1024) - #define MPC5200_BRS6L_FPGA_END \ - (MPC5200_BRS6L_FPGA_BEGIN + MPC5200_BRS6L_FPGA_SIZE) - - #define MPC5200_BRS6L_MRAM_BEGIN 0xff000000 - #define MPC5200_BRS6L_MRAM_SIZE (4 * 1024 * 1024) - #define MPC5200_BRS6L_MRAM_END \ - (MPC5200_BRS6L_MRAM_BEGIN + MPC5200_BRS6L_MRAM_SIZE) -#elif defined (PM520) - -/* Nothing special */ - -#elif defined (MPC5200_BOARD_ICECUBE) -/* - * Codename: IceCube - * Compatible Boards: - * Freescape MPC5200LITE - * Embedded Planet EP5200 - */ - -#elif defined (MPC5200_BOARD_DP2) - -/* Nothing special */ - -#else -#error "board type not defined" -#endif - -#ifndef ASM - -#include <rtems.h> -#include <bsp/i2cdrv.h> -#include <bsp/irq.h> -#include <bsp/vectors.h> -#include <bsp/u-boot.h> -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Network driver configuration - */ -struct rtems_bsdnet_ifconfig; -extern int rtems_mpc5200_fec_driver_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching); -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mpc5200_fec_driver_attach_detach - -/* miscellaneous stuff assumed to exist */ - -/* - * We need to decide how much memory will be non-cacheable. This - * will mainly be memory that will be used in DMA (network and serial - * buffers). - */ -/* -#define NOCACHE_MEM_SIZE 512*1024 -*/ - -/* - * Device Driver Table Entries - */ - -#ifdef HAS_NVRAM_93CXX -#define NVRAM_DRIVER_TABLE_ENTRY \ - { nvram_driver_initialize, nvram_driver_open, nvram_driver_close, \ - nvram_driver_read, nvram_driver_write, NULL } -#endif - -/* - * indicate, that BSP has IDE driver - */ -#define RTEMS_BSP_HAS_IDE_DRIVER - -/* functions */ - -/* #define SHOW_MORE_INIT_SETTINGS 1 */ - -/* ata modes */ -/* #undef ATA_USE_INT */ -#define ATA_USE_INT - -/* clock settings */ -#if defined(HAS_UBOOT) -#define IPB_CLOCK (bsp_uboot_board_info.bi_ipbfreq) -#define XLB_CLOCK (bsp_uboot_board_info.bi_busfreq) -#define G2_CLOCK (bsp_uboot_board_info.bi_intfreq) -#elif defined(MPC5200_BOARD_BRS5L) || defined(MPC5200_BOARD_BRS6L) -#define IPB_CLOCK 66000000 /* 66 MHz */ -#define XLB_CLOCK 132000000 /* 132 MHz */ -#define G2_CLOCK 396000000 /* 396 MHz */ -#else -#define IPB_CLOCK 33000000 /* 33 MHz */ -#define XLB_CLOCK 66000000 /* 66 MHz */ -#define G2_CLOCK 231000000 /* 231 MHz */ -#endif - -#if defined(HAS_UBOOT) -#define GEN5200_CONSOLE_BAUD (bsp_uboot_board_info.bi_baudrate) -#else -#define GEN5200_CONSOLE_BAUD 115200 -#endif - -/* - * Convert decrement value to tenths of microsecnds (used by - * shared timer driver). - * - * + CPU has a XLB_CLOCK bus, - * + There are 4 bus cycles per click - * + We return value in 1/10 microsecond units. - * Modified following equation to integer equation to remove - * floating point math. - * (int) ((float)(_value) / ((XLB_CLOCK/1000000 * 0.1) / 4.0)) - */ - -#define BSP_Convert_decrementer( _value ) \ - (int) (((_value) * 4000) / (XLB_CLOCK/10000)) - -/* slicetimer settings */ -#define USE_SLICETIMER_0 TRUE -#define USE_SLICETIMER_1 FALSE - -void *bsp_idle_thread( uintptr_t ignored ); -#define BSP_IDLE_TASK_BODY bsp_idle_thread - -/* BSP specific IRQ Benchmarking support */ -void BSP_IRQ_Benchmarking_Reset(void); -void BSP_IRQ_Benchmarking_Report(void); - -#if defined(HAS_UBOOT) - /* Routine to obtain U-Boot environment variables */ - const char *bsp_uboot_getenv( - const char *name - ); -#endif - -void cpu_init(void); - -int mpc5200_eth_mii_read( - int phyAddr, - void *arg, - unsigned regAddr, - uint32_t *retVal -); - -#ifdef __cplusplus -} -#endif - -#endif /* ASM */ - -#endif /* GEN5200 */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/i2c.h b/c/src/lib/libbsp/powerpc/gen5200/include/i2c.h deleted file mode 100644 index e5d7d472dd..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/i2c.h +++ /dev/null @@ -1,243 +0,0 @@ -/* - * Generic I2C bus interface for RTEMS - * - * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia - * Author: Victor V. Vengerov <vvv@oktet.ru> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef __RTEMS__I2C_H__ -#define __RTEMS__I2C_H__ - -#include <rtems.h> -#include <bsp.h> -/* This header file define the generic interface to i2c buses available in - * system. This interface may be used by user applications or i2c-device - * drivers (like RTC, NVRAM, etc). - * - * Functions i2c_initialize and i2c_transfer declared in this header usually - * implemented in particular board support package. Usually this - * implementation is a simple wrapper or multiplexor to I2C controller - * driver which is available in system. It may be generic "software - * controller" I2C driver which control SDA and SCL signals directly (if SDA - * and SCL is general-purpose I/O pins), or driver for hardware I2C - * controller (standalone or integrated with processors: MBus controller in - * ColdFire processors, I2C controller in PowerQUICC and so on). - * - * i2c_transfer is a very generic low-level function. Higher-level function - * i2c_write, i2c_read, i2c_wrrd, i2c_wbrd is defined here too. - */ - -/* I2C Bus Number type */ -typedef uint32_t i2c_bus_number; - -/* I2C device address */ -typedef uint16_t i2c_address; - -/* I2C error codes generated during message transfer */ -typedef enum i2c_message_status { - I2C_SUCCESSFUL = 0, - I2C_TIMEOUT, - I2C_NO_DEVICE, - I2C_ARBITRATION_LOST, - I2C_NO_ACKNOWLEDGE, - I2C_NO_DATA, - I2C_RESOURCE_NOT_AVAILABLE -} i2c_message_status; - -/* I2C Message */ -typedef struct i2c_message { - i2c_address addr; /* I2C slave device address */ - uint16_t flags; /* message flags (see below) */ - i2c_message_status status; /* message transfer status code */ - uint16_t len; /* Number of bytes to read or write */ - uint8_t *buf; /* pointer to data array */ -} i2c_message; - -/* I2C message flag */ -#define I2C_MSG_ADDR_10 (0x01) /* 10-bit address */ -#define I2C_MSG_WR (0x02) /* transfer direction for this message - from master to slave */ -#define I2C_MSG_ERRSKIP (0x04) /* Skip message if last transfered message - is failed */ -/* Type for function which is called when transfer over I2C bus is finished */ -typedef void (*i2c_transfer_done) (void * arg); - -/* i2c_initialize -- - * I2C driver initialization. This function usually called on device - * driver initialization state, before initialization task. All I2C - * buses are initialized; reasonable slow data transfer rate is - * selected for each bus. - * - * PARAMETERS: - * major - I2C device major number - * minor - I2C device minor number - * arg - RTEMS driver initialization argument - * - * RETURNS: - * RTEMS status code - */ -rtems_device_driver -i2c_initialize(rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg); - -/* i2c_select_clock_rate -- - * select I2C bus clock rate for specified bus. Some bus controller do not - * allow to select arbitrary clock rate; in this case nearest possible - * slower clock rate is selected. - * - * PARAMETERS: - * bus - I2C bus number - * bps - data transfer rate for this bytes in bits per second - * - * RETURNS: - * RTEMS_SUCCESSFUL, if operation performed successfully, - * RTEMS_INVALID_NUMBER, if wrong bus number is specified, - * RTEMS_UNSATISFIED, if bus do not support data transfer rate selection - * or specified data transfer rate could not be used. - */ -rtems_status_code -i2c_select_clock_rate(i2c_bus_number bus, int bps); - -/* i2c_transfer -- - * Initiate multiple-messages transfer over specified I2C bus or - * put request into queue if bus or some other resource is busy. (This - * is non-blocking function). - * - * PARAMETERS: - * bus - I2C bus number - * nmsg - number of messages - * msg - pointer to messages array - * done - function which is called when transfer is finished - * done_arg_ptr - arbitrary argument ptr passed to done funciton - * - * RETURNS: - * RTEMS_SUCCESSFUL if transfer initiated successfully, or error - * code if something failed. - */ -rtems_status_code -i2c_transfer(i2c_bus_number bus, int nmsg, i2c_message *msg, - i2c_transfer_done done, void *done_arg); - -/* i2c_transfer_wait -- - * Initiate I2C bus transfer and block until this transfer will be - * finished. This function wait the semaphore if system in - * SYSTEM_STATE_UP state, or poll done flag in other states. - * - * PARAMETERS: - * bus - I2C bus number - * msg - pointer to transfer messages array - * nmsg - number of messages in transfer - * - * RETURNS: - * I2C_SUCCESSFUL, if tranfer finished successfully, - * I2C_RESOURCE_NOT_AVAILABLE, if semaphore operations has failed, - * value of status field of first error-finished message in transfer, - * if something wrong. - */ -i2c_message_status -i2c_transfer_wait(i2c_bus_number bus, i2c_message *msg, int nmsg); - -/* i2c_poll -- - * Poll I2C bus controller for events and hanle it. This function is - * used when I2C driver operates in poll-driven mode. - * - * PARAMETERS: - * bus - bus number to be polled - * - * RETURNS: - * none - */ -void -i2c_poll(i2c_bus_number bus); - -/* i2c_write -- - * Send single message over specified I2C bus to addressed device and - * wait while transfer is finished. - * - * PARAMETERS: - * bus - I2C bus number - * addr - address of I2C device - * buf - data to be sent to device - * size - data buffer size - * - * RETURNS: - * transfer status - */ -i2c_message_status -i2c_write(i2c_bus_number bus, i2c_address addr, void *buf, int size); - -/* i2c_wrbyte -- - * Send single one-byte long message over specified I2C bus to - * addressed device and wait while transfer is finished. - * - * PARAMETERS: - * bus - I2C bus number - * addr - address of I2C device - * cmd - byte message to be sent to device - * - * RETURNS: - * transfer status - */ -i2c_message_status -i2c_wrbyte(i2c_bus_number bus, i2c_address addr, uint8_t cmd); - -/* i2c_read -- - * receive single message over specified I2C bus from addressed device. - * This call will wait while transfer is finished. - * - * PARAMETERS: - * bus - I2C bus number - * addr - address of I2C device - * buf - buffer for received message - * size - receive buffer size - * - * RETURNS: - * transfer status - */ -i2c_message_status -i2c_read(i2c_bus_number bus, i2c_address addr, void *buf, int size); - -/* i2c_wrrd -- - * Send message over I2C bus to specified device and receive message - * from the same device during single transfer. - * - * PARAMETERS: - * bus - I2C bus number - * addr - address of I2C device - * bufw - data to be sent to device - * sizew - send data buffer size - * bufr - buffer for received message - * sizer - receive buffer size - * - * RETURNS: - * transfer status - */ -i2c_message_status -i2c_wrrd(i2c_bus_number bus, i2c_address addr, void *bufw, int sizew, - void *bufr, int sizer); - -/* i2c_wbrd -- - * Send one-byte message over I2C bus to specified device and receive - * message from the same device during single transfer. - * - * PARAMETERS: - * bus - I2C bus number - * addr - address of I2C device - * cmd - one-byte message to be sent over I2C bus - * bufr - buffer for received message - * sizer - receive buffer size - * - * RETURNS: - * transfer status - */ -i2c_message_status -i2c_wbrd(i2c_bus_number bus, i2c_address addr, uint8_t cmd, - void *bufr, int sizer); - -#endif diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/i2cdrv.h b/c/src/lib/libbsp/powerpc/gen5200/include/i2cdrv.h deleted file mode 100644 index 4b4a1ec141..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/i2cdrv.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * i2cdrv.h -- I2C bus driver prototype and definitions - * - * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia - * Author: Victor V. Vengerov <vvv@oktet.ru> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef __I2CDRV_H__ -#define __I2CDRV_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define I2C_DRIVER_TABLE_ENTRY \ - { i2cdrv_initialize, NULL, NULL, NULL, NULL, NULL } - -/* i2cdrv_initialize -- - * I2C driver initialization (rtems I/O driver primitive) - */ -rtems_device_driver -i2cdrv_initialize(rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg); - -#ifdef __cplusplus -} -#endif - -#endif /* __I2CDRV_H__ */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/irq.h b/c/src/lib/libbsp/powerpc/gen5200/include/irq.h deleted file mode 100644 index 5a0b3bd29e..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/irq.h +++ /dev/null @@ -1,212 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic MPC5200 BSP | -+-----------------------------------------------------------------+ -| Partially based on the code references which are named below. | -| Adaptions, modifications, enhancements and any recent parts of | -| the code are: | -| Copyright (c) 2005, 2010 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains declarations for the irq controller handler | -\*===============================================================*/ -/***********************************************************************/ -/* */ -/* Module: irq.h */ -/* Date: 07/17/2003 */ -/* Purpose: RTEMS MPC5x00 CPU interrupt header file */ -/* */ -/*---------------------------------------------------------------------*/ -/* */ -/* Description: This include file describe the data structure and */ -/* the functions implemented by rtems to write */ -/* interrupt handlers. */ -/* */ -/*---------------------------------------------------------------------*/ -/* */ -/* Code */ -/* References: MPC8260ads CPU interrupt header file */ -/* Module: irq.h */ -/* Project: RTEMS 4.6.0pre1 / MCF8260ads BSP */ -/* Version 1.1 */ -/* Date: 10/10/2002 */ -/* */ -/* Author(s) / Copyright(s): */ -/* */ -/* Copyright (C) 1999 valette@crf.canon.fr */ -/* */ -/* This code is heavilly inspired by the public specification of */ -/* STREAM V2 that can be found at: */ -/* */ -/* <http://www.chorus.com/Documentation/index.html> by following */ -/* the STREAM API Specification Document link. */ -/* */ -/* Modified for mpc8260 by Andy Dachs <a.dachs@sstl.co.uk> */ -/* Surrey Satellite Technology Limited */ -/* The interrupt handling on the mpc8260 seems quite different from */ -/* the 860 (I don't know the 860 well). Although some interrupts */ -/* are routed via the CPM irq and some are direct to the SIU they */ -/* all appear logically the same.Therefore I removed the distinction */ -/* between SIU and CPM interrupts. */ -/* */ -/* The license and distribution terms for this file may be */ -/* found in the file LICENSE in this distribution or at */ -/* http://www.rtems.org/license/LICENSE. */ -/* */ -/*---------------------------------------------------------------------*/ -/* */ -/* Partially based on the code references which are named above. */ -/* Adaptions, modifications, enhancements and any recent parts of */ -/* the code are under the right of */ -/* */ -/* IPR Engineering, Dachauer Straße 38, D-80335 München */ -/* Copyright(C) 2003 */ -/* */ -/*---------------------------------------------------------------------*/ -/* */ -/* IPR Engineering makes no representation or warranties with */ -/* respect to the performance of this computer program, and */ -/* specifically disclaims any responsibility for any damages, */ -/* special or consequential, connected with the use of this program. */ -/* */ -/*---------------------------------------------------------------------*/ -/* */ -/* Version history: 1.0 */ -/* */ -/***********************************************************************/ - -#ifndef LIBBSP_POWERPC_GEN5200_IRQ_H -#define LIBBSP_POWERPC_GEN5200_IRQ_H - -#define PMCE_CE_SHADOW (1U << (31 - 31)) -#define PMCE_CSE_STICKY (1U << (31 - 21)) -#define PMCE_MSE_STICKY (1U << (31 - 10)) -#define PMCE_PSE_STICKY (1U << (31 - 2)) -#define PMCE_CSE_SOURCE(_pmce) (((_pmce) >> 8) & 0x3U) -#define PMCE_MSE_SOURCE(_pmce) (((_pmce) >> 16) & 0x1fU) -#define PMCE_PSE_SOURCE(_pmce) (((_pmce) >> 24) & 0x1fU) - -/* - * Peripheral IRQ handlers related definitions - */ -#define BSP_PER_IRQ_NUMBER 22 -#define BSP_PER_IRQ_LOWEST_OFFSET 0 -#define BSP_PER_IRQ_MAX_OFFSET \ - (BSP_PER_IRQ_LOWEST_OFFSET + BSP_PER_IRQ_NUMBER - 1) /* 21 */ -/* - * Main IRQ handlers related definitions - */ -#define BSP_MAIN_IRQ_NUMBER 17 -#define BSP_MAIN_IRQ_LOWEST_OFFSET BSP_PER_IRQ_MAX_OFFSET + 1 /* 22 */ -#define BSP_MAIN_IRQ_MAX_OFFSET \ - (BSP_MAIN_IRQ_LOWEST_OFFSET + BSP_MAIN_IRQ_NUMBER - 1) /* 38 */ -/* - * Critical IRQ handlers related definitions - */ -#define BSP_CRIT_IRQ_NUMBER 4 -#define BSP_CRIT_IRQ_LOWEST_OFFSET BSP_MAIN_IRQ_MAX_OFFSET + 1 /* 39 */ -#define BSP_CRIT_IRQ_MAX_OFFSET \ - (BSP_CRIT_IRQ_LOWEST_OFFSET + BSP_CRIT_IRQ_NUMBER - 1) /* 42 */ -/* - * Summary of SIU interrupts - */ -#define BSP_SIU_IRQ_NUMBER BSP_CRIT_IRQ_MAX_OFFSET + 1 /* 43 */ -#define BSP_SIU_IRQ_LOWEST_OFFSET BSP_PER_IRQ_LOWEST_OFFSET /* 0 */ -#define BSP_SIU_IRQ_MAX_OFFSET BSP_CRIT_IRQ_MAX_OFFSET /* 42 */ -/* - * Processor IRQ handlers related definitions - */ -#define BSP_PROCESSOR_IRQ_NUMBER 3 -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET BSP_CRIT_IRQ_MAX_OFFSET + 1 /* 44 */ -#define BSP_PROCESSOR_IRQ_MAX_OFFSET \ - (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) /* 46 */ -/* - * Summary - */ -#define BSP_IRQ_NUMBER BSP_PROCESSOR_IRQ_MAX_OFFSET + 1 /* 47 */ -#define BSP_LOWEST_OFFSET BSP_PER_IRQ_LOWEST_OFFSET /* 0 */ -#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET /* 46 */ - -#ifndef ASM - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -/* - * index table for the module specific handlers, a few entries are only placeholders - */ -typedef enum { - BSP_SIU_IRQ_SMARTCOMM = BSP_PER_IRQ_LOWEST_OFFSET + 0, - BSP_SIU_IRQ_PSC1 = BSP_PER_IRQ_LOWEST_OFFSET + 1, - BSP_SIU_IRQ_PSC2 = BSP_PER_IRQ_LOWEST_OFFSET + 2, - BSP_SIU_IRQ_PSC3 = BSP_PER_IRQ_LOWEST_OFFSET + 3, - BSP_SIU_IRQ_PSC6 = BSP_PER_IRQ_LOWEST_OFFSET + 4, - BSP_SIU_IRQ_ETH = BSP_PER_IRQ_LOWEST_OFFSET + 5, - BSP_SIU_IRQ_USB = BSP_PER_IRQ_LOWEST_OFFSET + 6, - BSP_SIU_IRQ_ATA = BSP_PER_IRQ_LOWEST_OFFSET + 7, - BSP_SIU_IRQ_PCI_CRT = BSP_PER_IRQ_LOWEST_OFFSET + 8, - BSP_SIU_IRQ_PCI_SC_RX = BSP_PER_IRQ_LOWEST_OFFSET + 9, - BSP_SIU_IRQ_PCI_SC_TX = BSP_PER_IRQ_LOWEST_OFFSET + 10, - BSP_SIU_IRQ_PSC4 = BSP_PER_IRQ_LOWEST_OFFSET + 11, - BSP_SIU_IRQ_PSC5 = BSP_PER_IRQ_LOWEST_OFFSET + 12, - BSP_SIU_IRQ_SPI_MODF = BSP_PER_IRQ_LOWEST_OFFSET + 13, - BSP_SIU_IRQ_SPI_SPIF = BSP_PER_IRQ_LOWEST_OFFSET + 14, - BSP_SIU_IRQ_I2C1 = BSP_PER_IRQ_LOWEST_OFFSET + 15, - BSP_SIU_IRQ_I2C2 = BSP_PER_IRQ_LOWEST_OFFSET + 16, - BSP_SIU_IRQ_MSCAN1 = BSP_PER_IRQ_LOWEST_OFFSET + 17, - BSP_SIU_IRQ_MSCAN2 = BSP_PER_IRQ_LOWEST_OFFSET + 18, - BSP_SIU_IRQ_IR_RX = BSP_PER_IRQ_LOWEST_OFFSET + 19, - BSP_SIU_IRQ_IR_TX = BSP_PER_IRQ_LOWEST_OFFSET + 20, - BSP_SIU_IRQ_XLB_ARB = BSP_PER_IRQ_LOWEST_OFFSET + 21, - - /* SL_TIMER1 -- handler entry only used in case of SMI */ - BSP_SIU_IRQ_SL_TIMER1 = BSP_MAIN_IRQ_LOWEST_OFFSET + 0, - BSP_SIU_IRQ_IRQ1 = BSP_MAIN_IRQ_LOWEST_OFFSET + 1, - BSP_SIU_IRQ_IRQ2 = BSP_MAIN_IRQ_LOWEST_OFFSET + 2, - BSP_SIU_IRQ_IRQ3 = BSP_MAIN_IRQ_LOWEST_OFFSET + 3, - /* LO_INT -- handler entry never used (only placeholder) */ - BSP_SIU_IRQ_LO_INT = BSP_MAIN_IRQ_LOWEST_OFFSET + 4, - BSP_SIU_IRQ_RTC_PER = BSP_MAIN_IRQ_LOWEST_OFFSET + 5, - BSP_SIU_IRQ_RTC_STW = BSP_MAIN_IRQ_LOWEST_OFFSET + 6, - BSP_SIU_IRQ_GPIO_STD = BSP_MAIN_IRQ_LOWEST_OFFSET + 7, - BSP_SIU_IRQ_GPIO_WKUP = BSP_MAIN_IRQ_LOWEST_OFFSET + 8, - BSP_SIU_IRQ_TMR0 = BSP_MAIN_IRQ_LOWEST_OFFSET + 9, - BSP_SIU_IRQ_TMR1 = BSP_MAIN_IRQ_LOWEST_OFFSET + 10, - BSP_SIU_IRQ_TMR2 = BSP_MAIN_IRQ_LOWEST_OFFSET + 1, - BSP_SIU_IRQ_TMR3 = BSP_MAIN_IRQ_LOWEST_OFFSET + 12, - BSP_SIU_IRQ_TMR4 = BSP_MAIN_IRQ_LOWEST_OFFSET + 13, - BSP_SIU_IRQ_TMR5 = BSP_MAIN_IRQ_LOWEST_OFFSET + 14, - BSP_SIU_IRQ_TMR6 = BSP_MAIN_IRQ_LOWEST_OFFSET + 15, - BSP_SIU_IRQ_TMR7 = BSP_MAIN_IRQ_LOWEST_OFFSET + 16, - - BSP_SIU_IRQ_IRQ0 = BSP_CRIT_IRQ_LOWEST_OFFSET + 0, - BSP_SIU_IRQ_SL_TIMER0 = BSP_CRIT_IRQ_LOWEST_OFFSET + 1, - /* HI_INT -- handler entry never used (only placeholder) */ - BSP_SIU_IRQ_HI_INT = BSP_CRIT_IRQ_LOWEST_OFFSET + 2, - BSP_SIU_IRQ_CSS_WKUP = BSP_CRIT_IRQ_LOWEST_OFFSET + 3, - - BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 0, - BSP_SYSMGMT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 1, - BSP_EXT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 2 -} rtems_irq_symbolic_name; - -#define BSP_CRIT_IRQ_PRIO_LEVELS 4 -#define BSP_PERIODIC_TIMER BSP_SIU_IRQ_TMR6 - -#define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET - -#define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET - -#endif - -#endif /* LIBBSP_POWERPC_GEN5200_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/mpc5200.h b/c/src/lib/libbsp/powerpc/gen5200/include/mpc5200.h deleted file mode 100644 index 263e66fb9e..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/mpc5200.h +++ /dev/null @@ -1,1369 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic MPC5200 BSP | -+-----------------------------------------------------------------+ -| Partially based on the code references which are named below. | -| Adaptions, modifications, enhancements and any recent parts of | -| the code are: | -| Copyright (c) 2005 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains definitions for the mpc5200 hw registers | -\*===============================================================*/ - -#ifndef __MPC5200_h__ -#define __MPC5200_h__ - -/* Additional Harpo Core SPR definitions (603le only) */ -#define CSRR0 58 /* Critical Interrupt SRR0 */ -#define CSRR1 59 /* Critical Interrupt SRR1 */ -#define DABR2 1000 /* Data Address Breakpoint #2 */ -#define DBCR 1001 /* Data Address Breakpoint Control */ -#define IBCR 1002 /* Instruction Breakpoint Control */ -#define IABR2 1018 /* Instruction Breakpoint #2 */ - -/* - * Initial post-reset location of MGT5100 module base address register (MBAR) - */ -#define MBAR_RESET 0x80000000 - -/* - * Location and size of onchip SRAM (relative to MBAR) - */ -#define ONCHIP_SRAM_OFFSET 0x8000 -#define ONCHIP_SRAM_SIZE 0x4000 - -#ifndef ASM -#include <rtems.h> - -#include <bsp/utility.h> - -#ifdef __cplusplus -extern "C" { -#endif - -#define MPC5200_CAN_NO 2 -#define MPC5200_PSC_NO 6 - /* XXX: there are only 6 PSCs, but PSC6 has an extra register gap - * from PSC5, therefore we instantiate seven(!) PSC register sets - */ -#define MPC5200_PSC_REG_SETS 7 - -#define MPC5200_GPT_NO 8 -#define MPC5200_SLT_NO 2 - -/* - * Bit fields for FEC interrupts, ievent and imask above. - */ -#define FEC_INTR_HBERR 0x80000000 /* heartbeat error */ -#define FEC_INTR_BABR 0x40000000 /* babbling receive error */ -#define FEC_INTR_BABT 0x20000000 /* babbling transmit error */ -#define FEC_INTR_GRA 0x10000000 /* graceful stop complete */ -#define FEC_INTR_TFINT 0x08000000 /* transmit frame interrupt */ -/* 0x04000000 reserved */ -/* 0x02000000 reserved */ -/* 0x01000000 reserved */ -#define FEC_INTR_MII 0x00800000 /* MII interrupt */ -/* 0x00400000 reserved */ -#define FEC_INTR_LATE_COL 0x00200000 /* late collision */ -#define FEC_INTR_COL_RETRY 0x00100000 /* collision retry limit */ -#define FEC_INTR_XFIFO_UN 0x00080000 /* transmit FIFO error */ -#define FEC_INTR_XFIFO_ERR 0x00040000 /* transmit FIFO error */ -#define FEC_INTR_RFIFO_ERR 0x00020000 /* receive FIFO error */ -/* 0x00010000 reserved */ -/* 0x0000ffff reserved */ -#define FEC_INTR_HBEEN FEC_INTR_HBERR -#define FEC_INTR_BREN FEC_INTR_BABR -#define FEC_INTR_BTEN FEC_INTR_BABT -#define FEC_INTR_GRAEN FEC_INTR_GRA -#define FEC_INTR_TFINTEN FEC_INTR_TFINT -#define FEC_INTR_MIIEN FEC_INTR_MII -#define FEC_INTR_LCEN FEC_INTR_LATE_COL -#define FEC_INTR_CRLEN FEC_INTR_COL_RETRY -#define FEC_INTR_XFUNEN FEC_INTR_XFIFO_UN -#define FEC_INTR_XFERREN FEC_INTR_XFIFO_ERR -#define FEC_INTR_RFERREN FEC_INTR_RFIFO_ERR -#define FEC_INTR_CLEAR_ALL 0xffffffff /* clear all interrupt events */ -#define FEC_INTR_MASK_ALL 0x00000000 /* mask all interrupt events */ - -/* - * Bit fields for FEC ethernet control, ecntrl above. - */ -#define FEC_ECNTRL_TAG 0xf0000000 /* TBUS tag bits */ -/* 0x08000000 reserved */ -#define FEC_ECNTRL_TESTMD 0x04000000 /* test mode */ -/* 0x03fffff8 reserved */ -#define FEC_ECNTRL_OE 0x00000004 /* FEC output enable */ -#define FEC_ECNTRL_EN 0x00000002 /* ethernet enable */ -#define FEC_ECNTRL_RESET 0x00000001 /* ethernet controller reset */ - -/* - * Bit fields for FEC receive control, r_cntrl above. - */ -/* 0xf1000000 reserved */ -#define FEC_RCNTRL_MAX_FL 0x07ff0000 /* maximum frame length */ -#define FEC_RCNTRL_MAX_FL_SHIFT 16 -/* 0x0000ffc0 reserved */ -#define FEC_RCNTRL_FCE 0x00000020 /* flow control enable */ -#define FEC_RCNTRL_BC_REJ 0x00000010 /* broadcast frame reject */ -#define FEC_RCNTRL_PROM 0x00000008 /* promiscuous mode */ -#define FEC_RCNTRL_MII_MODE 0x00000004 /* select 18-wire (MII) mode */ -#define FEC_RCNTRL_DRT 0x00000002 /* disable receive on transmit */ -#define FEC_RCNTRL_LOOP 0x00000001 /* internal loopback */ - -/* - * Bit fields for FEC transmit control, x_cntrl above. - */ -/* 0xffffffe0 reserved */ -#define FEC_XCNTRL_RFC_PAUS 0x00000010 /* FDX flow control pause rx */ -#define FEC_XCNTRL_TFC_PAUS 0x00000008 /* assert a PAUSE frame */ -#define FEC_XCNTRL_FDEN 0x00000004 /* full duplex enable */ -#define FEC_XCNTRL_HBC 0x00000002 /* heartbeat control */ -#define FEC_XCNTRL_GTS 0x00000001 /* graceful transmit stop */ - -/* - * Bit fields for FEC transmit status, x_status above. - */ -/* 0xfc000000 reserved */ -#define FEC_XSTAT_DEF 0x02000000 /* defer */ -#define FEC_XSTAT_HB 0x01000000 /* heartbeat error */ -#define FEC_XSTAT_LC 0x00800000 /* late collision */ -#define FEC_XSTAT_RL 0x00400000 /* retry limit */ -#define FEC_XSTAT_RC 0x003c0000 /* retry count */ -#define FEC_XSTAT_UN 0x00020000 /* underrun */ -#define FEX_XSTAT_CSL 0x00010000 /* carrier sense lost */ -/* 0x0000ffff reserved */ - -/* - * Bit fields for FEC transmit FIFO watermark, x_wmrk above. - */ -#define FEC_XWMRK_64 0x00000000 /* 64 bytes written to TxFIFO */ -#define FEC_XWMRK_128 0x00000001 /* 128 bytes written to TxFIFO */ -#define FEC_XWMRK_192 0x00000002 /* 192 bytes written to TxFIFO */ -#define FEC_XWMRK_256 0x00000003 /* 256 bytes written to TxFIFO */ -#define FEC_XWMRK_320 0x00000004 /* 320 bytes written to TxFIFO */ -#define FEC_XWMRK_384 0x00000005 /* 384 bytes written to TxFIFO */ -#define FEC_XWMRK_448 0x00000006 /* 448 bytes written to TxFIFO */ -#define FEC_XWMRK_512 0x00000007 /* 512 bytes written to TxFIFO */ -#define FEC_XWMRK_576 0x00000008 /* 576 bytes written to TxFIFO */ -#define FEC_XWMRK_640 0x00000009 /* 640 bytes written to TxFIFO */ -#define FEC_XWMRK_704 0x0000000a /* 704 bytes written to TxFIFO */ -#define FEC_XWMRK_768 0x0000000b /* 768 bytes written to TxFIFO */ -#define FEC_XWMRK_832 0x0000000c /* 832 bytes written to TxFIFO */ -#define FEC_XWMRK_896 0x0000000d /* 896 bytes written to TxFIFO */ -#define FEC_XWMRK_960 0x0000000e /* 960 bytes written to TxFIFO */ -#define FEC_XWMRK_1024 0x0000000f /* 1024 bytes written to TxFIFO */ - -/* - * Bit fields for FEC transmit finite state machine. - */ -/* 0xfc000000 reserved */ -#define FEC_FSM_CRC 0x02000000 /* append CRC (typical use) */ -#define FEC_FSM_ENFSM 0x01000000 /* enable CRC FSM (typical use) */ -/* 0x00ffffff reserved */ - -/* - * Bit fields for FEC FIFOs, rfifo_status, rfifo_cntrl, tfifo_status - * and tfifo_cntrl. - */ -#define FEC_FIFO_STAT_IP 0x80000000 /* illegal pointer, sticky */ -/* 0x70000000 reserved */ -#define FEC_FIFO_STAT_FRAME 0x0f000000 /* frame indicator */ -#define FEC_FIFO_STAT_FAE 0x00800000 /* frame accept error */ -#define FEC_FIFO_STAT_RXW 0x00400000 /* receive wait condition */ -#define FEC_FIFO_STAT_UF 0x00200000 /* underflow */ -#define FEC_FIFO_STAT_OF 0x00100000 /* overflow */ -#define FEC_FIFO_STAT_FR 0x00080000 /* frame ready, read-only */ -#define FEC_FIFO_STAT_FULL 0x00040000 /* full alarm, read-only */ -#define FEC_FIFO_STAT_ALARM 0x00020000 /* fifo alarm */ -#define FEC_FIFO_STAT_EMPTY 0x00010000 /* empty, read-only */ -/* 0x0000ffff reserved */ -#define FEC_FIFO_STAT_ERROR ( FEC_FIFO_STAT_IP \ - | FEC_FIFO_STAT_FAE \ - | FEC_FIFO_STAT_RXW \ - | FEC_FIFO_STAT_UF \ - | FEC_FIFO_STAT_OF \ - ) - -/* 0x80000000 reserved */ -#define FEC_FIFO_CNTRL_WCTL 0x40000000 /* write control */ -#define FEC_FIFO_CNTRL_WFR 0x20000000 /* write frame */ -/* 0x10000000 reserved */ -#define FEC_FIFO_CNTRL_FRAME 0x08000000 /* frame mode enable */ -#define FEC_FIFO_CNTRL_GR 0x07000000 /* last transfer granularity */ -#define FEC_FIFO_CNTRL_GR_SHIFT 24 -#define FEC_FIFO_CNTRL_IP_MASK 0x00800000 /* illegal pointer mask */ -#define FEC_FIFO_CNTRL_FAE_MASK 0x00400000 /* frame accept mask */ -#define FEC_FIFO_CNTRL_RXW_MASK 0x00200000 /* receive wait mask */ -#define FEC_FIFO_CNTRL_UF_MASK 0x00100000 /* underflow mask */ -#define FEC_FIFO_CNTRL_OF_MASK 0x00080000 /* overflow mask */ -/* 0x0007ffff reserved */ - -#define SDMA_TCR_EN BSP_BBIT16(0) -#define SDMA_TCR_VAL BSP_BBIT16(1) -#define SDMA_TCR_ALW_INIT BSP_BBIT16(2) -#define SDMA_TCR_IN(val) BSP_BFLD16(val, 3, 7) -#define SDMA_TCR_AUTO_START BSP_BBIT16(8) -#define SDMA_TCR_HIGH_EN BSP_BBIT16(9) -#define SDMA_TCR_HOLD BSP_BBIT16(10) -#define SDMA_TCR_AS(val) BSP_BFLD16(val, 12, 15) - -#define SDMA_IPR_HOLD BSP_BBIT8(0) -#define SDMA_IPR_PRIOR(val) BSP_BFLD8(val, 5, 7) - -#define SDMA_REQMUX_SET_31(reg, val) BSP_BFLD32SET(reg, val, 0, 1) -#define SDMA_REQMUX_SET_30(reg, val) BSP_BFLD32SET(reg, val, 2, 3) -#define SDMA_REQMUX_SET_29(reg, val) BSP_BFLD32SET(reg, val, 4, 5) -#define SDMA_REQMUX_SET_28(reg, val) BSP_BFLD32SET(reg, val, 6, 7) -#define SDMA_REQMUX_SET_27(reg, val) BSP_BFLD32SET(reg, val, 8, 9) -#define SDMA_REQMUX_SET_26(reg, val) BSP_BFLD32SET(reg, val, 10, 11) -#define SDMA_REQMUX_SET_25(reg, val) BSP_BFLD32SET(reg, val, 12, 13) -#define SDMA_REQMUX_SET_24(reg, val) BSP_BFLD32SET(reg, val, 14, 15) -#define SDMA_REQMUX_SET_23(reg, val) BSP_BFLD32SET(reg, val, 16, 17) -#define SDMA_REQMUX_SET_22(reg, val) BSP_BFLD32SET(reg, val, 18, 19) -#define SDMA_REQMUX_SET_21(reg, val) BSP_BFLD32SET(reg, val, 20, 21) -#define SDMA_REQMUX_SET_20(reg, val) BSP_BFLD32SET(reg, val, 22, 23) -#define SDMA_REQMUX_SET_19(reg, val) BSP_BFLD32SET(reg, val, 24, 25) -#define SDMA_REQMUX_SET_18(reg, val) BSP_BFLD32SET(reg, val, 26, 27) -#define SDMA_REQMUX_SET_17(reg, val) BSP_BFLD32SET(reg, val, 28, 29) -#define SDMA_REQMUX_SET_16(reg, val) BSP_BFLD32SET(reg, val, 30, 31) - -/* SDMA / BestComm */ -typedef struct { - uint32_t taskBar; - uint32_t currentPointer; - uint32_t endPointer; - uint32_t variablePointer; - uint8_t IntVect1; - uint8_t IntVect2; - uint16_t PtdCntrl; - uint32_t IntPend; - uint32_t IntMask; - uint16_t tcr [16]; - uint8_t ipr [32]; - uint32_t cReqSelect; - uint32_t task_size0; - uint32_t task_size1; - uint32_t reserved_0; - uint32_t reserved_1; - uint32_t Value1; - uint32_t Value2; - uint32_t Control; - uint32_t Status; -} mpc5200_sdma; - -typedef struct { -#define CSC_CFG_WAITP(val) BSP_BFLD32(val, 0, 7) -#define CSC_CFG_WAITX(val) BSP_BFLD32(val, 8, 15) -#define CSC_CFG_MX BSP_BBIT32(16) -#define CSC_CFG_AA BSP_BBIT32(18) -#define CSC_CFG_CE BSP_BBIT32(19) -#define CSC_CFG_AS(val) BSP_BFLD32(val, 20, 21) -#define CSC_CFG_DS(val) BSP_BFLD32(val, 22, 23) -#define CSC_CFG_BANK(val) BSP_BFLD32(val, 24, 25) -#define CSC_CFG_WTYP(val) BSP_BFLD32(val, 26, 27) -#define CSC_CFG_WS BSP_BBIT32(28) -#define CSC_CFG_RS BSP_BBIT32(29) -#define CSC_CFG_WO BSP_BBIT32(30) -#define CSC_CFG_RO BSP_BBIT32(31) - uint32_t config_0; - uint32_t config_1; - uint32_t config_2; - uint32_t config_3; - uint32_t config_4; - uint32_t config_5; - -#define CSC_CTRL_ME BSP_BBIT32(7) - uint32_t control; - -#define CSC_STAT_WOERR BSP_BBIT32(2) -#define CSC_STAT_ROERR BSP_BBIT32(3) -#define CSC_STAT_GET_CSXERR(reg) BSP_BFLD32GET(reg, 5, 7) - uint32_t status; - - uint32_t config_6; - uint32_t config_7; - -#define CSC_BST_CTRL_CW7 BSP_BBIT32(0) -#define CSC_BST_CTRL_SLB7 BSP_BBIT32(1) -#define CSC_BST_CTRL_BRE7 BSP_BBIT32(3) -#define CSC_BST_CTRL_CW6 BSP_BBIT32(4) -#define CSC_BST_CTRL_SLB6 BSP_BBIT32(5) -#define CSC_BST_CTRL_BRE6 BSP_BBIT32(7) -#define CSC_BST_CTRL_CW5 BSP_BBIT32(8) -#define CSC_BST_CTRL_SLB5 BSP_BBIT32(9) -#define CSC_BST_CTRL_BRE5 BSP_BBIT32(11) -#define CSC_BST_CTRL_CW4 BSP_BBIT32(12) -#define CSC_BST_CTRL_SLB4 BSP_BBIT32(13) -#define CSC_BST_CTRL_BRE4 BSP_BBIT32(15) -#define CSC_BST_CTRL_CW3 BSP_BBIT32(16) -#define CSC_BST_CTRL_SLB3 BSP_BBIT32(17) -#define CSC_BST_CTRL_BRE3 BSP_BBIT32(19) -#define CSC_BST_CTRL_CW2 BSP_BBIT32(20) -#define CSC_BST_CTRL_SLB2 BSP_BBIT32(21) -#define CSC_BST_CTRL_BRE2 BSP_BBIT32(23) -#define CSC_BST_CTRL_CW1 BSP_BBIT32(24) -#define CSC_BST_CTRL_SLB1 BSP_BBIT32(25) -#define CSC_BST_CTRL_BRE1 BSP_BBIT32(27) -#define CSC_BST_CTRL_CW0 BSP_BBIT32(28) -#define CSC_BST_CTRL_SLB0 BSP_BBIT32(29) -#define CSC_BST_CTRL_BRE0 BSP_BBIT32(31) - uint32_t burst_control; - -#define CSC_DCYC_CTRL_DC7(val) BSP_BFLD32(val, 2, 3) -#define CSC_DCYC_CTRL_SET_DC7(reg, val) BSP_BFLD32SET(reg, val, 2, 3) -#define CSC_DCYC_CTRL_DC6(val) BSP_BFLD32(val, 6, 7) -#define CSC_DCYC_CTRL_SET_DC6(reg, val) BSP_BFLD32SET(reg, val, 6, 7) -#define CSC_DCYC_CTRL_DC5(val) BSP_BFLD32(val, 10, 11) -#define CSC_DCYC_CTRL_SET_DC5(reg, val) BSP_BFLD32SET(reg, val, 10, 11) -#define CSC_DCYC_CTRL_DC4(val) BSP_BFLD32(val, 14, 15) -#define CSC_DCYC_CTRL_SET_DC4(reg, val) BSP_BFLD32SET(reg, val, 14, 15) -#define CSC_DCYC_CTRL_DC3(val) BSP_BFLD32(val, 18, 19) -#define CSC_DCYC_CTRL_SET_DC3(reg, val) BSP_BFLD32SET(reg, val, 18, 19) -#define CSC_DCYC_CTRL_DC2(val) BSP_BFLD32(val, 22, 23) -#define CSC_DCYC_CTRL_SET_DC2(reg, val) BSP_BFLD32SET(reg, val, 22, 23) -#define CSC_DCYC_CTRL_DC1(val) BSP_BFLD32(val, 26, 27) -#define CSC_DCYC_CTRL_SET_DC1(reg, val) BSP_BFLD32SET(reg, val, 26, 27) -#define CSC_DCYC_CTRL_DC0(val) BSP_BFLD32(val, 30, 31) -#define CSC_DCYC_CTRL_SET_DC0(reg, val) BSP_BFLD32SET(reg, val, 30, 31) - uint32_t deadcycle_control; - - uint8_t reserved [208]; -} mpc5200_csc; - -typedef struct { - uint32_t memory_address_base; - uint32_t cs0_start_address; - uint32_t cs0_stop_address; - uint32_t cs1_start_address; - uint32_t cs1_stop_address; - uint32_t cs2_start_address; - uint32_t cs2_stop_address; - uint32_t cs3_start_address; - uint32_t cs3_stop_address; - uint32_t cs4_start_address; - uint32_t cs4_stop_address; - uint32_t cs5_start_address; - uint32_t cs5_stop_address; - uint32_t sdram_chip_select_0; - uint32_t sdram_chip_select_1; - uint8_t reserved_0 [16]; - uint32_t boot_start_address; - uint32_t boot_stop_address; - -#define MM_IPBI_CTRL_CS7ENA BSP_BBIT16(4) -#define MM_IPBI_CTRL_CS6ENA BSP_BBIT16(5) -#define MM_IPBI_CTRL_BOOTENA BSP_BBIT16(6) -#define MM_IPBI_CTRL_CS5ENA BSP_BBIT16(10) -#define MM_IPBI_CTRL_CS4ENA BSP_BBIT16(11) -#define MM_IPBI_CTRL_CS3ENA BSP_BBIT16(12) -#define MM_IPBI_CTRL_CS2ENA BSP_BBIT16(13) -#define MM_IPBI_CTRL_CS1ENA BSP_BBIT16(14) -#define MM_IPBI_CTRL_CS0ENA BSP_BBIT16(15) - uint16_t ipbi_control; - - uint16_t wait_state_enable; - uint32_t cs6_start_address; - uint32_t cs6_stop_address; - uint32_t cs7_start_address; - uint32_t cs7_stop_address; - uint8_t reserved_1 [152]; -} mpc5200_mm; - -/* -************************************************************************* -* MPC5x00 internal register memory map * -************************************************************************* -*/ -typedef struct mpc5200_ { - /* - * memory map registers (MBAR + 0) - */ - volatile mpc5200_mm mm; - - /* - * SDRAM memory controller registers (MBAR + 0x100) - */ - volatile uint8_t mc[0x100]; - - /* - * clock distribution module registers (MBAR + 0x200) - */ - volatile uint8_t cdm[0x100]; - - /* - * chip selct controller registers(MBAR + 0x300) - */ - volatile mpc5200_csc csc; - - /* - * SmartComm timer registers (MBAR + 0x400) - */ - volatile uint8_t sct[0x100]; - - /* - * interrupt controller registers (MBAR + 0x500) - */ - volatile uint32_t per_mask; /* + 0x00 */ - volatile uint32_t per_pri_1; /* + 0x04 */ - volatile uint32_t per_pri_2; /* + 0x08 */ - volatile uint32_t per_pri_3; /* + 0x0C */ - -#define ICTL_EET_ECLR0 BSP_BBIT32(4) -#define ICTL_EET_ECLR1 BSP_BBIT32(5) -#define ICTL_EET_ECLR2 BSP_BBIT32(6) -#define ICTL_EET_ECLR3 BSP_BBIT32(7) -#define ICTL_EET_ETYPE0(val) BSP_BFLD32(val, 8, 9) -#define ICTL_EET_ETYPE1(val) BSP_BFLD32(val, 10, 11) -#define ICTL_EET_ETYPE2(val) BSP_BFLD32(val, 12, 13) -#define ICTL_EET_ETYPE3(val) BSP_BFLD32(val, 14, 15) -#define ICTL_EET_SET_ETYPE0(reg, val) BSP_BFLD32SET(reg, val, 8, 9) -#define ICTL_EET_SET_ETYPE1(reg, val) BSP_BFLD32SET(reg, val, 10, 11) -#define ICTL_EET_SET_ETYPE2(reg, val) BSP_BFLD32SET(reg, val, 12, 13) -#define ICTL_EET_SET_ETYPE3(reg, val) BSP_BFLD32SET(reg, val, 14, 15) -#define ICTL_EET_MEE BSP_BBIT32(19) -#define ICTL_EET_EENA0 BSP_BBIT32(20) -#define ICTL_EET_EENA1 BSP_BBIT32(21) -#define ICTL_EET_EENA2 BSP_BBIT32(22) -#define ICTL_EET_EENA3 BSP_BBIT32(23) -#define ICTL_EET_CEB BSP_BBIT32(31) - - volatile uint32_t ext_en_type; /* + 0x10 */ - volatile uint32_t crit_pri_main_mask;/* + 0x14 */ - volatile uint32_t main_pri_1; /* + 0x18 */ - volatile uint32_t main_pri_2; /* + 0x1C */ - volatile uint32_t res1; /* + 0x20 */ - volatile uint32_t pmce; /* + 0x24 */ - volatile uint32_t csa; /* + 0x28 */ - volatile uint32_t msa; /* + 0x2C */ - volatile uint32_t psa; /* + 0x30 */ - volatile uint32_t res2; /* + 0x34 */ - volatile uint32_t psa_be; /* + 0x38 */ - volatile uint8_t res3[0xC4]; /* + 0x3C */ - - /* - * general pupose timer registers (MBAR + 0x600/+ 0x610/+ 0x620/+ 0x630/+ 0x640/+ 0x650/+ 0x660/+ 0x670) - */ - struct mpc5200_gpt { - volatile uint32_t emsel; /* + 0x00 */ - volatile uint32_t count_in; /* + 0x04 */ - volatile uint32_t pwm_conf; /* + 0x08 */ - volatile uint32_t status; /* + 0x0C */ - } gpt[MPC5200_GPT_NO]; - -#define GPT_STATUS_RESET 0x0000000F -#define GPT_STATUS_TEXP (1 << 3) -#define GPT_STATUS_PIN (1 << 8) -#define GPT_EMSEL_GPIO_DIR (2 << 4) -#define GPT_EMSEL_GPIO_OUT (1 << 4) -#define GPT_EMSEL_GPIO_OUT_HIGH (3 << 4) -#define GPT_EMSEL_TIMER_MS_GPIO (4 << 0) -#define GPT_EMSEL_GPIO_IN (0 << 0) -#define GPT_EMSEL_CE (1 << 12) -#define GPT_EMSEL_ST_CONT (1 << 10) -#define GPT_EMSEL_INTEN (1 << 8) -#define GPT_EMSEL_WDEN (1 << 15) - -#define GPT0 0 -#define GPT1 1 -#define GPT2 2 -#define GPT3 3 -#define GPT4 4 -#define GPT5 5 -#define GPT6 6 -#define GPT7 7 - - volatile uint8_t gpt_res[0x80]; - - /* - * slice time registers (MBAR + 0x700/+ 0x710) - */ - struct mpc5200_slt { - volatile uint32_t tcr; /* + 0x00 */ - volatile uint32_t cntrl; /* + 0x04 */ - volatile uint32_t cvr; /* + 0x08 */ - volatile uint32_t tsr; /* + 0x0C */ - } slt[MPC5200_SLT_NO]; - - volatile uint8_t slt_res[0xE0]; - - /* - * real time clock registers (MBAR + 0x800) - */ - volatile uint8_t rtc[0x100]; - - - /* - * MSCAN registers (MBAR + 0x900 /+ 0x980) - */ - struct mpc5200_mscan { - volatile uint8_t ctl0; /* + 0x0 */ - volatile uint8_t ctl1; /* + 0x1 */ - volatile uint8_t res1; /* + 0x2 */ - volatile uint8_t res2; /* + 0x3 */ - volatile uint8_t btr0; /* + 0x4 */ - volatile uint8_t btr1; /* + 0x5 */ - volatile uint8_t res3; /* + 0x6 */ - volatile uint8_t res4; /* + 0x7 */ - volatile uint8_t rflg; /* + 0x8 */ - volatile uint8_t rier; /* + 0x9 */ - volatile uint8_t res5; /* + 0xA */ - volatile uint8_t res6; /* + 0xB */ - volatile uint8_t tflg; /* + 0xC */ - volatile uint8_t tier; /* + 0xD */ - volatile uint8_t res7; /* + 0xE */ - volatile uint8_t res8; /* + 0xF */ - volatile uint8_t tarq; /* + 0x10 */ - volatile uint8_t taak; /* + 0x11 */ - volatile uint8_t res9; /* + 0x12 */ - volatile uint8_t res10; /* + 0x13 */ - volatile uint8_t bsel; /* + 0x14 */ - volatile uint8_t idac; /* + 0x15 */ - volatile uint8_t res11; /* + 0x16 */ - volatile uint8_t res12; /* + 0x17 */ - volatile uint8_t res13; /* + 0x18 */ - volatile uint8_t res14; /* + 0x19 */ - volatile uint8_t res15; /* + 0x1A */ - volatile uint8_t res16; /* + 0x1B */ - volatile uint8_t rxerr; /* + 0x1C */ - volatile uint8_t txerr; /* + 0x1D */ - volatile uint8_t res17; /* + 0x1E */ - volatile uint8_t res18; /* + 0x1F */ - volatile uint8_t idar0; /* + 0x20 */ - volatile uint8_t idar1; /* + 0x21 */ - volatile uint8_t res19; /* + 0x22 */ - volatile uint8_t res20; /* + 0x23 */ - volatile uint8_t idar2; /* + 0x24 */ - volatile uint8_t idar3; /* + 0x25 */ - volatile uint8_t res21; /* + 0x26 */ - volatile uint8_t res22; /* + 0x27 */ - volatile uint8_t idmr0; /* + 0x28 */ - volatile uint8_t idmr1; /* + 0x29 */ - volatile uint8_t res23; /* + 0x2A */ - volatile uint8_t res24; /* + 0x2B */ - volatile uint8_t idmr2; /* + 0x2C */ - volatile uint8_t idmr3; /* + 0x2D */ - volatile uint8_t res25; /* + 0x2E */ - volatile uint8_t res26; /* + 0x2F */ - volatile uint8_t idar4; /* + 0x30 */ - volatile uint8_t idar5; /* + 0x31 */ - volatile uint8_t res27; /* + 0x32 */ - volatile uint8_t res28; /* + 0x33 */ - volatile uint8_t idar6; /* + 0x34 */ - volatile uint8_t idar7; /* + 0x35 */ - volatile uint8_t res29; /* + 0x36 */ - volatile uint8_t res30; /* + 0x37 */ - volatile uint8_t idmr4; /* + 0x38 */ - volatile uint8_t idmr5; /* + 0x39 */ - volatile uint8_t res31; /* + 0x3A */ - volatile uint8_t res32; /* + 0x3B */ - volatile uint8_t idmr6; /* + 0x3C */ - volatile uint8_t idmr7; /* + 0x3D */ - volatile uint8_t res33; /* + 0x3E */ - volatile uint8_t res34; /* + 0x3F */ - volatile uint8_t rxidr0; /* + 0x40 */ - volatile uint8_t rxidr1; /* + 0x41 */ - volatile uint8_t res35; /* + 0x42 */ - volatile uint8_t res36; /* + 0x43 */ - volatile uint8_t rxidr2; /* + 0x44 */ - volatile uint8_t rxidr3; /* + 0x45 */ - volatile uint8_t res37; /* + 0x46 */ - volatile uint8_t res38; /* + 0x47 */ - volatile uint8_t rxdsr0; /* + 0x48 */ - volatile uint8_t rxdsr1; /* + 0x49 */ - volatile uint8_t res39; /* + 0x4A */ - volatile uint8_t res40; /* + 0x4B */ - volatile uint8_t rxdsr2; /* + 0x4C */ - volatile uint8_t rxdsr3; /* + 0x4D */ - volatile uint8_t res41; /* + 0x4E */ - volatile uint8_t res42; /* + 0x4F */ - volatile uint8_t rxdsr4; /* + 0x50 */ - volatile uint8_t rxdsr5; /* + 0x51 */ - volatile uint8_t res43; /* + 0x52 */ - volatile uint8_t res44; /* + 0x53 */ - volatile uint8_t rxdsr6; /* + 0x54 */ - volatile uint8_t rxdsr7; /* + 0x55 */ - volatile uint8_t res45; /* + 0x56 */ - volatile uint8_t res46; /* + 0x57 */ - volatile uint8_t rxdlr; /* + 0x58 */ - volatile uint8_t res47; /* + 0x59 */ - volatile uint8_t res48; /* + 0x5A */ - volatile uint8_t res49; /* + 0x5B */ - volatile uint8_t rxtimh; /* + 0x5C */ - volatile uint8_t rxtiml; /* + 0x5D */ - volatile uint8_t res50; /* + 0x5E */ - volatile uint8_t res51; /* + 0x5F */ - volatile uint8_t txidr0; /* + 0x60 */ - volatile uint8_t txidr1; /* + 0x61 */ - volatile uint8_t res52; /* + 0x62 */ - volatile uint8_t res53; /* + 0x63 */ - volatile uint8_t txidr2; /* + 0x64 */ - volatile uint8_t txidr3; /* + 0x65 */ - volatile uint8_t res54; /* + 0x66 */ - volatile uint8_t res55; /* + 0x67 */ - volatile uint8_t txdsr0; /* + 0x68 */ - volatile uint8_t txdsr1; /* + 0x69 */ - volatile uint8_t res56; /* + 0x6A */ - volatile uint8_t res57; /* + 0x6B */ - volatile uint8_t txdsr2; /* + 0x6C */ - volatile uint8_t txdsr3; /* + 0x6D */ - volatile uint8_t res58; /* + 0x6E */ - volatile uint8_t res59; /* + 0x6F */ - volatile uint8_t txdsr4; /* + 0x70 */ - volatile uint8_t txdsr5; /* + 0x71 */ - volatile uint8_t res60; /* + 0x72 */ - volatile uint8_t res61; /* + 0x73 */ - volatile uint8_t txdsr6; /* + 0x74 */ - volatile uint8_t txdsr7; /* + 0x75 */ - volatile uint8_t res62; /* + 0x76 */ - volatile uint8_t res63; /* + 0x77 */ - volatile uint8_t txdlr; /* + 0x78 */ - volatile uint8_t txtbpr; /* + 0x79 */ - volatile uint8_t res64; /* + 0x7A */ - volatile uint8_t res65; /* + 0x7B */ - volatile uint8_t txtimh; /* + 0x7C */ - volatile uint8_t txtiml; /* + 0x7D */ - volatile uint8_t res66; /* + 0x7E */ - volatile uint8_t res67; /* + 0x7F */ - } mscan[MPC5200_CAN_NO]; - - volatile uint8_t res[0x100]; - - /* - * GPIO standard registers (MBAR + 0xB00) - */ - volatile uint32_t gpiopcr; /* + 0x00 */ - #define GPIO_PCR_CHIP_SELECT_1 0x80000000 - #define GPIO_PCR_CHIP_ALTS 0x30000000 - #define GPIO_PCR_CHIP_ALTS_NONE 0x00000000 - #define GPIO_PCR_CHIP_ALTS_CAN 0x10000000 - #define GPIO_PCR_CHIP_ALTS_SPI 0x20000000 - #define GPIO_PCR_CHIP_ALTS_BOTH 0x30000000 - #define GPIO_PCR_CHIP_SELECT_7 0x08000000 - #define GPIO_PCR_CHIP_SELECT_6 0x04000000 - #define GPIO_PCR_CHIP_SELECT_ATA 0x03000000 - #define GPIO_PCR_CHIP_SELECT_IR_USB_CLK 0x00800000 - #define GPIO_PCR_IRDA 0x00700000 - #define GPIO_PCR_ETHERNET 0x000F0000 - #define GPIO_PCR_PCI_DIS 0x00008000 - #define GPIO_PCR_USB_SE 0x00004000 - #define GPIO_PCR_USB_GPIO 0x00003000 - #define GPIO_PCR_PSC3 0x00000F00 - #define GPIO_PCR_PSC2 0x00000070 - #define GPIO_PCR_PSC1 0x00000007 - - #define GPIO_S_PIN_IR_USB_CLK BSP_BBIT32(2) - #define GPIO_S_PIN_IRDA_TX BSP_BBIT32(3) - #define GPIO_S_PIN_ETH_11 BSP_BBIT32(4) - #define GPIO_S_PIN_ETH_10 BSP_BBIT32(5) - #define GPIO_S_PIN_ETH_9 BSP_BBIT32(6) - #define GPIO_S_PIN_ETH_8 BSP_BBIT32(7) - #define GPIO_S_PIN_USB1_8 BSP_BBIT32(12) - #define GPIO_S_PIN_USB1_7 BSP_BBIT32(13) - #define GPIO_S_PIN_USB1_6 BSP_BBIT32(14) - #define GPIO_S_PIN_USB1_0 BSP_BBIT32(15) - #define GPIO_S_PIN_PSC3_7 BSP_BBIT32(18) - #define GPIO_S_PIN_PSC3_6 BSP_BBIT32(19) - #define GPIO_S_PIN_PSC3_3 BSP_BBIT32(20) - #define GPIO_S_PIN_PSC3_2 BSP_BBIT32(21) - #define GPIO_S_PIN_PSC3_1 BSP_BBIT32(22) - #define GPIO_S_PIN_PSC3_0 BSP_BBIT32(23) - #define GPIO_S_PIN_PSC2_3 BSP_BBIT32(24) - #define GPIO_S_PIN_PSC2_2 BSP_BBIT32(25) - #define GPIO_S_PIN_PSC2_1 BSP_BBIT32(26) - #define GPIO_S_PIN_PSC2_0 BSP_BBIT32(27) - #define GPIO_S_PIN_PSC1_3 BSP_BBIT32(28) - #define GPIO_S_PIN_PSC1_2 BSP_BBIT32(29) - #define GPIO_S_PIN_PSC1_1 BSP_BBIT32(30) - #define GPIO_S_PIN_PSC1_0 BSP_BBIT32(31) - - volatile uint32_t gpiosen; /* + 0x04 */ - volatile uint32_t gpiosod; /* + 0x08 */ - volatile uint32_t gpiosdd; /* + 0x0C */ - volatile uint32_t gpiosdo; /* + 0x10 */ - volatile uint32_t gpiosdi; /* + 0x14 */ - - #define GPIO_O_PIN_ETH_7 BSP_BBIT32(0) - #define GPIO_O_PIN_ETH_6 BSP_BBIT32(1) - #define GPIO_O_PIN_ETH_5 BSP_BBIT32(2) - #define GPIO_O_PIN_ETH_4 BSP_BBIT32(3) - #define GPIO_O_PIN_ETH_3 BSP_BBIT32(4) - #define GPIO_O_PIN_ETH_2 BSP_BBIT32(5) - #define GPIO_O_PIN_ETH_1 BSP_BBIT32(6) - #define GPIO_O_PIN_ETH_0 BSP_BBIT32(7) - #define GPIO_O_PIN_I2C_3 BSP_BBIT32(13) - #define GPIO_O_PIN_I2C_0 BSP_BBIT32(14) - #define GPIO_O_PIN_I2C_1 BSP_BBIT32(15) - - volatile uint32_t gpiooe; /* + 0x18 */ - volatile uint32_t gpioodo; /* + 0x1C */ - - #define GPIO_I_PIN_ETH_16 BSP_BBIT32(0) - #define GPIO_I_PIN_ETH_15 BSP_BBIT32(1) - #define GPIO_I_PIN_ETH_14 BSP_BBIT32(2) - #define GPIO_I_PIN_ETH_13 BSP_BBIT32(3) - #define GPIO_I_PIN_USB1_9 BSP_BBIT32(4) - #define GPIO_I_PIN_PSC3_8 BSP_BBIT32(5) - #define GPIO_I_PIN_PSC3_5 BSP_BBIT32(6) - #define GPIO_I_PIN_PSC3_4 BSP_BBIT32(7) - - volatile uint32_t gpiosie; /* + 0x20 */ - #define GPIO_SIE_SINT_7_ETH_16_PIN 0x80000000 - #define GPIO_SIE_SINT_6_ETH_15_PIN 0x40000000 - #define GPIO_SIE_SINT_5_ETH_14_PIN 0x20000000 - #define GPIO_SIE_SINT_4_ETH_13_PIN 0x10000000 - #define GPIO_SIE_SINT_3_USB1_9_PIN 0x08000000 - #define GPIO_SIE_SINT_2_PSC3_8_PIN 0x04000000 - #define GPIO_SIE_SINT_1_PSC3_5_PIN 0x02000000 - #define GPIO_SIE_SINT_0_PSC3_4_PIN 0x01000000 - - volatile uint32_t gpiosiod; /* + 0x24 */ - - volatile uint32_t gpiosidd; /* + 0x28 */ - #define GPIO_SIDD_SINT_7_ETH_16_PIN 0x80000000 - #define GPIO_SIDD_SINT_6_ETH_15_PIN 0x40000000 - #define GPIO_SIDD_SINT_5_ETH_14_PIN 0x20000000 - #define GPIO_SIDD_SINT_4_ETH_13_PIN 0x10000000 - #define GPIO_SIDD_SINT_3_USB1_9_PIN 0x08000000 - #define GPIO_SIDD_SINT_2_PSC3_8_PIN 0x04000000 - #define GPIO_SIDD_SINT_1_PSC3_5_PIN 0x02000000 - #define GPIO_SIDD_SINT_0_PSC3_4_PIN 0x01000000 - - volatile uint32_t gpiosido; /* + 0x2C */ - - volatile uint32_t gpiosiie; /* + 0x30 */ - #define GPIO_SIIE_SINT_7_ETH_16_PIN 0x80000000 - #define GPIO_SIIE_SINT_6_ETH_15_PIN 0x40000000 - #define GPIO_SIIE_SINT_5_ETH_14_PIN 0x20000000 - #define GPIO_SIIE_SINT_4_ETH_13_PIN 0x10000000 - #define GPIO_SIIE_SINT_3_USB1_9_PIN 0x08000000 - #define GPIO_SIIE_SINT_2_PSC3_8_PIN 0x04000000 - #define GPIO_SIIE_SINT_1_PSC3_5_PIN 0x02000000 - #define GPIO_SIIE_SINT_0_PSC3_4_PIN 0x01000000 - - volatile uint32_t gpiosiit; /* + 0x34 */ - #define GPIO_SIIT_SET_ETH_16_PIN(reg, val) BSP_BFLD32SET(reg, val, 0, 1) - #define GPIO_SIIT_SET_ETH_15_PIN(reg, val) BSP_BFLD32SET(reg, val, 2, 3) - #define GPIO_SIIT_SET_ETH_14_PIN(reg, val) BSP_BFLD32SET(reg, val, 4, 5) - #define GPIO_SIIT_SET_ETH_13_PIN(reg, val) BSP_BFLD32SET(reg, val, 6, 7) - #define GPIO_SIIT_SET_USB1_9_PIN(reg, val) BSP_BFLD32SET(reg, val, 8, 9) - #define GPIO_SIIT_SET_PSC3_8_PIN(reg, val) BSP_BFLD32SET(reg, val, 10, 11) - #define GPIO_SIIT_SET_PSC3_5_PIN(reg, val) BSP_BFLD32SET(reg, val, 12, 13) - #define GPIO_SIIT_SET_PSC3_4_PIN(reg, val) BSP_BFLD32SET(reg, val, 14, 15) - - #define GPIO_SIIT_SINT_7_ETH_16_PIN_MASK 0xc0000000 - #define GPIO_SIIT_SINT_6_ETH_15_PIN_MASK 0x30000000 - #define GPIO_SIIT_SINT_5_ETH_14_PIN_MASK 0x0c000000 - #define GPIO_SIIT_SINT_4_ETH_13_PIN_MASK 0x03000000 - #define GPIO_SIIT_SINT_3_USB1_9_PIN_MASK 0x00c00000 - #define GPIO_SIIT_SINT_2_PSC3_8_PIN_MASK 0x00300000 - #define GPIO_SIIT_SINT_1_PSC3_5_PIN_MASK 0x000c0000 - #define GPIO_SIIT_SINT_0_PSC3_4_PIN_MASK 0x00030000 - - #define GPIO_SIIT_ON_ANY_TRANSITION 0x00000000 - #define GPIO_SIIT_ON_RISING_EDGE 0x00000001 - #define GPIO_SIIT_ON_FALLING_EDGE 0x00000002 - #define GPIO_SIIT_ON_PULSE 0x00000003 - - #define GPIO_SIIT_SINT_7_ETH_16_PIN_SHIFT 16 - #define GPIO_SIIT_SINT_6_ETH_15_PIN_SHIFT 18 - #define GPIO_SIIT_SINT_5_ETH_14_PIN_SHIFT 20 - #define GPIO_SIIT_SINT_4_ETH_13_PIN_SHIFT 22 - #define GPIO_SIIT_SINT_3_USB1_9_PIN_SHIFT 24 - #define GPIO_SIIT_SINT_2_PSC3_8_PIN_SHIFT 26 - #define GPIO_SIIT_SINT_1_PSC3_5_PIN_SHIFT 28 - #define GPIO_SIIT_SINT_0_PSC3_4_PIN_SHIFT 30 - - volatile uint32_t gpiosime; /* + 0x38 */ - #define GPIO_SIME_MASTER_ENABLE 0x10000000 - - volatile uint32_t gpiosist; /* + 0x3C */ - #define GPIO_SIST_SINT_7_ETH_16_PIN_STATUS 0x80000000 - #define GPIO_SIST_SINT_6_ETH_15_PIN_STATUS 0x40000000 - #define GPIO_SIST_SINT_5_ETH_14_PIN_STATUS 0x20000000 - #define GPIO_SIST_SINT_4_ETH_13_PIN_STATUS 0x10000000 - #define GPIO_SIST_SINT_3_USB1_9_PIN_STATUS 0x08000000 - #define GPIO_SIST_SINT_2_PSC3_8_PIN_STATUS 0x04000000 - #define GPIO_SIST_SINT_1_PSC3_5_PIN_STATUS 0x02000000 - #define GPIO_SIST_SINT_0_PSC3_4_PIN_STATUS 0x01000000 - #define GPIO_SIST_SINT_7_ETH_16_PIN_VALUE 0x00800000 - #define GPIO_SIST_SINT_6_ETH_15_PIN_VALUE 0x00400000 - #define GPIO_SIST_SINT_5_ETH_14_PIN_VALUE 0x00200000 - #define GPIO_SIST_SINT_4_ETH_13_PIN_VALUE 0x00100000 - #define GPIO_SIST_SINT_3_USB1_9_PIN_VALUE 0x00080000 - #define GPIO_SIST_SINT_2_PSC3_8_PIN_VALUE 0x00040000 - #define GPIO_SIST_SINT_1_PSC3_5_PIN_VALUE 0x00020000 - #define GPIO_SIST_SINT_0_PSC3_4_PIN_VALUE 0x00010000 - - #define GPIO_SIST_SINT_CLEAR_ALL 0xff000000 - - volatile uint8_t res4[0xC0]; - - /* - * GPIO wakeup registers (MBAR + 0xC00) - */ - - #define GPIO_W_PIN_GPIO_WKUP_7 BSP_BBIT32(0) - #define GPIO_W_PIN_GPIO_WKUP_6 BSP_BBIT32(1) - #define GPIO_W_PIN_PSC6_1 BSP_BBIT32(2) - #define GPIO_W_PIN_PSC6_0 BSP_BBIT32(3) - #define GPIO_W_PIN_ETH_17 BSP_BBIT32(4) - #define GPIO_W_PIN_PSC3_9 BSP_BBIT32(5) - #define GPIO_W_PIN_PSC2_4 BSP_BBIT32(6) - #define GPIO_W_PIN_PSC1_4 BSP_BBIT32(7) - - volatile uint32_t gpiowe; /* + 0x00 */ - volatile uint32_t gpiowod; /* + 0x04 */ - volatile uint32_t gpiowdd; /* + 0x08 */ - volatile uint32_t gpiowdo; /* + 0x0C */ - volatile uint32_t gpiowue; /* + 0x10 */ - volatile uint32_t gpiowsie; /* + 0x14 */ - volatile uint32_t gpiowt; /* + 0x18 */ - volatile uint32_t gpiowme; /* + 0x1C */ - volatile uint32_t gpiowi; /* + 0x20 */ - volatile uint32_t gpiows; /* + 0x24 */ - volatile uint8_t gpiow_res[0xD8]; - - /* - * PPC PCI registers (MBAR + 0xD00) - */ - volatile uint8_t ppci[0x100]; - - /* - * consumer infrared registers (MBAR + 0xE00) - */ - volatile uint8_t ir[0x100]; - - /* - * serial peripheral interface registers (MBAR + 0xF00) - */ - volatile uint8_t spi[0x100]; - - /* - * universal serial bus registers (MBAR + 0x1000) - */ - volatile uint8_t usb[0x200]; - - /* - * SmartComm DMA registers (MBAR + 0x1200) - */ - volatile mpc5200_sdma sdma; - - volatile uint32_t EU00; /* + 0x80 sdMac macer reg */ - volatile uint32_t EU01; /* + 0x84 sdMac macemr reg */ - volatile uint32_t EU02; /* + 0x88 unused */ - volatile uint32_t EU03; /* + 0x8c unused */ - volatile uint32_t EU04; /* + 0x90 unused */ - volatile uint32_t EU05; /* + 0x94 unused */ - volatile uint32_t EU06; /* + 0x98 unused */ - volatile uint32_t EU07; /* + 0x9c unused */ - volatile uint32_t EU10; /* + 0xa0 unused */ - volatile uint32_t EU11; /* + 0xa4 unused */ - volatile uint32_t EU12; /* + 0xa8 unused */ - volatile uint32_t EU13; /* + 0xac unused */ - volatile uint32_t EU14; /* + 0xb0 unused */ - volatile uint32_t EU15; /* + 0xb4 unused */ - volatile uint32_t EU16; /* + 0xb8 unused */ - volatile uint32_t EU17; /* + 0xbc unused */ - volatile uint32_t EU20; /* + 0xc0 unused */ - volatile uint32_t EU21; /* + 0xc4 unused */ - volatile uint32_t EU22; /* + 0xc8 unused */ - volatile uint32_t EU23; /* + 0xcc unused */ - volatile uint32_t EU24; /* + 0xd0 unused */ - volatile uint32_t EU25; /* + 0xd4 unused */ - volatile uint32_t EU26; /* + 0xd8 unused */ - volatile uint32_t EU27; /* + 0xdc unused */ - volatile uint32_t EU30; /* + 0xe0 unused */ - volatile uint32_t EU31; /* + 0xe4 unused */ - volatile uint32_t EU32; /* + 0xe8 unused */ - volatile uint32_t EU33; /* + 0xec unused */ - volatile uint32_t EU34; /* + 0xf0 unused */ - volatile uint32_t EU35; /* + 0xf4 unused */ - volatile uint32_t EU36; /* + 0xf8 unused */ - volatile uint32_t EU37; /* + 0xfc unused */ -#if 0 - volatile uint32_t res8[0x340]; -#else - volatile uint8_t res_1300[0xc00]; - - volatile uint32_t reserved0; /* MBAR_XLB_ARB + 0x0000 reserved */ - volatile uint32_t reserved1; /* MBAR_XLB_ARB + 0x0004 reserved */ - volatile uint32_t reserved2; /* MBAR_XLB_ARB + 0x0008 reserved */ - volatile uint32_t reserved3; /* MBAR_XLB_ARB + 0x000c reserved */ - volatile uint32_t reserved4; /* MBAR_XLB_ARB + 0x0010 reserved */ - volatile uint32_t reserved5; /* MBAR_XLB_ARB + 0x0014 reserved */ - volatile uint32_t reserved6; /* MBAR_XLB_ARB + 0x0018 reserved */ - volatile uint32_t reserved7; /* MBAR_XLB_ARB + 0x001c reserved */ - volatile uint32_t reserved8; /* MBAR_XLB_ARB + 0x0020 reserved */ - volatile uint32_t reserved9; /* MBAR_XLB_ARB + 0x0024 reserved */ - volatile uint32_t reserved10; /* MBAR_XLB_ARB + 0x0028 reserved */ - volatile uint32_t reserved11; /* MBAR_XLB_ARB + 0x002c reserved */ - volatile uint32_t reserved12; /* MBAR_XLB_ARB + 0x0030 reserved */ - volatile uint32_t reserved13; /* MBAR_XLB_ARB + 0x0034 reserved */ - volatile uint32_t reserved14; /* MBAR_XLB_ARB + 0x0038 reserved */ - volatile uint32_t reserved15; /* MBAR_XLB_ARB + 0x003c reserved */ - -#define XLB_CFG_PLDIS BSP_BBIT32(0) -#define XLB_CFG_BSDIS BSP_BBIT32(15) -#define XLB_CFG_SE BSP_BBIT32(16) -#define XLB_CFG_USE_WWF BSP_BBIT32(17) -#define XLB_CFG_TBEN BSP_BBIT32(18) -#define XLB_CFG_WS BSP_BBIT32(20) -#define XLB_CFG_SP(val) BSP_BFLD32(val, 21, 23) -#define XLB_CFG_SET_SP(reg, val) BSP_BFLD32SET(reg, val, 21, 23) -#define XLB_CFG_PM(val) BSP_BFLD32(val, 25, 26) -#define XLB_CFG_SET_PM(reg, val) BSP_BFLD32SET(reg, val, 25, 26) -#define XLB_CFG_BA BSP_BBIT32(28) -#define XLB_CFG_DT BSP_BBIT32(29) -#define XLB_CFG_AT BSP_BBIT32(30) - - volatile uint32_t config; /* MBAR_XLB_ARB + 0x0040 */ - volatile uint32_t version; /* MBAR_XLB_ARB + 0x0044 */ - -#define XLB_ST_SEA BSP_BBIT32(23) -#define XLB_ST_MM BSP_BBIT32(24) -#define XLB_ST_TTA BSP_BBIT32(25) -#define XLB_ST_TTR BSP_BBIT32(26) -#define XLB_ST_ECW BSP_BBIT32(27) -#define XLB_ST_TTM BSP_BBIT32(28) -#define XLB_ST_BA BSP_BBIT32(29) -#define XLB_ST_DT BSP_BBIT32(30) -#define XLB_ST_AT BSP_BBIT32(31) - /* read only = 0x0001 */ - volatile uint32_t xlb_status; /* MBAR_XLB_ARB + 0x0048 */ - volatile uint32_t int_enable; /* MBAR_XLB_ARB + 0x004c */ - volatile uint32_t add_capture; /* MBAR_XLB_ARB + 0x0050 read only */ - volatile uint32_t bus_sig_capture; /* MBAR_XLB_ARB + 0x0054 read only */ - volatile uint32_t add_time_out; /* MBAR_XLB_ARB + 0x0058 */ - volatile uint32_t data_time_out; /* MBAR_XLB_ARB + 0x005c */ - volatile uint32_t bus_time_out; /* MBAR_XLB_ARB + 0x0060 */ - volatile uint32_t priority_enable; /* MBAR_XLB_ARB + 0x0064 */ - volatile uint32_t priority; /* MBAR_XLB_ARB + 0x0068 */ - volatile uint32_t arb_base_addr2; /* MBAR_XLB_ARB + 0x006c */ - volatile uint32_t snoop_window; /* MBAR_XLB_ARB + 0x0070 */ - - volatile uint32_t reserved16; /* MBAR_XLB_ARB + 0x0074 reserved */ - volatile uint32_t reserved17; /* MBAR_XLB_ARB + 0x0078 reserved */ - volatile uint32_t reserved18; /* MBAR_XLB_ARB + 0x007c reserved */ - - volatile uint32_t control; /* MBAR_XLB_ARB + 0x0080 */ - volatile uint32_t init_total_count; /* MBAR_XLB_ARB + 0x0084 */ - volatile uint32_t int_total_count; /* MBAR_XLB_ARB + 0x0088 */ - - volatile uint32_t reserved19; /* MBAR_XLB_ARB + 0x008c reserved */ - - volatile uint32_t lower_address; /* MBAR_XLB_ARB + 0x0090 */ - volatile uint32_t higher_address; /* MBAR_XLB_ARB + 0x0094 */ - volatile uint32_t int_window_count; /* MBAR_XLB_ARB + 0x0098 */ - volatile uint32_t window_ter_count; /* MBAR_XLB_ARB + 0x009c */ - volatile uint8_t res_0x1fa0[0x60]; - - -#endif - /* - * programmable serial controller 1 (MBAR + 0x2000) - */ - - struct mpc5200_psc { - volatile uint8_t mr; /* + 0x00 */ - volatile uint8_t res1[3]; - volatile uint16_t sr_csr; /* + 0x04 */ - volatile uint16_t res2[1]; - volatile uint16_t cr; /* + 0x08 */ - volatile uint16_t res3[1]; - volatile uint32_t rb_tb; /* + 0x0c */ - volatile uint16_t ipcr_acr; /* + 0x10 */ - volatile uint16_t res4[1]; - volatile uint16_t isr_imr; /* + 0x14 */ -#define ISR_TX_RDY (1 << 8) -#define ISR_RX_RDY_FULL (1 << 9) -#define ISR_RB (1 << 15) -#define ISR_FE (1 << 14) -#define ISR_PE (1 << 13) -#define ISR_OE (1 << 12) -#define ISR_ERROR (ISR_FE | ISR_PE | ISR_OE) - -#define IMR_TX_RDY (1 << 8) -#define IMR_RX_RDY_FULL (1 << 9) - volatile uint16_t res5[1]; - volatile uint8_t ctur; /* + 0x18 */ - volatile uint8_t res6[3]; - volatile uint8_t ctlr; /* + 0x1C */ - volatile uint8_t res7[0x13]; - volatile uint8_t ivr; /* + 0x30 */ - volatile uint8_t res8[3]; - volatile uint8_t ip; /* + 0x34 */ - volatile uint8_t res9[3]; - volatile uint8_t op1; /* + 0x38 */ - volatile uint8_t res10[3]; - volatile uint8_t op0; /* + 0x3C */ - volatile uint8_t res11[3]; - volatile uint8_t sicr; /* + 0x40 */ - volatile uint8_t res12[0x17]; - volatile uint16_t rfnum; /* + 0x58 */ - volatile uint16_t res13[1]; - volatile uint16_t tfnum; /* + 0x5C */ - volatile uint16_t res14[1]; - volatile uint16_t rfdata; /* + 0x60 */ - volatile uint16_t res15[1]; - volatile uint16_t rfstat; /* + 0x64 */ - volatile uint16_t res16[1]; - volatile uint8_t rfcntl; /* + 0x68 */ - volatile uint8_t res17[5]; - volatile uint16_t rfalarm; /* + 0x6E */ - volatile uint8_t res18[2]; - volatile uint16_t rfrptr; /* + 0x72 */ - volatile uint16_t res19[1]; - volatile uint16_t rfwptr; /* + 0x76 */ - volatile uint16_t res20[1]; - volatile uint16_t rflrfptr; /* + 0x7A */ - volatile uint16_t rflwfptr; /* + 0x7C */ - volatile uint16_t res21[1]; - volatile uint16_t tfdata; /* + 0x80 */ - volatile uint16_t res22[1]; - volatile uint16_t tfstat; /* + 0x84 */ - volatile uint16_t res23[1]; - volatile uint8_t tfcntl; /* + 0x88 */ - volatile uint8_t res24[5]; - volatile uint16_t tfalarm; /* + 0x8E */ - volatile uint8_t res25[2]; - volatile uint16_t tfrptr; /* + 0x92 */ - volatile uint16_t res26[1]; - volatile uint16_t tfwptr; /* + 0x96 */ - volatile uint16_t res27[1]; - volatile uint16_t tflrfptr; /* + 0x96 */ - volatile uint16_t tflwfptr; /* + 0x9C */ - volatile uint16_t res28[1]; /* end at offset 0x9F */ - volatile uint8_t res29[0x160]; - } psc[MPC5200_PSC_REG_SETS]; - /* XXX: there are only 6 PSCs, but PSC6 has an extra register gap - * from PSC5, therefore we instantiate seven(!) PSC register sets - */ - -#define TX_FIFO_SIZE 256 -#define RX_FIFO_SIZE 512 - - - volatile uint8_t irda[0x200]; - - /* - * ethernet registers (MBAR + 0x3000) - */ - - /* Control and status Registers (offset 000-1FF) */ - - volatile uint32_t fec_id; /* + 0x000 */ - volatile uint32_t ievent; /* + 0x004 */ - volatile uint32_t imask; /* + 0x008 */ - - volatile uint32_t res9[1]; /* + 0x00C */ - volatile uint32_t r_des_active; /* + 0x010 */ - volatile uint32_t x_des_active; /* + 0x014 */ - volatile uint32_t r_des_active_cl; /* + 0x018 */ - volatile uint32_t x_des_active_cl; /* + 0x01C */ - volatile uint32_t ivent_set; /* + 0x020 */ - volatile uint32_t ecntrl; /* + 0x024 */ - - volatile uint32_t res10[6]; /* + 0x028-03C */ - volatile uint32_t mii_data; /* + 0x040 */ - volatile uint32_t mii_speed; /* + 0x044 */ - volatile uint32_t mii_status; /* + 0x048 */ - - volatile uint32_t res11[5]; /* + 0x04C-05C */ - volatile uint32_t mib_data; /* + 0x060 */ - volatile uint32_t mib_control; /* + 0x064 */ - - volatile uint32_t res12[6]; /* + 0x068-7C */ - volatile uint32_t r_activate; /* + 0x080 */ - volatile uint32_t r_cntrl; /* + 0x084 */ - volatile uint32_t r_hash; /* + 0x088 */ - volatile uint32_t r_data; /* + 0x08C */ - volatile uint32_t ar_done; /* + 0x090 */ - volatile uint32_t r_test; /* + 0x094 */ - volatile uint32_t r_mib; /* + 0x098 */ - volatile uint32_t r_da_low; /* + 0x09C */ - volatile uint32_t r_da_high; /* + 0x0A0 */ - - volatile uint32_t res13[7]; /* + 0x0A4-0BC */ - volatile uint32_t x_activate; /* + 0x0C0 */ - volatile uint32_t x_cntrl; /* + 0x0C4 */ - volatile uint32_t backoff; /* + 0x0C8 */ - volatile uint32_t x_data; /* + 0x0CC */ - volatile uint32_t x_status; /* + 0x0D0 */ - volatile uint32_t x_mib; /* + 0x0D4 */ - volatile uint32_t x_test; /* + 0x0D8 */ - volatile uint32_t fdxfc_da1; /* + 0x0DC */ - volatile uint32_t fdxfc_da2; /* + 0x0E0 */ - volatile uint32_t paddr1; /* + 0x0E4 */ - volatile uint32_t paddr2; /* + 0x0E8 */ - volatile uint32_t op_pause; /* + 0x0EC */ - - volatile uint32_t res14[4]; /* + 0x0F0-0FC */ - volatile uint32_t instr_reg; /* + 0x100 */ - volatile uint32_t context_reg; /* + 0x104 */ - volatile uint32_t test_cntrl; /* + 0x108 */ - volatile uint32_t acc_reg; /* + 0x10C */ - volatile uint32_t ones; /* + 0x110 */ - volatile uint32_t zeros; /* + 0x114 */ - volatile uint32_t iaddr1; /* + 0x118 */ - volatile uint32_t iaddr2; /* + 0x11C */ - volatile uint32_t gaddr1; /* + 0x120 */ - volatile uint32_t gaddr2; /* + 0x124 */ - volatile uint32_t random; /* + 0x128 */ - volatile uint32_t rand1; /* + 0x12C */ - volatile uint32_t tmp; /* + 0x130 */ - - volatile uint32_t res15[3]; /* + 0x134-13C */ - volatile uint32_t fifo_id; /* + 0x140 */ - volatile uint32_t x_wmrk; /* + 0x144 */ - volatile uint32_t fcntrl; /* + 0x148 */ - volatile uint32_t r_bound; /* + 0x14C */ - volatile uint32_t r_fstart; /* + 0x150 */ - volatile uint32_t r_count; /* + 0x154 */ - volatile uint32_t r_lag; /* + 0x158 */ - volatile uint32_t r_read; /* + 0x15C */ - volatile uint32_t r_write; /* + 0x160 */ - volatile uint32_t x_count; /* + 0x164 */ - volatile uint32_t x_lag; /* + 0x168 */ - volatile uint32_t x_retry; /* + 0x16C */ - volatile uint32_t x_write; /* + 0x170 */ - volatile uint32_t x_read; /* + 0x174 */ - - volatile uint32_t res16[2]; /* + 0x178-17C */ - volatile uint32_t fm_cntrl; /* + 0x180 */ - volatile uint32_t rfifo_data; /* + 0x184 */ - volatile uint32_t rfifo_status; /* + 0x188 */ - volatile uint32_t rfifo_cntrl; /* + 0x18C */ - volatile uint32_t rfifo_lrf_ptr; /* + 0x190 */ - volatile uint32_t rfifo_lwf_ptr; /* + 0x194 */ - volatile uint32_t rfifo_alarm; /* + 0x198 */ - volatile uint32_t rfifo_rdptr; /* + 0x19C */ - volatile uint32_t rfifo_wrptr; /* + 0x1A0 */ - volatile uint32_t tfifo_data; /* + 0x1A4 */ - volatile uint32_t tfifo_status; /* + 0x1A8 */ - volatile uint32_t tfifo_cntrl; /* + 0x1AC */ - volatile uint32_t tfifo_lrf_ptr; /* + 0x1B0 */ - volatile uint32_t tfifo_lwf_ptr; /* + 0x1B4 */ - volatile uint32_t tfifo_alarm; /* + 0x1B8 */ - volatile uint32_t tfifo_rdptr; /* + 0x1BC */ - volatile uint32_t tfifo_wrptr; /* + 0x1C0 */ - - volatile uint32_t reset_cntrl; /* + 0x1C4 */ - volatile uint32_t xmit_fsm; /* + 0x1C8 */ - - volatile uint32_t res17[3]; /* + 0x1CC-1D4 */ - volatile uint32_t rdes_data0; /* + 0x1D8 */ - volatile uint32_t rdes_data1; /* + 0x1DC */ - volatile uint32_t r_length; /* + 0x1E0 */ - volatile uint32_t x_length; /* + 0x1E4 */ - volatile uint32_t x_addr; /* + 0x1E8 */ - volatile uint32_t cdes_data; /* + 0x1EC */ - volatile uint32_t status; /* + 0x1F0 */ - volatile uint32_t dma_control; /* + 0x1F4 */ - volatile uint32_t des_cmnd; /* + 0x1F8 */ - volatile uint32_t data; /* + 0x1FC */ - - volatile uint8_t RES[0x600]; - - -#if 0 - /* MIB COUNTERS (Offset 200-2FF) */ - - volatile uint32_t rmon_t_drop; /* + 0x200 */ - volatile uint32_t rmon_t_packets; /* + 0x204 */ - volatile uint32_t rmon_t_bc_pkt; /* + 0x208 */ - volatile uint32_t rmon_t_mc_pkt; /* + 0x20C */ - volatile uint32_t rmon_t_crc_align; /* + 0x210 */ - volatile uint32_t rmon_t_undersize; /* + 0x214 */ - volatile uint32_t rmon_t_oversize; /* + 0x218 */ - volatile uint32_t rmon_t_frag; /* + 0x21C */ - volatile uint32_t rmon_t_jab; /* + 0x220 */ - volatile uint32_t rmon_t_col; /* + 0x224 */ - volatile uint32_t rmon_t_p64; /* + 0x228 */ - volatile uint32_t rmon_t_p65to127; /* + 0x22C */ - volatile uint32_t rmon_t_p128to255; /* + 0x230 */ - volatile uint32_t rmon_t_p256to511; /* + 0x234 */ - volatile uint32_t rmon_t_p512to1023; /* + 0x238 */ - volatile uint32_t rmon_t_p1024to2047; /* + 0x23C */ - volatile uint32_t rmon_t_p_gte2048; /* + 0x240 */ - volatile uint32_t rmon_t_octets; /* + 0x244 */ - volatile uint32_t ieee_t_drop; /* + 0x248 */ - volatile uint32_t ieee_t_frame_ok; /* + 0x24C */ - volatile uint32_t ieee_t_1col; /* + 0x250 */ - volatile uint32_t ieee_t_mcol; /* + 0x254 */ - volatile uint32_t ieee_t_def; /* + 0x258 */ - volatile uint32_t ieee_t_lcol; /* + 0x25C */ - volatile uint32_t ieee_t_excol; /* + 0x260 */ - volatile uint32_t ieee_t_macerr; /* + 0x264 */ - volatile uint32_t ieee_t_cserr; /* + 0x268 */ - volatile uint32_t ieee_t_sqe; /* + 0x26C */ - volatile uint32_t t_fdxfc; /* + 0x270 */ - volatile uint32_t ieee_t_octets_ok; /* + 0x274 */ - - volatile uint32_t res18[2]; /* + 0x278-27C */ - volatile uint32_t rmon_r_drop; /* + 0x280 */ - volatile uint32_t rmon_r_packets; /* + 0x284 */ - volatile uint32_t rmon_r_bc_pkt; /* + 0x288 */ - volatile uint32_t rmon_r_mc_pkt; /* + 0x28C */ - volatile uint32_t rmon_r_crc_align; /* + 0x290 */ - volatile uint32_t rmon_r_undersize; /* + 0x294 */ - volatile uint32_t rmon_r_oversize; /* + 0x298 */ - volatile uint32_t rmon_r_frag; /* + 0x29C */ - volatile uint32_t rmon_r_jab; /* + 0x2A0 */ - - volatile uint32_t rmon_r_resvd_0; /* + 0x2A4 */ - - volatile uint32_t rmon_r_p64; /* + 0x2A8 */ - volatile uint32_t rmon_r_p65to127; /* + 0x2AC */ - volatile uint32_t rmon_r_p128to255; /* + 0x2B0 */ - volatile uint32_t rmon_r_p256to511; /* + 0x2B4 */ - volatile uint32_t rmon_r_p512to1023; /* + 0x2B8 */ - volatile uint32_t rmon_r_p1024to2047; /* + 0x2BC */ - volatile uint32_t rmon_r_p_gte2048; /* + 0x2C0 */ - volatile uint32_t rmon_r_octets; /* + 0x2C4 */ - volatile uint32_t ieee_r_drop; /* + 0x2C8 */ - volatile uint32_t ieee_r_frame_ok; /* + 0x2CC */ - volatile uint32_t ieee_r_crc; /* + 0x2D0 */ - volatile uint32_t ieee_r_align; /* + 0x2D4 */ - volatile uint32_t r_macerr; /* + 0x2D8 */ - volatile uint32_t r_fdxfc; /* + 0x2DC */ - volatile uint32_t ieee_r_octets_ok; /* + 0x2E0 */ - - volatile uint32_t res19[6]; /* + 0x2E4-2FC */ - - volatile uint32_t res20[64]; /* + 0x300-3FF */ - - volatile uint32_t res21[256]; /* + 0x400-800 */ -#endif - - /* - * SmartComm DMA PCI registers (MBAR + 0x3800) - */ - volatile uint8_t pci[0x200]; - - /* - * advanced technology attachment registers (MBAR + 0x3A00) - */ - - /* ATA host registers (offset 0x00-0x28) */ - volatile uint32_t ata_hcfg; /* + 0x00 */ - volatile uint32_t ata_hsr; /* + 0x04 */ - volatile uint32_t ata_pio1; /* + 0x08 */ - volatile uint32_t ata_pio2; /* + 0x0C */ - volatile uint32_t ata_dma1; /* + 0x10 */ - volatile uint32_t ata_dma2; /* + 0x14 */ - volatile uint32_t ata_udma1; /* + 0x18 */ - volatile uint32_t ata_udma2; /* + 0x1C */ - volatile uint32_t ata_udma3; /* + 0x20 */ - volatile uint32_t ata_udma4; /* + 0x24 */ - volatile uint32_t ata_udma5; /* + 0x28 */ - volatile uint32_t ata_res1[4]; /* + 0x2C-0x3C */ - - /* ATA FIFO registers (offset 0x3C-0x50) */ - volatile uint32_t ata_rtfdwr; /* + 0x3C */ - -#define ATA_RTFSR_ERR BSP_BBIT32(9) -#define ATA_RTFSR_UF BSP_BBIT32(10) -#define ATA_RTFSR_OF BSP_BBIT32(11) -#define ATA_RTFSR_FULL BSP_BBIT32(12) -#define ATA_RTFSR_HI BSP_BBIT32(13) -#define ATA_RTFSR_LO BSP_BBIT32(14) -#define ATA_RTFSR_EMPTY BSP_BBIT32(15) - - volatile uint32_t ata_rtfsr; /* + 0x40 */ - -#define ATA_RTFCR_WFR BSP_BBIT32(2) -#define ATA_RTFCR_GR(val) BSP_BFLD32(val, 5, 7) - - volatile uint32_t ata_rtfcr; /* + 0x44 */ - volatile uint32_t ata_rtfar; /* + 0x48 */ - volatile uint32_t ata_rtfrpr; /* + 0x4C */ - volatile uint32_t ata_rtfwpr; /* + 0x50 */ - volatile uint32_t ata_res2[2]; /* + 0x54-0x5C */ - - /* ATA drive registers (offset 0x5C-0x80) */ - volatile uint32_t ata_dctr_dasr; /* + 0x5C */ - volatile uint32_t ata_ddr; /* + 0x60 */ - volatile uint32_t ata_dfr_der; /* + 0x64 */ - volatile uint32_t ata_dscr; /* + 0x68 */ - volatile uint32_t ata_dsnr; /* + 0x6C */ - volatile uint32_t ata_dclr; /* + 0x70 */ - volatile uint32_t ata_dchr; /* + 0x74 */ - volatile uint32_t ata_ddhr; /* + 0x78 */ - volatile uint32_t ata_dcr_dsr; /* + 0x7C */ - volatile uint32_t ata_res3[0xA0]; /* + 0x80-0x200 */ - - /* - * inter-integrated circuit registers (MBAR + 0x3D00) - */ - struct mpc5200_i2c_regs_s { - volatile uint8_t madr; /* i2c address reg. + 0x00 */ - volatile uint8_t res_1[3]; - volatile uint8_t mfdr; /* i2c freq. divider reg. + 0x04 */ - volatile uint8_t res_5[3]; - volatile uint8_t mcr; /* i2c control reg. + 0x08 */ - volatile uint8_t res_9[3]; - -#define MPC5200_I2C_MCR_MEN (1 << (7-0)) -#define MPC5200_I2C_MCR_MIEN (1 << (7-1)) -#define MPC5200_I2C_MCR_MSTA (1 << (7-2)) -#define MPC5200_I2C_MCR_MTX (1 << (7-3)) -#define MPC5200_I2C_MCR_TXAK (1 << (7-4)) -#define MPC5200_I2C_MCR_RSTA (1 << (7-5)) - - volatile uint8_t msr; /* i2c status reg. + 0x0C */ - volatile uint8_t res_d[3]; -#define MPC5200_I2C_MSR_CF (1 << (7-0)) -#define MPC5200_I2C_MSR_MAAS (1 << (7-1)) -#define MPC5200_I2C_MSR_BB (1 << (7-2)) -#define MPC5200_I2C_MSR_MAL (1 << (7-3)) -#define MPC5200_I2C_MSR_SRW (1 << (7-5)) -#define MPC5200_I2C_MSR_MIF (1 << (7-6)) -#define MPC5200_I2C_MSR_RXAK (1 << (7-7)) - volatile uint8_t mdr; /* i2c data I/O reg. + 0x10 */ - volatile uint8_t res_11[3]; - volatile uint8_t res_14[12]; /* reserved + 0x14 */ - volatile uint8_t icr; /* i2c irq ctrl reg. + 0x20 */ -#define MPC5200_I2C_ICR_BNBE2 (1 << (7-0)) -#define MPC5200_I2C_ICR_TE2 (1 << (7-1)) -#define MPC5200_I2C_ICR_RE2 (1 << (7-2)) -#define MPC5200_I2C_ICR_IE2 (1 << (7-3)) -#define MPC5200_I2C_ICR_MASK2 (MPC5200_I2C_ICR_BNBE2|MPC5200_I2C_ICR_TE2\ - |MPC5200_I2C_ICR_RE2|MPC5200_I2C_ICR_IE2) -#define MPC5200_I2C_ICR_BNBE1 (1 << (7-4)) -#define MPC5200_I2C_ICR_TE1 (1 << (7-5)) -#define MPC5200_I2C_ICR_RE1 (1 << (7-6)) -#define MPC5200_I2C_ICR_IE1 (1 << (7-7)) -#define MPC5200_I2C_ICR_MASK1 (MPC5200_I2C_ICR_BNBE1|MPC5200_I2C_ICR_TE1\ - |MPC5200_I2C_ICR_RE1|MPC5200_I2C_ICR_IE1) - volatile uint8_t res_21[3]; - volatile uint32_t res_24[7]; /* reserved + 0x24 */ - } i2c_regs[2]; - volatile uint8_t res_3d80[0x280]; - - /* - * on-chip static RAM memory locations (MBAR + 0x4000) - */ - volatile uint8_t sram_res0x4000[0x4000]; - volatile uint8_t sram[0x4000]; - -} mpc5200_t; - -extern volatile mpc5200_t mpc5200; - -#ifdef __cplusplus -} -#endif - -#endif /*ASM*/ - -#endif /* __MPC5200_h__ */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/mscan-base.h b/c/src/lib/libbsp/powerpc/gen5200/include/mscan-base.h deleted file mode 100644 index a2b8737d8e..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/mscan-base.h +++ /dev/null @@ -1,284 +0,0 @@ -/** - * @file - * - * @ingroup m - * - * @brief MSCAN register definitions and support functions. - */ - -/* - * Copyright (c) 2008 - * Embedded Brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * rtems@embedded-brains.de - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_MSCAN_BASE_H -#define LIBBSP_MSCAN_BASE_H - -#include <stdbool.h> - -#include <bsp/mpc5200.h> - -/** - * @defgroup m MSCAN - * - * @{ - */ - -#define MSCAN_BIT_RATE_MIN 10000 - -#define MSCAN_BIT_RATE_MAX 1000000 - -#define MSCAN_BIT_RATE_DEFAULT 125000 - -#define MSCAN_FILTER_NUMBER_MIN 0 - -#define MSCAN_FILTER_NUMBER_2 2 - -#define MSCAN_FILTER_NUMBER_4 4 - -#define MSCAN_FILTER_NUMBER_MAX 8 - -#define MSCAN_FILTER_ID_DEFAULT 0U - -#define MSCAN_FILTER_MASK_DEFAULT 0xffffffffU - -#define MSCAN_TRANSMIT_BUFFER_NUMBER 3 - -/** - * @name MSCAN Control Register 0 (CANCTL0) - * - * @{ - */ - -#define CTL0_RXFRM (1 << 7) -#define CTL0_RXACT (1 << 6) -#define CTL0_CSWAI (1 << 5) -#define CTL0_SYNCH (1 << 4) -#define CTL0_TIME (1 << 3) -#define CTL0_WUPE (1 << 2) -#define CTL0_SLPRQ (1 << 1) -#define CTL0_INITRQ (1 << 0) - -/** @} */ - -/** - * @name MSCAN Control Register 1 (CANCTL1) - * - * @{ - */ - -#define CTL1_CANE (1 << 7) -#define CTL1_CLKSRC (1 << 6) -#define CTL1_LOOPB (1 << 5) -#define CTL1_LISTEN (1 << 4) -#define CTL1_WUPM (1 << 2) -#define CTL1_SLPAK (1 << 1) -#define CTL1_INITAK (1 << 0) - -/** @} */ - -/** - * @name MSCAN Bus Timing Register 0 (CANBTR0) - * - * @{ - */ - -#define BTR0_SJW_MASK 0xc0 -#define BTR0_BRP_MASK 0x3f - -#define BTR0_SJW( btr0) ((btr0) << 6) -#define BTR0_BRP( btr0) ((btr0) << 0) - -#define BTR0_GET_SJW( btr0) (((btr0) & BTR0_SJW_MASK) >> 6) -#define BTR0_GET_BRP( btr0) (((btr0) & BTR0_BRP_MASK) >> 0) - -/** @} */ - -/** - * @name MSCAN Bus Timing Register 1 (CANBTR1) - * - * @{ - */ - -#define BTR1_SAMP_MASK 0x80 -#define BTR1_TSEG1_MASK 0x0f -#define BTR1_TSEG2_MASK 0x70 - -#define BTR1_SAMP (1 << 7) -#define BTR1_TSEG1( btr1) ((btr1) << 0) -#define BTR1_TSEG2( btr1) ((btr1) << 4) - -#define BTR1_GET_TSEG1( btr0) (((btr0) & BTR1_TSEG1_MASK) >> 0) -#define BTR1_GET_TSEG2( btr0) (((btr0) & BTR1_TSEG2_MASK) >> 4) - -/** @} */ - -/** - * @name MSCAN Receiver Flag Register (CANRFLG) - * - * @{ - */ - -#define RFLG_WUPIF (1 << 7) -#define RFLG_CSCIF (1 << 6) -#define RFLG_RSTAT_MASK (3 << 4) -#define RFLG_RSTAT_OK (0 << 4) -#define RFLG_RSTAT_WRN (1 << 4) -#define RFLG_RSTAT_ERR (2 << 4) -#define RFLG_RSTAT_OFF (3 << 4) -#define RFLG_TSTAT_MASK (3 << 2) -#define RFLG_TSTAT_OK (0 << 2) -#define RFLG_TSTAT_WRN (1 << 2) -#define RFLG_TSTAT_ERR (2 << 2) -#define RFLG_TSTAT_OFF (3 << 2) -#define RFLG_OVRIF (1 << 1) -#define RFLG_RXF (1 << 0) -#define RFLG_GET_RX_STATE(rflg) (((rflg) >> 4) & 0x03) -#define RFLG_GET_TX_STATE(rflg) (((rflg) >> 2) & 0x03) - -/** @} */ - -/** - * @name MSCAN Receiver Interrupt Enable Register (CANRIER) - * - * @{ - */ - -#define RIER_WUPIE (1 << 7) -#define RIER_CSCIE (1 << 6) -#define RIER_RSTAT(rier) ((rier) << 4) -#define RIER_TSTAT(rier) ((rier) << 2) -#define RIER_OVRIE (1 << 1) -#define RIER_RXFIE (1 << 0) - -/** @} */ - -/** - * @name MSCAN Transmitter Flag Register (CANTFLG) - * - * @{ - */ - -#define TFLG_TXE2 (1 << 2) -#define TFLG_TXE1 (1 << 1) -#define TFLG_TXE0 (1 << 0) - -/** @} */ - -/** - * @name MSCAN Transmitter Interrupt Enable Register (CANTIER) - * - * @{ - */ - -#define TIER_TXEI2 (1 << 2) -#define TIER_TXEI1 (1 << 1) -#define TIER_TXEI0 (1 << 0) - -/** @} */ - -/** - * @name MSCAN Transmitter Message Abort Request (CANTARQ) - * - * @{ - */ - -#define TARQ_ABTRQ2 (1 << 2) -#define TARQ_ABTRQ1 (1 << 1) -#define TARQ_ABTRQ0 (1 << 0) - -/** @} */ - -/** - * @name MSCAN Transmitter Message Abort Acknoledge (CANTAAK) - * - * @{ - */ - -#define TAAK_ABTRQ2 (1 << 2) -#define TAAK_ABTRQ1 (1 << 1) -#define TAAK_ABTRQ0 (1 << 0) - -/** @} */ - -/** - * @name MSCAN Transmit Buffer Selection (CANBSEL) - * - * @{ - */ - -#define BSEL_TX2 (1 << 2) -#define BSEL_TX1 (1 << 1) -#define BSEL_TX0 (1 << 0) - -/** @} */ - -/** - * @name MSCAN ID Acceptance Control Register (CANIDAC) - * - * @{ - */ - -#define IDAC_IDAM1 (1 << 5) -#define IDAC_IDAM0 (1 << 4) -#define IDAC_IDAM (IDAC_IDAM1 | IDAC_IDAM0) -#define IDAC_IDHIT( idac) ((idac) & 0x7) - -/** @} */ - -/** - * @brief MSCAN registers. - */ -typedef struct mpc5200_mscan mscan; - -/** - * @brief MSCAN context that has to be saved throughout the initialization - * mode. - */ -typedef struct { - uint8_t ctl0; - uint8_t rier; - uint8_t tier; -} mscan_context; - -bool mscan_enable( volatile mscan *m, unsigned bit_rate); - -void mscan_disable( volatile mscan *m); - -void mscan_interrupts_disable( volatile mscan *m); - -bool mscan_set_bit_rate( volatile mscan *m, unsigned bit_rate); - -void mscan_initialization_mode_enter( volatile mscan *m, mscan_context *context); - -void mscan_initialization_mode_leave( volatile mscan *m, const mscan_context *context); - -void mscan_sleep_mode_enter( volatile mscan *m); - -void mscan_sleep_mode_leave( volatile mscan *m); - -volatile uint8_t *mscan_id_acceptance_register( volatile mscan *m, unsigned i); - -volatile uint8_t *mscan_id_mask_register( volatile mscan *m, unsigned i); - -unsigned mscan_filter_number( volatile mscan *m); - -bool mscan_set_filter_number( volatile mscan *m, unsigned number); - -bool mscan_filter_operation( volatile mscan *m, bool set, unsigned index, uint32_t *id, uint32_t *mask); - -void mscan_filter_clear( volatile mscan *m); - -void mscan_get_error_counters( volatile mscan *m, unsigned *rec, unsigned *tec); - -/** @} */ - -#endif /* LIBBSP_MSCAN_BASE_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/tm27.h b/c/src/lib/libbsp/powerpc/gen5200/include/tm27.h deleted file mode 100644 index ff43cc9ab6..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/tm27.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * @file - * @ingroup powerpc_gen5200 - * @brief Implementations for interrupt mechanisms for Time Test 27 - */ - -/* - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -#include <bsp/fatal.h> -#include <bsp/irq.h> - -/* - * Stuff for Time Test 27 - */ - -#define MUST_WAIT_FOR_INTERRUPT 1 - -void nullFunc() {} - -static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, - 0, - (rtems_irq_enable)nullFunc, - (rtems_irq_disable)nullFunc, - (rtems_irq_is_enabled) nullFunc}; -void Install_tm27_vector(void (*_handler)()) -{ - clockIrqData.hdl = _handler; - if (!BSP_install_rtems_irq_handler (&clockIrqData)) { - printk("Error installing clock interrupt handler!\n"); - bsp_fatal(MPC5200_FATAL_TM27_IRQ_INSTALL); - } -} - -#define Cause_tm27_intr() \ - do { \ - uint32_t _clicks = 8; \ - __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ - } while (0) - -#define Clear_tm27_intr() \ - do { \ - uint32_t _clicks = 0xffffffff; \ - __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ - } while (0) - -#define Lower_tm27_intr() \ - do { \ - uint32_t _msr = 0; \ - _ISR_Set_level( 0 ); \ - __asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ - _msr |= 0x8002; \ - __asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ - } while (0) - -#endif diff --git a/c/src/lib/libbsp/powerpc/gen5200/include/u-boot-config.h b/c/src/lib/libbsp/powerpc/gen5200/include/u-boot-config.h deleted file mode 100644 index 2fee83bce9..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/include/u-boot-config.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_GEN52XX_U_BOOT_CONFIG_H -#define LIBBSP_POWERPC_GEN52XX_U_BOOT_CONFIG_H - -#define CONFIG_MPC5xxx - -#endif /* LIBBSP_POWERPC_GEN52XX_U_BOOT_CONFIG_H */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/mscan/mscan.h b/c/src/lib/libbsp/powerpc/gen5200/mscan/mscan.h deleted file mode 100644 index 9cb7fd44e7..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/mscan/mscan.h +++ /dev/null @@ -1,127 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic MPC5200 BSP | -+-----------------------------------------------------------------+ -| Partially based on the code references which are named below. | -| Adaptions, modifications, enhancements and any recent parts of | -| the code are: | -| Copyright (c) 2005 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file has to be included by application when using mscan | -\*===============================================================*/ -#ifndef __MSCAN_H__ -#define __MSCAN_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define MSCAN_A_DEV_NAME "/dev/mscana" -#define MSCAN_B_DEV_NAME "/dev/mscanb" -#define MSCAN_0_DEV_NAME "/dev/mscan0" -#define MSCAN_1_DEV_NAME "/dev/mscan1" -#define MSCAN_A 0 -#define MSCAN_B 1 - -#define MSCAN_MAX_DATA_BYTES 8 - -#define MSCAN_MESS_ID_RTR (1 << 15) -#define MSCAN_MESS_ID_RTR_MASK (1 << 15) -#define MSCAN_MESS_ID_ID_MASK ((1 << 11)-1) -#define MSCAN_MESS_ID_HAS_RTR(id) (((id)&MSCAN_MESS_ID_RTR_MASK)==MSCAN_MESS_ID_RTR) - -#define MSCAN_SET_RX_ID 1 -#define MSCAN_GET_RX_ID 2 -#define MSCAN_SET_RX_ID_MASK 3 -#define MSCAN_GET_RX_ID_MASK 4 -#define MSCAN_SET_TX_ID 5 -#define MSCAN_GET_TX_ID 6 -#define TOUCAN_MSCAN_INIT 7 -#define MSCAN_SET_BAUDRATE 8 -#define SET_TX_BUF_NO 9 - -struct can_message - { - /* uint16_t mess_len; */ - uint16_t mess_id; - uint16_t mess_time_stamp; - uint8_t mess_data[MSCAN_MAX_DATA_BYTES]; - uint8_t mess_len; - uint8_t mess_rtr; - uint32_t toucan_tx_idx; - }; - -struct mscan_rx_parms - { - struct can_message *rx_mess; - uint32_t rx_timeout; - uint8_t rx_flags; - }; - -struct mscan_tx_parms - { - struct can_message *tx_mess; - uint32_t tx_idx; - }; - -struct mscan_ctrl_parms - { - uint32_t ctrl_id; - uint32_t ctrl_id_mask; - uint8_t ctrl_reg_no; - uint8_t ctrl_tx_buf_no; - uint32_t ctrl_can_bitrate; - void (*toucan_cb_fnc)(int16_t); - }; - - -rtems_device_driver mscan_initialize( rtems_device_major_number, - rtems_device_minor_number, - void * - ); - -rtems_device_driver mscan_open( rtems_device_major_number, - rtems_device_minor_number, - void * - ); - -rtems_device_driver mscan_close( rtems_device_major_number, - rtems_device_minor_number, - void * - ); - -rtems_device_driver mscan_read( rtems_device_major_number, - rtems_device_minor_number, - void * - ); - -rtems_device_driver mscan_write( rtems_device_major_number, - rtems_device_minor_number, - void * - ); - -rtems_device_driver mscan_control( rtems_device_major_number, - rtems_device_minor_number, - void * - ); - - -#define MSCAN_DRIVER_TABLE_ENTRY \ - { mscan_initialize, mscan_open, mscan_close, \ - mscan_read, mscan_write, mscan_control } - -#ifdef __cplusplus -} -#endif - -#endif /* __MSCAN_H__ */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/nvram/nvram.h b/c/src/lib/libbsp/powerpc/gen5200/nvram/nvram.h deleted file mode 100644 index b05c35986f..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/nvram/nvram.h +++ /dev/null @@ -1,141 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic MPC5200 BSP | -+-----------------------------------------------------------------+ -| Partially based on the code references which are named below. | -| Adaptions, modifications, enhancements and any recent parts of | -| the code are: | -| Copyright (c) 2005 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains the nvram declarations | -\*===============================================================*/ -/***********************************************************************/ -/* */ -/* Module: nvram.h */ -/* Date: 07/17/2003 */ -/* Purpose: RTEMS M93C64-based header file */ -/* */ -/*---------------------------------------------------------------------*/ -/* */ -/* Description: M93C46 is a serial microwire EEPROM which contains */ -/* 1Kbit (128 bytes/64 words) of non-volatile memory. */ -/* The device can be configured for byte- or word- */ -/* access. The driver provides a file-like interface */ -/* to this memory. */ -/* */ -/* MPC5x00 PIN settings: */ -/* */ -/* PSC3_6 (output) -> MC93C46 serial data in (D) */ -/* PSC3_7 (input) -> MC93C46 serial data out (Q) */ -/* PSC3_8 (output) -> MC93C46 chip select input (S) */ -/* PSC3_9 (output) -> MC93C46 serial clock (C) */ -/* */ -/*---------------------------------------------------------------------*/ -/* */ -/* Code */ -/* References: DS1307-based Non-Volatile memory device driver */ -/* Module: nvram.h */ -/* Project: RTEMS 4.6.0pre1 / MCF5206Elite BSP */ -/* Version 1.1 */ -/* Date: 10/26/2001 */ -/* Author: Victor V. Vengerov */ -/* Copyright: Copyright (C) 2000 OKTET Ltd.,St.-Petersburg,Russia */ -/* */ -/* The license and distribution terms for this file may be */ -/* found in the file LICENSE in this distribution or at */ -/* http://www.rtems.org/license/LICENSE. */ -/* */ -/*---------------------------------------------------------------------*/ -/* */ -/* Partially based on the code references which are named above. */ -/* Adaptions, modifications, enhancements and any recent parts of */ -/* the code are under the right of */ -/* */ -/* IPR Engineering, Dachauer Straße 38, D-80335 München */ -/* Copyright(C) 2003 */ -/* */ -/*---------------------------------------------------------------------*/ -/* */ -/* IPR Engineering makes no representation or warranties with */ -/* respect to the performance of this computer program, and */ -/* specifically disclaims any responsibility for any damages, */ -/* special or consequential, connected with the use of this program. */ -/* */ -/*---------------------------------------------------------------------*/ -/* */ -/* Version history: 1.0 */ -/* */ -/***********************************************************************/ - -#ifndef __NVRAM_H__ -#define __NVRAM_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* include <bsp.h> */ -#include <bsp.h> - -/* Macros for TBL read access */ -#define TBL_READ(count) __asm__ volatile ("mftb %0\n" : "=r" (count) : "0" (count)) -#define TMBASE_CLOCK (G2_CLOCK/4) - -/* Simple usec delay function prototype */ -void wait_usec(unsigned long); - -/* nvram_driver_initialize -- - * Non-volatile memory device driver initialization. - */ -rtems_device_driver -nvram_driver_initialize(rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg); - -/* nvram_driver_open -- - * Non-volatile memory device driver open primitive. - */ -rtems_device_driver -nvram_driver_open(rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg); - -/* nvram_driver_close -- - * Non-volatile memory device driver close primitive. - */ -rtems_device_driver -nvram_driver_close(rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg); - -/* nvram_driver_read -- - * Non-volatile memory device driver read primitive. - */ -rtems_device_driver -nvram_driver_read(rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg); - -/* nvram_driver_write -- - * Non-volatile memory device driver write primitive. - */ -rtems_device_driver -nvram_driver_write(rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg); - -#ifdef __cplusplus -} -#endif - -#endif /* __NVRAM_H__ */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/preinstall.am b/c/src/lib/libbsp/powerpc/gen5200/preinstall.am deleted file mode 100644 index 73c986eacc..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/preinstall.am +++ /dev/null @@ -1,207 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp/bestcomm - @: > $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp/bestcomm/include - @: > $(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200 - @: > $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp/bestcomm/task_api - @: > $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds.gen5200_base: startup/linkcmds.gen5200_base $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.gen5200_base -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.gen5200_base - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_priv.h: bestcomm/bestcomm_priv.h $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_priv.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_priv.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.h: bestcomm/dma_image.h $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.capi.h: bestcomm/dma_image.capi.h $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.capi.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.capi.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_api.h: bestcomm/bestcomm_api.h $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_api.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_api.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_glue.h: bestcomm/bestcomm_glue.h $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_glue.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_glue.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/include/ppctypes.h: bestcomm/include/ppctypes.h $(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/include/ppctypes.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/include/ppctypes.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/mgt5200.h: bestcomm/include/mgt5200/mgt5200.h $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/mgt5200.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/mgt5200.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/sdma.h: bestcomm/include/mgt5200/sdma.h $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/sdma.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/sdma.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_general.h: bestcomm/task_api/tasksetup_general.h $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_general.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_general.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_bdtable.h: bestcomm/task_api/tasksetup_bdtable.h $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_bdtable.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_bdtable.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_cntrl.h: bestcomm/task_api/bestcomm_cntrl.h $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_cntrl.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_cntrl.h - -$(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_api_mem.h: bestcomm/task_api/bestcomm_api_mem.h $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_api_mem.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_api_mem.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h - -$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h - -$(PROJECT_INCLUDE)/bsp/u-boot.h: ../../shared/include/u-boot.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/u-boot.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/u-boot.h - -$(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h - -$(PROJECT_INCLUDE)/bsp/u-boot-board-info.h: ../shared/include/u-boot-board-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/u-boot-board-info.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/u-boot-board-info.h - -$(PROJECT_INCLUDE)/bsp/ata.h: include/ata.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ata.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ata.h - -$(PROJECT_INCLUDE)/bsp/bestcomm.h: include/bestcomm.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm.h - -$(PROJECT_INCLUDE)/bsp/bestcomm_ops.h: include/bestcomm_ops.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm_ops.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm_ops.h - -$(PROJECT_INCLUDE)/bsp/i2cdrv.h: include/i2cdrv.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/i2cdrv.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/i2cdrv.h - -$(PROJECT_INCLUDE)/bsp/i2c.h: include/i2c.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/i2c.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/i2c.h - -$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/mpc5200.h: include/mpc5200.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mpc5200.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mpc5200.h - -$(PROJECT_INCLUDE)/bsp/mscan-base.h: include/mscan-base.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mscan-base.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mscan-base.h - -$(PROJECT_INCLUDE)/bsp/u-boot-config.h: include/u-boot-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/u-boot-config.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/u-boot-config.h - -$(PROJECT_INCLUDE)/bsp/mscan.h: mscan/mscan.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mscan.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mscan.h - -$(PROJECT_INCLUDE)/bsp/nvram.h: nvram/nvram.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/nvram.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/nvram.h - -$(PROJECT_INCLUDE)/bsp/slicetimer.h: slicetimer/slicetimer.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/slicetimer.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/slicetimer.h - diff --git a/c/src/lib/libbsp/powerpc/gen5200/slicetimer/slicetimer.h b/c/src/lib/libbsp/powerpc/gen5200/slicetimer/slicetimer.h deleted file mode 100644 index e089dbc8ad..0000000000 --- a/c/src/lib/libbsp/powerpc/gen5200/slicetimer/slicetimer.h +++ /dev/null @@ -1,69 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic MPC5200 BSP | -+-----------------------------------------------------------------+ -| Partially based on the code references which are named below. | -| Adaptions, modifications, enhancements and any recent parts of | -| the code are: | -| Copyright (c) 2005 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file declares functions to use the slice timer module -\*===============================================================*/ -#ifndef __SLICETIMER_H__ -#define __SLICETIMER_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define SLT0 0 -#define SLT1 1 - -#define SLT0_INT_FREQUENCY 10000 -#define SLT1_INT_FREQUENCY 0 - -#define SLT_CNTRL_RW (1 << 26) -#define SLT_CNTRL_INTEN (1 << 25) -#define SLT_CNTRL_TIMEN (1 << 24) - -#define SLT_TSR_ST (1 << 24) - -#define SLT_TSR_COUNT(freq) ((freq) ? ((IPB_CLOCK)/(freq)) : (0xFFFFFF)) - -rtems_device_driver slt_initialize( rtems_device_major_number, - rtems_device_minor_number, - void * - ); - -#define SLTIME_DRIVER_TABLE_ENTRY \ - { slt_initialize, NULL, NULL, \ - NULL, NULL, NULL } - -void mpc5200_slt_isr(uint32_t); -rtems_isr mpc5200_slt0_isr(rtems_irq_hdl_param); -rtems_isr mpc5200_slt1_isr(rtems_irq_hdl_param); -void mpc5200_init_slt(uint32_t); -void mpc5200_set_slt_count(uint32_t); -void mpc5200_enable_slt_int(uint32_t); -void mpc5200_disable_slt_int(uint32_t); -uint32_t mpc5200_check_slt_status(uint32_t); -/*void sltOn(const rtems_irq_connect_data *); -void sltOff(const rtems_irq_connect_data *); -int sltIsOn(const rtems_irq_connect_data *);*/ -void Install_slt(rtems_device_minor_number); - -#ifdef __cplusplus -} -#endif - -#endif /* __SLICETIMER_H__ */ diff --git a/c/src/lib/libbsp/powerpc/gen5200/bsp_specs b/c/src/lib/libbsp/powerpc/gen5200/startup/bsp_specs index 2625609327..2625609327 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/bsp_specs +++ b/c/src/lib/libbsp/powerpc/gen5200/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am b/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am index d6aaf3c6c4..5f9bad706e 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am +++ b/c/src/lib/libbsp/powerpc/gen83xx/Makefile.am @@ -4,31 +4,10 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h -include_bsp_HEADERS = -include_bsp_HEADERS += ../../shared/include/irq-generic.h -include_bsp_HEADERS += ../../shared/include/irq-info.h -include_bsp_HEADERS += ../../shared/include/u-boot.h -include_bsp_HEADERS += ../../shared/include/utility.h -include_bsp_HEADERS += ../shared/include/linker-symbols.h -include_bsp_HEADERS += ../shared/include/start.h -include_bsp_HEADERS += ../shared/include/tictac.h -include_bsp_HEADERS += ../shared/include/u-boot-board-info.h -include_bsp_HEADERS += include/hwreg_vals.h -include_bsp_HEADERS += include/irq.h -include_bsp_HEADERS += include/tsec-config.h -include_bsp_HEADERS += include/u-boot-config.h - noinst_PROGRAMS = @@ -42,14 +21,14 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA += rtems_crti.$(OBJEXT) -dist_project_lib_DATA += startup/linkcmds \ - ../shared/startup/linkcmds.base \ - startup/linkcmds.mpc83xx \ - startup/linkcmds.mpc8309som \ - startup/linkcmds.mpc8313erdb \ - startup/linkcmds.br_uid \ - startup/linkcmds.mpc8349eamds \ - startup/linkcmds.hsc_cm01 +project_lib_DATA += linkcmds +dist_project_lib_DATA += ../shared/startup/linkcmds.base +dist_project_lib_DATA += startup/linkcmds.br_uid +dist_project_lib_DATA += startup/linkcmds.hsc_cm01 +dist_project_lib_DATA += startup/linkcmds.mpc8309som +dist_project_lib_DATA += startup/linkcmds.mpc8313erdb +dist_project_lib_DATA += startup/linkcmds.mpc8349eamds +dist_project_lib_DATA += startup/linkcmds.mpc83xx noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -119,5 +98,5 @@ endif EXTRA_DIST += README.mpc8349eamds -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/gen83xx/headers.am diff --git a/c/src/lib/libbsp/powerpc/gen83xx/configure.ac b/c/src/lib/libbsp/powerpc/gen83xx/configure.ac index 7764d2ef9e..fd96450522 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/configure.ac +++ b/c/src/lib/libbsp/powerpc/gen83xx/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-gen83xx],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/br_uid.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) @@ -92,7 +95,6 @@ AC_CONFIG_FILES([Makefile]) RTEMS_BSP_BOOTCARD_OPTIONS RTEMS_BSP_CLEANUP_OPTIONS -RTEMS_BSP_LINKCMDS RTEMS_PPC_EXCEPTIONS diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h b/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h deleted file mode 100644 index 59fd20de54..0000000000 --- a/c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h +++ /dev/null @@ -1,163 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic MPC83xx BSP | -+-----------------------------------------------------------------+ -| Copyright (c) 2007 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains board specific definitions | -\*===============================================================*/ - - -#ifndef LIBBSP_POWERPC_GEN83XX_BSP_H -#define LIBBSP_POWERPC_GEN83XX_BSP_H - -#define BSP_FEATURE_IRQ_EXTENSION - -#include <bspopts.h> - -#include <libcpu/powerpc-utility.h> - -#include <bsp/hwreg_vals.h> - -/* - * Some symbols defined in the linker command file. - */ - -LINKER_SYMBOL(bsp_ram_start); -LINKER_SYMBOL(bsp_ram_end); -LINKER_SYMBOL(bsp_ram_size); - -LINKER_SYMBOL(bsp_rom_start); -LINKER_SYMBOL(bsp_rom_end); -LINKER_SYMBOL(bsp_rom_size); - -LINKER_SYMBOL(bsp_section_text_start); -LINKER_SYMBOL(bsp_section_text_end); -LINKER_SYMBOL(bsp_section_text_size); - -LINKER_SYMBOL(bsp_section_data_start); -LINKER_SYMBOL(bsp_section_data_end); -LINKER_SYMBOL(bsp_section_data_size); - -LINKER_SYMBOL(bsp_section_bss_start); -LINKER_SYMBOL(bsp_section_bss_end); -LINKER_SYMBOL(bsp_section_bss_size); - -LINKER_SYMBOL(bsp_interrupt_stack_start); -LINKER_SYMBOL(bsp_interrupt_stack_end); -LINKER_SYMBOL(bsp_interrupt_stack_size); - -LINKER_SYMBOL(bsp_work_area_start); - -LINKER_SYMBOL(IMMRBAR); - -#ifndef ASM - -#include <rtems.h> -#include <bsp/vectors.h> -#include <bsp/irq.h> -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * indicate, that BSP has no IDE driver - */ -#undef RTEMS_BSP_HAS_IDE_DRIVER - -/* misc macros */ -#define BSP_ARRAY_CNT(arr) (sizeof(arr)/sizeof(arr[0])) - -void *bsp_idle_thread( uintptr_t ignored ); -#define BSP_IDLE_TASK_BODY bsp_idle_thread - -/* functions */ -rtems_status_code bsp_register_i2c(void); -rtems_status_code bsp_register_spi(void); - -/* - * Network driver configuration - */ -struct rtems_bsdnet_ifconfig; -extern int BSP_tsec_attach(struct rtems_bsdnet_ifconfig *config,int attaching); -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH BSP_tsec_attach - -#ifdef MPC83XX_BOARD_MPC8313ERDB - #define RTEMS_BSP_NETWORK_DRIVER_NAME "tsec2" - #define RTEMS_BSP_NETWORK_DRIVER_NAME2 "tsec1" -#else - #define RTEMS_BSP_NETWORK_DRIVER_NAME "tsec1" - #define RTEMS_BSP_NETWORK_DRIVER_NAME2 "tsec2" -#endif - -#if defined(MPC83XX_BOARD_MPC8349EAMDS) -/* - * i2c EEPROM device name - */ -#define RTEMS_BSP_I2C_EEPROM_DEVICE_NAME "eeprom" -#define RTEMS_BSP_I2C_EEPROM_DEVICE_PATH "/dev/i2c1.eeprom" - -/* - * SPI Flash device name - */ -#define RTEMS_BSP_SPI_FLASH_DEVICE_NAME "flash" -#define RTEMS_BSP_SPI_FLASH_DEVICE_PATH "/dev/spi.flash" -#endif /* defined(MPC83XX_BOARD_MPC8349EAMDS) */ - -#if defined(MPC83XX_BOARD_HSC_CM01) -/* - * i2c EEPROM device name - */ -#define RTEMS_BSP_I2C_EEPROM_DEVICE_NAME "eeprom" -#define RTEMS_BSP_I2C_EEPROM_DEVICE_PATH "/dev/i2c1.eeprom" - -/* - * SPI FRAM device name - */ -#define RTEMS_BSP_SPI_FRAM_DEVICE_NAME "fram" -#define RTEMS_BSP_SPI_FRAM_DEVICE_PATH "/dev/spi.fram" -#endif /* defined(MPC83XX_BOARD_HSC_CM01) */ - -extern unsigned int BSP_bus_frequency; - -extern uint32_t bsp_clicks_per_usec; - -/* - * Convert decrementer value to tenths of microseconds (used by shared timer - * driver). - */ -#define BSP_Convert_decrementer( _value ) \ - ((int) (((_value) * 10) / bsp_clicks_per_usec)) - -void mpc83xx_zero_4( void *dest, size_t n); - -void cpu_init( void); - -void bsp_restart(void *addr); - -#if defined(HAS_UBOOT) - /* Routine to obtain U-Boot environment variables */ - const char *bsp_uboot_getenv( - const char *name - ); -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* ASM */ - -#endif /* GEN83xx */ diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h b/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h deleted file mode 100644 index c7a5bac9c2..0000000000 --- a/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h +++ /dev/null @@ -1,381 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic MPC83xx BSP | -+-----------------------------------------------------------------+ -| Copyright (c) 2007 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains board specific definitions | -\*===============================================================*/ - - -#ifndef __GEN83xx_HWREG_VALS_h -#define __GEN83xx_HWREG_VALS_h - -#include <mpc83xx/mpc83xx.h> -#include <bsp.h> - -#ifdef MPC83XX_HAS_NAND_LP_FLASH_ON_CS0 - #define MPC83XX_RCWHR_BOOT_DEVICE (RCWHR_ROMLOC_LB08 | RCWHR_RLEXT_NAND) -#else - #define MPC83XX_RCWHR_BOOT_DEVICE (RCWHR_ROMLOC_LB16 | RCWHR_RLEXT_LGCY) -#endif - -/* - * distinguish board characteristics - */ -#if defined(MPC83XX_BOARD_MPC8349EAMDS) -/* - * for Freescale MPC8349 EAMDS - */ -/* - * two DUART channels supported - */ -#define GEN83xx_DUART_AVAIL_MASK 0x03 - -/* we need the low level initialization in start.S*/ -#define NEED_LOW_LEVEL_INIT -/* - * clocking infos - */ -#define BSP_CLKIN_FRQ 66000000L -#define RCFG_SYSPLL_MF 4 -#define RCFG_COREPLL_MF 4 - -/* - * Reset configuration words - */ -#define RESET_CONF_WRD_L (RCWLR_LBIUCM_1_1 | \ - RCWLR_DDRCM_1_1 | \ - RCWLR_SPMF(RCFG_SYSPLL_MF) | \ - RCWLR_COREPLL(RCFG_COREPLL_MF)) - -#define RESET_CONF_WRD_H (RCWHR_PCI_HOST | \ - RCWHR_PCI_32 | \ - RCWHR_PCI1ARB_EN | \ - RCWHR_PCI2ARB_EN | \ - RCWHR_CORE_EN | \ - RCWHR_BMS_LOW | \ - RCWHR_BOOTSEQ_NONE | \ - RCWHR_SW_DIS | \ - MPC83XX_RCWHR_BOOT_DEVICE | \ - RCWHR_TSEC1M_GMII | \ - RCWHR_TSEC2M_GMII | \ - RCWHR_ENDIAN_BIG | \ - RCWHR_LALE_NORM | \ - RCWHR_LDP_PAR) -#elif defined(MPC83XX_BOARD_HSC_CM01) -/* - * for JPK HSC_CM01 - */ -/* - * one DUART channel (UART1) supported - */ -#define GEN83xx_DUART_AVAIL_MASK 0x01 - -/* we need the low level initialization in start.S*/ -#define NEED_LOW_LEVEL_INIT -/* - * clocking infos - */ -#define BSP_CLKIN_FRQ 30000000L -#define RCFG_SYSPLL_MF 11 -#define RCFG_COREPLL_MF 4 -/* - * Reset configuration words - */ -#define RESET_CONF_WRD_L (RCWLR_LBIUCM_1_1 | \ - RCWLR_DDRCM_1_1 | \ - RCWLR_SPMF(RCFG_SYSPLL_MF) | \ - RCWLR_COREPLL(RCFG_COREPLL_MF)) - -#define RESET_CONF_WRD_H (RCWHR_PCI_HOST | \ - RCWHR_PCI_32 | \ - RCWHR_PCI1ARB_DIS | \ - RCWHR_PCI2ARB_DIS | \ - RCWHR_CORE_EN | \ - RCWHR_BMS_LOW | \ - RCWHR_BOOTSEQ_NONE | \ - RCWHR_SW_DIS | \ - MPC83XX_RCWHR_BOOT_DEVICE | \ - RCWHR_TSEC1M_RGMII | \ - RCWHR_TSEC2M_GMII | \ - RCWHR_ENDIAN_BIG | \ - RCWHR_LALE_EARLY | \ - RCWHR_LDP_SPC) - -#elif defined(MPC83XX_BOARD_BR_UID) -/* - * for BR UID - */ -/* - * one DUART channel (UART1) supported - */ -#define GEN83xx_DUART_AVAIL_MASK 0x01 - -/* we need the low level initialization in start.S*/ -#define NEED_LOW_LEVEL_INIT -/* - * clocking infos - */ -#define BSP_CLKIN_FRQ 25000000L -#define RCFG_SYSPLL_MF 5 -#define RCFG_COREPLL_MF 5 -/* - * Reset configuration words - */ -#define RESET_CONF_WRD_L \ - (RCWLR_LBIUCM_1_1 \ - | RCWLR_DDRCM_2_1 \ - | RCWLR_SPMF(RCFG_SYSPLL_MF) \ - | RCWLR_COREPLL(RCFG_COREPLL_MF) \ - | RCWLR_CEVCOD_1_2 \ - | RCWLR_CEPMF(8) \ - ) - -#define RESET_CONF_WRD_H (RCWHR_PCI_HOST | \ - RCWHR_PCI_32 | \ - RCWHR_PCI1ARB_DIS | \ - RCWHR_CORE_EN | \ - RCWHR_BMS_LOW | \ - RCWHR_BOOTSEQ_NONE | \ - RCWHR_SW_DIS | \ - MPC83XX_RCWHR_BOOT_DEVICE | \ - RCWHR_ENDIAN_BIG) - -#elif defined( HAS_UBOOT) - -/* TODO */ - -#else - -#error "board type not defined" - -#endif - -#if defined(MPC83XX_BOARD_MPC8349EAMDS) -/************************** - * for Freescale MPC83XX_BOARD_MPC8349EAMDS - */ - -/* - * working values for various registers, used in start/start.S - */ - -/* - * Local Access Windows - * FIXME: decode bit settings - */ -#define LBLAWBAR0_VAL 0xFE000000 -#define LBLAWAR0_VAL 0x80000016 -#define LBLAWBAR1_VAL 0xF8000000 -#define LBLAWAR1_VAL 0x8000000E -#define LBLAWBAR2_VAL 0xF0000000 -#define LBLAWAR2_VAL 0x80000019 -#define DDRLAWBAR0_VAL 0x00000000 -#define DDRLAWAR0_VAL 0x8000001B -/* - * Local Bus (Memory) Controller - * FIXME: decode bit settings - */ -#define BR0_VAL 0xFE001001 -#define OR0_VAL 0xFF806FF7 -#define BR1_VAL 0xF8000801 -#define OR1_VAL 0xFFFFE8F0 -#define BR2_VAL 0xF0001861 -#define OR2_VAL 0xFC006901 -/* - * SDRAM registers - * FIXME: decode bit settings - */ -#define MRPTR_VAL 0x20000000 -#define LSRT_VAL 0x32000000 -#define LSDMR_VAL 0x4062D733 -#define LCRR_VAL 0x80000004 - -/* - * DDR-SDRAM registers - * FIXME: decode bit settings - */ -#define CS2_BNDS_VAL 0x00000007 -#define CS3_BNDS_VAL 0x0008000F -#define CS2_CONFIG_VAL 0x80000101 -#define CS3_CONFIG_VAL 0x80000101 -#define TIMING_CFG_1_VAL 0x36333321 -#define TIMING_CFG_2_VAL 0x00000800 -#define DDR_SDRAM_CFG_VAL 0xC2000000 -#define DDR_SDRAM_MODE_VAL 0x00000022 -#define DDR_SDRAM_INTTVL_VAL 0x045B0100 -#define DDR_SDRAM_CLK_CNTL_VAL 0x00000000 - -#elif defined(MPC83XX_BOARD_HSC_CM01) -/************************** - * for JPK HSC_CM01 - */ - -/* fpga BCSR register */ -#define FPGA_START 0xF8000000 -#define FPGA_SIZE 0x8000 -#define FPGA_END (FPGA_START+FPGA_SIZE-1) - -/* - * working values for various registers, used in start/start.S - */ - -/* fpga config 16 MB size */ -#define FPGA_CONFIG_START 0xF8000000 -#define FPGA_CONFIG_SIZE 0x01000000 -/* fpga register 8 MB size */ -#define FPGA_REGISTER_START 0xF9000000 -#define FPGA_REGISTER_SIZE 0x00800000 -/* fpga fifo 8 MB size */ -#define FPGA_FIFO_START 0xF9800000 -#define FPGA_FIFO_SIZE 0x00800000 - -#define FPGA_START (FPGA_CONFIG_START) -// fpga window size 32 MByte -#define FPGA_SIZE (0x02000000) -#define FPGA_END (FPGA_START+FPGA_SIZE-1) - -/* - * Local Access Windows - * FIXME: decode bit settings - */ - -#define LBLAWBAR0_VAL bsp_rom_start -#define LBLAWAR0_VAL 0x80000018 -#define LBLAWBAR1_VAL (FPGA_CONFIG_START) -#define LBLAWAR1_VAL 0x80000018 -#define DDRLAWBAR0_VAL bsp_ram_start -#define DDRLAWAR0_VAL 0x8000001B -/* - * Local Bus (Memory) Controller - * FIXME: decode bit settings - */ -#define BR0_VAL (0xFE000000 | 0x01001) -#define OR0_VAL 0xFE000E54 -// fpga config access range (UPM_A) (32 kByte) -#define BR2_VAL (FPGA_CONFIG_START | 0x01881) -#define OR2_VAL 0xFFFF9100 - -// fpga register access range (UPM_B) (8 MByte) -#define BR3_VAL (FPGA_REGISTER_START | 0x018A1) -#define OR3_VAL 0xFF801100 - -// fpga fifo access range (UPM_C) (8 MByte) -#define BR4_VAL (FPGA_FIFO_START | 0x018C1) -#define OR4_VAL 0xFF801100 - -/* - * SDRAM registers - */ -#define MRPTR_VAL 0x20000000 -#define LSRT_VAL 0x32000000 -#define LSDMR_VAL 0x4062D733 -#define LCRR_VAL 0x80010004 - -/* - * DDR-SDRAM registers - * FIXME: decode bit settings - */ -#define DDRCDR_VAL 0x00000001 -#define CS0_BNDS_VAL 0x0000000F -#define CS0_CONFIG_VAL 0x80810102 -#define TIMING_CFG_0_VAL 0x00420802 -#define TIMING_CFG_1_VAL 0x3735A322 -#define TIMING_CFG_2_VAL 0x2F9044C7 -#define DDR_SDRAM_CFG_2_VAL 0x00401000 -#define DDR_SDRAM_MODE_VAL 0x44521632 -#define DDR_SDRAM_CLK_CNTL_VAL 0x01800000 -#define DDR_SDRAM_CFG_VAL 0x63000008 - -#define DDR_ERR_DISABLE_VAL 0x0000008D -#define DDR_ERR_DISABLE_VAL2 0x00000089 -#define DDR_SDRAM_DATA_INIT_VAL 0xC01DCAFE -#define DDR_SDRAM_INIT_ADDR_VAL 0 -#define DDR_SDRAM_INTERVAL_VAL 0x05080000 - -#elif defined(MPC83XX_BOARD_BR_UID) -/************************** - * for BR UID - */ - -/* - * working values for various registers, used in start/start.S - */ - -/* - * Local Access Windows - * FIXME: decode bit settings - */ - -#define LBLAWBAR0_VAL bsp_rom_start -#define LBLAWAR0_VAL 0x80000018 -#define DDRLAWBAR0_VAL bsp_ram_start -#define DDRLAWAR0_VAL 0x8000001B - - -/* - * clocking for local bus: - * ALE active for 1 clock - * local bus clock = 1/2 csb clock - */ -#define LCRR_VAL 0x80010002 - -/* - * DDR-SDRAM registers - * FIXME: decode bit settings - */ -#define DDRCDR_VAL 0x00000001 -#define CS0_BNDS_VAL 0x0000000F -#define CS0_CONFIG_VAL 0x80014202 -#define TIMING_CFG_0_VAL 0x00220802 -#define TIMING_CFG_1_VAL 0x26259222 -#define TIMING_CFG_2_VAL 0x111048C7 -#define DDR_SDRAM_CFG_2_VAL 0x00401000 -#define DDR_SDRAM_MODE_VAL 0x200F1632 -#define DDR_SDRAM_MODE_2_VAL 0x40006000 -#define DDR_SDRAM_CLK_CNTL_VAL 0x01800000 -#define DDR_SDRAM_CFG_VAL 0x43100008 - -#define DDR_ERR_DISABLE_VAL 0x0000008D -#define DDR_ERR_DISABLE_VAL2 0x00000089 -#define DDR_SDRAM_DATA_INIT_VAL 0xC01DCAFE -#define DDR_SDRAM_INIT_ADDR_VAL 0 -#define DDR_SDRAM_INTERVAL_VAL 0x01E8222E - -#elif defined( HAS_UBOOT) - -/* TODO */ - -#else - -#error "board type not defined" - -#endif - -/************************** - * derived values for all boards - */ -/* value of input clock divider (derived from pll mode reg) */ -#if MPC83XX_CHIP_TYPE != 8309 - #define BSP_SYSPLL_CKID (((mpc83xx.clk.spmr>>(31-8))&0x01)+1) -#else - /* On the MPC8309 this bit is reserved */ - #define BSP_SYSPLL_CKID 1 -#endif -/* value of system pll (derived from pll mode reg) */ -#define BSP_SYSPLL_MF ((mpc83xx.clk.spmr>>(31-7))&0x0f) -/* value of system pll (derived from pll mode reg) */ -#define BSP_COREPLL_MF ((mpc83xx.clk.spmr>>(31-15))&0x7f) - -#endif /* __GEN83xx_HWREG_VALS_h */ diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/irq.h b/c/src/lib/libbsp/powerpc/gen83xx/include/irq.h deleted file mode 100644 index dc084ed2a2..0000000000 --- a/c/src/lib/libbsp/powerpc/gen83xx/include/irq.h +++ /dev/null @@ -1,184 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS generic MPC83xx BSP | -+-----------------------------------------------------------------+ -| Copyright (c) 2007, 2010 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file declares constants of the interrupt controller | -\*===============================================================*/ - - -#ifndef GEN83xx_IRQ_IRQ_H -#define GEN83xx_IRQ_IRQ_H - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -#include <bspopts.h> - -/* - * the following definitions specify the indices used - * to interface the interrupt handler API - */ - -/* - * Peripheral IRQ handlers related definitions - */ -#define BSP_IPIC_PER_IRQ_NUMBER 128 -#define BSP_IPIC_IRQ_LOWEST_OFFSET 0 -#define BSP_IPIC_IRQ_MAX_OFFSET (BSP_IPIC_IRQ_LOWEST_OFFSET\ - +BSP_IPIC_PER_IRQ_NUMBER-1) - -#define BSP_IS_IPIC_IRQ(irqnum) \ - (((irqnum) >= BSP_IPIC_IRQ_LOWEST_OFFSET) && \ - ((irqnum) <= BSP_IPIC_IRQ_MAX_OFFSET)) -/* - * Processor IRQ handlers related definitions - */ -#define BSP_PROCESSOR_IRQ_NUMBER 1 -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_IPIC_IRQ_MAX_OFFSET+1) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\ - +BSP_PROCESSOR_IRQ_NUMBER-1) - -#define BSP_IS_PROCESSOR_IRQ(irqnum) \ - (((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \ - ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET)) -/* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1) -#define BSP_LOWEST_OFFSET BSP_IPIC_IRQ_LOWEST_OFFSET -#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET - -#define BSP_IS_VALID_IRQ(irqnum) \ - (BSP_IS_PROCESSOR_IRQ(irqnum) \ - || BSP_IS_IPIC_IRQ(irqnum)) - -#ifndef ASM -#ifdef __cplusplus -extern "C" { -#endif - -/* - * index table for the module specific handlers, a few entries are only placeholders - */ - typedef enum { - BSP_IPIC_IRQ_FIRST = BSP_IPIC_IRQ_LOWEST_OFFSET, - BSP_IPIC_IRQ_ERROR = BSP_IPIC_IRQ_LOWEST_OFFSET + 0, -#if MPC83XX_CHIP_TYPE / 10 == 830 - BSP_IPIC_IRQ_DMA1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 3, - BSP_IPIC_IRQ_UART = BSP_IPIC_IRQ_LOWEST_OFFSET + 9, - BSP_IPIC_IRQ_FLEXCAN = BSP_IPIC_IRQ_LOWEST_OFFSET + 10, -#else - BSP_IPIC_IRQ_UART1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 9, - BSP_IPIC_IRQ_UART2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 10, - BSP_IPIC_IRQ_SEC = BSP_IPIC_IRQ_LOWEST_OFFSET + 11, -#endif - BSP_IPIC_IRQ_I2C1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 14, - BSP_IPIC_IRQ_I2C2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 15, - BSP_IPIC_IRQ_SPI = BSP_IPIC_IRQ_LOWEST_OFFSET + 16, - BSP_IPIC_IRQ_IRQ1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 17, - BSP_IPIC_IRQ_IRQ2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 18, - BSP_IPIC_IRQ_IRQ3 = BSP_IPIC_IRQ_LOWEST_OFFSET + 19, -#if MPC83XX_CHIP_TYPE / 10 == 830 - BSP_IPIC_IRQ_QUICC_HI = BSP_IPIC_IRQ_LOWEST_OFFSET + 32, - BSP_IPIC_IRQ_QUICC_LO = BSP_IPIC_IRQ_LOWEST_OFFSET + 33, -#else - BSP_IPIC_IRQ_IRQ4 = BSP_IPIC_IRQ_LOWEST_OFFSET + 20, - BSP_IPIC_IRQ_IRQ5 = BSP_IPIC_IRQ_LOWEST_OFFSET + 21, - BSP_IPIC_IRQ_IRQ6 = BSP_IPIC_IRQ_LOWEST_OFFSET + 22, - BSP_IPIC_IRQ_IRQ7 = BSP_IPIC_IRQ_LOWEST_OFFSET + 23, - BSP_IPIC_IRQ_TSEC1_TX = BSP_IPIC_IRQ_LOWEST_OFFSET + 32, - BSP_IPIC_IRQ_TSEC1_RX = BSP_IPIC_IRQ_LOWEST_OFFSET + 33, - BSP_IPIC_IRQ_TSEC1_ERR = BSP_IPIC_IRQ_LOWEST_OFFSET + 34, - BSP_IPIC_IRQ_TSEC2_TX = BSP_IPIC_IRQ_LOWEST_OFFSET + 35, - BSP_IPIC_IRQ_TSEC2_RX = BSP_IPIC_IRQ_LOWEST_OFFSET + 36, - BSP_IPIC_IRQ_TSEC2_ERR = BSP_IPIC_IRQ_LOWEST_OFFSET + 37, -#endif - BSP_IPIC_IRQ_USB_DR = BSP_IPIC_IRQ_LOWEST_OFFSET + 38, -#if MPC83XX_CHIP_TYPE / 10 == 830 - BSP_IPIC_IRQ_ESDHC = BSP_IPIC_IRQ_LOWEST_OFFSET + 42, -#else - BSP_IPIC_IRQ_USB_MPH = BSP_IPIC_IRQ_LOWEST_OFFSET + 39, -#endif - BSP_IPIC_IRQ_IRQ0 = BSP_IPIC_IRQ_LOWEST_OFFSET + 48, - BSP_IPIC_IRQ_RTC_SEC = BSP_IPIC_IRQ_LOWEST_OFFSET + 64, - BSP_IPIC_IRQ_PIT = BSP_IPIC_IRQ_LOWEST_OFFSET + 65, - BSP_IPIC_IRQ_PCI1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 66, -#if MPC83XX_CHIP_TYPE / 10 == 830 - BSP_IPIC_IRQ_MSIR1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 67, -#else - BSP_IPIC_IRQ_PCI2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 67, -#endif - BSP_IPIC_IRQ_RTC_ALR = BSP_IPIC_IRQ_LOWEST_OFFSET + 68, - BSP_IPIC_IRQ_MU = BSP_IPIC_IRQ_LOWEST_OFFSET + 69, - BSP_IPIC_IRQ_SBA = BSP_IPIC_IRQ_LOWEST_OFFSET + 70, - BSP_IPIC_IRQ_DMA = BSP_IPIC_IRQ_LOWEST_OFFSET + 71, - BSP_IPIC_IRQ_GTM4 = BSP_IPIC_IRQ_LOWEST_OFFSET + 72, - BSP_IPIC_IRQ_GTM8 = BSP_IPIC_IRQ_LOWEST_OFFSET + 73, -#if MPC83XX_CHIP_TYPE / 10 == 830 - BSP_IPIC_IRQ_QUICC_PORTS = BSP_IPIC_IRQ_LOWEST_OFFSET + 74, - BSP_IPIC_IRQ_GPIO = BSP_IPIC_IRQ_LOWEST_OFFSET + 75, -#else - BSP_IPIC_IRQ_GPIO1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 74, - BSP_IPIC_IRQ_GPIO2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 75, -#endif - BSP_IPIC_IRQ_DDR = BSP_IPIC_IRQ_LOWEST_OFFSET + 76, - BSP_IPIC_IRQ_LBC = BSP_IPIC_IRQ_LOWEST_OFFSET + 77, - BSP_IPIC_IRQ_GTM2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 78, - BSP_IPIC_IRQ_GTM6 = BSP_IPIC_IRQ_LOWEST_OFFSET + 79, - BSP_IPIC_IRQ_PMC = BSP_IPIC_IRQ_LOWEST_OFFSET + 80, -#if MPC83XX_CHIP_TYPE / 10 == 830 - BSP_IPIC_IRQ_MSIR2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 81, - BSP_IPIC_IRQ_MSIR3 = BSP_IPIC_IRQ_LOWEST_OFFSET + 82, -#else - BSP_IPIC_IRQ_GTM3 = BSP_IPIC_IRQ_LOWEST_OFFSET + 84, - BSP_IPIC_IRQ_GTM7 = BSP_IPIC_IRQ_LOWEST_OFFSET + 85, -#endif -#if MPC83XX_CHIP_TYPE / 10 == 830 - BSP_IPIC_IRQ_MSIR4 = BSP_IPIC_IRQ_LOWEST_OFFSET + 86, - BSP_IPIC_IRQ_MSIR5 = BSP_IPIC_IRQ_LOWEST_OFFSET + 87, - BSP_IPIC_IRQ_MSIR6 = BSP_IPIC_IRQ_LOWEST_OFFSET + 88, - BSP_IPIC_IRQ_MSIR7 = BSP_IPIC_IRQ_LOWEST_OFFSET + 89, -#endif - BSP_IPIC_IRQ_GTM1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 90, - BSP_IPIC_IRQ_GTM5 = BSP_IPIC_IRQ_LOWEST_OFFSET + 91, -#if MPC83XX_CHIP_TYPE / 10 == 830 - BSP_IPIC_IRQ_DMA1_ERR = BSP_IPIC_IRQ_LOWEST_OFFSET + 94, - BSP_IPIC_IRQ_DPTC = BSP_IPIC_IRQ_LOWEST_OFFSET + 95, -#endif - - BSP_IPIC_IRQ_LAST = BSP_IPIC_IRQ_MAX_OFFSET, - } rtems_irq_symbolic_name; - -#define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET - -#define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET - -rtems_status_code mpc83xx_ipic_set_mask( rtems_vector_number vector, rtems_vector_number mask_vector, bool mask); - -#define MPC83XX_IPIC_INTERRUPT_NORMAL 0 - -#define MPC83XX_IPIC_INTERRUPT_SYSTEM 1 - -#define MPC83XX_IPIC_INTERRUPT_CRITICAL 2 - -rtems_status_code mpc83xx_ipic_set_highest_priority_interrupt( rtems_vector_number vector, int type); - -#ifdef __cplusplus -} -#endif -#endif /* ASM */ - -#endif /* GEN83XX_IRQ_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h b/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h deleted file mode 100644 index 22787473a5..0000000000 --- a/c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h +++ /dev/null @@ -1,62 +0,0 @@ -/** - * @file - * - * @brief Support file for Timer Test 27. - */ - -/* - * Copyright (c) 2008 - * Embedded Brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * rtems@embedded-brains.de - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 - #error "This is an RTEMS internal file you must not include directly." -#endif /* _RTEMS_TMTEST27 */ - -#ifndef TMTESTS_TM27_H -#define TMTESTS_TM27_H - -#include <libcpu/powerpc-utility.h> -#include <bsp/vectors.h> - -#define MUST_WAIT_FOR_INTERRUPT 1 - -static void (*tm27_interrupt_handler)(rtems_vector_number); - -static int tm27_exception_handler( BSP_Exception_frame *frame, unsigned number) -{ - (*tm27_interrupt_handler)( 0); - - return 0; -} - -void Install_tm27_vector( void (*handler)(rtems_vector_number)) -{ - int rv = 0; - - tm27_interrupt_handler = handler; - - rv = ppc_exc_set_handler( ASM_DEC_VECTOR, tm27_exception_handler); - if (rv < 0) { - printk( "Error installing clock interrupt handler!\n"); - } -} - -#define Cause_tm27_intr() \ - ppc_set_decrementer_register( 8) - -#define Clear_tm27_intr() \ - ppc_set_decrementer_register( UINT32_MAX) - -#define Lower_tm27_intr() \ - (void) ppc_external_exceptions_enable() - -#endif /* TMTESTS_TM27_H */ diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/tsec-config.h b/c/src/lib/libbsp/powerpc/gen83xx/include/tsec-config.h deleted file mode 100644 index 5ec0ccbad1..0000000000 --- a/c/src/lib/libbsp/powerpc/gen83xx/include/tsec-config.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_GEN83XX_TSEC_CONFIG_H -#define LIBBSP_POWERPC_GEN83XX_TSEC_CONFIG_H - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define TSEC_COUNT 2 - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_GEN83XX_TSEC_CONFIG_H */ diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/u-boot-config.h b/c/src/lib/libbsp/powerpc/gen83xx/include/u-boot-config.h deleted file mode 100644 index c2271c965b..0000000000 --- a/c/src/lib/libbsp/powerpc/gen83xx/include/u-boot-config.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_GEN83XX_U_BOOT_CONFIG_H -#define LIBBSP_POWERPC_GEN83XX_U_BOOT_CONFIG_H - -#define CONFIG_MPC83xx -#define CONFIG_HAS_ETH1 - -#endif /* LIBBSP_POWERPC_GEN83XX_U_BOOT_CONFIG_H */ diff --git a/c/src/lib/libbsp/powerpc/gen83xx/preinstall.am b/c/src/lib/libbsp/powerpc/gen83xx/preinstall.am deleted file mode 100644 index 69ee597190..0000000000 --- a/c/src/lib/libbsp/powerpc/gen83xx/preinstall.am +++ /dev/null @@ -1,143 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h - -$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h - -$(PROJECT_INCLUDE)/bsp/u-boot.h: ../../shared/include/u-boot.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/u-boot.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/u-boot.h - -$(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h - -$(PROJECT_INCLUDE)/bsp/linker-symbols.h: ../shared/include/linker-symbols.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/linker-symbols.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/linker-symbols.h - -$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h - -$(PROJECT_INCLUDE)/bsp/tictac.h: ../shared/include/tictac.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tictac.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tictac.h - -$(PROJECT_INCLUDE)/bsp/u-boot-board-info.h: ../shared/include/u-boot-board-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/u-boot-board-info.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/u-boot-board-info.h - -$(PROJECT_INCLUDE)/bsp/hwreg_vals.h: include/hwreg_vals.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/hwreg_vals.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/hwreg_vals.h - -$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/tsec-config.h: include/tsec-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tsec-config.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tsec-config.h - -$(PROJECT_INCLUDE)/bsp/u-boot-config.h: include/u-boot-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/u-boot-config.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/u-boot-config.h - -$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base - -$(PROJECT_LIB)/linkcmds.mpc83xx: startup/linkcmds.mpc83xx $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc83xx -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc83xx - -$(PROJECT_LIB)/linkcmds.mpc8309som: startup/linkcmds.mpc8309som $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc8309som -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc8309som - -$(PROJECT_LIB)/linkcmds.mpc8313erdb: startup/linkcmds.mpc8313erdb $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc8313erdb -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc8313erdb - -$(PROJECT_LIB)/linkcmds.br_uid: startup/linkcmds.br_uid $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.br_uid -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.br_uid - -$(PROJECT_LIB)/linkcmds.mpc8349eamds: startup/linkcmds.mpc8349eamds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc8349eamds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc8349eamds - -$(PROJECT_LIB)/linkcmds.hsc_cm01: startup/linkcmds.hsc_cm01 $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.hsc_cm01 -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.hsc_cm01 - diff --git a/c/src/lib/libbsp/powerpc/gen83xx/bsp_specs b/c/src/lib/libbsp/powerpc/gen83xx/startup/bsp_specs index a37ec281c8..a37ec281c8 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/bsp_specs +++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/haleakala/Makefile.am b/c/src/lib/libbsp/powerpc/haleakala/Makefile.am index 1a835adaed..24b30661a1 100644 --- a/c/src/lib/libbsp/powerpc/haleakala/Makefile.am +++ b/c/src/lib/libbsp/powerpc/haleakala/Makefile.am @@ -4,16 +4,8 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/mmu_405.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h @@ -22,7 +14,7 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = rtems_crti.$(OBJEXT) -dist_project_lib_DATA += startup/linkcmds +project_lib_DATA += linkcmds noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -39,14 +31,10 @@ libbsp_a_SOURCES += ../../shared/bspclean.c \ # dlentry libbsp_a_SOURCES += dlentry/dlentry.S -include_bsp_HEADERS = ../../powerpc/shared/console/uart.h \ - ../../powerpc/shared/console/consoleIo.h # console libbsp_a_SOURCES += ../../powerpc/shared/console/uart.c \ ../../powerpc/shared/console/console.c -include_bsp_HEADERS += irq/irq.h - # irq libbsp_a_SOURCES += irq/irq_init.c irq/irq.c @@ -70,5 +58,5 @@ if HAS_NETWORKING libbsp_a_LIBADD += network.rel endif -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/haleakala/headers.am diff --git a/c/src/lib/libbsp/powerpc/haleakala/configure.ac b/c/src/lib/libbsp/powerpc/haleakala/configure.ac index 63111bc435..c6b116f234 100644 --- a/c/src/lib/libbsp/powerpc/haleakala/configure.ac +++ b/c/src/lib/libbsp/powerpc/haleakala/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-haleakala],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/haleakala.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/haleakala/include/bsp.h b/c/src/lib/libbsp/powerpc/haleakala/include/bsp.h deleted file mode 100644 index b26e739e60..0000000000 --- a/c/src/lib/libbsp/powerpc/haleakala/include/bsp.h +++ /dev/null @@ -1,87 +0,0 @@ -/* bsp.h - * - * Generic 405EX bsp.h - * derived from virtex/include/bsp.h - * by Michael Hamel ADInstruments Ltd 2008 - * - * derived from helas403/include/bsp.h: - * Id: bsp.h,v 1.4 2001/06/18 17:01:48 joel Exp - * Author: Thomas Doerfler <td@imd.m.isar.de> - * IMD Ingenieurbuero fuer Microcomputertechnik - * - * COPYRIGHT (c) 1998 by IMD - * - * Changes from IMD are covered by the original distributions terms. - * This file has been derived from the papyrus BSP. - * - * Author: Andrew Bray <andy@i-cubed.co.uk> - * - * COPYRIGHT (c) 1995 by i-cubed ltd. - * - * To anyone who acknowledges that this file is provided "AS IS" - * without any express or implied warranty: - * permission to use, copy, modify, and distribute this file - * for any purpose is hereby granted without fee, provided that - * the above copyright notice and this notice appears in all - * copies, and that the name of i-cubed limited not be used in - * advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. - * i-cubed limited makes no representations about the suitability - * of this software for any purpose. - * - * Derived from c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - * - * - */ - -#ifndef LIBBSP_POWERPC_HALEAKALA_BSP_H -#define LIBBSP_POWERPC_HALEAKALA_BSP_H - -#include <bspopts.h> - -#ifdef ASM - - - /* Definition of where to store registers in alignment handler */ - #define ALIGN_REGS 0x0140 - -#else - - #include <rtems.h> - #include <libcpu/io.h> - #include <bsp/irq.h> - #include <bsp/vectors.h> - #include <bsp/default-initial-extension.h> - - #ifdef __cplusplus - extern "C" { - #endif - - /* Network Defines */ - #define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" - - struct rtems_bsdnet_ifconfig; - int rtems_emac_driver_attach(struct rtems_bsdnet_ifconfig* config, int attaching); - #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_emac_driver_attach - - #define BSP_UART_IOBASE_COM1 0xEF600200 /* PPC405EX */ - #define BSP_UART_IOBASE_COM2 0xEF600300 - - #define BSP_CONSOLE_PORT BSP_UART_COM1 /* console */ - - #define BSP_UART_BAUD_BASE (11059200 / 16) /* Kilauea ext clock, max speed */ - - #ifdef __cplusplus - } - #endif -#endif /* ASM */ - -#endif /* BSP_H */ diff --git a/c/src/lib/libbsp/powerpc/haleakala/include/mmu_405.h b/c/src/lib/libbsp/powerpc/haleakala/include/mmu_405.h deleted file mode 100644 index e11cfa7738..0000000000 --- a/c/src/lib/libbsp/powerpc/haleakala/include/mmu_405.h +++ /dev/null @@ -1,77 +0,0 @@ -#ifndef _mmu_405_h -#define _mmu_405_h - -/* - Simple interface to the PowerPC 405 MMU - - The intention here is just to allow the MMU to be used to define cacheability and - read/write/execute permissions in a simple enough way to fit entirely into the - 64-entry TLB cache. - - This code does not do address relocation and does not generate any MMU-related interrupts. - - The process ID support is there for a possible future extension where RTEMS supports - setting the process ID on task switches, which allows per-process stack protection - - This code will call fatal_error() if your add_space() calls overrun the 64 entries - - Michael Hamel ADInstruments 2008 - -*/ - - -#ifdef __cplusplus -extern "C" { -#endif - -#include "stdint.h" - -enum { - kAllProcessIDs = 0 -}; - -typedef enum MMUAccessType { - executable, - readOnlyData, - readOnlyNoCache, - readWriteData, - readWriteNoCache, - readWriteExecutable -} MMUAccessType; - -/* Initialise and clear the MMU */ -void mmu_initialise(); - -/* Turn on/off data access translation */ -bool mmu_enable_data(bool enable); - -/* Turn on instruction translation */ -bool mmu_enable_code(bool enable); - -/* Define properties for an area of memory (must be 1K-aligned) */ -void mmu_add_space(uint32_t startAddr, uint32_t endAddr, MMUAccessType permissions, uint8_t processID); - -/* Delete a memory property definition */ -void mmu_remove_space(uint32_t startAddr, uint32_t endAddr); - -/* Return number of TLB entries out of total in use */ -int mmu_get_tlb_count(); - -/* Allocate a new process ID and return it */ -uint8_t mmu_new_processID(); - -/* Free a process ID that has been in use */ -void mmu_free_processID(uint8_t freeThis); - -/* Return the current process ID */ -uint8_t mmu_current_processID(); - -/* Change the process ID to ID and return the old value */ -uint8_t mmu_set_processID(uint8_t toID); - - -#ifdef __cplusplus -} -#endif - -#endif //_mmu_405.h
\ No newline at end of file diff --git a/c/src/lib/libbsp/powerpc/haleakala/include/tm27.h b/c/src/lib/libbsp/powerpc/haleakala/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/c/src/lib/libbsp/powerpc/haleakala/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include <rtems/tm27-default.h> diff --git a/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h b/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h deleted file mode 100644 index c413ec3172..0000000000 --- a/c/src/lib/libbsp/powerpc/haleakala/irq/irq.h +++ /dev/null @@ -1,166 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS Haleakala BSP | -| by Michael Hamel ADInstruments Ltd 2008 | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -\*===============================================================*/ - - -#ifndef Haleakala_IRQ_IRQ_H -#define Haleakala_IRQ_IRQ_H - -/* Implemented for us in bsp_irq_dispatch_list */ -#define BSP_SHARED_HANDLER_SUPPORT 1 - -#include <rtems/irq.h> - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - - /* Define UIC interrupt numbers; IRQs that cause an external interrupt that needs further decode. - These are arbitrary but it makes things easier if they match the CPU interrupt numbers */ - - /* - - #define BSP_UIC_UART0_GP (BSP_UIC_IRQ_LOWEST_OFFSET + 0) - #define BSP_UIC_UART1 (BSP_UIC_IRQ_LOWEST_OFFSET + 1) - #define BSP_UIC_IIC0 (BSP_UIC_IRQ_LOWEST_OFFSET + 2) - #define BSP_UIC_ExtMaster (BSP_UIC_IRQ_LOWEST_OFFSET + 3) - #define BSP_UIC_PCI (BSP_UIC_IRQ_LOWEST_OFFSET + 4) - #define BSP_UIC_DMA0 (BSP_UIC_IRQ_LOWEST_OFFSET + 5) - #define BSP_UIC_DMA1 (BSP_UIC_IRQ_LOWEST_OFFSET + 6) - #define BSP_UIC_DMA2 (BSP_UIC_IRQ_LOWEST_OFFSET + 7) - #define BSP_UIC_DMA3 (BSP_UIC_IRQ_LOWEST_OFFSET + 8) - #define BSP_UIC_ENetWU (BSP_UIC_IRQ_LOWEST_OFFSET + 9) - #define BSP_UIC_MALSERR (BSP_UIC_IRQ_LOWEST_OFFSET + 10) - #define BSP_UIC_MALTXEOB (BSP_UIC_IRQ_LOWEST_OFFSET + 11) - #define BSP_UIC_MALRXEOB (BSP_UIC_IRQ_LOWEST_OFFSET + 12) - #define BSP_UIC_MALTXDE (BSP_UIC_IRQ_LOWEST_OFFSET + 13) - #define BSP_UIC_MALRXDE (BSP_UIC_IRQ_LOWEST_OFFSET + 14) - #define BSP_UIC_ENet (BSP_UIC_IRQ_LOWEST_OFFSET + 15) - #define BSP_UIC_PCISERR (BSP_UIC_IRQ_LOWEST_OFFSET + 16) - #define BSP_UIC_ECCERR (BSP_UIC_IRQ_LOWEST_OFFSET + 17) - #define BSP_UIC_PCIPower (BSP_UIC_IRQ_LOWEST_OFFSET + 18) - #define BSP_UIC_IRQ0 (BSP_UIC_IRQ_LOWEST_OFFSET + 25) - #define BSP_UIC_IRQ1 (BSP_UIC_IRQ_LOWEST_OFFSET + 26) - #define BSP_UIC_IRQ2 (BSP_UIC_IRQ_LOWEST_OFFSET + 27) - #define BSP_UIC_IRQ3 (BSP_UIC_IRQ_LOWEST_OFFSET + 28) - #define BSP_UIC_IRQ4 (BSP_UIC_IRQ_LOWEST_OFFSET + 29) - #define BSP_UIC_IRQ5 (BSP_UIC_IRQ_LOWEST_OFFSET + 30) - #define BSP_UIC_IRQ6 (BSP_UIC_IRQ_LOWEST_OFFSET + 31) - - #define BSP_UIC_IRQ_NUMBER (32) - - */ - /* PPC405EX interrupt vectors */ - #define BSP_UIC_UART1 (BSP_UIC_IRQ_LOWEST_OFFSET + 1) - #define BSP_UIC_IIC0 (BSP_UIC_IRQ_LOWEST_OFFSET + 2) - #define BSP_UIC_EIPPKP_READY (BSP_UIC_IRQ_LOWEST_OFFSET + 3) - #define BSP_UIC_EIPPKP_TRNG (BSP_UIC_IRQ_LOWEST_OFFSET + 4) - #define BSP_UIC_EBM (BSP_UIC_IRQ_LOWEST_OFFSET + 5) - #define BSP_UIC_OPBtoPLB (BSP_UIC_IRQ_LOWEST_OFFSET + 6) - #define BSP_UIC_IIC1 (BSP_UIC_IRQ_LOWEST_OFFSET + 7) - #define BSP_UIC_SPI (BSP_UIC_IRQ_LOWEST_OFFSET + 8) - #define BSP_UIC_IRQ0 (BSP_UIC_IRQ_LOWEST_OFFSET + 9) - #define BSP_UIC_MALTXEOB (BSP_UIC_IRQ_LOWEST_OFFSET + 10) - #define BSP_UIC_MALRXEOB (BSP_UIC_IRQ_LOWEST_OFFSET + 11) - #define BSP_UIC_DMA0 (BSP_UIC_IRQ_LOWEST_OFFSET + 12) - #define BSP_UIC_DMA1 (BSP_UIC_IRQ_LOWEST_OFFSET + 13) - #define BSP_UIC_DMA2 (BSP_UIC_IRQ_LOWEST_OFFSET + 14) - #define BSP_UIC_DMA3 (BSP_UIC_IRQ_LOWEST_OFFSET + 15) - #define BSP_UIC_PCIe0AL (BSP_UIC_IRQ_LOWEST_OFFSET + 16) - #define BSP_UIC_PCIe0VPD (BSP_UIC_IRQ_LOWEST_OFFSET + 17) - #define BSP_UIC_PCIe0HRst (BSP_UIC_IRQ_LOWEST_OFFSET + 18) - #define BSP_UIC_EIPPKP_PKA (BSP_UIC_IRQ_LOWEST_OFFSET + 19) - #define BSP_UIC_PCIe0TCR (BSP_UIC_IRQ_LOWEST_OFFSET + 20) - #define BSP_UIC_PCIe0VCO (BSP_UIC_IRQ_LOWEST_OFFSET + 21) - #define BSP_UIC_EIPPKP_TRNG_AL (BSP_UIC_IRQ_LOWEST_OFFSET + 22) - #define BSP_UIC_EIP94 (BSP_UIC_IRQ_LOWEST_OFFSET + 23) - #define BSP_UIC_EMAC0 (BSP_UIC_IRQ_LOWEST_OFFSET + 24) - #define BSP_UIC_EMAC1 (BSP_UIC_IRQ_LOWEST_OFFSET + 25) - #define BSP_UIC_UART0 (BSP_UIC_IRQ_LOWEST_OFFSET + 26) - #define BSP_UIC_IRQ4 (BSP_UIC_IRQ_LOWEST_OFFSET + 27) - #define BSP_UIC_UIC2_STD (BSP_UIC_IRQ_LOWEST_OFFSET + 28) - #define BSP_UIC_UIC2_CRIT (BSP_UIC_IRQ_LOWEST_OFFSET + 29) - #define BSP_UIC_UIC1_STD (BSP_UIC_IRQ_LOWEST_OFFSET + 30) - #define BSP_UIC_UIC1_CRIT (BSP_UIC_IRQ_LOWEST_OFFSET + 31) - - #define BSP_UIC1_IRQ_LOWEST_OFFSET (BSP_UIC_IRQ_LOWEST_OFFSET + 32) - #define BSP_UIC_MALSERR (BSP_UIC1_IRQ_LOWEST_OFFSET + 0) - #define BSP_UIC_MALTXDE (BSP_UIC1_IRQ_LOWEST_OFFSET + 1) - #define BSP_UIC_MALRXDE (BSP_UIC1_IRQ_LOWEST_OFFSET + 2) - #define BSP_UIC_PCIe0DCRErr (BSP_UIC1_IRQ_LOWEST_OFFSET + 3) - #define BSP_UIC_PCIe1DCRErr (BSP_UIC1_IRQ_LOWEST_OFFSET + 4) - #define BSP_UIC_ExtBus (BSP_UIC1_IRQ_LOWEST_OFFSET + 5) - #define BSP_UIC_NDFC (BSP_UIC1_IRQ_LOWEST_OFFSET + 6) - #define BSP_UIC_EIPKP_SLAVE (BSP_UIC1_IRQ_LOWEST_OFFSET + 7) - #define BSP_UIC_GPT_TIMER5 (BSP_UIC1_IRQ_LOWEST_OFFSET + 8) - #define BSP_UIC_GPT_TIMER6 (BSP_UIC1_IRQ_LOWEST_OFFSET + 9) - - #define BSP_UIC_GPT_TIMER0 (BSP_UIC1_IRQ_LOWEST_OFFSET + 16) - #define BSP_UIC_GPT_TIMER1 (BSP_UIC1_IRQ_LOWEST_OFFSET + 17) - #define BSP_UIC_IRQ7 (BSP_UIC1_IRQ_LOWEST_OFFSET + 18) - #define BSP_UIC_IRQ8 (BSP_UIC1_IRQ_LOWEST_OFFSET + 19) - #define BSP_UIC_IRQ9 (BSP_UIC1_IRQ_LOWEST_OFFSET + 20) - #define BSP_UIC_GPT_TIMER2 (BSP_UIC1_IRQ_LOWEST_OFFSET + 21) - #define BSP_UIC_GPT_TIMER3 (BSP_UIC1_IRQ_LOWEST_OFFSET + 22) - #define BSP_UIC_GPT_TIMER4 (BSP_UIC1_IRQ_LOWEST_OFFSET + 23) - #define BSP_UIC_SERIAL_ROM (BSP_UIC1_IRQ_LOWEST_OFFSET + 24) - #define BSP_UIC_GPT_DEC (BSP_UIC1_IRQ_LOWEST_OFFSET + 25) - #define BSP_UIC_IRQ2 (BSP_UIC1_IRQ_LOWEST_OFFSET + 26) - #define BSP_UIC_IRQ5 (BSP_UIC1_IRQ_LOWEST_OFFSET + 27) - #define BSP_UIC_IRQ6 (BSP_UIC1_IRQ_LOWEST_OFFSET + 28) - #define BSP_UIC_EMAC0WU (BSP_UIC1_IRQ_LOWEST_OFFSET + 29) - #define BSP_UIC_IRQ1 (BSP_UIC1_IRQ_LOWEST_OFFSET + 30) - #define BSP_UIC_EMAC1WU (BSP_UIC1_IRQ_LOWEST_OFFSET + 31) - - #define BSP_UIC2_IRQ_LOWEST_OFFSET (BSP_UIC_IRQ_LOWEST_OFFSET + 64) - #define BSP_UIC_PCIe0INTA (BSP_UIC2_IRQ_LOWEST_OFFSET + 0) - #define BSP_UIC_PCIe0INTB (BSP_UIC2_IRQ_LOWEST_OFFSET + 1) - #define BSP_UIC_PCIe0INTC (BSP_UIC2_IRQ_LOWEST_OFFSET + 2) - #define BSP_UIC_PCIe0INTD (BSP_UIC2_IRQ_LOWEST_OFFSET + 3) - #define BSP_UIC_IRQ3 (BSP_UIC2_IRQ_LOWEST_OFFSET + 4) - - #define BSP_UIC_USBOTG (BSP_UIC2_IRQ_LOWEST_OFFSET + 30) - - #define BSP_UIC_IRQ_NUMBER (95) - - - #define BSP_UIC_IRQ_LOWEST_OFFSET 0 - #define BSP_UIC_IRQ_MAX_OFFSET (BSP_UIC_IRQ_LOWEST_OFFSET + BSP_UIC_IRQ_NUMBER - 1) - - #define BSP_UART_COM1_IRQ BSP_UIC_UART0 /* Required by shared/console/uart.c */ - #define BSP_UART_COM2_IRQ BSP_UIC_UART1 - - /* Define processor IRQ numbers; IRQs that are handled by the exception vectors */ - - #define BSP_PIT BSP_PROCESSOR_IRQ_LOWEST_OFFSET /* Required by ppc403/clock.c */ - #define BSP_FIT BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 1 - #define BSP_WDOG BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 2 - - #define BSP_PROCESSOR_IRQ_NUMBER (3) - #define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_UIC_IRQ_MAX_OFFSET + 1) - #define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) - - /* Summary and totals */ - - #define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) - #define BSP_LOWEST_OFFSET (BSP_UIC_IRQ_LOWEST_OFFSET) - #define BSP_MAX_OFFSET (BSP_IRQ_NUMBER - 1) - - extern void BSP_rtems_irq_mng_init(unsigned cpuId); // Implemented in irq_init.c - #include <bsp/irq_supp.h> - - #ifdef __cplusplus - } - #endif -#endif /* ASM */ - -#endif /* Haleakala_IRQ_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/haleakala/preinstall.am b/c/src/lib/libbsp/powerpc/haleakala/preinstall.am deleted file mode 100644 index 81d3386443..0000000000 --- a/c/src/lib/libbsp/powerpc/haleakala/preinstall.am +++ /dev/null @@ -1,79 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/mmu_405.h: include/mmu_405.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mmu_405.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/mmu_405.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_INCLUDE)/bsp/uart.h: ../../powerpc/shared/console/uart.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h - -$(PROJECT_INCLUDE)/bsp/consoleIo.h: ../../powerpc/shared/console/consoleIo.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/consoleIo.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/consoleIo.h - -$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - diff --git a/c/src/lib/libbsp/powerpc/haleakala/bsp_specs b/c/src/lib/libbsp/powerpc/haleakala/startup/bsp_specs index 5752caaca0..5752caaca0 100644 --- a/c/src/lib/libbsp/powerpc/haleakala/bsp_specs +++ b/c/src/lib/libbsp/powerpc/haleakala/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am b/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am index 8196c9d2af..96ec40e15f 100644 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am +++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am @@ -10,20 +10,12 @@ endif include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h noinst_PROGRAMS = -include_HEADERS += ../../powerpc/shared/include/nvram.h EXTRA_DIST += ../../powerpc/shared/start/start.S start.$(OBJEXT): ../../powerpc/shared/start/start.S @@ -40,8 +32,8 @@ vectors_entry.$(OBJEXT): ../../powerpc/shared/start/vectors_entry.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA += vectors_entry.$(OBJEXT) +project_lib_DATA += linkcmds dist_project_lib_DATA += ../shared/startup/linkcmds.share -dist_project_lib_DATA += startup/linkcmds noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -67,9 +59,6 @@ libbsp_a_SOURCES += ../../shared/tod.c ../../powerpc/shared/tod/todcfg.c # pclock libbsp_a_SOURCES += ../../powerpc/shared/clock/p_clock.c -include_bsp_HEADERS = ../../powerpc/shared/console/consoleIo.h -include_bsp_HEADERS += ../../powerpc/shared/console/uart.h - # Needs conditional compilation polledIO_CPPFLAGS = -DSTATIC_LOG_ALLOC noinst_PROGRAMS += polledIO.rel @@ -84,25 +73,20 @@ libbsp_a_SOURCES += ../../powerpc/shared/console/consoleIo.h libbsp_a_SOURCES += ../../powerpc/shared/console/keyboard.h libbsp_a_SOURCES += ../../powerpc/shared/console/uart.h -include_bsp_HEADERS += include/bsp/irq.h - # irq libbsp_a_SOURCES += ../../powerpc/shared/irq/irq_init.c libbsp_a_SOURCES += ../../powerpc/shared/irq/openpic_i8259_irq.c libbsp_a_SOURCES += ../../powerpc/shared/irq/i8259.c -include_bsp_HEADERS += ../../powerpc/shared/motorola/motorola.h # motorola libbsp_a_SOURCES += ../../powerpc/shared/motorola/motorola.h libbsp_a_SOURCES += ../../powerpc/shared/motorola/motorola.c -include_bsp_HEADERS += ../../powerpc/shared/openpic/openpic.h # openpic libbsp_a_SOURCES += ../../powerpc/shared/openpic/openpic.h libbsp_a_SOURCES += ../../powerpc/shared/openpic/openpic.c libbsp_a_SOURCES += ../../powerpc/shared/openpic/openpic.h -include_bsp_HEADERS += ../../powerpc/shared/pci/pci.h # pci libbsp_a_SOURCES += ../../powerpc/shared/pci/pci.c libbsp_a_SOURCES += ../../powerpc/shared/pci/detect_raven_bridge.c @@ -110,20 +94,11 @@ libbsp_a_SOURCES += ../../powerpc/shared/pci/generic_clear_hberrs.c libbsp_a_SOURCES += ../../powerpc/shared/pci/pcifinddevice.c libbsp_a_SOURCES += ../../powerpc/shared/pci/pci.h -include_bsp_HEADERS += ../../powerpc/shared/residual/residual.h \ - ../../powerpc/shared/residual/pnp.h # residual libbsp_a_SOURCES += ../../powerpc/shared/residual/pnp.h libbsp_a_SOURCES += ../../powerpc/shared/residual/residual.h libbsp_a_SOURCES += ../../powerpc/shared/residual/residual.c -include_bsp_HEADERS += ../../shared/vmeUniverse/vmeUniverse.h \ - ../../shared/vmeUniverse/vme_am_defs.h \ - ../../shared/vmeUniverse/VME.h \ - include/bsp/VMEConfig.h \ - ../../shared/vmeUniverse/vmeUniverseDMA.h\ - ../../shared/vmeUniverse/bspVmeDmaList.h\ - ../../shared/vmeUniverse/VMEDMA.h # vme libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeUniverse.c libbsp_a_SOURCES += ../../shared/vmeUniverse/bspVmeDmaList.c @@ -169,6 +144,6 @@ EXTRA_DIST += BOOTING README.mtx603e README.MVME2100 README.MVME2300 \ EXTRA_DIST += README.dec21140 EXTRA_DIST += times.mcp750 times.mvme2307 -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am include $(top_srcdir)/../../../../automake/subdirs.am +include $(srcdir)/../../../../../../bsps/powerpc/motorola_powerpc/headers.am diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/Makefile.am b/c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/Makefile.am index dd832f07f4..97f4925f0e 100644 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/Makefile.am +++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/bootloader/Makefile.am @@ -23,11 +23,11 @@ bootloader_SOURCES = ../../../powerpc/shared/bootloader/head.S \ # ---- # Remove references to EABI when compiling bootloader BOOTLOADER_CPU_CFLAGS=$(subst -msdata=eabi,,$(subst -meabi,,$(CPU_CFLAGS))) -AM_CPPFLAGS = -D__BOOT__ -AM_CFLAGS = $(GCCSPECS) -mrelocatable -msoft-float \ +AM_CPPFLAGS = -D__BOOT__ @RTEMS_CPPFLAGS@ @RTEMS_BSP_CPPFLAGS@ +AM_CFLAGS = -mrelocatable -msoft-float \ -mstrict-align -fno-builtin -Wall -mmultiple -mstring -O2 \ -fomit-frame-pointer -ffixed-r13 -mno-sdata $(BOOTLOADER_CPU_CFLAGS) -AM_CCASFLAGS = $(AM_CPPFLAGS) $(GCCSPECS) \ +AM_CCASFLAGS = $(AM_CPPFLAGS) \ -mrelocatable -DASM $(BOOTLOADER_CPU_CFLAGS) # diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/configure.ac b/c/src/lib/libbsp/powerpc/motorola_powerpc/configure.ac index 2670d0df57..8dd21e4d68 100644 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/configure.ac +++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-motorola_powerpc],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/mcp750.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h deleted file mode 100644 index 675796becf..0000000000 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h +++ /dev/null @@ -1,248 +0,0 @@ -/* - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ -#ifndef LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H -#define LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <libcpu/io.h> -#include <bsp/vectors.h> - -#ifdef qemu -#include <rtems/bspcmdline.h> -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * diagram illustrating the role of the configuration - * constants - * PCI_MEM_WIN0: CPU starting addr where PCI memory space is visible - * PCI_MEM_BASE: CPU address of PCI mem addr. zero. (regardless of this - * address being 'visible' or not!). - * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME - * _VME_A32_WIN0_ON_VME: VME address of that same window - * - * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between - * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI - * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to - * the base address read from PCI config.space in order to translate that - * into a CPU address. - * - * NOTE: VME addresses should NEVER be translated using these constants! - * they are strictly for BSP internal use. Drivers etc. should use - * the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs). - * - * CPU ADDR PCI_ADDR VME ADDR - * - * 00000000 XXXXXXXX XXXXXXXX - * ^ ^ ........ - * | | - * | | e.g., RAM XXXXXXXX - * | | 00000000 - * | | ......... ^ - * | | (possible offset | - * | | between pci and XXXXXXXX | ...... - * | | cpu addresses) | - * | v | - * | PCI_MEM_BASE -------------> 00000000 --------------- | - * | ........ ........ ^ | - * | invisible | | - * | ........ from CPU | | - * v | | - * PCI_MEM_WIN0 ============= first visible PCI addr | | - * | | - * pci devices pci window | | - * visible here v v - * mapped by ========== _VME_A32_WIN0_ON_PCI ======= _VME_A32_WIN0_ON_VME - * vme window - * VME devices hostbridge mapped by - * visible here universe - * ===================================================== - * - */ - -/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */ -#if defined(mvme2100) -#define _IO_BASE CHRP_ISA_IO_BASE -#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE -/* address of our ram on the PCI bus */ -#define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET -/* offset of pci memory as seen from the CPU */ -#define PCI_MEM_BASE 0 -/* where (in CPU addr. space) does the PCI window start */ -#define PCI_MEM_WIN0 0x80000000 - -#else -#define _IO_BASE PREP_ISA_IO_BASE -#define _ISA_MEM_BASE PREP_ISA_MEM_BASE -#ifndef qemu -/* address of our ram on the PCI bus */ -#define PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET -/* offset of pci memory as seen from the CPU */ -#define PCI_MEM_BASE PREP_ISA_MEM_BASE -#define PCI_MEM_WIN0 0 -#else -#define PCI_DRAM_OFFSET 0 -#define PCI_MEM_BASE 0 -#define PCI_MEM_WIN0 PREP_ISA_MEM_BASE -#endif -#endif - - -/* - * Base address definitions for several devices - * - * MVME2100 is very similar but has fewer devices and uses on-CPU EPIC - * implementation of OpenPIC controller. It also cannot be probed to - * find out what it is which is VERY different from other Motorola boards. - */ - -#if defined(mvme2100) -#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000) -/* #define BSP_UART_IOBASE_COM1 (0xffe10000) */ -#define BSP_OPEN_PIC_BASE_OFFSET 0x40000 - -#define MVME_HAS_DEC21140 -#else -#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8) -#define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8) - -#if ! defined(qemu) -#define BSP_KBD_IOBASE ((_IO_BASE)+0x60) -#define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0) -#endif - -#if defined(mvme2300) -#define MVME_HAS_DEC21140 -#endif -#endif - -#define BSP_CONSOLE_PORT BSP_UART_COM1 -#define BSP_UART_BAUD_BASE 115200 - -#if defined(MVME_HAS_DEC21140) -struct rtems_bsdnet_ifconfig; -#define RTEMS_BSP_NETWORK_DRIVER_NAME "dc1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_dec21140_driver_attach -extern int rtems_dec21140_driver_attach(); -#endif - -#ifdef qemu -#define RTEMS_BSP_NETWORK_DRIVER_NAME "ne1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach -extern int rtems_ne_driver_attach(); -#endif - -#ifdef qemu -#define BSP_IDLE_TASK_BODY bsp_ppc_idle_task_body -extern void *bsp_ppc_idle_task_body(uintptr_t arg); -#endif - -#include <bsp/openpic.h> -/* BSP_PIC_DO_EOI is optionally used by the 'vmeUniverse' driver - * to implement VME IRQ priorities in software. - * Note that this requires support by the interrupt controller - * driver (cf. libbsp/shared/powerpc/irq/openpic_i8259_irq.c) - * and the BSP-specific universe initialization/configuration - * (cf. libbsp/shared/powerpc/vme/VMEConfig.h vme_universe.c) - * - * ********* IMPORTANT NOTE ******** - * When deriving from this file (new BSPs) - * DO NOT define "BSP_PIC_DO_EOI" if you don't know what - * you are doing i.e., w/o implementing the required pieces - * mentioned above. - * ********* IMPORTANT NOTE ******** - */ -#define BSP_PIC_DO_EOI openpic_eoi(0) - -#ifndef ASM -#define outport_byte(port,value) outb(value,port) -#define outport_word(port,value) outw(value,port) -#define outport_long(port,value) outl(value,port) - -#define inport_byte(port,value) (value = inb(port)) -#define inport_word(port,value) (value = inw(port)) -#define inport_long(port,value) (value = inl(port)) - -/* - * Vital Board data Start using DATA RESIDUAL - */ - -/* - * Total memory using RESIDUAL DATA - */ -extern unsigned int BSP_mem_size; -/* - * Start of the heap - */ -extern unsigned int BSP_heap_start; -/* - * PCI Bus Frequency - */ -extern unsigned int BSP_bus_frequency; -/* - * processor clock frequency - */ -extern unsigned int BSP_processor_frequency; -/* - * Time base divisior (how many tick for 1 second). - */ -extern unsigned int BSP_time_base_divisor; - -/* - * String passed by the bootloader. - */ -extern char *BSP_commandline_string; - -#define BSP_Convert_decrementer( _value ) \ - ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value))) - -/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */ -extern int BSP_disconnect_clock_handler (void); -extern int BSP_connect_clock_handler (void); - -/* clear hostbridge errors - * - * NOTE: The routine returns always (-1) if 'enableMCP==1' - * [semantics needed by libbspExt] if the MCP input is not wired. - * It returns and clears the error bits of the PCI status register. - * MCP support is disabled because: - * a) the 2100 has no raven chip - * b) the raven (2300) would raise machine check interrupts - * on PCI config space access to empty slots. - */ -extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet); - -/* - * Prototypes for methods called only from .S for dependency tracking - */ -char *save_boot_params( - void *r3, - void *r4, - void *r5, - char *cmdline_start, - char *cmdline_end -); -void zero_bss(void); - -/* - * Prototypes for BSP methods which cross file boundaries - */ -void VIA_isa_bridge_interrupts_setup(void); - -#endif - -#ifdef __cplusplus -}; -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/VMEConfig.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/VMEConfig.h deleted file mode 100644 index 9b355819f1..0000000000 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/VMEConfig.h +++ /dev/null @@ -1,233 +0,0 @@ -#ifndef RTEMS_BSP_VME_CONFIG_H -#define RTEMS_BSP_VME_CONFIG_H - -/* BSP specific address space configuration parameters */ - -/* - * Authorship - * ---------- - * This software was created by - * Till Straumann <strauman@slac.stanford.edu>, 2002, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * This software was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -/* - * The BSP maps VME address ranges into - * one BAT. - * NOTE: the BSP (startup/bspstart.c) uses - * hardcoded window lengths that match this - * layout: - * - * BSP_VME_BAT_IDX defines - * which BAT to use for mapping the VME bus. - * If this is undefined, no extra BAT will be - * configured and VME has to share the available - * PCI address space with PCI devices. - * - * If you do define BSP_VME_BAT_IDX you must - * make sure the corresponding BAT is really - * available and unused! - */ - -#if defined(mvme2100) -#define _VME_A32_WIN0_ON_PCI 0x90000000 -#define _VME_A24_ON_PCI 0x9f000000 -#define _VME_A16_ON_PCI 0x9fff0000 -#define BSP_VME_BAT_IDX 1 -#else -#define _VME_A32_WIN0_ON_PCI 0x10000000 -#define _VME_A24_ON_PCI 0x1f000000 -#define _VME_A16_ON_PCI 0x1fff0000 -#define BSP_VME_BAT_IDX 0 -#endif - -/* start of the A32 window on the VME bus - * TODO: this should perhaps be a run-time configuration option - */ -#define _VME_A32_WIN0_ON_VME 0x20000000 - -/* if _VME_DRAM_OFFSET is defined, the BSP - * will map the board RAM onto the VME bus, starting - * at _VME_DRAM_OFFSET - */ -#define _VME_DRAM_OFFSET 0xc0000000 - -/* Define BSP_PCI_VME_DRIVER_DOES_EOI to let the vmeUniverse - * driver (Tsi148 driver doesn't implement this) implement - * VME IRQ priorities in software. - * - * Here's how this works: - * - * 1) VME IRQ happens - * 2) universe propagates IRQ to PCI/PPC/main interrupt - * controller ('PIC' - programmable interrupt controller). - * 3) PIC driver dispatches universe driver's ISR - * 4) universe driver ISR acknowledges IRQ on VME, - * determines VME vector. - * ++++++++++++ stuff between ++ signs is related to SW priorities +++++++++ - * 5) universe driver *masks* all VME IRQ levels <= interrupting - * level. - * 6) universe driver calls PIC driver's 'EOI' routine. - * This effectively re-enables PCI and hence higher - * level VME interrupts. - * 7) universe driver dispatches user VME ISR. - * - * ++>> HIGHER PRIORITY VME IRQ COULD HAPPEN HERE and would be handled <<++ - * - * 8) user ISR returns, universe driver re-enables lower - * level VME interrupts, returns. - * 9) universe driver ISR returns control to PIC driver - * 10) PIC driver *omits* regular EOI sequence since this - * was already done by universe driver (step 6). - * ++++++++++++ end of special handling (SW priorities) ++++++++++++++++++++ - * 11) PIC driver ISR dispatcher returns. - * - * Note that the BSP *MUST* provide the following hooks - * in order for this to work: - * a) bsp.h must define the symbol BSP_PIC_DO_EOI to - * a sequence of instructions that terminates an - * interrupt at the interrupt controller. - * b) The interrupt controller driver must check the - * interrupt source and *must omit* running the EOI - * sequence if the interrupt source is the vmeUniverse - * (because the universe driver already ran BSP_PIC_DO_EOI) - * The interrupt controller must define the variable - * - * int _BSP_vme_bridge_irq = -1; - * - * which is assigned the universe's interrupt line information - * by vme_universe.c:BSP_VMEIrqMgrInstall(). The interrupt - * controller driver may use this variable to determine - * if an IRQ was caused by the universe. - * - * c) define BSP_PCI_VME_DRIVER_DOES_EOI - * - * NOTE: If a) and b) are not implemented by the BSP - * BSP_PCI_VME_DRIVER_DOES_EOI must be *undefined*. - */ -#define BSP_PCI_VME_DRIVER_DOES_EOI - -#ifdef BSP_PCI_VME_DRIVER_DOES_EOI -/* don't reference vmeUniverse0PciIrqLine directly from the irq - * controller driver - leave it up to BSP_VMEIrqMgrInstall() to - * set _BSP_vme_bridge_irq. That way, we can avoid linking - * the universe driver if VME is unused... - */ -extern int _BSP_vme_bridge_irq; -#endif - -/* If your BSP requires a non-standard way to configure - * the VME interrupt manager then define the symbol - * - * BSP_VME_UNIVERSE_INSTALL_IRQ_MGR - * - * to a proper instruction sequence that installs the - * universe interrupt manager. This requires knowledge - * of the wiring between the universe and the PIC (main - * interrupt controller), i.e., which IRQ 'pins' of the - * universe are wired to which 'lines'/inputs at the PIC. - * (consult vmeUniverse.h for more information). - * - * When installing the universe IRQ manager it is also - * possible to specify whether it should try to share - * PIC interrupts with other sources. This might not - * be supported by all BSPs (but the unverse driver - * recognizes that). - * - * If BSP_VME_UNIVERSE_INSTALL_IRQ_MGR is undefined then - * the default algorithm is used (vme_universe.c): - * - * This default setup uses only a single wire. It reads - * the PIC 'line' from PCI configuration space and assumes - * this to be wired to the first (LIRQ0) IRQ input at the - * universe. The default setup tries to use interrupt - * sharing. - */ - -#include <bsp/motorola.h> -#include <bsp/pci.h> - -#define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err) \ -do { \ -int bus, dev, i = 0, j; \ -const struct _int_map *bspmap; \ - /* install the VME interrupt manager; \ - * if there's a bsp route map, use it to \ - * configure additional lines... \ - */ \ - err = -1; \ - if (0 == pci_find_device(0x10e3, 0x0000, 0, &bus, &dev, &i)){ \ - if ( (bspmap = motorolaIntMap(currentBoard)) ) { \ - for ( i=0; bspmap[i].bus >= 0; i++ ) { \ - if ( bspmap[i].bus == bus && bspmap[i].slot == dev ) { \ - int pins[5], names[4]; \ - /* found it; use info here... */ \ - /* copy up to 4 entries; terminated with -1 pin */ \ - for ( j=0; \ - j<5 && (pins[j]=bspmap[i].pin_route[j].pin-1)>=0; \ - j++) { \ - names[j] = bspmap[i].pin_route[j].int_name[0]; \ - } \ - pins[4] = -1; \ - if ( 0 == vmeUniverseInstallIrqMgrAlt( \ - VMEUNIVERSE_IRQ_MGR_FLAG_SHARED, /* shared IRQs */\ - pins[0], names[0], \ - pins[1], names[1], \ - pins[2], names[2], \ - pins[3], names[3], \ - -1) ) { \ - i = -1; \ - break; \ - } \ - } \ - } \ - } \ - if ( i >= 0 ) \ - err = vmeUniverseInstallIrqMgrAlt( \ - VMEUNIVERSE_IRQ_MGR_FLAG_SHARED, \ - 0,-1, \ - -1); \ - } \ -} while (0) - -extern int BSP_VMEInit(void); -extern int BSP_VMEIrqMgrInstall(void); - -#endif diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/irq.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/irq.h deleted file mode 100644 index 2d575d8122..0000000000 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp/irq.h +++ /dev/null @@ -1,204 +0,0 @@ -/* irq.h - * - * This include file describe the data structure and the functions implemented - * by RTEMS to write interrupt handlers. - * - * Copyright (C) 1999 valette@crf.canon.fr - * - * This code is heavilly inspired by the public specification of STREAM V2 - * that can be found at : - * - * <http://www.chorus.com/Documentation/index.html> by following - * the STREAM API Specification Document link. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef BSP_POWERPC_IRQ_H -#define BSP_POWERPC_IRQ_H - -#define BSP_SHARED_HANDLER_SUPPORT 1 -#include <rtems/irq.h> - -/* - * 8259 edge/level control definitions at VIA - */ -#define ISA8259_M_ELCR 0x4d0 -#define ISA8259_S_ELCR 0x4d1 - -#define ELCRS_INT15_LVL 0x80 -#define ELCRS_INT14_LVL 0x40 -#define ELCRS_INT13_LVL 0x20 -#define ELCRS_INT12_LVL 0x10 -#define ELCRS_INT11_LVL 0x08 -#define ELCRS_INT10_LVL 0x04 -#define ELCRS_INT9_LVL 0x02 -#define ELCRS_INT8_LVL 0x01 -#define ELCRM_INT7_LVL 0x80 -#define ELCRM_INT6_LVL 0x40 -#define ELCRM_INT5_LVL 0x20 -#define ELCRM_INT4_LVL 0x10 -#define ELCRM_INT3_LVL 0x8 -#define ELCRM_INT2_LVL 0x4 -#define ELCRM_INT1_LVL 0x2 -#define ELCRM_INT0_LVL 0x1 - - /* PIC's command and mask registers */ -#define PIC_MASTER_COMMAND_IO_PORT 0x20 /* Master PIC command register */ -#define PIC_SLAVE_COMMAND_IO_PORT 0xa0 /* Slave PIC command register */ -#define PIC_MASTER_IMR_IO_PORT 0x21 /* Master PIC Interrupt Mask Register */ -#define PIC_SLAVE_IMR_IO_PORT 0xa1 /* Slave PIC Interrupt Mask Register */ - - /* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */ -#define PIC_EOSI 0x60 /* End of Specific Interrupt (EOSI) */ -#define SLAVE_PIC_EOSI 0x62 /* End of Specific Interrupt (EOSI) for cascade */ -#define PIC_EOI 0x20 /* Generic End of Interrupt (EOI) */ - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * rtems_irq_number Definitions - */ - -/* - * ISA IRQ handler related definitions - */ -#define BSP_ISA_IRQ_NUMBER (16) -#define BSP_ISA_IRQ_LOWEST_OFFSET (0) -#define BSP_ISA_IRQ_MAX_OFFSET (BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1) -/* - * PCI IRQ handlers related definitions - * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE - */ -#ifndef qemu -#define BSP_PCI_IRQ_NUMBER (16) -#else -#define BSP_PCI_IRQ_NUMBER (0) -#endif -#define BSP_PCI_IRQ_LOWEST_OFFSET (BSP_ISA_IRQ_NUMBER) -#define BSP_PCI_IRQ_MAX_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1) -/* - * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt - * handler might be connected - */ -#define BSP_PROCESSOR_IRQ_NUMBER (1) -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET + 1) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) -/* Misc vectors for OPENPIC irqs (IPI, timers) - */ -#ifndef qemu -#define BSP_MISC_IRQ_NUMBER (8) -#else -#define BSP_MISC_IRQ_NUMBER (0) -#endif - -#define BSP_MISC_IRQ_LOWEST_OFFSET (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) -#define BSP_MISC_IRQ_MAX_OFFSET (BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1) -/* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_MISC_IRQ_MAX_OFFSET + 1) -#define BSP_LOWEST_OFFSET (BSP_ISA_IRQ_LOWEST_OFFSET) -#define BSP_MAX_OFFSET (BSP_MISC_IRQ_MAX_OFFSET) -/* - * Some ISA IRQ symbolic name definition - */ -#define BSP_ISA_PERIODIC_TIMER (0) -#define BSP_ISA_KEYBOARD (1) -#define BSP_ISA_UART_COM2_IRQ (3) -#define BSP_ISA_UART_COM1_IRQ (4) -#define BSP_ISA_RT_TIMER1 (8) -#define BSP_ISA_RT_TIMER3 (10) -/* - * Some PCI IRQ symbolic name definition - */ -#define BSP_PCI_IRQ0 (BSP_PCI_IRQ_LOWEST_OFFSET) -#if BSP_PCI_IRQ_NUMBER > 0 -#define BSP_PCI_ISA_BRIDGE_IRQ (BSP_PCI_IRQ0) -#endif - -#if defined(mvme2100) -#define BSP_DEC21143_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1) -#define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2) -#define BSP_PCMIP_TYPE1_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3) -#define BSP_PCMIP_TYPE2_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 4) -#define BSP_PCMIP_TYPE2_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 5) -#define BSP_PCI_INTA_UNIVERSE_LINT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 7) -#define BSP_PCI_INTB_UNIVERSE_LINT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 8) -#define BSP_PCI_INTC_UNIVERSE_LINT2_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 9) -#define BSP_PCI_INTD_UNIVERSE_LINT3_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 10) -#define BSP_UART_COM1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 13) -#define BSP_FRONT_PANEL_ABORT_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 14) -#define BSP_RTC_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 15) -#else -#define BSP_UART_COM1_IRQ BSP_ISA_UART_COM1_IRQ -#define BSP_UART_COM2_IRQ BSP_ISA_UART_COM2_IRQ -#endif - -/* - * Some Processor execption handled as RTEMS IRQ symbolic name definition - */ -#define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET) - - -/* - * Type definition for RTEMS managed interrupts - */ -typedef unsigned short rtems_i8259_masks; - -extern volatile rtems_i8259_masks i8259s_cache; - -/*-------------------------------------------------------------------------+ -| Function Prototypes. -+--------------------------------------------------------------------------*/ -/* - * ------------------------ Intel 8259 (or emulation) Mngt Routines ------- - */ -void BSP_i8259s_init(void); - -/* - * function to disable a particular irq at 8259 level. After calling - * this function, even if the device asserts the interrupt line it will - * not be propagated further to the processor - * - * RETURNS: 1/0 if the interrupt was enabled/disabled originally or - * a value < 0 on error. - */ -int BSP_irq_disable_at_i8259s (const rtems_irq_number irqLine); -/* - * function to enable a particular irq at 8259 level. After calling - * this function, if the device asserts the interrupt line it will - * be propagated further to the processor - */ -int BSP_irq_enable_at_i8259s (const rtems_irq_number irqLine); -/* - * function to acknowledge a particular irq at 8259 level. After calling - * this function, if a device asserts an enabled interrupt line it will - * be propagated further to the processor. Mainly usefull for people - * writing raw handlers as this is automagically done for RTEMS managed - * handlers. - */ -int BSP_irq_ack_at_i8259s (const rtems_irq_number irqLine); -/* - * function to check if a particular irq is enabled at 8259 level. After calling - */ -int BSP_irq_enabled_at_i8259s (const rtems_irq_number irqLine); - -extern void BSP_rtems_irq_mng_init(unsigned cpuId); -extern void BSP_i8259s_init(void); - -/* Stuff in irq_supp.h should eventually go into <rtems/irq.h> */ -#include <bsp/irq_supp.h> - -#ifdef __cplusplus -}; -#endif - -#endif -#endif diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/tm27.h b/c/src/lib/libbsp/powerpc/motorola_powerpc/include/tm27.h deleted file mode 100644 index 81eb55a54a..0000000000 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/include/tm27.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * @file - * @ingroup powerpc_motorola_powerpc - * @brief Implementations for interrupt mechanisms for Time Test 27 - */ - -/* - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -/* - * Stuff for Time Test 27 - */ - -#include <bsp/irq.h> - -#define MUST_WAIT_FOR_INTERRUPT 1 - -void nullFunc() {} -static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, - 0, - (rtems_irq_enable)nullFunc, - (rtems_irq_disable)nullFunc, - (rtems_irq_is_enabled) nullFunc}; -void Install_tm27_vector(void (*_handler)()) -{ - clockIrqData.hdl = _handler; - if (!BSP_install_rtems_irq_handler (&clockIrqData)) { - printk("Error installing clock interrupt handler!\n"); - rtems_fatal_error_occurred(1); - } -} - -#define Cause_tm27_intr() \ - do { \ - uint32_t _clicks = 8; \ - __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ - } while (0) - -#define Clear_tm27_intr() \ - do { \ - uint32_t _clicks = 0xffffffff; \ - __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ - } while (0) - -#define Lower_tm27_intr() \ - do { \ - uint32_t _msr = 0; \ - _ISR_Set_level( 0 ); \ - __asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ - _msr |= 0x8002; \ - __asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ - } while (0) - -#endif diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/preinstall.am b/c/src/lib/libbsp/powerpc/motorola_powerpc/preinstall.am deleted file mode 100644 index 362a026dd6..0000000000 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/preinstall.am +++ /dev/null @@ -1,143 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_INCLUDE)/nvram.h: ../../powerpc/shared/include/nvram.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/nvram.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/nvram.h - -$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/vectors_entry.$(OBJEXT): vectors_entry.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/vectors_entry.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/vectors_entry.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds.share: ../shared/startup/linkcmds.share $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.share -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.share - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_INCLUDE)/bsp/consoleIo.h: ../../powerpc/shared/console/consoleIo.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/consoleIo.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/consoleIo.h - -$(PROJECT_INCLUDE)/bsp/uart.h: ../../powerpc/shared/console/uart.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h - -$(PROJECT_INCLUDE)/bsp/irq.h: include/bsp/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/motorola.h: ../../powerpc/shared/motorola/motorola.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/motorola.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/motorola.h - -$(PROJECT_INCLUDE)/bsp/openpic.h: ../../powerpc/shared/openpic/openpic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/openpic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/openpic.h - -$(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h - -$(PROJECT_INCLUDE)/bsp/residual.h: ../../powerpc/shared/residual/residual.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/residual.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/residual.h - -$(PROJECT_INCLUDE)/bsp/pnp.h: ../../powerpc/shared/residual/pnp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pnp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pnp.h - -$(PROJECT_INCLUDE)/bsp/vmeUniverse.h: ../../shared/vmeUniverse/vmeUniverse.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverse.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverse.h - -$(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vme_am_defs.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vme_am_defs.h - -$(PROJECT_INCLUDE)/bsp/VME.h: ../../shared/vmeUniverse/VME.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VME.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VME.h - -$(PROJECT_INCLUDE)/bsp/VMEConfig.h: include/bsp/VMEConfig.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEConfig.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEConfig.h - -$(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h: ../../shared/vmeUniverse/vmeUniverseDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h - -$(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h: ../../shared/vmeUniverse/bspVmeDmaList.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h - -$(PROJECT_INCLUDE)/bsp/VMEDMA.h: ../../shared/vmeUniverse/VMEDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEDMA.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEDMA.h - -if QEMU -endif -if QEMU -endif diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/bsp_specs b/c/src/lib/libbsp/powerpc/motorola_powerpc/startup/bsp_specs index 2625609327..2625609327 100644 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/bsp_specs +++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am b/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am index fa8eb58fe8..6cf6acc7e7 100644 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am +++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am @@ -4,11 +4,9 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h noinst_PROGRAMS = @@ -24,47 +22,27 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S project_lib_DATA += rtems_crti.$(OBJEXT) # Link commands -project_lib_DATA += startup/linkcmds -dist_project_lib_DATA += ../shared/startup/linkcmds.base -dist_project_lib_DATA += startup/linkcmds.mpc55xx +project_lib_DATA += linkcmds +dist_project_lib_DATA += ../shared/startup/linkcmds.base dist_project_lib_DATA += startup/linkcmds.gwlcfm dist_project_lib_DATA += startup/linkcmds.mpc5566evb dist_project_lib_DATA += startup/linkcmds.mpc5566evb_spe -dist_project_lib_DATA += startup/linkcmds.mpc5643l_evb +dist_project_lib_DATA += startup/linkcmds.mpc55xx dist_project_lib_DATA += startup/linkcmds.mpc5643l_dpu -dist_project_lib_DATA += startup/linkcmds.mpc5674fevb -dist_project_lib_DATA += startup/linkcmds.mpc5674fevb_spe -dist_project_lib_DATA += startup/linkcmds.phycore_mpc5554 +dist_project_lib_DATA += startup/linkcmds.mpc5643l_evb dist_project_lib_DATA += startup/linkcmds.mpc5668g dist_project_lib_DATA += startup/linkcmds.mpc5674f_ecu508 -dist_project_lib_DATA += startup/linkcmds.mpc5674f_ecu508_boot dist_project_lib_DATA += startup/linkcmds.mpc5674f_ecu508_app +dist_project_lib_DATA += startup/linkcmds.mpc5674f_ecu508_boot +dist_project_lib_DATA += startup/linkcmds.mpc5674fevb +dist_project_lib_DATA += startup/linkcmds.mpc5674fevb_spe dist_project_lib_DATA += startup/linkcmds.mpc5674f_rsm6 dist_project_lib_DATA += startup/linkcmds.mpc5674f_rsm6_base +dist_project_lib_DATA += startup/linkcmds.phycore_mpc5554 noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = -# Includes -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h -include_bsp_HEADERS = -include_bsp_HEADERS += ../../shared/include/irq-generic.h -include_bsp_HEADERS += ../../shared/include/irq-info.h -include_bsp_HEADERS += ../../shared/include/stackalloc.h -include_bsp_HEADERS += ../../shared/include/utility.h -include_bsp_HEADERS += ../shared/include/linker-symbols.h -include_bsp_HEADERS += ../shared/include/start.h -include_bsp_HEADERS += ../shared/include/tictac.h -include_bsp_HEADERS += include/bsp/irq.h -include_bsp_HEADERS += include/mpc55xx-config.h -include_bsp_HEADERS += include/smsc9218i.h -include_bsp_HEADERS += include/console-esci.h -include_bsp_HEADERS += include/console-generic.h -include_bsp_HEADERS += include/console-linflex.h - # startup libbsp_a_SOURCES += ../../shared/bootcard.c libbsp_a_SOURCES += ../../shared/getentropy-cpucounter.c @@ -141,5 +119,5 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \ ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \ ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/timer.rel -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/mpc55xxevb/headers.am diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac b/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac index caa630e609..f32c89e8fb 100644 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac +++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac @@ -11,6 +11,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-mpc55xxevb],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/gwlcfm.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) @@ -220,7 +223,6 @@ RTEMS_BSPOPTS_HELP([MPC55XX_ENABLE_START_PROLOGUE],[if defined, enable start pro AC_CONFIG_FILES([Makefile]) RTEMS_BSP_CLEANUP_OPTIONS -RTEMS_BSP_LINKCMDS RTEMS_PPC_EXCEPTIONS diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h deleted file mode 100644 index eee5d208c1..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp.h +++ /dev/null @@ -1,104 +0,0 @@ -/** - * @file - * - * @ingroup mpc55xx - * - * @brief Global BSP variables and functions - */ - -/* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_MPC55XXEVB_BSP_H -#define LIBBSP_POWERPC_MPC55XXEVB_BSP_H - -#include <bspopts.h> - -#define BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN - -#define BSP_FEATURE_IRQ_EXTENSION - -#define MPC55XX_PERIPHERAL_CLOCK \ - (MPC55XX_SYSTEM_CLOCK / MPC55XX_SYSTEM_CLOCK_DIVIDER) - -#ifndef ASM - -#include <rtems.h> - -#include <libcpu/powerpc-utility.h> - -#include <bsp/tictac.h> -#include <bsp/linker-symbols.h> -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** @brief System clock frequency */ -extern unsigned int bsp_clock_speed; - -/** @brief Time base clicks per micro second */ -extern uint32_t bsp_clicks_per_usec; - -/** @brief Convert Decrementer ticks to microseconds */ -#define BSP_Convert_decrementer( _value ) \ - (((unsigned long long) (_value)) / ((unsigned long long)bsp_clicks_per_usec)) - -rtems_status_code mpc55xx_sd_card_init( bool mount); - -/* Network driver configuration */ - -struct rtems_bsdnet_ifconfig; - -int smsc9218i_attach_detach( - struct rtems_bsdnet_ifconfig *config, - int attaching -); - -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH smsc9218i_attach_detach - -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" - -rtems_status_code bsp_register_i2c(void); - -void bsp_restart(void *addr); - -void *bsp_idle_thread(uintptr_t arg); - -#define BSP_IDLE_TASK_BODY bsp_idle_thread - -LINKER_SYMBOL(bsp_section_dsram_begin) -LINKER_SYMBOL(bsp_section_dsram_end) -LINKER_SYMBOL(bsp_section_dsram_size) -LINKER_SYMBOL(bsp_section_dsram_load_begin) -LINKER_SYMBOL(bsp_section_dsram_load_end) - -#define BSP_DSRAM_SECTION __attribute__((section(".bsp_dsram"))) - -LINKER_SYMBOL(bsp_section_sysram_begin) -LINKER_SYMBOL(bsp_section_sysram_end) -LINKER_SYMBOL(bsp_section_sysram_size) -LINKER_SYMBOL(bsp_section_sysram_load_begin) -LINKER_SYMBOL(bsp_section_sysram_load_end) - -#define BSP_SYSRAM_SECTION __attribute__((section(".bsp_sysram"))) - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_POWERPC_MPC55XXEVB_BSP_H */ diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp/irq.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp/irq.h deleted file mode 100644 index 4efa92219e..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/bsp/irq.h +++ /dev/null @@ -1,499 +0,0 @@ -/** - * @file - * - * @ingroup mpc55xx - * - * @brief IRQ - */ - -/* - * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_IRQ_H -#define LIBBSP_POWERPC_IRQ_H - -#include <rtems/irq-extension.h> -#include <rtems/irq.h> - -#include <bspopts.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/* - * Interrupt numbers - */ - -#define MPC55XX_IRQ_INVALID 0x10000U -#define MPC55XX_IRQ_MIN 0U - -/* Software interrupts */ -#define MPC55XX_IRQ_SOFTWARE_MIN 0U -#define MPC55XX_IRQ_SOFTWARE_MAX 7U -#define MPC55XX_IRQ_SOFTWARE_GET_INDEX(v) (v) -#define MPC55XX_IRQ_SOFTWARE_GET_REQUEST(i) (i) -#define MPC55XX_IRQ_SOFTWARE_NUMBER (MPC55XX_IRQ_SOFTWARE_MAX + 1U) - -#if MPC55XX_CHIP_FAMILY == 551 - #define MPC55XX_IRQ_MAX 293U - - /* eDMA */ - #define MPC55XX_IRQ_EDMA_ERROR(group) \ - ((group) == 0 ? 10U : MPC55XX_IRQ_INVALID) - #define MPC55XX_IRQ_EDMA(ch) \ - ((unsigned) (ch) < 16U ? 11U + (ch) : MPC55XX_IRQ_INVALID) - - /* I2C */ - #define MPC55XX_IRQ_I2C(mod) \ - ((mod) == 0 ? 48U : MPC55XX_IRQ_INVALID) - - /* SIU external interrupts */ - #define MPC55XX_IRQ_SIU_EXTERNAL_0 53U - #define MPC55XX_IRQ_SIU_EXTERNAL_1 54U - #define MPC55XX_IRQ_SIU_EXTERNAL_2 55U - #define MPC55XX_IRQ_SIU_EXTERNAL_3 56U - #define MPC55XX_IRQ_SIU_EXTERNAL_4_15 57U - - /* PIT */ - #define MPC55XX_IRQ_RTI 148U - #define MPC55XX_IRQ_PIT(timer) (148U + (timer)) - - /* eTPU */ - #define MPC55XX_IRQ_ETPU_BASE(mod) MPC55XX_IRQ_INVALID - - /* DSPI */ - #define MPC55XX_IRQ_DSPI_BASE(mod) \ - ((mod) == 0 ? 117U : \ - ((mod) == 1 ? 122U : \ - ((mod) == 2 ? 274U : \ - ((mod) == 3 ? 279U : MPC55XX_IRQ_INVALID)))) - - /* eMIOS */ - #define MPC55XX_IRQ_EMIOS(ch) \ - ((unsigned) (ch) < 24U ? 58U + (ch) : MPC55XX_IRQ_INVALID) - - /* eQADC */ - #define MPC55XX_IRQ_EQADC_BASE(mod) \ - ((mod) == 0 ? 82U : MPC55XX_IRQ_INVALID) - - /* eSCI */ - #define MPC55XX_IRQ_ESCI(mod) \ - ((mod) == 0 ? 113U : \ - ((mod) == 1 ? 114U : \ - ((mod) == 2 ? 115U : \ - ((mod) == 3 ? 116U : \ - ((mod) == 4 ? 270U : \ - ((mod) == 5 ? 271U : \ - ((mod) == 6 ? 272U : \ - ((mod) == 7 ? 273U : MPC55XX_IRQ_INVALID)))))))) - - /* FlexCAN */ - #define MPC55XX_IRQ_CAN_BASE(mod) \ - ((mod) == 0 ? 127U : \ - ((mod) == 1 ? 157U : \ - ((mod) == 2 ? 178U : \ - ((mod) == 3 ? 199U : \ - ((mod) == 4 ? 220U : \ - ((mod) == 5 ? 241U : MPC55XX_IRQ_INVALID)))))) - - /* FlexRay */ - #define MPC55XX_IRQ_FLEXRAY_BASE(mod) \ - ((mod) == 0 ? 284U : MPC55XX_IRQ_INVALID) -#elif MPC55XX_CHIP_FAMILY == 564 - #define MPC55XX_IRQ_MAX 255U - - /* eDMA */ - #define MPC55XX_IRQ_EDMA_ERROR(group) \ - ((group) == 0 ? 10U : MPC55XX_IRQ_INVALID) - #define MPC55XX_IRQ_EDMA(ch) \ - ((unsigned) (ch) < 16U ? 11U + (ch) : MPC55XX_IRQ_INVALID) - - /* SWT */ - #define MPC55XX_IRQ_SWT_0 28U - #define MPC55XX_IRQ_SWT_1 29U - - /* STM */ - #define MPC55XX_IRQ_STM_CHANNEL(ch) ((ch) + 30U) - - /* ECSM */ - #define MPC55XX_IRQ_ECSM_FAS 9U - #define MPC55XX_IRQ_ECSM_NCE 35U - #define MPC55XX_IRQ_ECSM_COR 36U - - /* MC */ - #define MPC55XX_IRQ_MC_ME_SAFE_MODE 51U - #define MPC55XX_IRQ_MC_ME_MODE_TRANSITION 52U - #define MPC55XX_IRQ_MC_ME_INVALID_MODE 53U - #define MPC55XX_IRQ_MC_ME_INVALID_CONFIG 54U - #define MPC55XX_IRQ_MC_RGM_FRAE 56U - - /* XOSC */ - #define MPC55XX_IRQ_XOSC 57U - - /* PIT */ - #define MPC55XX_IRQ_PIT_CHANNEL(ch) \ - ((ch) == 3 ? 127U : ((ch) + 59U)) - - /* SIU external interrupts */ - #define MPC55XX_IRQ_SIU_EXTERNAL_0 41U - #define MPC55XX_IRQ_SIU_EXTERNAL_1 42U - #define MPC55XX_IRQ_SIU_EXTERNAL_2 43U - #define MPC55XX_IRQ_SIU_EXTERNAL_3 44U - - /* ADC */ - #define MPC55XX_IRQ_ADC_BASE(mod) \ - ((mod) == 0 ? 62U : \ - ((mod) == 1 ? 82U : MPC55XX_IRQ_INVALID)) - - /* DSPI */ - #define MPC55XX_IRQ_DSPI_BASE(mod) \ - ((mod) == 0 ? 74U : \ - ((mod) == 1 ? 94U : \ - ((mod) == 2 ? 114U : MPC55XX_IRQ_INVALID))) - - /* FlexCAN */ - #define MPC55XX_IRQ_CAN_BASE(mod) \ - ((mod) == 0 ? 65U : \ - ((mod) == 1 ? 85U : MPC55XX_IRQ_INVALID)) - - /* FlexPWM */ - #define MPC55XX_IRQ_FLEXPWM_BASE(mod) \ - ((mod) == 0 ? 179U : \ - ((mod) == 1 ? 233U : MPC55XX_IRQ_INVALID)) - - /* FlexRay */ - #define MPC55XX_IRQ_FLEXRAY_BASE(mod) \ - ((mod) == 0 ? 131U : MPC55XX_IRQ_INVALID) - - /* LINFlexD */ - #define MPC55XX_IRQ_LINFLEX_BASE(mod) \ - ((mod) == 0 ? 79U : \ - ((mod) == 1 ? 99U : MPC55XX_IRQ_INVALID)) - - /* eTimer */ - #define MPC55XX_IRQ_ETIMER_BASE(mod) \ - ((mod) == 0 ? 157U : \ - ((mod) == 1 ? 168U : \ - ((mod) == 2 ? 222U : MPC55XX_IRQ_INVALID))) - - /* CTU */ - #define MPC55XX_IRQ_CTU_MRS 193U - #define MPC55XX_IRQ_CTU_T(idx) ((idx) + 194U) - #define MPC55XX_IRQ_CTU_FIFO(idx) ((idx) + 202U) - #define MPC55XX_IRQ_CTU_ADC 206U - #define MPC55XX_IRQ_CTU_ERR 207U - - /* SEMA */ - #define MPC55XX_IRQ_SEMA_0 247U - #define MPC55XX_IRQ_SEMA_1 248U - - /* FCCU */ - #define MPC55XX_IRQ_FCCU_ALRM 250U - #define MPC55XX_IRQ_FCCU_CFG_TO 251U - #define MPC55XX_IRQ_FCCU_SC_RCC0_F 252U - #define MPC55XX_IRQ_FCCU_SC_RCC1_F 253U - - /* PMU */ - #define MPC55XX_IRQ_PMU 254U - - /* SWG */ - #define MPC55XX_IRQ_SWG 255U -#elif MPC55XX_CHIP_FAMILY == 566 - #define MPC55XX_IRQ_MAX 315U - - /* eDMA */ - #define MPC55XX_IRQ_EDMA_ERROR(group) \ - ((group) == 0 ? 10U : MPC55XX_IRQ_INVALID) - #define MPC55XX_IRQ_EDMA(ch) \ - ((unsigned) (ch) < 32U ? 11U + (ch) : MPC55XX_IRQ_INVALID) - - /* PIT */ - #define MPC55XX_IRQ_PIT_CHANNEL(ch) \ - ((unsigned) (ch) < 9U ? 148U + (ch) : MPC55XX_IRQ_INVALID) - - /* SIU external interrupts */ - #define MPC55XX_IRQ_SIU_EXTERNAL_0 53U - #define MPC55XX_IRQ_SIU_EXTERNAL_1 54U - #define MPC55XX_IRQ_SIU_EXTERNAL_2 55U - #define MPC55XX_IRQ_SIU_EXTERNAL_3 56U - - /* eMIOS */ - #define MPC55XX_IRQ_EMIOS(ch) \ - ((unsigned) (ch) < 24U ? 58U + (ch) : \ - ((unsigned) (ch) < 32U ? 262U + (ch) : MPC55XX_IRQ_INVALID)) - - /* eSCI */ - #define MPC55XX_IRQ_ESCI(mod) \ - ((unsigned) (mod) < 4U ? 113U + (mod) : \ - ((unsigned) (mod) < 8U ? 270U + (mod) : \ - ((unsigned) (mod) < 12U ? 306U + (mod) : MPC55XX_IRQ_INVALID))) -#else - #if MPC55XX_CHIP_FAMILY == 555 - #define MPC55XX_IRQ_MAX 307U - #elif MPC55XX_CHIP_FAMILY == 556 - #define MPC55XX_IRQ_MAX 360U - #elif MPC55XX_CHIP_FAMILY == 567 - #define MPC55XX_IRQ_MAX 479U - #else - #error "unsupported chip type" - #endif - - /* eDMA */ - #define MPC55XX_IRQ_EDMA_ERROR(group) \ - ((group) == 0 ? 10U : \ - ((group) == 1 ? 210U : \ - ((group) == 2 ? 425U : MPC55XX_IRQ_INVALID))) - #define MPC55XX_IRQ_EDMA(ch) \ - ((unsigned) (ch) < 32U ? 11U + (ch) : \ - ((unsigned) (ch) < 64U ? 179U + (ch) : \ - ((unsigned) (ch) < 96U ? 362U + (ch) : MPC55XX_IRQ_INVALID))) - - /* I2C */ - #define MPC55XX_IRQ_I2C(mod) MPC55XX_IRQ_INVALID - - /* SIU external interrupts */ - #define MPC55XX_IRQ_SIU_EXTERNAL_0 46U - #define MPC55XX_IRQ_SIU_EXTERNAL_1 47U - #define MPC55XX_IRQ_SIU_EXTERNAL_2 48U - #define MPC55XX_IRQ_SIU_EXTERNAL_3 49U - #define MPC55XX_IRQ_SIU_EXTERNAL_4_15 50U - - /* PIT */ - #define MPC55XX_IRQ_RTI 305U - #define MPC55XX_IRQ_PIT(ch) (301U + (ch)) - - /* eTPU */ - #define MPC55XX_IRQ_ETPU_BASE(mod) \ - ((mod) == 0 ? 67U : \ - ((mod) == 1 ? 243U : MPC55XX_IRQ_INVALID)) - - /* DSPI */ - #define MPC55XX_IRQ_DSPI_BASE(mod) \ - ((mod) == 0 ? 275U : \ - ((mod) == 1 ? 131U : \ - ((mod) == 2 ? 136U : \ - ((mod) == 3 ? 141U : MPC55XX_IRQ_INVALID)))) - - /* eMIOS */ - #define MPC55XX_IRQ_EMIOS(ch) \ - ((unsigned) (ch) < 16U ? 51U + (ch) : \ - ((unsigned) (ch) < 24U ? 186U + (ch) : \ - ((unsigned) (ch) < 32U ? 435U + (ch) : MPC55XX_IRQ_INVALID))) - - /* eQADC */ - #define MPC55XX_IRQ_EQADC_BASE(mod) \ - ((mod) == 0 ? 100U : \ - ((mod) == 1 ? 394U : MPC55XX_IRQ_INVALID)) - - /* eSCI */ - #define MPC55XX_IRQ_ESCI(mod) \ - ((mod) == 0 ? 146U : \ - ((mod) == 1 ? 149U : \ - ((mod) == 2 ? 473U : MPC55XX_IRQ_INVALID))) - - /* FlexCAN */ - #define MPC55XX_IRQ_CAN_BASE(mod) \ - ((mod) == 0 ? 152U : \ - ((mod) == 1 ? 280U : \ - ((mod) == 2 ? 173U : \ - ((mod) == 3 ? 308U : \ - ((mod) == 4 ? 329U : MPC55XX_IRQ_INVALID))))) - - /* FlexRay */ - #define MPC55XX_IRQ_FLEXRAY_BASE(mod) \ - ((mod) == 0 ? 350U : MPC55XX_IRQ_INVALID) -#endif - -#define MPC55XX_IRQ_NUMBER (MPC55XX_IRQ_MAX + 1U) - -/* ADC */ -#define MPC55XX_IRQ_ADC_EOC(mod) \ - (MPC55XX_IRQ_ADC_BASE(mod) + 0U) -#define MPC55XX_IRQ_ADC_ER(mod) \ - (MPC55XX_IRQ_ADC_BASE(mod) + 1U) -#define MPC55XX_IRQ_ADC_WD(mod) \ - (MPC55XX_IRQ_ADC_BASE(mod) + 2U) - -/* eTimer */ -#define MPC55XX_IRQ_ETIMER_TC(mod, ch) \ - (MPC55XX_IRQ_ETIMER_BASE(mod) + (ch)) -#define MPC55XX_IRQ_ETIMER_WTIF(mod) \ - (MPC55XX_IRQ_ETIMER_BASE(mod) + 8U) -#define MPC55XX_IRQ_ETIMER_RCF(mod) \ - (MPC55XX_IRQ_ETIMER_BASE(mod) + 10U) - -/* eTPU */ -#define MPC55XX_IRQ_ETPU(mod) \ - (MPC55XX_IRQ_ETPU_BASE(mod) + 0U) -#define MPC55XX_IRQ_ETPU_CHANNEL(mod, ch) \ - (MPC55XX_IRQ_ETPU_BASE(mod) + 1U + (ch)) - -/* DSPI */ -#define MPC55XX_IRQ_DSPI_TFUF_RFOF(mod) (MPC55XX_IRQ_DSPI_BASE(mod) + 0U) -#define MPC55XX_IRQ_DSPI_EOQF(mod) (MPC55XX_IRQ_DSPI_BASE(mod) + 1U) -#define MPC55XX_IRQ_DSPI_TFFF(mod) (MPC55XX_IRQ_DSPI_BASE(mod) + 2U) -#define MPC55XX_IRQ_DSPI_TCF(mod) (MPC55XX_IRQ_DSPI_BASE(mod) + 3U) -#define MPC55XX_IRQ_DSPI_RFDF(mod) (MPC55XX_IRQ_DSPI_BASE(mod) + 4U) - -/* eQADC */ -#define MPC55XX_IRQ_EQADC_TORF_RFOF_CFUF(mod) \ - (MPC55XX_IRQ_EQADC_BASE(mod) + 0U) -#define MPC55XX_IRQ_EQADC_NCF(mod, fifo) \ - (MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 0U) -#define MPC55XX_IRQ_EQADC_PF(mod, fifo) \ - (MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 1U) -#define MPC55XX_IRQ_EQADC_EOQF(mod, fifo) \ - (MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 2U) -#define MPC55XX_IRQ_EQADC_CFFF(mod, fifo) \ - (MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 3U) -#define MPC55XX_IRQ_EQADC_RFDF(mod, fifo) \ - (MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 4U) - -/* FlexCAN */ -#if MPC55XX_CHIP_FAMILY == 564 - #define MPC55XX_IRQ_CAN_ERR(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 0U) - #define MPC55XX_IRQ_CAN_BOFF_TWRN_RWRN(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 1U) - #define MPC55XX_IRQ_CAN_BUF_0_3(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 3U) - #define MPC55XX_IRQ_CAN_BUF_4_7(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 4U) - #define MPC55XX_IRQ_CAN_BUF_8_11(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 5U) - #define MPC55XX_IRQ_CAN_BUF_12_15(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 6U) - #define MPC55XX_IRQ_CAN_BUF_16_31(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 7U) -#else - #define MPC55XX_IRQ_CAN_BOFF_TWRN_RWRN(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 0U) - #define MPC55XX_IRQ_CAN_ERR(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 1U) - #define MPC55XX_IRQ_CAN_BUF_0(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 3U) - #define MPC55XX_IRQ_CAN_BUF_1(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 4U) - #define MPC55XX_IRQ_CAN_BUF_2(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 5U) - #define MPC55XX_IRQ_CAN_BUF_3(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 6U) - #define MPC55XX_IRQ_CAN_BUF_4(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 7U) - #define MPC55XX_IRQ_CAN_BUF_5(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 8U) - #define MPC55XX_IRQ_CAN_BUF_6(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 9U) - #define MPC55XX_IRQ_CAN_BUF_7(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 10U) - #define MPC55XX_IRQ_CAN_BUF_8(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 12U) - #define MPC55XX_IRQ_CAN_BUF_9(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 12U) - #define MPC55XX_IRQ_CAN_BUF_10(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 13U) - #define MPC55XX_IRQ_CAN_BUF_11(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 14U) - #define MPC55XX_IRQ_CAN_BUF_12(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 15U) - #define MPC55XX_IRQ_CAN_BUF_13(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 16U) - #define MPC55XX_IRQ_CAN_BUF_14(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 17U) - #define MPC55XX_IRQ_CAN_BUF_15(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 18U) - #define MPC55XX_IRQ_CAN_BUF_16_31(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 19U) - #define MPC55XX_IRQ_CAN_BUF_32_63(mod) (MPC55XX_IRQ_CAN_BASE(mod) + 20U) -#endif - -/* FlexPWM */ -#define MPC55XX_IRQ_FLEXPWM_RF(mod, ch) (MPC55XX_IRQ_FLEXPWM_BASE(mod) + 3U * (ch) + 0U) -#define MPC55XX_IRQ_FLEXPWM_COF(mod, ch) (MPC55XX_IRQ_FLEXPWM_BASE(mod) + 3U * (ch) + 1U) -#define MPC55XX_IRQ_FLEXPWM_CAF(mod, ch) (MPC55XX_IRQ_FLEXPWM_BASE(mod) + 3U * (ch) + 2U) -#define MPC55XX_IRQ_FLEXPWM_FFLAG(mod) (MPC55XX_IRQ_FLEXPWM_BASE(mod) + 12U) -#define MPC55XX_IRQ_FLEXPWM_REF(mod) (MPC55XX_IRQ_FLEXPWM_BASE(mod) + 13U) - -/* FlexRay */ -#if MPC55XX_CHIP_FAMILY == 564 - #define MPC55XX_IRQ_FLEXRAY_LRNEIF_DRNEIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 0U) - #define MPC55XX_IRQ_FLEXRAY_LRCEIF_DRCEIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 1U) - #define MPC55XX_IRQ_FLEXRAY_FAFAIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 2U) - #define MPC55XX_IRQ_FLEXRAY_FAFVIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 3U) - #define MPC55XX_IRQ_FLEXRAY_WUPIEF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 4U) - #define MPC55XX_IRQ_FLEXRAY_PRIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 5U) - #define MPC55XX_IRQ_FLEXRAY_CHIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 6U) - #define MPC55XX_IRQ_FLEXRAY_TBIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 7U) - #define MPC55XX_IRQ_FLEXRAY_RBIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 8U) - #define MPC55XX_IRQ_FLEXRAY_MIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 9U) -#else - #define MPC55XX_IRQ_FLEXRAY_MIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 0U) - #define MPC55XX_IRQ_FLEXRAY_PRIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 1U) - #define MPC55XX_IRQ_FLEXRAY_CHIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 2U) - #define MPC55XX_IRQ_FLEXRAY_WUP_IF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 3U) - #define MPC55XX_IRQ_FLEXRAY_FBNE_F(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 4U) - #define MPC55XX_IRQ_FLEXRAY_FANE_F(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 5U) - #define MPC55XX_IRQ_FLEXRAY_RBIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 6U) - #define MPC55XX_IRQ_FLEXRAY_TBIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 7U) -#endif - -/* LINFlexD */ -#define MPC55XX_IRQ_LINFLEX_RXI(mod) (MPC55XX_IRQ_LINFLEX_BASE(mod) + 0U) -#define MPC55XX_IRQ_LINFLEX_TXI(mod) (MPC55XX_IRQ_LINFLEX_BASE(mod) + 1U) -#define MPC55XX_IRQ_LINFLEX_ERR(mod) (MPC55XX_IRQ_LINFLEX_BASE(mod) + 2U) - -/* Checks */ -#define MPC55XX_IRQ_IS_VALID(v) \ - ((v) >= MPC55XX_IRQ_MIN && \ - (v) <= MPC55XX_IRQ_MAX) -#define MPC55XX_IRQ_IS_SOFTWARE(v) \ - ((v) >= MPC55XX_IRQ_SOFTWARE_MIN && \ - (v) <= MPC55XX_IRQ_SOFTWARE_MAX) - -/* - * Interrupt controller - */ - -#define MPC55XX_INTC_MIN_PRIORITY 1U -#define MPC55XX_INTC_MAX_PRIORITY 15U -#define MPC55XX_INTC_DISABLED_PRIORITY 0U -#define MPC55XX_INTC_INVALID_PRIORITY (MPC55XX_INTC_MAX_PRIORITY + 1) -#define MPC55XX_INTC_DEFAULT_PRIORITY (MPC55XX_INTC_MIN_PRIORITY + 1) -#define MPC55XX_INTC_IS_VALID_PRIORITY(p) \ - ((p) >= MPC55XX_INTC_DISABLED_PRIORITY && (p) <= MPC55XX_INTC_MAX_PRIORITY) - -rtems_status_code mpc55xx_interrupt_handler_install( - rtems_vector_number vector, - const char *info, - rtems_option options, - unsigned priority, - rtems_interrupt_handler handler, - void *arg -); - -rtems_status_code mpc55xx_intc_get_priority( - rtems_vector_number vector, - unsigned *priority -); - -rtems_status_code mpc55xx_intc_set_priority( - rtems_vector_number vector, - unsigned priority -); - -rtems_status_code mpc55xx_intc_raise_software_irq(rtems_vector_number vector); - -rtems_status_code mpc55xx_intc_clear_software_irq(rtems_vector_number vector); - -/** - * @addtogroup bsp_interrupt - * - * @{ - */ - -#define BSP_INTERRUPT_VECTOR_MIN MPC55XX_IRQ_MIN - -#define BSP_INTERRUPT_VECTOR_MAX MPC55XX_IRQ_MAX - -#ifdef BSP_INTERRUPT_HANDLER_TABLE_SIZE - #define BSP_INTERRUPT_USE_INDEX_TABLE - #define BSP_INTERRUPT_NO_HEAP_USAGE -#endif - -/** @} */ - -/* Legacy API */ -#define MPC55XX_IRQ_EDMA_GET_REQUEST(ch) MPC55XX_IRQ_EDMA(ch) -#define MPC55XX_IRQ_EMIOS_GET_REQUEST(ch) MPC55XX_IRQ_EMIOS(ch) - -#ifdef __cplusplus -}; -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/console-esci.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/console-esci.h deleted file mode 100644 index 4be6788141..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/console-esci.h +++ /dev/null @@ -1,57 +0,0 @@ -/** - * @file - * - * @brief Console ESCI API. - */ - -/* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_MPC55XXEVB_CONSOLE_ESCI_H -#define LIBBSP_POWERPC_MPC55XXEVB_CONSOLE_ESCI_H - -#include "console-generic.h" - -#undef CR0 -#undef CR1 -#undef CR2 -#undef CR3 - -#include <mpc55xx/regs.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#ifdef MPC55XX_HAS_ESCI - -extern const console_generic_callbacks mpc55xx_esci_callbacks; - -typedef struct { - volatile struct ESCI_tag *regs; - struct rtems_termios_tty *tty; - int transmit_nest_level; - bool transmit_in_progress; - rtems_vector_number irq; -} mpc55xx_esci_context; - -extern mpc55xx_esci_context mpc55xx_esci_devices []; - -#endif - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_MPC55XXEVB_CONSOLE_ESCI_H */ diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/console-generic.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/console-generic.h deleted file mode 100644 index c3f7a4628f..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/console-generic.h +++ /dev/null @@ -1,81 +0,0 @@ -/** - * @file - * - * @brief Generic console driver API. - */ - -/* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_SHARED_CONSOLE_GENERIC_H -#define LIBBSP_SHARED_CONSOLE_GENERIC_H - -#include <rtems/libio.h> -#include <rtems/termiostypes.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -typedef struct { - rtems_termios_callbacks termios_callbacks; - int (*poll_read)(int minor); - void (*poll_write)(int minor, char c); -} console_generic_callbacks; - -typedef struct { - void *context; - const console_generic_callbacks *callbacks; - const char *device_path; -} console_generic_info; - -extern const console_generic_info console_generic_info_table []; - -extern const size_t console_generic_info_count; - -extern const rtems_device_minor_number console_generic_minor; - -#define CONSOLE_GENERIC_INFO_TABLE \ - const console_generic_info console_generic_info_table [] - -#define CONSOLE_GENERIC_INFO(context, callbacks, device_path) \ - { context, callbacks, device_path } - -#define CONSOLE_GENERIC_INFO_COUNT \ - const size_t console_generic_info_count = \ - sizeof(console_generic_info_table) / sizeof(console_generic_info_table [0]) - -#define CONSOLE_GENERIC_MINOR(minor) \ - const rtems_device_minor_number console_generic_minor = (minor) - -static inline void *console_generic_get_context(int minor) -{ - return console_generic_info_table [minor].context; -} - -static inline struct rtems_termios_tty *console_generic_get_tty_at_open( - void *arg -) -{ - const rtems_libio_open_close_args_t *oc = - (const rtems_libio_open_close_args_t *) arg; - - return (struct rtems_termios_tty *) oc->iop->data1; -} - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_SHARED_CONSOLE_GENERIC_H */ diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/console-linflex.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/console-linflex.h deleted file mode 100644 index c70f36d13b..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/console-linflex.h +++ /dev/null @@ -1,64 +0,0 @@ -/** - * @file - * - * @brief Console LINFlexD API. - */ - -/* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_MPC55XXEVB_CONSOLE_LINFLEX_H -#define LIBBSP_POWERPC_MPC55XXEVB_CONSOLE_LINFLEX_H - -#include "console-generic.h" - -#undef CR0 -#undef CR1 -#undef CR2 -#undef CR3 - -#include <mpc55xx/regs.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#ifdef MPC55XX_HAS_LINFLEX - -extern const console_generic_callbacks mpc55xx_linflex_callbacks; - -typedef struct { - volatile LINFLEX_tag *regs; - struct rtems_termios_tty *tty; - rtems_vector_number irq_rxi; - rtems_vector_number irq_txi; - rtems_vector_number irq_err; - volatile SIU_PCR_tag *tx_pcr_register; - uint8_t tx_pa_value:2; - volatile SIU_PCR_tag *rx_pcr_register; - volatile SIUL_PSMI_8B_tag *rx_psmi_register; - uint8_t rx_padsel_value:4; - int transmit_nest_level; - bool transmit_in_progress; -} mpc55xx_linflex_context; - -extern mpc55xx_linflex_context mpc55xx_linflex_devices []; - -#endif - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_MPC55XXEVB_CONSOLE_LINFLEX_H */ diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/mpc55xx-config.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/mpc55xx-config.h deleted file mode 100644 index b432b9cecd..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/mpc55xx-config.h +++ /dev/null @@ -1,170 +0,0 @@ -/** - * @file - * - * @ingroup mpc55xx - * - * @brief Low-level configuration. - */ - -/* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_MPC55XXEVB_MPC55XX_CONFIG_H -#define LIBBSP_POWERPC_MPC55XXEVB_MPC55XX_CONFIG_H - -#include <stddef.h> - -#include <libcpu/powerpc-utility.h> - -#include <bsp/start.h> - -#include <mpc55xx/regs.h> -#include <mpc55xx/regs-mmu.h> -#include <mpc55xx/siu.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -typedef struct { - uint32_t index : 10; - uint32_t count : 10; - uint32_t output : 1; - union SIU_PCR_tag pcr; -} mpc55xx_siu_pcr_config; - -extern BSP_START_DATA_SECTION const mpc55xx_siu_pcr_config - mpc55xx_start_config_siu_pcr []; - -extern BSP_START_DATA_SECTION const size_t - mpc55xx_start_config_siu_pcr_count []; - -extern BSP_START_DATA_SECTION const struct - MMU_tag mpc55xx_start_config_mmu_early []; - -extern BSP_START_DATA_SECTION const size_t - mpc55xx_start_config_mmu_early_count []; - -extern BSP_START_DATA_SECTION const struct - MMU_tag mpc55xx_start_config_mmu []; - -extern BSP_START_DATA_SECTION const size_t - mpc55xx_start_config_mmu_count []; - -#ifdef MPC55XX_HAS_FMPLL - typedef struct { - union FMPLL_SYNCR_tag syncr_tmp; - union FMPLL_SYNCR_tag syncr_final; - } mpc55xx_clock_config; -#endif - -#ifdef MPC55XX_HAS_FMPLL_ENHANCED - typedef struct { - union FMPLL_ESYNCR2_tag esyncr2_tmp; - union FMPLL_ESYNCR2_tag esyncr2_final; - union FMPLL_ESYNCR1_tag esyncr1_final; - } mpc55xx_clock_config; -#endif - -#ifdef MPC55XX_HAS_MODE_CONTROL - typedef struct { - struct { - PLLD_CR_32B_tag cr; - PLLD_MR_32B_tag mr; - } fmpll [2]; - CGM_OC_EN_32B_tag oc_en; - CGM_OCDS_SC_32B_tag ocds_sc; - CGM_SC_DC0_3_32B_tag sc_dc0_3; - CGM_AUXCLK_tag auxclk [5]; - } mpc55xx_clock_config; -#endif - -extern BSP_START_DATA_SECTION const mpc55xx_clock_config - mpc55xx_start_config_clock []; - -#ifdef MPC55XX_HAS_EBI - typedef struct { - union EBI_MCR_tag ebi_mcr; - uint32_t siu_eccr_ebdf; - } mpc55xx_ebi_config; - - extern BSP_START_DATA_SECTION const mpc55xx_ebi_config - mpc55xx_start_config_ebi []; - - extern BSP_START_DATA_SECTION const size_t - mpc55xx_start_config_ebi_count []; - - extern BSP_START_DATA_SECTION const struct EBI_CS_tag - mpc55xx_start_config_ebi_cs []; - - extern BSP_START_DATA_SECTION const size_t - mpc55xx_start_config_ebi_cs_count []; - - extern BSP_START_DATA_SECTION const struct EBI_CAL_CS_tag - mpc55xx_start_config_ebi_cal_cs []; - - extern BSP_START_DATA_SECTION const size_t - mpc55xx_start_config_ebi_cal_cs_count []; -#endif - -/** - * @brief Start prologue. - * - * In case the BSP enabled the MPC55XX_ENABLE_START_PROLOGUE option, then this - * function will be called directly after the Boot Assist Module (BAM) jumped - * to the start entry defined by the reset configuration. - * - * This function executes in the context initialized by the BAM. There exists - * no valid stack pointer and the internal RAM has an invalid ECC state. - * - * The default implementation does nothing. The application may provide its - * own implementation. - */ -void mpc55xx_start_prologue(void); - -void mpc55xx_start_early(void); - -void mpc55xx_start_flash(void); - -void mpc55xx_start_cache(void); - -void mpc55xx_start_clock(void); - -void mpc55xx_start_watchdog(void); - -void mpc55xx_start_mmu_apply_config(const struct MMU_tag *config, size_t count); - -uint32_t mpc55xx_get_system_clock(void); - -LINKER_SYMBOL(bsp_ram_start) -LINKER_SYMBOL(bsp_ram_end) -LINKER_SYMBOL(bsp_ram_size) - -LINKER_SYMBOL(bsp_ram_1_start) -LINKER_SYMBOL(bsp_ram_1_end) -LINKER_SYMBOL(bsp_ram_1_size) - -LINKER_SYMBOL(bsp_rom_start) -LINKER_SYMBOL(bsp_rom_end) -LINKER_SYMBOL(bsp_rom_size) - -#ifdef MPC55XX_BOOTFLAGS - extern uint32_t mpc55xx_bootflag_0 []; -#endif - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_MPC55XXEVB_MPC55XX_CONFIG_H */ diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/smsc9218i.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/smsc9218i.h deleted file mode 100644 index e4366b039c..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/smsc9218i.h +++ /dev/null @@ -1,704 +0,0 @@ -/** - * @file - * - * @ingroup mpc55xx - * - * @brief SMSC - LAN9218i - */ - -/* - * Copyright (c) 2009-2012 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include <bsp.h> - -/** - * @name Memory Map - * @{ - */ - -typedef struct { - uint32_t rx_fifo_data; - uint32_t rx_fifo_data_aliases [7]; - uint32_t tx_fifo_data; - uint32_t tx_fifo_data_aliases [7]; - uint32_t rx_fifo_status; - uint32_t rx_fifo_status_peek; - uint32_t tx_fifo_status; - uint32_t tx_fifo_status_peek; - uint32_t id_rev; - uint32_t irq_cfg; - uint32_t int_sts; - uint32_t int_en; - uint32_t reserved_0; - uint32_t byte_test; - uint32_t fifo_int; - uint32_t rx_cfg; - uint32_t tx_cfg; - uint32_t hw_cfg; - uint32_t rx_dp_ctl; - uint32_t rx_fifo_inf; - uint32_t tx_fifo_inf; - uint32_t pmt_ctrl; - uint32_t gpio_cfg; - uint32_t gpt_cfg; - uint32_t gpt_cnt; - uint32_t reserved_1; - uint32_t word_swap; - uint32_t free_run; - uint32_t rx_drop; - uint32_t mac_csr_cmd; - uint32_t mac_csr_data; - uint32_t afc_cfg; - uint32_t e2p_cmd; - uint32_t e2p_data; -} smsc9218i_registers; - -/* - * SMSC9218 registers are accessed little-endian (address 0x3fff8000, A22 used - * as END_SEL). - */ -#ifdef SMSC9218I_BIG_ENDIAN_SUPPORT - volatile smsc9218i_registers *const smsc9218i = - (volatile smsc9218i_registers *) 0x3fff8000; - volatile smsc9218i_registers *const smsc9218i_dma = - (volatile smsc9218i_registers *) 0x3fff8200; -#else - volatile smsc9218i_registers *const smsc9218i = - (volatile smsc9218i_registers *) 0x3fff8000; - volatile smsc9218i_registers *const smsc9218i_dma = - (volatile smsc9218i_registers *) 0x3fff8000; -#endif - -/** @} */ - -#ifdef SMSC9218I_BIG_ENDIAN_SUPPORT - #define SMSC9218I_BIT_POS(pos) (pos) -#else - #define SMSC9218I_BIT_POS(pos) \ - ((pos) > 15 ? \ - ((pos) > 23 ? (pos) - 24 : (pos) - 8) \ - : ((pos) > 7 ? (pos) + 8 : (pos) + 24)) -#endif - -#define SMSC9218I_FLAG(pos) \ - (1U << SMSC9218I_BIT_POS(pos)) - -#define SMSC9218I_FIELD_8(val, pos) \ - (((val) & 0xff) << SMSC9218I_BIT_POS(pos)) - -#define SMSC9218I_GET_FIELD_8(reg, pos) \ - (((reg) >> SMSC9218I_BIT_POS(pos)) & 0xff) - -#define SMSC9218I_FIELD_16(val, pos) \ - (SMSC9218I_FIELD_8((val) >> 8, (pos) + 8) \ - | SMSC9218I_FIELD_8((val), pos)) - -#define SMSC9218I_GET_FIELD_16(reg, pos) \ - ((SMSC9218I_GET_FIELD_8(reg, (pos) + 8) << 8) \ - | SMSC9218I_GET_FIELD_8(reg, pos)) - -#ifdef SMSC9218I_BIG_ENDIAN_SUPPORT - #define SMSC9218I_SWAP(val) (val) -#else - #define SMSC9218I_SWAP(val) \ - ((((val) >> 24) & 0xff) \ - | ((((val) >> 16) & 0xff) << 8) \ - | ((((val) >> 8) & 0xff) << 16) \ - | (((val) & 0xff) << 24)) -#endif - -/** - * @name Receive Status - * @{ - */ - -#define SMSC9218I_RX_STS_FILTER_FAIL SMSC9218I_FLAG(30) -#define SMSC9218I_RX_STS_GET_LENGTH(reg) (SMSC9218I_GET_FIELD_16(reg, 16) & 0x3fff) -#define SMSC9218I_RX_STS_ERROR SMSC9218I_FLAG(15) -#define SMSC9218I_RX_STS_BROADCAST SMSC9218I_FLAG(13) -#define SMSC9218I_RX_STS_ERROR_LENGTH SMSC9218I_FLAG(12) -#define SMSC9218I_RX_STS_ERROR_RUNT_FRAME SMSC9218I_FLAG(11) -#define SMSC9218I_RX_STS_MULTICAST SMSC9218I_FLAG(10) -#define SMSC9218I_RX_STS_ERROR_TOO_LONG SMSC9218I_FLAG(7) -#define SMSC9218I_RX_STS_ERROR_COLLISION SMSC9218I_FLAG(6) -#define SMSC9218I_RX_STS_TYPE SMSC9218I_FLAG(5) -#define SMSC9218I_RX_STS_WATCHDOG SMSC9218I_FLAG(4) -#define SMSC9218I_RX_STS_ERROR_MII SMSC9218I_FLAG(3) -#define SMSC9218I_RX_STS_DRIBBLING_BIT SMSC9218I_FLAG(2) -#define SMSC9218I_RX_STS_ERROR_CRC SMSC9218I_FLAG(1) - -/** @} */ - -/** - * @name Transmit Status - * @{ - */ - -#define SMSC9218I_TX_STS_GET_TAG(reg) SMSC9218I_GET_FIELD_16(reg, 16) -#define SMSC9218I_TX_STS_ERROR SMSC9218I_FLAG(15) -#define SMSC9218I_TX_STS_ERROR_LOSS_OF_CARRIER SMSC9218I_FLAG(11) -#define SMSC9218I_TX_STS_ERROR_NO_CARRIER SMSC9218I_FLAG(10) -#define SMSC9218I_TX_STS_ERROR_LATE_COLLISION SMSC9218I_FLAG(9) -#define SMSC9218I_TX_STS_ERROR_EXCESSIVE_COLLISIONS SMSC9218I_FLAG(8) -#define SMSC9218I_TX_STS_ERROR_EXCESSIVE_DEFERRAL SMSC9218I_FLAG(2) -#define SMSC9218I_TX_STS_ERROR_DEFERRED SMSC9218I_FLAG(0) - -/** @} */ - -/** - * @name Transmit Command A - * @{ - */ - -#define SMSC9218I_TX_A_IOC SMSC9218I_FLAG(31) -#define SMSC9218I_TX_A_END_ALIGN_4 0 -#define SMSC9218I_TX_A_END_ALIGN_16 SMSC9218I_FLAG(24) -#define SMSC9218I_TX_A_END_ALIGN_32 SMSC9218I_FLAG(25) -#define SMSC9218I_TX_A_DOFF(val) SMSC9218I_FIELD_8(val, 16) -#define SMSC9218I_TX_A_FIRST SMSC9218I_FLAG(13) -#define SMSC9218I_TX_A_LAST SMSC9218I_FLAG(12) -#define SMSC9218I_TX_A_FRAGMENT_LENGTH(val) SMSC9218I_FIELD_16(val, 0) - -/** @} */ - -/** - * @name Transmit Command B - * @{ - */ - -#define SMSC9218I_TX_B_TAG(val) SMSC9218I_FIELD_16(val, 16) -#define SMSC9218I_TX_B_GET_TAG(reg) SMSC9218I_GET_FIELD_16(reg, 16) -#define SMSC9218I_TX_B_DISABLE_CRC SMSC9218I_FLAG(13) -#define SMSC9218I_TX_B_DISABLE_PAD SMSC9218I_FLAG(12) -#define SMSC9218I_TX_B_FRAME_LENGTH(val) SMSC9218I_FIELD_16(val, 0) - -/** @} */ - -/** - * @name Chip ID and Revision - * @{ - */ - -#define SMSC9218I_ID_REV_GET_ID(reg) SMSC9218I_GET_FIELD_16(reg, 16) -#define SMSC9218I_ID_REV_GET_REV(reg) SMSC9218I_GET_FIELD_16(reg, 0) -#define SMSC9218I_ID_REV_ID_CHIP_118 0x0118U -#define SMSC9218I_ID_REV_ID_CHIP_218 0x118aU - -/** @} */ - -/** - * @name Interrupt Configuration - * @{ - */ - -#define SMSC9218I_IRQ_CFG_INT_DEAS(val) SMSC9218I_FIELD_8(val, 24) -#define SMSC9218I_IRQ_CFG_GET_INT_DEAS(reg) SMSC9218I_GET_FIELD_8(reg, 24) -#define SMSC9218I_IRQ_CFG_INT_DEAS_CLR SMSC9218I_FLAG(14) -#define SMSC9218I_IRQ_CFG_INT_DEAS_STS SMSC9218I_FLAG(13) -#define SMSC9218I_IRQ_CFG_IRQ_INT SMSC9218I_FLAG(12) -#define SMSC9218I_IRQ_CFG_IRQ_EN SMSC9218I_FLAG(8) -#define SMSC9218I_IRQ_CFG_IRQ_POL SMSC9218I_FLAG(4) -#define SMSC9218I_IRQ_CFG_IRQ_TYPE SMSC9218I_FLAG(0) - -/** @} */ - -/** - * @name Interrupt Enable and Status - * @{ - */ - -#define SMSC9218I_INT_SW SMSC9218I_FLAG(31) -#define SMSC9218I_INT_TXSTOP SMSC9218I_FLAG(25) -#define SMSC9218I_INT_RXSTOP SMSC9218I_FLAG(24) -#define SMSC9218I_INT_RXDFH SMSC9218I_FLAG(23) -#define SMSC9218I_INT_TIOC SMSC9218I_FLAG(21) -#define SMSC9218I_INT_RXD SMSC9218I_FLAG(20) -#define SMSC9218I_INT_GPT SMSC9218I_FLAG(19) -#define SMSC9218I_INT_PHY SMSC9218I_FLAG(18) -#define SMSC9218I_INT_PME SMSC9218I_FLAG(17) -#define SMSC9218I_INT_TXSO SMSC9218I_FLAG(16) -#define SMSC9218I_INT_RWT SMSC9218I_FLAG(15) -#define SMSC9218I_INT_RXE SMSC9218I_FLAG(14) -#define SMSC9218I_INT_TXE SMSC9218I_FLAG(13) -#define SMSC9218I_INT_TDFO SMSC9218I_FLAG(10) -#define SMSC9218I_INT_TDFA SMSC9218I_FLAG(9) -#define SMSC9218I_INT_TSFF SMSC9218I_FLAG(8) -#define SMSC9218I_INT_TSFL SMSC9218I_FLAG(7) -#define SMSC9218I_INT_RSFF SMSC9218I_FLAG(4) -#define SMSC9218I_INT_RSFL SMSC9218I_FLAG(3) -#define SMSC9218I_INT_GPIO2 SMSC9218I_FLAG(2) -#define SMSC9218I_INT_GPIO1 SMSC9218I_FLAG(1) -#define SMSC9218I_INT_GPIO0 SMSC9218I_FLAG(0) - -/** @} */ - -/** - * @name Byte Order Testing - * @{ - */ - -#define SMSC9218I_BYTE_TEST SMSC9218I_SWAP(0x87654321U) - -/** @} */ - -/** - * @name FIFO Level Interrupts - * @{ - */ - -#define SMSC9218I_FIFO_INT_TDAL(val) SMSC9218I_FIELD_8(val, 24) -#define SMSC9218I_FIFO_INT_GET_TDAL(reg) SMSC9218I_GET_FIELD_8(reg, 24) -#define SMSC9218I_FIFO_INT_TSL(val) SMSC9218I_FIELD_8(val, 16) -#define SMSC9218I_FIFO_INT_GET_TSL(reg) SMSC9218I_GET_FIELD_8(reg, 16) -#define SMSC9218I_FIFO_INT_RSL(val) SMSC9218I_FIELD_8(val, 0) -#define SMSC9218I_FIFO_INT_GET_RSL(reg) SMSC9218I_GET_FIELD_8(reg, 0) - -/** @} */ - -/** - * @name Receive Configuration - * @{ - */ - -#define SMSC9218I_RX_CFG_END_ALIGN_4 0 -#define SMSC9218I_RX_CFG_END_ALIGN_16 SMSC9218I_FLAG(30) -#define SMSC9218I_RX_CFG_END_ALIGN_32 SMSC9218I_FLAG(31) -#define SMSC9218I_RX_CFG_DMA_CNT(val) SMSC9218I_FIELD_8(val, 24) -#define SMSC9218I_RX_CFG_GET_DMA_CNT(reg) SMSC9218I_GET_FIELD_8(reg, 24) -#define SMSC9218I_RX_CFG_DUMP SMSC9218I_FLAG(15) -#define SMSC9218I_RX_CFG_DOFF(val) SMSC9218I_FIELD_8(val, 8) -#define SMSC9218I_RX_CFG_GET_DOFF(reg) SMSC9218I_GET_FIELD_8(reg, 8) - -/** @} */ - -/** - * @name Transmit Configuration - * @{ - */ - -#define SMSC9218I_TX_CFG_SDUMP SMSC9218I_FLAG(15) -#define SMSC9218I_TX_CFG_DDUMP SMSC9218I_FLAG(14) -#define SMSC9218I_TX_CFG_SAO SMSC9218I_FLAG(2) -#define SMSC9218I_TX_CFG_ON SMSC9218I_FLAG(1) -#define SMSC9218I_TX_CFG_STOP SMSC9218I_FLAG(0) - -/** @} */ - -/** - * @name Hardware Configuration - * @{ - */ - -#define SMSC9218I_HW_CFG_LED_3 SMSC9218I_FLAG(30) -#define SMSC9218I_HW_CFG_LED_2 SMSC9218I_FLAG(29) -#define SMSC9218I_HW_CFG_LED_1 SMSC9218I_FLAG(28) -#define SMSC9218I_HW_CFG_AMDIX SMSC9218I_FLAG(24) -#define SMSC9218I_HW_CFG_MBO SMSC9218I_FLAG(20) -#define SMSC9218I_HW_CFG_TX_FIF_SZ(val) SMSC9218I_FIELD_8(val, 16) -#define SMSC9218I_HW_CFG_GET_TX_FIF_SZ(reg) SMSC9218I_GET_FIELD_8(reg, 16) -#define SMSC9218I_HW_CFG_BITMD_32 SMSC9218I_FLAG(2) -#define SMSC9218I_HW_CFG_SRST_TO SMSC9218I_FLAG(1) -#define SMSC9218I_HW_CFG_SRST SMSC9218I_FLAG(0) - -/** @} */ - -/** - * @name Receive Datapath Control - * @{ - */ - -#define SMSC9218I_RX_DP_CTRL_FFWD SMSC9218I_FLAG(31) - -/** @} */ - -/** - * @name Receive FIFO Information - * @{ - */ - -#define SMSC9218I_RX_FIFO_INF_GET_SUSED(reg) SMSC9218I_GET_FIELD_8(reg, 16) -#define SMSC9218I_RX_FIFO_INF_GET_DUSED(reg) SMSC9218I_GET_FIELD_16(reg, 0) - -/** @} */ - -/** - * @name Transmit FIFO Information - * @{ - */ - -#define SMSC9218I_TX_FIFO_INF_GET_SUSED(reg) SMSC9218I_GET_FIELD_8(reg, 16) -#define SMSC9218I_TX_FIFO_INF_GET_FREE(reg) SMSC9218I_GET_FIELD_16(reg, 0) - -/** @} */ - -/** - * @name Power Management Control - * @{ - */ - -#define SMSC9218I_PMT_CTRL_PM_MODE_D0 0 -#define SMSC9218I_PMT_CTRL_PM_MODE_D1 SMSC9218I_FLAG(12) -#define SMSC9218I_PMT_CTRL_PM_MODE_D2 SMSC9218I_FLAG(13) -#define SMSC9218I_PMT_CTRL_PHY_RST SMSC9218I_FLAG(10) -#define SMSC9218I_PMT_CTRL_WOL_EN SMSC9218I_FLAG(9) -#define SMSC9218I_PMT_CTRL_ED_EN SMSC9218I_FLAG(8) -#define SMSC9218I_PMT_CTRL_PME_TYPE_PUPU SMSC9218I_FLAG(6) -#define SMSC9218I_PMT_CTRL_WUPS_NO 0 -#define SMSC9218I_PMT_CTRL_WUPS_ENERGY SMSC9218I_FLAG(4) -#define SMSC9218I_PMT_CTRL_WUPS_MAGIC SMSC9218I_FLAG(5) -#define SMSC9218I_PMT_CTRL_PME_IND SMSC9218I_FLAG(3) -#define SMSC9218I_PMT_CTRL_PME_POL SMSC9218I_FLAG(2) -#define SMSC9218I_PMT_CTRL_PME_EN SMSC9218I_FLAG(1) -#define SMSC9218I_PMT_CTRL_READY SMSC9218I_FLAG(0) - -/** @} */ - -/** - * @name General Purpose IO Configuration - * @{ - */ - -#define SMSC9218I_GPIO_CFG_LED3 SMSC9218I_FLAG(30) -#define SMSC9218I_GPIO_CFG_LED2 SMSC9218I_FLAG(29) -#define SMSC9218I_GPIO_CFG_LED1 SMSC9218I_FLAG(28) -#define SMSC9218I_GPIO_CFG_GPIO2_INT_POL SMSC9218I_FLAG(26) -#define SMSC9218I_GPIO_CFG_GPIO1_INT_POL SMSC9218I_FLAG(25) -#define SMSC9218I_GPIO_CFG_GPIO0_INT_POL SMSC9218I_FLAG(24) -#define SMSC9218I_GPIO_CFG_GPIOBUF2 SMSC9218I_FLAG(18) -#define SMSC9218I_GPIO_CFG_GPIOBUF1 SMSC9218I_FLAG(17) -#define SMSC9218I_GPIO_CFG_GPIOBUF0 SMSC9218I_FLAG(16) -#define SMSC9218I_GPIO_CFG_GPIODIR2 SMSC9218I_FLAG(10) -#define SMSC9218I_GPIO_CFG_GPIODIR1 SMSC9218I_FLAG(9) -#define SMSC9218I_GPIO_CFG_GPIODIR0 SMSC9218I_FLAG(8) -#define SMSC9218I_GPIO_CFG_GPO4 SMSC9218I_FLAG(4) -#define SMSC9218I_GPIO_CFG_GPO3 SMSC9218I_FLAG(3) -#define SMSC9218I_GPIO_CFG_GPIO0 SMSC9218I_FLAG(0) -#define SMSC9218I_GPIO_CFG_GPIO2 SMSC9218I_FLAG(2) -#define SMSC9218I_GPIO_CFG_GPIO1 SMSC9218I_FLAG(1) - -/** @} */ - -/** - * @name General Purpose Timer Configuration - * @{ - */ - -#define SMSC9218I_GPT_CFG_TIMER_EN SMSC9218I_FLAG(29) -#define SMSC9218I_GPT_CFG_LOAD(val) SMSC9218I_FIELD_16(val, 0) -#define SMSC9218I_GPT_CFG_GET_LOAD(reg) SMSC9218I_GET_FIELD_16(reg, 0) - -/** @} */ - -/** - * @name General Purpose Timer Count - * @{ - */ - -#define SMSC9218I_GPT_CNT_GET_CNT SMSC9218I_GET_FIELD_16(reg, 0) - -/** @} */ - -/** - * @name Word Swap - * @{ - */ - -#define SMSC9218I_ENDIAN_BIG 0xffffffffU - -/** @} */ - -/** - * @name Free Run Counter - * @{ - */ - -#define SMSC9218I_FREE_RUN_GET(reg) SMSC9218I_SWAP(reg) - -/** @} */ - -/** - * @name Receiver Dropped Frames Counter - * @{ - */ - -#define SMSC9218I_RX_DROP_GET(reg) SMSC9218I_SWAP(reg) - -/** @} */ - -/** - * @name EEPROM Command Register - * @{ - */ - -#define SMSC9218I_E2P_CMD_EPC_BUSY SMSC9218I_FLAG(31) - -/** @} */ - -/** - * @name MAC Control and Status Synchronizer Command - * @{ - */ - -#define SMSC9218I_MAC_CSR_CMD_BUSY SMSC9218I_FLAG(31) -#define SMSC9218I_MAC_CSR_CMD_READ SMSC9218I_FLAG(30) -#define SMSC9218I_MAC_CSR_CMD_ADDR(val) SMSC9218I_FIELD_8(val, 0) -#define SMSC9218I_MAC_CSR_CMD_GET_ADDR(reg) SMSC9218I_GET_FIELD_8(reg, 0) - -/** @} */ - -/** - * @name MAC Control Register - * @{ - */ - -#define SMSC9218I_MAC_CR 0x00000001U -#define SMSC9218I_MAC_CR_RXALL 0x80000000U -#define SMSC9218I_MAC_CR_HBDIS 0x10000000U -#define SMSC9218I_MAC_CR_RCVOWN 0x00800000U -#define SMSC9218I_MAC_CR_LOOPBK 0x00200000U -#define SMSC9218I_MAC_CR_FDPX 0x00100000U -#define SMSC9218I_MAC_CR_MCPAS 0x00080000U -#define SMSC9218I_MAC_CR_PRMS 0x00040000U -#define SMSC9218I_MAC_CR_INVFILT 0x00020000U -#define SMSC9218I_MAC_CR_PASSBAD 0x00010000U -#define SMSC9218I_MAC_CR_HFILT 0x00008000U -#define SMSC9218I_MAC_CR_HPFILT 0x00002000U -#define SMSC9218I_MAC_CR_LCOLL 0x00001000U -#define SMSC9218I_MAC_CR_BCAST 0x00000800U -#define SMSC9218I_MAC_CR_DISRTY 0x00000400U -#define SMSC9218I_MAC_CR_PADSTR 0x00000100U -#define SMSC9218I_MAC_CR_BOLMT_MASK 0x000000c0U -#define SMSC9218I_MAC_CR_BOLMT_10 0x00000000U -#define SMSC9218I_MAC_CR_BOLMT_8 0x00000040U -#define SMSC9218I_MAC_CR_BOLMT_4 0x00000080U -#define SMSC9218I_MAC_CR_BOLMT_1 0x000000c0U -#define SMSC9218I_MAC_CR_DFCHK 0x00000020U -#define SMSC9218I_MAC_CR_TXEN 0x00000008U -#define SMSC9218I_MAC_CR_RXEN 0x00000004U - -/** @} */ - -/** - * @name MAC Address High - * @{ - */ - -#define SMSC9218I_MAC_ADDRH 0x00000002U -#define SMSC9218I_MAC_ADDRH_MASK 0x0000ffffU - -/** @} */ - -/** - * @name MAC Address Low - * @{ - */ - -#define SMSC9218I_MAC_ADDRL 0x00000003U -#define SMSC9218I_MAC_ADDRL_MASK 0xffffffffU - -/** @} */ - -/** - * @name Multicast Hash Table High - * @{ - */ - -#define SMSC9218I_MAC_HASHH 0x00000004U -#define SMSC9218I_MAC_HASHH_MASK 0xffffffffU - -/** @} */ - -/** - * @name Multicast Hash Table Low - * @{ - */ - -#define SMSC9218I_MAC_HASHL 0x00000005U -#define SMSC9218I_MAC_HASHL_MASK 0xffffffffU - -/** @} */ - -/** - * @name MII Access - * @{ - */ - -#define SMSC9218I_MAC_MII_ACC 0x00000006U -#define SMSC9218I_MAC_MII_ACC_PHY_DEFAULT (1U << 11) -#define SMSC9218I_MAC_MII_ACC_WRITE (1U << 1) -#define SMSC9218I_MAC_MII_ACC_BUSY (1U << 0) -#define SMSC9218I_MAC_MII_ACC_ADDR(addr) ((addr) << 6) - -/** @} */ - -/** - * @name MII Data - * @{ - */ - -#define SMSC9218I_MAC_MII_DATA 0x00000007U - -/** @} */ - -/** - * @name Flow Control - * @{ - */ - -#define SMSC9218I_MAC_FLOW 0x00000008U -#define SMSC9218I_MAC_FLOW_FCPT_MASK 0xffff0000U -#define SMSC9218I_MAC_FLOW_FCPASS 0x00000004U -#define SMSC9218I_MAC_FLOW_FCEN 0x00000002U -#define SMSC9218I_MAC_FLOW_FCBSY 0x00000001U - -/** @} */ - -/** - * @name VLAN1 Tag - * @{ - */ - -#define SMSC9218I_MAC_VLAN1 0x00000009U - -/** @} */ - -/** - * @name VLAN2 Tag - * @{ - */ - -#define SMSC9218I_MAC_VLAN2 0x0000000aU - -/** @} */ - -/** - * @name Wake-up Frame Filter - * @{ - */ - -#define SMSC9218I_MAC_WUFF 0x0000000bU - -/** @} */ - -/** - * @name Wake-up Control and Status - * @{ - */ - -#define SMSC9218I_MAC_WUCSR 0x0000000cU -#define SMSC9218I_MAC_WUCSR_GUE 0x00000200U -#define SMSC9218I_MAC_WUCSR_WUFR 0x00000040U -#define SMSC9218I_MAC_WUCSR_MPR 0x00000020U -#define SMSC9218I_MAC_WUCSR_WUEN 0x00000004U -#define SMSC9218I_MAC_WUCSR_MPEN 0x00000002U - -/** @} */ - -/** - * @name PHY Identifier 1 - * @{ - */ - -#define SMSC9218I_PHY_ID1_LAN9118 0x7 - -/** @} */ - -/** - * @name PHY Identifier 2 - * @{ - */ - -#define SMSC9218I_PHY_ID2_LAN9218 0xc0c3 - -/** @} */ - -/** - * @name Mode Control and Status - * @{ - */ - -#define SMSC9218I_PHY_MCSR 0x00000011U -#define SMSC9218I_PHY_MCSR_EDPWRDOWN 0x00002000U -#define SMSC9218I_PHY_MCSR_ENERGYON 0x00000002U - -/** @} */ - -/** - * @name Special Modes - * @{ - */ - -#define SMSC9218I_PHY_SPMODES 0x00000012U - -/** @} */ - -/** - * @name Special Control and Status Indications - * @{ - */ - -#define SMSC9218I_PHY_CSIR 0x0000001bU -#define SMSC9218I_PHY_CSIR_SQEOFF 0x00000800U -#define SMSC9218I_PHY_CSIR_FEFIEN 0x00000020U -#define SMSC9218I_PHY_CSIR_XPOL 0x00000010U - -/** @} */ - -/** - * @name Interrupt Source Flag - * @{ - */ - -#define SMSC9218I_PHY_ISR 0x0000001dU -#define SMSC9218I_PHY_ISR_INT7 0x00000080U -#define SMSC9218I_PHY_ISR_INT6 0x00000040U -#define SMSC9218I_PHY_ISR_INT5 0x00000020U -#define SMSC9218I_PHY_ISR_INT4 0x00000010U -#define SMSC9218I_PHY_ISR_INT3 0x00000008U -#define SMSC9218I_PHY_ISR_INT2 0x00000004U -#define SMSC9218I_PHY_ISR_INT1 0x00000002U - -/** @} */ - -/** - * @name Interrupt Mask - * @{ - */ - -#define SMSC9218I_PHY_IMR 0x0000001eU -#define SMSC9218I_PHY_IMR_INT7 0x00000080U -#define SMSC9218I_PHY_IMR_INT6 0x00000040U -#define SMSC9218I_PHY_IMR_INT5 0x00000020U -#define SMSC9218I_PHY_IMR_INT4 0x00000010U -#define SMSC9218I_PHY_IMR_INT3 0x00000008U -#define SMSC9218I_PHY_IMR_INT2 0x00000004U -#define SMSC9218I_PHY_IMR_INT1 0x00000002U - -/** @} */ - -/** - * @name PHY Special Control and Status - * @{ - */ - -#define SMSC9218I_PHY_PHYSCSR 0x0000001fU -#define SMSC9218I_PHY_PHYSCSR_ANDONE 0x00001000U -#define SMSC9218I_PHY_PHYSCSR_4B5B_EN 0x00000040U -#define SMSC9218I_PHY_PHYSCSR_SPEED_MASK 0x0000001cU -#define SMSC9218I_PHY_PHYSCSR_SPEED_10HD 0x00000004U -#define SMSC9218I_PHY_PHYSCSR_SPEED_10FD 0x00000014U -#define SMSC9218I_PHY_PHYSCSR_SPEED_100HD 0x00000008U -#define SMSC9218I_PHY_PHYSCSR_SPEED_100FD 0x00000018U - -/** @} */ diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/tm27.h b/c/src/lib/libbsp/powerpc/mpc55xxevb/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include <rtems/tm27-default.h> diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am b/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am deleted file mode 100644 index b6238a58c3..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/preinstall.am +++ /dev/null @@ -1,183 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base - -$(PROJECT_LIB)/linkcmds.mpc55xx: startup/linkcmds.mpc55xx $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc55xx -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc55xx - -$(PROJECT_LIB)/linkcmds.gwlcfm: startup/linkcmds.gwlcfm $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.gwlcfm -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.gwlcfm - -$(PROJECT_LIB)/linkcmds.mpc5566evb: startup/linkcmds.mpc5566evb $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5566evb -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5566evb - -$(PROJECT_LIB)/linkcmds.mpc5566evb_spe: startup/linkcmds.mpc5566evb_spe $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5566evb_spe -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5566evb_spe - -$(PROJECT_LIB)/linkcmds.mpc5643l_evb: startup/linkcmds.mpc5643l_evb $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5643l_evb -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5643l_evb - -$(PROJECT_LIB)/linkcmds.mpc5643l_dpu: startup/linkcmds.mpc5643l_dpu $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5643l_dpu -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5643l_dpu - -$(PROJECT_LIB)/linkcmds.mpc5674fevb: startup/linkcmds.mpc5674fevb $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5674fevb -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5674fevb - -$(PROJECT_LIB)/linkcmds.mpc5674fevb_spe: startup/linkcmds.mpc5674fevb_spe $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5674fevb_spe -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5674fevb_spe - -$(PROJECT_LIB)/linkcmds.phycore_mpc5554: startup/linkcmds.phycore_mpc5554 $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.phycore_mpc5554 -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.phycore_mpc5554 - -$(PROJECT_LIB)/linkcmds.mpc5668g: startup/linkcmds.mpc5668g $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5668g -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5668g - -$(PROJECT_LIB)/linkcmds.mpc5674f_ecu508: startup/linkcmds.mpc5674f_ecu508 $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5674f_ecu508 -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5674f_ecu508 - -$(PROJECT_LIB)/linkcmds.mpc5674f_ecu508_boot: startup/linkcmds.mpc5674f_ecu508_boot $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5674f_ecu508_boot -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5674f_ecu508_boot - -$(PROJECT_LIB)/linkcmds.mpc5674f_ecu508_app: startup/linkcmds.mpc5674f_ecu508_app $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5674f_ecu508_app -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5674f_ecu508_app - -$(PROJECT_LIB)/linkcmds.mpc5674f_rsm6: startup/linkcmds.mpc5674f_rsm6 $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5674f_rsm6 -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5674f_rsm6 - -$(PROJECT_LIB)/linkcmds.mpc5674f_rsm6_base: startup/linkcmds.mpc5674f_rsm6_base $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc5674f_rsm6_base -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc5674f_rsm6_base - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h - -$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h - -$(PROJECT_INCLUDE)/bsp/stackalloc.h: ../../shared/include/stackalloc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stackalloc.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stackalloc.h - -$(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h - -$(PROJECT_INCLUDE)/bsp/linker-symbols.h: ../shared/include/linker-symbols.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/linker-symbols.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/linker-symbols.h - -$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h - -$(PROJECT_INCLUDE)/bsp/tictac.h: ../shared/include/tictac.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tictac.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tictac.h - -$(PROJECT_INCLUDE)/bsp/irq.h: include/bsp/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/mpc55xx-config.h: include/mpc55xx-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mpc55xx-config.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mpc55xx-config.h - -$(PROJECT_INCLUDE)/bsp/smsc9218i.h: include/smsc9218i.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/smsc9218i.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/smsc9218i.h - -$(PROJECT_INCLUDE)/bsp/console-esci.h: include/console-esci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/console-esci.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/console-esci.h - -$(PROJECT_INCLUDE)/bsp/console-generic.h: include/console-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/console-generic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/console-generic.h - -$(PROJECT_INCLUDE)/bsp/console-linflex.h: include/console-linflex.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/console-linflex.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/console-linflex.h - diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/bsp_specs b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bsp_specs index 2625609327..2625609327 100644 --- a/c/src/lib/libbsp/powerpc/mpc55xxevb/bsp_specs +++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/Makefile.am b/c/src/lib/libbsp/powerpc/mpc8260ads/Makefile.am index 5436770e52..bd84c6c0cc 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/Makefile.am +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/Makefile.am @@ -4,27 +4,19 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h noinst_PROGRAMS = - -dist_project_lib_DATA += startup/linkcmds - EXTRA_DIST += start/start.S start.$(OBJEXT): start/start.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = start.$(OBJEXT) +project_lib_DATA += linkcmds + EXTRA_DIST += ../../powerpc/shared/start/rtems_crti.S rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< @@ -39,10 +31,6 @@ libbsp_a_SOURCES += ../shared/clock/clock.c # console libbsp_a_SOURCES += console/console.c -include_bsp_HEADERS = irq/irq.h \ - ../../shared/include/irq-generic.h \ - ../../shared/include/irq-info.h - # irq libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c libbsp_a_SOURCES += ../../shared/src/irq-generic.c @@ -84,5 +72,5 @@ endif EXTRA_DIST += times -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/mpc8260ads/headers.am diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/configure.ac b/c/src/lib/libbsp/powerpc/mpc8260ads/configure.ac index b1f1c27631..96a4af7697 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/configure.ac +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-mpc8260ads],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/mpc8260ads.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/include/bsp.h b/c/src/lib/libbsp/powerpc/mpc8260ads/include/bsp.h deleted file mode 100644 index c207a2ec99..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/include/bsp.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * This include file contains all board IO definitions. - */ - -/* - * COPYRIGHT (c) 1989-2014. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_MPC8260ADS_BSP_H -#define LIBBSP_POWERPC_MPC8260ADS_BSP_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <mpc8260.h> -#include <mpc8260/cpm.h> -#include <mpc8260/mmu.h> -#include <mpc8260/console.h> -#include <bsp/irq.h> -#include <bsp/vectors.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Board configuration registers - */ - -typedef struct bcsr - -{ - uint32_t bcsr0; /* Board Control and Status Register */ - uint32_t bcsr1; - uint32_t bcsr2; - uint32_t bcsr3; - -} BCSR; - -/* - * Network driver configuration - */ -struct rtems_bsdnet_ifconfig; -extern int rtems_enet_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching); -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_enet_driver_attach - -/* miscellaneous stuff assumed to exist */ - -/* - * We need to decide how much memory will be non-cacheable. This - * will mainly be memory that will be used in DMA (network and serial - * buffers). - */ -/* -#define NOCACHE_MEM_SIZE 512*1024 -*/ - -/* functions */ - -#if 0 -void M8260ExecuteRISC( uint32_t command ); -void *M8260AllocateBufferDescriptors( int count ); -void *M8260AllocateRiscTimers( int count ); -extern char M8260DefaultWatchdogFeeder; -#endif - -/* - * Prototypes for items shared across file boundaries in the BSP - */ -extern uint32_t bsp_serial_per_sec; -void *bsp_idle_thread( uintptr_t ignored ); -void cpu_init(void); -int mbx8xx_console_get_configuration(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/include/tm27.h b/c/src/lib/libbsp/powerpc/mpc8260ads/include/tm27.h deleted file mode 100644 index b1eafc47aa..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/include/tm27.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * @file - * @ingroup powerpc_mpc8260ads - * @brief Implementations for interrupt mechanisms for Time Test 27 - */ - -/* - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -#include <rtems/powerpc/powerpc.h> - -/* - * Stuff for Time Test 27 - */ - -#define MUST_WAIT_FOR_INTERRUPT 0 - -#define Install_tm27_vector( handler ) \ - do { \ - static rtems_irq_connect_data scIrqData = { \ - PPC_IRQ_SCALL, \ - (rtems_irq_hdl) handler, \ - NULL, \ - NULL, \ - NULL \ - }; \ - BSP_install_rtems_irq_handler (&scIrqData); \ - } while(0) - -#define Cause_tm27_intr() __asm__ volatile ("sc") - -#define Clear_tm27_intr() /* empty */ - -#define Lower_tm27_intr() /* empty */ - -#endif diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h deleted file mode 100644 index 1dd18611fc..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h +++ /dev/null @@ -1,193 +0,0 @@ -/* irq.h - * - * This include file describe the data structure and the functions implemented - * by rtems to write interrupt handlers. - * - * CopyRight (C) 1999 valette@crf.canon.fr - * - * This code is heavilly inspired by the public specification of STREAM V2 - * that can be found at : - * - * <http://www.chorus.com/Documentation/index.html> by following - * the STREAM API Specification Document link. - * - * Modified for mpc8260 by Andy Dachs <a.dachs@sstl.co.uk> - * Surrey Satellite Technology Limited - * The interrupt handling on the mpc8260 seems quite different from - * the 860 (I don't know the 860 well). Although some interrupts - * are routed via the CPM irq and some are direct to the SIU they all - * appear logically the same. Therefore I removed the distinction - * between SIU and CPM interrupts. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_IRQ_H -#define LIBBSP_POWERPC_IRQ_H -#include <rtems/irq.h> - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - -/* -extern volatile unsigned int ppc_cached_irq_mask; -*/ - -/* - * Symblolic IRQ names and related definitions. - */ - - /* - * CPM IRQ handlers related definitions - * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE - */ -#define BSP_CPM_IRQ_NUMBER (64) -#define BSP_CPM_IRQ_LOWEST_OFFSET (0) -#define BSP_CPM_IRQ_MAX_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1) - /* - * PowerPc exceptions handled as interrupt where a rtems managed interrupt - * handler might be connected - */ -#define BSP_PROCESSOR_IRQ_NUMBER (1) -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET + 1) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) - /* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) -#define BSP_LOWEST_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET) -#define BSP_MAX_OFFSET (BSP_PROCESSOR_IRQ_MAX_OFFSET) - - /* - * Some SIU IRQ symbolic name definition. Please note that - * INT IRQ are defined but a single one will be used to - * redirect all CPM interrupt. - * - * On the mpc8260 all this seems to be transparent. Although the - * CPM, PIT and TMCNT interrupt may well be the only interrupts routed - * to the SIU at the hardware level all of them appear as CPM interupts - * to software apart from the registers for setting priority. - * - * The MPC8260 User Manual seems shot through with inconsistencies - * about this whole area. - */ - - /* - * Some CPM IRQ symbolic name definition - */ -#define BSP_CPM_IRQ_ERROR (BSP_CPM_IRQ_LOWEST_OFFSET + 0) -#define BSP_CPM_IRQ_I2C (BSP_CPM_IRQ_LOWEST_OFFSET + 1) -#define BSP_CPM_IRQ_SPI (BSP_CPM_IRQ_LOWEST_OFFSET + 2) -#define BSP_CPM_IRQ_RISC_TIMERS (BSP_CPM_IRQ_LOWEST_OFFSET + 3) -#define BSP_CPM_IRQ_SMC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 4) -#define BSP_CPM_IRQ_SMC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 5) -#define BSP_CPM_IRQ_IDMA1 (BSP_CPM_IRQ_LOWEST_OFFSET + 6) -#define BSP_CPM_IRQ_IDMA2 (BSP_CPM_IRQ_LOWEST_OFFSET + 7) -#define BSP_CPM_IRQ_IDMA3 (BSP_CPM_IRQ_LOWEST_OFFSET + 8) -#define BSP_CPM_IRQ_IDMA4 (BSP_CPM_IRQ_LOWEST_OFFSET + 9) -#define BSP_CPM_IRQ_SDMA (BSP_CPM_IRQ_LOWEST_OFFSET + 10) - -#define BSP_CPM_IRQ_TIMER_1 (BSP_CPM_IRQ_LOWEST_OFFSET + 12) -#define BSP_CPM_IRQ_TIMER_2 (BSP_CPM_IRQ_LOWEST_OFFSET + 13) -#define BSP_CPM_IRQ_TIMER_3 (BSP_CPM_IRQ_LOWEST_OFFSET + 14) -#define BSP_CPM_IRQ_TIMER_4 (BSP_CPM_IRQ_LOWEST_OFFSET + 15) -#define BSP_CPM_IRQ_TMCNT (BSP_CPM_IRQ_LOWEST_OFFSET + 16) -#define BSP_CPM_IRQ_PIT (BSP_CPM_IRQ_LOWEST_OFFSET + 17) - -#define BSP_CPM_IRQ_IRQ1 (BSP_CPM_IRQ_LOWEST_OFFSET + 19) -#define BSP_CPM_IRQ_IRQ2 (BSP_CPM_IRQ_LOWEST_OFFSET + 20) -#define BSP_CPM_IRQ_IRQ3 (BSP_CPM_IRQ_LOWEST_OFFSET + 21) -#define BSP_CPM_IRQ_IRQ4 (BSP_CPM_IRQ_LOWEST_OFFSET + 22) -#define BSP_CPM_IRQ_IRQ5 (BSP_CPM_IRQ_LOWEST_OFFSET + 23) -#define BSP_CPM_IRQ_IRQ6 (BSP_CPM_IRQ_LOWEST_OFFSET + 24) -#define BSP_CPM_IRQ_IRQ7 (BSP_CPM_IRQ_LOWEST_OFFSET + 25) - -#define BSP_CPM_IRQ_FCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 32) -#define BSP_CPM_IRQ_FCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 33) -#define BSP_CPM_IRQ_FCC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 34) -#define BSP_CPM_IRQ_MCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 36) -#define BSP_CPM_IRQ_MCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 37) - -#define BSP_CPM_IRQ_SCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 40) -#define BSP_CPM_IRQ_SCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 41) -#define BSP_CPM_IRQ_SCC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 42) -#define BSP_CPM_IRQ_SCC4 (BSP_CPM_IRQ_LOWEST_OFFSET + 43) - -#define BSP_CPM_IRQ_PC15 (BSP_CPM_IRQ_LOWEST_OFFSET + 48) -#define BSP_CPM_IRQ_PC14 (BSP_CPM_IRQ_LOWEST_OFFSET + 49) -#define BSP_CPM_IRQ_PC13 (BSP_CPM_IRQ_LOWEST_OFFSET + 50) -#define BSP_CPM_IRQ_PC12 (BSP_CPM_IRQ_LOWEST_OFFSET + 51) -#define BSP_CPM_IRQ_PC11 (BSP_CPM_IRQ_LOWEST_OFFSET + 52) -#define BSP_CPM_IRQ_PC10 (BSP_CPM_IRQ_LOWEST_OFFSET + 53) -#define BSP_CPM_IRQ_PC9 (BSP_CPM_IRQ_LOWEST_OFFSET + 54) -#define BSP_CPM_IRQ_PC8 (BSP_CPM_IRQ_LOWEST_OFFSET + 55) -#define BSP_CPM_IRQ_PC7 (BSP_CPM_IRQ_LOWEST_OFFSET + 56) -#define BSP_CPM_IRQ_PC6 (BSP_CPM_IRQ_LOWEST_OFFSET + 57) -#define BSP_CPM_IRQ_PC5 (BSP_CPM_IRQ_LOWEST_OFFSET + 58) -#define BSP_CPM_IRQ_PC4 (BSP_CPM_IRQ_LOWEST_OFFSET + 59) -#define BSP_CPM_IRQ_PC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 60) -#define BSP_CPM_IRQ_PC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 61) -#define BSP_CPM_IRQ_PC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 62) -#define BSP_CPM_IRQ_PC0 (BSP_CPM_IRQ_LOWEST_OFFSET + 63) - - /* - * Some Processor exception handled as rtems IRQ symbolic name definition - */ -#define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET) -#define BSP_PERIODIC_TIMER (BSP_DECREMENTER) - -#define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET - -#define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET - -#define CPM_INTERRUPT - -/*-------------------------------------------------------------------------+ -| Function Prototypes. -+--------------------------------------------------------------------------*/ -/* - * ------------------------ PPC CPM Mngt Routines ------- - */ - -/* - * function to disable a particular irq. After calling - * this function, even if the device asserts the interrupt line it will - * not be propagated further to the processor - */ -int BSP_irq_disable_at_cpm (const rtems_irq_number irqLine); -/* - * function to enable a particular irq. After calling - * this function, if the device asserts the interrupt line it will - * be propagated further to the processor - */ -int BSP_irq_enable_at_cpm (const rtems_irq_number irqLine); -/* - * function to acknoledge a particular irq. After calling - * this function, if a device asserts an enabled interrupt line it will - * be propagated further to the processor. Mainly usefull for people - * writting raw handlers as this is automagically done for rtems managed - * handlers. - */ -int BSP_irq_ack_at_cpm (const rtems_irq_number irqLine); -/* - * function to check if a particular irq is enabled. After calling - */ -int BSP_irq_enabled_at_cpm (const rtems_irq_number irqLine); - -extern void BSP_rtems_irq_mng_init(unsigned cpuId); - -#ifdef __cplusplus -} -#endif - -/* Now that we have defined some basics, include the generic support */ -#include <bsp/irq-generic.h> - -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/preinstall.am b/c/src/lib/libbsp/powerpc/mpc8260ads/preinstall.am deleted file mode 100644 index 7c3f1a39fd..0000000000 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/preinstall.am +++ /dev/null @@ -1,79 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h - -$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h - diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/bsp_specs b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bsp_specs index 2625609327..2625609327 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/bsp_specs +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/mvme3100/Makefile.am b/c/src/lib/libbsp/powerpc/mvme3100/Makefile.am index 83b63c2374..a9c1cea0f1 100644 --- a/c/src/lib/libbsp/powerpc/mvme3100/Makefile.am +++ b/c/src/lib/libbsp/powerpc/mvme3100/Makefile.am @@ -4,15 +4,8 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h noinst_PROGRAMS = @@ -43,8 +36,8 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA += rtems_crti.$(OBJEXT) +project_lib_DATA += linkcmds dist_project_lib_DATA += ../shared/startup/linkcmds.share -dist_project_lib_DATA += startup/linkcmds noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -64,39 +57,27 @@ libbsp_a_SOURCES += ../../shared/tod.c tod/todcfg.c # pclock libbsp_a_SOURCES += ../../powerpc/shared/clock/p_clock.c -include_bsp_HEADERS = ../../powerpc/shared/console/uart.h # console libbsp_a_SOURCES += ../../powerpc/shared/console/uart.c \ ../../powerpc/shared/console/console.c \ ../../powerpc/shared/console/consoleIo.h \ ../../powerpc/shared/console/uart.h -include_bsp_HEADERS += irq/irq.h # irq libbsp_a_SOURCES += irq/irq_init.c \ ../../powerpc/shared/irq/openpic_i8259_irq.c -include_bsp_HEADERS += ../../powerpc/shared/openpic/openpic.h # openpic libbsp_a_SOURCES += ../../powerpc/shared/openpic/openpic.h \ ../../powerpc/shared/openpic/openpic.c \ ../../powerpc/shared/openpic/openpic.h -include_bsp_HEADERS += ../../powerpc/shared/pci/pci.h # pci libbsp_a_SOURCES += ../../powerpc/shared/pci/pci.c \ pci/detect_host_bridge.c \ ../../powerpc/shared/pci/generic_clear_hberrs.c \ ../../powerpc/shared/pci/pcifinddevice.c ../../powerpc/shared/pci/pci.h -include_bsp_HEADERS += vme/VMEConfig.h \ - ../../shared/vmeUniverse/vmeTsi148.h \ - ../../shared/vmeUniverse/vme_am_defs.h \ - ../../shared/vmeUniverse/VME.h \ - ../../shared/vmeUniverse/vmeTsi148DMA.h\ - ../../shared/vmeUniverse/bspVmeDmaList.h\ - ../../shared/vmeUniverse/VMEDMA.h - # vme libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeTsi148.c \ ../../shared/vmeUniverse/bspVmeDmaList.c \ @@ -106,23 +87,18 @@ libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeTsi148.c \ ../../powerpc/shared/vme/vmeconfig.c \ ../../powerpc/shared/vme/vme_universe.c -include_bsp_HEADERS += ../shared/flash/flashPgm.h \ - ../shared/flash/flashPgmPvt.h # flash libbsp_a_SOURCES += ../shared/flash/flash.c \ ../shared/flash/spansionFlash.c \ flash/flashcfg.c -include_bsp_HEADERS += i2c/mpc8540_i2c_busdrv.h # i2c libbsp_a_SOURCES += i2c/mpc8540_i2c.c i2c/i2c_init.c -include_bsp_HEADERS += ../shared/motorola/vpd.h # vpd libbsp_a_SOURCES += ../shared/motorola/vpd.c if HAS_NETWORKING -include_bsp_HEADERS += network/if_tsec_pub.h noinst_PROGRAMS += network.rel network_rel_SOURCES = network/tsec.c network_rel_CPPFLAGS = $(AM_CPPFLAGS) @@ -145,5 +121,5 @@ endif EXTRA_DIST += LICENSE README KNOWN_PROBLEMS -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/mvme3100/headers.am diff --git a/c/src/lib/libbsp/powerpc/mvme3100/configure.ac b/c/src/lib/libbsp/powerpc/mvme3100/configure.ac index f19e6c6164..ec58a87c88 100644 --- a/c/src/lib/libbsp/powerpc/mvme3100/configure.ac +++ b/c/src/lib/libbsp/powerpc/mvme3100/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-mvme3100],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/mvme3100.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/mvme3100/i2c/mpc8540_i2c_busdrv.h b/c/src/lib/libbsp/powerpc/mvme3100/i2c/mpc8540_i2c_busdrv.h deleted file mode 100644 index 181b45f468..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme3100/i2c/mpc8540_i2c_busdrv.h +++ /dev/null @@ -1,72 +0,0 @@ -/** - * @file - * - * @ingroup powerpc_mpc8540i2cbusdrv - * - * @brief I2C bus driver for mpc8540-based boards - */ - -#ifndef MPC8540_I2C_BUS_DRIVER_H -#define MPC8540_I2C_BUS_DRIVER_H - -/* - * Authorship - * ---------- - * This software ('mvme3100' RTEMS BSP) was created by - * - * Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * The 'mvme3100' BSP was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#ifdef __cplusplus - extern "C" { -#endif - -#include <rtems.h> -#include <rtems/libi2c.h> - -/* for registration with libi2c */ -extern rtems_libi2c_bus_t *mpc8540_i2c_bus_descriptor; - -#ifdef __cplusplus - } -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h b/c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h deleted file mode 100644 index 3fbfcb3120..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h +++ /dev/null @@ -1,343 +0,0 @@ -/** - * @file - * - * @ingroup mvme3100_bsp - * - * @brief This file contains BSP API definition. - */ - -/* - * Copyright (C) 1999 Eric Valette. valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - * Adapted for the mvme3100 BSP by T. Straumann, 2007. - */ -#ifndef LIBBSP_POWERPC_MVME3100_BSP_H -#define LIBBSP_POWERPC_MVME3100_BSP_H - -#ifndef ASM - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <libcpu/io.h> -#include <bsp/vectors.h> - -/** - * @defgroup mvme3100_bsp confdefs.h overrides - * - * @ingroup powerpc_mvme3100 - * - * @brief confdefs.h overrides for this BSP: - */ - -#define BSP_INTERRUPT_STACK_SIZE (16 * 1024) - -/* - * diagram illustrating the role of the configuration - * constants - * PCI_MEM_WIN0: CPU starting addr where PCI memory space is visible - * PCI_MEM_BASE: CPU address of PCI mem addr. zero. (regardless of this - * address being 'visible' or not!). - * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME - * _VME_A32_WIN0_ON_VME: VME address of that same window - * - * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between - * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI - * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to - * the base address read from PCI config.space in order to translate that - * into a CPU address. - * - * NOTE: VME addresses should NEVER be translated using these constants! - * they are strictly for BSP internal use. Drivers etc. should use - * the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs). - * - * CPU ADDR PCI_ADDR VME ADDR - * - * 00000000 XXXXXXXX XXXXXXXX - * ^ ^ ........ - * | | - * | | e.g., RAM XXXXXXXX - * | | 00000000 - * | | ......... ^ - * | | (possible offset | - * | | between pci and XXXXXXXX | ...... - * | | cpu addresses) | - * | v | - * | PCI_MEM_BASE -------------> 00000000 --------------- | - * | ........ ........ ^ | - * | invisible | | - * | ........ from CPU | | - * v | | - * PCI_MEM_WIN0 ============= first visible PCI addr | | - * | | - * pci devices pci window | | - * visible here v v - * mapped by ========== _VME_A32_WIN0_ON_PCI ======= _VME_A32_WIN0_ON_VME - * vme window - * VME devices hostbridge mapped by - * visible here universe - * ===================================================== - * - */ - -/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */ -#define _IO_BASE 0xe0000000 /* Motload's PCI IO base */ -#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE -/* address of our ram on the PCI bus */ -#define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET -/* offset of pci memory as seen from the CPU */ -#define PCI_MEM_BASE 0 -/* where (in CPU addr. space) does the PCI window start */ -#define PCI_MEM_WIN0 0x80000000 - -/* - * Base address definitions for several devices - */ - -#define BSP_OPEN_PIC_BASE_OFFSET 0x40000 -#define BSP_OPEN_PIC_BIG_ENDIAN - -#define BSP_8540_CCSR_BASE (0xe1000000) - -#define BSP_UART_IOBASE_COM1 (BSP_8540_CCSR_BASE+0x4500) -#define BSP_UART_IOBASE_COM2 (BSP_8540_CCSR_BASE+0x4600) -#define PCI_CONFIG_ADDR (BSP_8540_CCSR_BASE+0x8000) -#define PCI_CONFIG_DATA (BSP_8540_CCSR_BASE+0x8004) -#define PCI_CONFIG_WR_ADDR( addr, val ) out_be32((uint32_t*)(addr), (val)) - -#define BSP_CONSOLE_PORT BSP_UART_COM1 -#define BSP_UART_BAUD_BASE (-9600) /* use existing divisor to determine clock rate */ -#define BSP_UART_USE_SHARED_IRQS - -#define BSP_MVME3100_IRQ_DETECT_REG ((volatile uint8_t *)0xe2000007) - -/* I2C Devices */ -/* Note that the i2c addresses stated in the manual are - * left-shifted by one bit. - */ -#define BSP_VPD_I2C_ADDR (0xA8>>1) /* the VPD EEPROM */ -#define BSP_USR0_I2C_ADDR (0xA4>>1) /* the 1st user EEPROM */ -#define BSP_USR1_I2C_ADDR (0xA6>>1) /* the 2nd user EEPROM */ -#define BSP_THM_I2C_ADDR (0x90>>1) /* the DS1621 temperature sensor & thermostat */ -#define BSP_RTC_I2C_ADDR (0xD0>>1) /* the DS1375 wall-clock */ - -#define BSP_I2C_BUS_DESCRIPTOR mpc8540_i2c_bus_descriptor - -#define BSP_I2C_BUS0_NAME "/dev/i2c0" - -#define BSP_I2C_VPD_EEPROM_NAME "vpd-eeprom" -#define BSP_I2C_USR_EEPROM_NAME "usr-eeprom" -#define BSP_I2C_USR1_EEPROM_NAME "usr1-eeprom" -#define BSP_I2C_DS1621_NAME "ds1621" -#define BSP_I2C_THM_NAME BSP_I2C_DS1621_NAME -#define BSP_I2C_DS1621_RAW_NAME "ds1621-raw" -#define BSP_I2C_DS1375_RAW_NAME "ds1375-raw" -#define BSP_I2C_RTC_RAW_NAME BSP_I2C_DS1375_RAW_NAME - -#define BSP_I2C_VPD_EEPROM_DEV_NAME (BSP_I2C_BUS0_NAME"."BSP_I2C_VPD_EEPROM_NAME) -#define BSP_I2C_USR_EEPROM_DEV_NAME (BSP_I2C_BUS0_NAME"."BSP_I2C_USR_EEPROM_NAME) -#define BSP_I2C_USR1_EEPROM_DEV_NAME (BSP_I2C_BUS0_NAME"."BSP_I2C_USR1_EEPROM_NAME) -#define BSP_I2C_DS1621_DEV_NAME (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_NAME) -#define BSP_I2C_THM_DEV_NAME BSP_I2C_DS1621_DEV_NAME -#define BSP_I2C_DS1621_RAW_DEV_NAME (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_RAW_NAME) -#define BSP_I2C_DS1375_RAW_DEV_NAME (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1375_RAW_NAME) - -/* Definitions useful for bootloader (netboot); where to find - * boot/'environment' parameters. - */ -#define BSP_EEPROM_BOOTPARMS_NAME BSP_I2C_USR1_EEPROM_DEV_NAME -#define BSP_EEPROM_BOOTPARMS_SIZE 1024 -#define BSP_EEPROM_BOOTPARMS_OFFSET 0 -#define BSP_BOOTPARMS_WRITE_ENABLE() do { BSP_eeprom_write_enable(); } while (0) -#define BSP_BOOTPARMS_WRITE_DISABLE() do { BSP_eeprom_write_protect();} while (0) - - -#ifdef __cplusplus -extern "C" { -#endif -/* Initialize the I2C driver and register all devices - * RETURNS 0 on success, -1 on error. - * - * Access to the VPD and user EEPROMS as well - * as the ds1621 temperature sensor is possible - * by means of file nodes - * - * /dev/i2c0.vpd-eeprom (read-only) - * /dev/i2c0.usr-eeprom (read-write) - * /dev/i2c0.usr1-eeprom (read-write) - * /dev/i2c0.ds1621 (read-only; one byte: board-temp in degC) - * /dev/i2c0.ds1621-raw (read-write; transfer bytes to/from the ds1621) - * /dev/i2c0.ds1375-raw (read-write; transfer bytes to/from the ds1375) - * - */ -int BSP_i2c_initialize(void); -#define BSP_PREDRIVER_I2C_INIT - -/* System Control Register */ -#define BSP_MVME3100_SYS_CR ((volatile uint8_t *)0xe2000001) -#define BSP_MVME3100_SYS_CR_RESET_MSK (7<<5) -#define BSP_MVME3100_SYS_CR_RESET (5<<5) -#define BSP_MVME3100_SYS_CR_EEPROM_WP (1<<1) -#define BSP_MVME3100_SYS_CR_TSTAT_MSK (1<<0) - -/* LED support */ -#define BSP_MVME3100_SYS_IND_REG ((volatile uint8_t *)0xe2000002) -#define BSP_LED_BRD_FAIL (1<<0) -#define BSP_LED_USR1 (1<<1) -#define BSP_LED_USR2 (1<<2) -#define BSP_LED_USR3 (1<<3) - -/* Flash CSR */ -#define BSP_MVME3100_FLASH_CSR ((volatile uint8_t *)0xe2000003) -#define BSP_MVME3100_FLASH_CSR_FLASH_RDY (1<<0) -#define BSP_MVME3100_FLASH_CSR_FBT_BLK_SEL (1<<1) -#define BSP_MVME3100_FLASH_CSR_F_WP_HW (1<<2) -#define BSP_MVME3100_FLASH_CSR_F_WP_SW (1<<3) -#define BSP_MVME3100_FLASH_CSR_MAP_SEL (1<<4) - -/* Phy interrupt detect */ -#define BSP_MVME3100_IRQ_DETECT_REG ((volatile uint8_t *)0xe2000007) - -/* Atomically set bits in a sys-register; The bits set in 'mask' - * are set in the register others; are left unmodified. - * - * RETURNS: old state. - * - * NOTE : since BSP_setSysReg( reg, 0 ) does not make - * any changes this call may be used - * to read the current status w/o modifying it. - */ -uint8_t BSP_setSysReg(volatile uint8_t *r, uint8_t mask); - -/* Atomically clear bits in a sys-register; The bits set in 'mask' - * are cleared in the register; others are left unmodified. - * - * RETURNS: old state. - * - * NOTE : since BSP_clrSysReg( reg, 0 ) does not make - * any changes this call may be used - * to read the current status w/o modifying it. - */ - -uint8_t BSP_clrSysReg(volatile uint8_t *r, uint8_t mask); - -/* Convenience wrappers around BSP_setSysReg()/BSP_clrSysReg() */ - -/* Set write-protection for all EEPROM devices - * RETURNS: old status - */ -uint8_t BSP_eeprom_write_protect(void); - -/* Disengage write-protection for all EEPROM devices - * RETURNS: old status - */ -uint8_t BSP_eeprom_write_enable(void); - -/* Set LEDs that have their bit set in the mask - * - * RETURNS: old status. - * - * NOTE : since BSP_setLEDs( 0 ) does not make - * any changes this call may be used - * to read the current status w/o modifying it. - */ -uint8_t BSP_setLEDs(uint8_t mask); - -/* Clear LEDs that have their bit set in the mask - * - * RETURNS: old status - * - * NOTE: : see above (BSP_setLEDs) - */ -uint8_t BSP_clrLEDs(uint8_t mask); - -#if 0 -#define outport_byte(port,value) outb(value,port) -#define outport_word(port,value) outw(value,port) -#define outport_long(port,value) outl(value,port) - -#define inport_byte(port,value) (value = inb(port)) -#define inport_word(port,value) (value = inw(port)) -#define inport_long(port,value) (value = inl(port)) -#endif - -/* - * Total memory using RESIDUAL DATA - */ -extern unsigned int BSP_mem_size; -/* - * PCI Bus Frequency - */ -extern unsigned int BSP_bus_frequency; -/* - * processor clock frequency - */ -extern unsigned int BSP_processor_frequency; -/* - * Time base divisior (how many tick for 1 second). - */ -extern unsigned int BSP_time_base_divisor; -/* - * The commandline as passed from the bootloader. - */ -extern char *BSP_commandline_string; - -#define BSP_Convert_decrementer( _value ) \ - ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value))) - -extern rtems_configuration_table BSP_Configuration; -/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */ -extern int BSP_disconnect_clock_handler (void); -extern int BSP_connect_clock_handler (void); - -/* clear hostbridge errors - * - * NOTE: The routine returns always (-1) if 'enableMCP==1' - * [semantics needed by libbspExt] if the MCP input is not wired. - * It returns and clears the error bits of the PCI status register. - * MCP support is disabled because: - * a) the 2100 has no raven chip - * b) the raven (2300) would raise machine check interrupts - * on PCI config space access to empty slots. - */ -extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet); -extern void BSP_motload_pci_fixup(void); - -struct rtems_bsdnet_ifconfig; - -int -rtems_tsec_attach(struct rtems_bsdnet_ifconfig *ifcfg, int attaching); - -#define RTEMS_BSP_NETWORK_DRIVER_NAME "tse1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_tsec_attach - -/* - * Prototypes for methods called only from .S for dependency tracking - */ -char *save_boot_params( - void *r3, - void *r4, - void *r5, - char *cmdline_start, - char *cmdline_end -); -void zero_bss(void); - -/* - * Prototypes for methods in the BSP that cross file boundaries - */ -extern void BSP_vme_config(void); -extern void BSP_pciConfigDump_early( void ); - -#ifdef __cplusplus -} -#endif - -#endif /* !ASM */ - -#endif diff --git a/c/src/lib/libbsp/powerpc/mvme3100/include/tm27.h b/c/src/lib/libbsp/powerpc/mvme3100/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme3100/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include <rtems/tm27-default.h> diff --git a/c/src/lib/libbsp/powerpc/mvme3100/irq/irq.h b/c/src/lib/libbsp/powerpc/mvme3100/irq/irq.h deleted file mode 100644 index 0158e05149..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme3100/irq/irq.h +++ /dev/null @@ -1,137 +0,0 @@ -/** - * @file - * - * @ingroup powerpc_irq - * - * @brief This include file describe the data structure and the functions - * implemented by RTEMS to write interrupt handlers. - */ - -/* irq.h - * - * This include file describe the data structure and the functions implemented - * by RTEMS to write interrupt handlers. - * - * Copyright (C) 1999 valette@crf.canon.fr - * - * This code is heavilly inspired by the public specification of STREAM V2 - * that can be found at : - * - * <http://www.chorus.com/Documentation/index.html> by following - * the STREAM API Specification Document link. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - * Adapted for the mvme3100 BSP by T. Straumann, 2007. - */ - -#ifndef BSP_POWERPC_IRQ_H -#define BSP_POWERPC_IRQ_H - -#define BSP_SHARED_HANDLER_SUPPORT 1 -#include <rtems/irq.h> - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup powerpc_irq Definitions - * - * @ingroup powerpc_mvme3100 - * - * @brief rtems_irq_number Definitions - */ - -/* Must pad number of external sources to 16 because - * of the layout of vector/priority registers in the - * 8540's openpic where there is a gap between - * registers corresponding to external and core sources. - */ -#define BSP_EXT_IRQ_NUMBER (16) -#define BSP_CORE_IRQ_NUMBER (32) - -/* openpic glue code from shared/irq assigns priorities and configures - * initial ISRs for BSP_PCI_IRQ_NUMBER entries (plus ISA stuff on legacy - * boards). Hence PCI_IRQ_NUMBER must also cover the internal sources - * even though they have nothing to do with PCI. - */ -#define BSP_PCI_IRQ_NUMBER (BSP_EXT_IRQ_NUMBER + BSP_CORE_IRQ_NUMBER) -#define BSP_PCI_IRQ_LOWEST_OFFSET (0) -#define BSP_PCI_IRQ_MAX_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1) - -#define BSP_CORE_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_EXT_IRQ_NUMBER) -#define BSP_CORE_IRQ_MAX_OFFSET (BSP_CORE_IRQ_LOWEST_OFFSET + BSP_CORE_IRQ_NUMBER - 1) - -/* - * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt - * handler might be connected - */ -#define BSP_PROCESSOR_IRQ_NUMBER (1) -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CORE_IRQ_MAX_OFFSET + 1) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) -/* Misc vectors for OPENPIC irqs (IPI, timers) - */ -#define BSP_MISC_IRQ_NUMBER (8) -#define BSP_MISC_IRQ_LOWEST_OFFSET (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) -#define BSP_MISC_IRQ_MAX_OFFSET (BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1) -/* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_MISC_IRQ_MAX_OFFSET + 1) -#define BSP_LOWEST_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET) -#define BSP_MAX_OFFSET (BSP_MISC_IRQ_MAX_OFFSET) - -/* - * Some PCI IRQ symbolic name definition - */ -#define BSP_PCI_IRQ0 (BSP_PCI_IRQ_LOWEST_OFFSET) - -#define BSP_VME0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 0) -#define BSP_VME1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1) -#define BSP_VME2_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2) -#define BSP_VME3_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3) - -#define BSP_ABORT_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 8) -#define BSP_TEMP_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 9) -#define BSP_PHY_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 10) -#define BSP_RTC_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 11) - -/* Weird - they provide 3 different IRQ lines per ethernet controller - * but only one shared line for 2 UARTs ??? - */ -#define BSP_UART_COM1_IRQ (BSP_CORE_IRQ_LOWEST_OFFSET + 26) -#define BSP_UART_COM2_IRQ (BSP_CORE_IRQ_LOWEST_OFFSET + 26) -#define BSP_I2C_IRQ (BSP_CORE_IRQ_LOWEST_OFFSET + 27) - -/* - * Some internal (CORE) name definitions - */ -/* Ethernet (FEC) */ -#define BSP_CORE_IRQ_FEC (BSP_CORE_IRQ_LOWEST_OFFSET + 25) -/* i2c controller */ -#define BSP_CORE_IRQ_I2C (BSP_CORE_IRQ_LOWEST_OFFSET + 27) - -/* - * Some Processor execption handled as RTEMS IRQ symbolic name definition - */ -#define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET) - -/*-------------------------------------------------------------------------+ -| Function Prototypes. -+--------------------------------------------------------------------------*/ - -extern void BSP_rtems_irq_mng_init(unsigned cpuId); - -#include <bsp/irq_supp.h> - -#ifdef __cplusplus -}; -#endif - -#endif -#endif diff --git a/c/src/lib/libbsp/powerpc/mvme3100/network/if_tsec_pub.h b/c/src/lib/libbsp/powerpc/mvme3100/network/if_tsec_pub.h deleted file mode 100644 index 7eb0358eae..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme3100/network/if_tsec_pub.h +++ /dev/null @@ -1,475 +0,0 @@ -/** - * @file - * - * @ingroup powerpc_iftsecpub - * - * @brief IF_TSEC_PUB Support - */ - -#ifndef IF_TSEC_PUBLIC_INTERFACE_H -#define IF_TSEC_PUBLIC_INTERFACE_H - -/* - * Authorship - * ---------- - * This software ('mvme3100' RTEMS BSP) was created by - * - * Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * The 'mvme3100' BSP was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#include <rtems.h> -#include <stdio.h> -#include <stdint.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* Opaque driver handle */ -struct tsec_private; - -/********** Low-level Driver API ****************/ - -/** - * @defgroup powerpc_iftsecpub Low-level Driver API - * - * @ingroup powerpc_mvme3100 - * - * @brief This API provides driver access to applications that - * want to use e.g., the second ethernet interface - * independently from the BSD TCP/IP stack. E.g., for - * raw ethernet packet communication... - */ - -#define TSEC_TXIRQ ( (1<<(31-9)) | (1<<(31-11)) ) -#define TSEC_RXIRQ ( (1<<(31-0)) | (1<<(31- 3)) | (1<<(31-24)) ) -#define TSEC_LKIRQ ( 1<<(31- 4) ) -/* - * Setup an interface. - * Allocates resources for descriptor rings and sets up the driver software structure. - * - * Arguments: - * unit: - * interface # (1..2). The interface must not be attached to BSD already. - * - * driver_tid: - * ISR posts RTEMS event # ('unit' - 1) to task with ID 'driver_tid' and disables interrupts - * from this interface. - * - * void (*cleanup_txbuf)(void *user_buf, void *cleanup_txbuf_arg, int error_on_tx_occurred): - * Pointer to user-supplied callback to release a buffer that had been sent - * by BSP_tsec_send_buf() earlier. The callback is passed 'cleanup_txbuf_arg' - * and a flag indicating whether the send had been successful. - * The driver no longer accesses 'user_buf' after invoking this callback. - * CONTEXT: This callback is executed either by BSP_tsec_swipe_tx() or - * BSP_tsec_send_buf(), BSP_tsec_init_hw(), BSP_tsec_stop_hw() (the latter - * ones calling BSP_tsec_swipe_tx()). - * void *cleanup_txbuf_arg: - * Closure argument that is passed on to 'cleanup_txbuf()' callback; - * - * void *(*alloc_rxbuf)(int *p_size, uintptr_t *p_data_addr), - * Pointer to user-supplied callback to allocate a buffer for subsequent - * insertion into the RX ring by the driver. - * RETURNS: opaque handle to the buffer (which may be a more complex object - * such as an 'mbuf'). The handle is not used by the driver directly - * but passed back to the 'consume_rxbuf()' callback. - * Size of the available data area and pointer to buffer's data area - * in '*psize' and '*p_data_area', respectively. - * If no buffer is available, this routine should return NULL in which - * case the driver drops the last packet and re-uses the last buffer - * instead of handing it out to 'consume_rxbuf()'. - * CONTEXT: Called when initializing the RX ring (BSP_tsec_init_hw()) or when - * swiping it (BSP_tsec_swipe_rx()). - * - * - * void (*consume_rxbuf)(void *user_buf, void *consume_rxbuf_arg, int len); - * Pointer to user-supplied callback to pass a received buffer back to - * the user. The driver no longer accesses the buffer after invoking this - * callback (with 'len'>0, see below). 'user_buf' is the buffer handle - * previously generated by 'alloc_rxbuf()'. - * The callback is passed 'cleanup_rxbuf_arg' and a 'len' - * argument giving the number of bytes that were received. - * 'len' may be <=0 in which case the 'user_buf' argument is NULL. - * 'len' == 0 means that the last 'alloc_rxbuf()' had failed, - * 'len' < 0 indicates a receiver error. In both cases, the last packet - * was dropped/missed and the last buffer will be re-used by the driver. - * NOTE: the data are 'prefixed' with two bytes, i.e., the ethernet packet header - * is stored at offset 2 in the buffer's data area. Also, the FCS (4 bytes) - * is appended. 'len' accounts for both. - * CONTEXT: Called from BSP_tsec_swipe_rx(). - * void *cleanup_rxbuf_arg: - * Closure argument that is passed on to 'consume_rxbuf()' callback; - * - * rx_ring_size, tx_ring_size: - * How many big to make the RX and TX descriptor rings. Note that the sizes - * may be 0 in which case a reasonable default will be used. - * If either ring size is < 0 then the RX or TX will be disabled. - * Note that it is illegal in this case to use BSP_tsec_swipe_rx() or - * BSP_tsec_swipe_tx(), respectively. - * - * irq_mask: - * Interrupts to enable. OR of flags from above. - * - */ -struct tsec_private * -BSP_tsec_setup( - int unit, - rtems_id driver_tid, - void (*cleanup_txbuf)(void *user_buf, void *cleanup_txbuf_arg, int error_on_tx_occurred), - void * cleanup_txbuf_arg, - void * (*alloc_rxbuf)(int *p_size, uintptr_t *p_data_addr), - void (*consume_rxbuf)(void *user_buf, void *consume_rxbuf_arg, int len), - void * consume_rxbuf_arg, - int rx_ring_size, - int tx_ring_size, - int irq_mask -); - -/* - * Alternate 'setup' routine allowing the user to install an ISR rather - * than a task ID. - * All parameters (other than 'isr' / 'isr_arg') and the return value - * are identical to the BSP_tsec_setup() entry point. - */ -struct tsec_private * -BSP_tsec_setup_1( - int unit, - void (*isr)(void *isr_arg), - void * isr_arg, - void (*cleanup_txbuf)(void *user_buf, void *cleanup_txbuf_arg, int error_on_tx_occurred), - void * cleanup_txbuf_arg, - void * (*alloc_rxbuf)(int *p_size, uintptr_t *p_data_addr), - void (*consume_rxbuf)(void *user_buf, void *consume_rxbuf_arg, int len), - void * consume_rxbuf_arg, - int rx_ring_size, - int tx_ring_size, - int irq_mask -); - - -/* - * Descriptor scavenger; cleanup the TX ring, passing all buffers - * that have been sent to the cleanup_tx() callback. - * This routine is called from BSP_tsec_send_buf(), BSP_tsec_init_hw(), - * BSP_tsec_stop_hw(). - * - * RETURNS: number of buffers processed. - */ - -int -BSP_tsec_swipe_tx(struct tsec_private *mp); - - -/* - * Reset statistics counters. - */ -void -BSP_tsec_reset_stats(struct tsec_private *mp); - -/* - * Initialize interface hardware - * - * 'mp' handle obtained by from BSP_tsec_setup(). - * 'promisc' whether to set promiscuous flag. - * 'enaddr' pointer to six bytes with MAC address. Read - * from the device if NULL. - * NOTE: multicast filter is cleared by this routine. - */ -void -BSP_tsec_init_hw(struct tsec_private *mp, int promisc, unsigned char *enaddr); - -/* - * Clear multicast hash filter. No multicast frames are accepted - * after executing this routine (unless the hardware was initialized - * in 'promiscuous' mode). - * - * Reset reference count for all hash-table entries - * to zero (see BSP_tsec_mcast_filter_accept_del()). - */ -void -BSP_tsec_mcast_filter_clear(struct tsec_private *mp); - -/* - * Program multicast filter to accept all multicast frames. - * - * Increment reference count for all hash-table entries - * by one (see BSP_tsec_mcast_filter_accept_del()). - */ -void -BSP_tsec_mcast_filter_accept_all(struct tsec_private *mp); - -/* - * Add a MAC address to the multicast filter and increment - * the reference count for the matching hash-table entry - * (see BSP_tsec_mcast_filter_accept_del()). - * - * Existing entries are not changed but note that - * the filter is imperfect, i.e., multiple MAC addresses - * may alias to a single filter entry. Hence software - * filtering must still be performed. - * - */ -void -BSP_tsec_mcast_filter_accept_add(struct tsec_private *mp, unsigned char *enaddr); - -/* - * Remove a MAC address from the (imperfec) multicast - * filter. - * Note that the driver maintains an internal reference - * counter for each multicast hash. The hash-table - * entry is only cleared when the reference count - * reaches zero ('del' has been called the same - * amount of times as 'add' for an address (or - * any alias) that matches a given table entry. - * BSP_tsec_mcast_filter_clear() resets all reference - * counters to zero. - */ -void -BSP_tsec_mcast_filter_accept_del(struct tsec_private *mp, unsigned char *enaddr); - -/* - * Dump statistics to FILE 'f'. If NULL, stdout is used. - */ -void -BSP_tsec_dump_stats(struct tsec_private *mp, FILE *f); - -/* - * Shutdown hardware and clean out the rings - */ -void -BSP_tsec_stop_hw(struct tsec_private *mp); - -/* - * calls BSP_tsec_stop_hw(), releases all resources and marks the interface - * as unused. - * RETURNS 0 on success, nonzero on failure. - * NOTE: the handle MUST NOT be used after successful execution of this - * routine. - */ -int -BSP_tsec_detach(struct tsec_private *mp); - -/* - * Enqueue a mbuf chain or a raw data buffer for transmission; - * RETURN: #bytes sent or -1 if there are not enough free descriptors - * - * If 'len' is <=0 then 'm_head' is assumed to point to a mbuf chain. - * OTOH, a raw data packet (or a different type of buffer) - * may be sent (non-BSD driver) by pointing data_p to the start of - * the data and passing 'len' > 0. - * 'm_head' is passed back to the 'cleanup_txbuf()' callback. - * - * Comments: software cache-flushing incurs a penalty if the - * packet cannot be queued since it is flushed anyways. - * The algorithm is slightly more efficient in the normal - * case, though. - * - * RETURNS: # bytes enqueued to device for transmission or -1 if no - * space in the TX ring was available. - */ - -int -BSP_tsec_send_buf(struct tsec_private *mp, void *m_head, void *data_p, int len); - -/* - * Retrieve all received buffers from the RX ring, replacing them - * by fresh ones (obtained from the alloc_rxbuf() callback). The - * received buffers are passed to consume_rxbuf(). - * - * RETURNS: number of buffers processed. - */ -int -BSP_tsec_swipe_rx(struct tsec_private *mp); - -/* read ethernet address from hw to buffer */ -void -BSP_tsec_read_eaddr(struct tsec_private *mp, unsigned char *eaddr); - -/* Read MII register */ -uint32_t -BSP_tsec_mdio_rd(struct tsec_private *mp, unsigned reg); - -/* Write MII register */ -int -BSP_tsec_mdio_wr(struct tsec_private *mp, unsigned reg, uint32_t val); - -/* - * read/write media word. - * 'cmd': can be SIOCGIFMEDIA, SIOCSIFMEDIA, 0 or 1. The latter - * are aliased to the former for convenience. - * 'parg': pointer to media word. - * - * RETURNS: 0 on success, nonzero on error - */ -int -BSP_tsec_media_ioctl(struct tsec_private *mp, int cmd, int *parg); - -/* Interrupt related routines */ - -/* - * When it comes to interrupts the chip has two rather - * annoying features: - * 1 once an IRQ is pending, clearing the IMASK does not - * de-assert the interrupt line. - * 2 the chip has three physical interrupt lines even though - * all events are reported in a single register. Rather - * useless; we must hook 3 ISRs w/o any real benefit. - * In fact, it makes our life a bit more difficult: - * - * Hence, for (1) we would have to mask interrupts at the PIC - * but to re-enable them we would have to do that three times - * because of (2). - * - * Therefore, we take the following approach: - * - * ISR masks all interrupts on the TSEC, acks/clears them - * and stores the acked irqs in the device struct where - * it is picked up by BSP_tsec_ack_irqs(). - * Since all interrupts are disabled until the daemon - * re-enables them after calling BSP_tsec_ack_irqs() - * no interrupts are lost. - * - * BUT: NO isr (including PHY isrs) MUST INTERRUPT ANY - * OTHER ONE, i.e., they all must have the same - * priority. Otherwise, integrity of the cached - * irq_pending variable may be compromised. - */ - -/* Note: the BSP_tsec_enable/disable/ack_irqs() entry points - * are deprecated. - * The newer API where the user passes a mask allows - * for more selective control. - */ - -/* Enable interrupts at device */ -void -BSP_tsec_enable_irqs(struct tsec_private *mp); - -/* Disable interrupts at device */ -void -BSP_tsec_disable_irqs(struct tsec_private *mp); - -/* - * Acknowledge (and clear) interrupts. - * RETURNS: interrupts that were raised. - */ -uint32_t -BSP_tsec_ack_irqs(struct tsec_private *mp); - -/* Enable interrupts included in 'mask' (leaving - * already enabled interrupts on). If the mask includes - * bits that were not passed to the 'setup' routine then - * the behavior is undefined. - */ -void -BSP_tsec_enable_irq_mask(struct tsec_private *mp, uint32_t irq_mask); - -/* Disable interrupts included in 'mask' (leaving - * other ones that are currently enabled on). If the mask - * includes bits that were not passed to the 'setup' routine - * then the behavior is undefined. - - * RETURNS: Bitmask of interrupts that were enabled upon entry - * into this routine. This can be used to restore the previous - * state. - */ -uint32_t -BSP_tsec_disable_irq_mask(struct tsec_private *mp, uint32_t irq_mask); - -/* Acknowledge and clear selected interrupts. - * - * RETURNS: All pending interrupts. - * - * NOTE: Only pending interrupts contained in 'mask' - * are cleared. Others are left pending. - * - * This routine can be used to check for pending - * interrupts (pass mask == 0) or to clear all - * interrupts (pass mask == -1). - */ -uint32_t -BSP_tsec_ack_irq_mask(struct tsec_private *mp, uint32_t mask); - - -/* Retrieve the driver daemon TID that was passed to - * BSP_tsec_setup(). - */ - -rtems_id -BSP_tsec_get_tid(struct tsec_private *mp); - -struct tsec_private * -BSP_tsec_getp(unsigned index); - -/* - * - * Example driver task loop (note: no synchronization of - * buffer access shown!). - * RTEMS_EVENTx = 0,1 or 2 depending on IF unit. - * - * / * setup (obtain handle) and initialize hw here * / - * - * do { - * / * ISR disables IRQs and posts event * / - * rtems_event_receive( RTEMS_EVENTx, RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &evs ); - * irqs = BSP_tsec_ack_irqs(handle); - * if ( irqs & BSP_TSEC_IRQ_TX ) { - * BSP_tsec_swipe_tx(handle); / * cleanup_txbuf() callback executed * / - * } - * if ( irqs & BSP_TSEC_IRQ_RX ) { - * BSP_tsec_swipe_rx(handle); / * alloc_rxbuf() and consume_rxbuf() executed * / - * } - * BSP_tsec_enable_irqs(handle); - * } while (1); - * - */ - -/* PUBLIC RTEMS BSDNET ATTACH FUNCTION */ -struct rtems_bsdnet_ifconfig; - -int -rtems_tsec_attach(struct rtems_bsdnet_ifconfig *ifcfg, int attaching); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am b/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am deleted file mode 100644 index b9c491762d..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme3100/preinstall.am +++ /dev/null @@ -1,136 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_LIB)/motld_start.$(OBJEXT): motld_start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/motld_start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/motld_start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds.share: ../shared/startup/linkcmds.share $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.share -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.share - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_INCLUDE)/bsp/uart.h: ../../powerpc/shared/console/uart.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h - -$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/openpic.h: ../../powerpc/shared/openpic/openpic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/openpic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/openpic.h - -$(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h - -$(PROJECT_INCLUDE)/bsp/VMEConfig.h: vme/VMEConfig.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEConfig.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEConfig.h - -$(PROJECT_INCLUDE)/bsp/vmeTsi148.h: ../../shared/vmeUniverse/vmeTsi148.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeTsi148.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeTsi148.h - -$(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vme_am_defs.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vme_am_defs.h - -$(PROJECT_INCLUDE)/bsp/VME.h: ../../shared/vmeUniverse/VME.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VME.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VME.h - -$(PROJECT_INCLUDE)/bsp/vmeTsi148DMA.h: ../../shared/vmeUniverse/vmeTsi148DMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeTsi148DMA.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeTsi148DMA.h - -$(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h: ../../shared/vmeUniverse/bspVmeDmaList.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h - -$(PROJECT_INCLUDE)/bsp/VMEDMA.h: ../../shared/vmeUniverse/VMEDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEDMA.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEDMA.h - -$(PROJECT_INCLUDE)/bsp/flashPgm.h: ../shared/flash/flashPgm.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/flashPgm.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/flashPgm.h - -$(PROJECT_INCLUDE)/bsp/flashPgmPvt.h: ../shared/flash/flashPgmPvt.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/flashPgmPvt.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/flashPgmPvt.h - -$(PROJECT_INCLUDE)/bsp/mpc8540_i2c_busdrv.h: i2c/mpc8540_i2c_busdrv.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mpc8540_i2c_busdrv.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mpc8540_i2c_busdrv.h - -$(PROJECT_INCLUDE)/bsp/vpd.h: ../shared/motorola/vpd.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vpd.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vpd.h - -if HAS_NETWORKING -$(PROJECT_INCLUDE)/bsp/if_tsec_pub.h: network/if_tsec_pub.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/if_tsec_pub.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/if_tsec_pub.h -endif diff --git a/c/src/lib/libbsp/powerpc/mvme3100/bsp_specs b/c/src/lib/libbsp/powerpc/mvme3100/startup/bsp_specs index 2625609327..2625609327 100644 --- a/c/src/lib/libbsp/powerpc/mvme3100/bsp_specs +++ b/c/src/lib/libbsp/powerpc/mvme3100/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/mvme3100/vme/VMEConfig.h b/c/src/lib/libbsp/powerpc/mvme3100/vme/VMEConfig.h deleted file mode 100644 index 10b424c2a8..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme3100/vme/VMEConfig.h +++ /dev/null @@ -1,132 +0,0 @@ -/** - * @file - * - * @ingroup powerpc_vmeconfig - * - * @brief mvme3100 BSP specific address space configuration parameters - */ - -#ifndef RTEMS_BSP_VME_CONFIG_H -#define RTEMS_BSP_VME_CONFIG_H - -/* - * Authorship - * ---------- - * This software was created by - * Till Straumann <strauman@slac.stanford.edu>, 2002..2007, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * This software was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -/* - * NOTE: the BSP (startup/bspstart.c) uses - * hardcoded window lengths that match this - * layout: - */ - -#define _VME_A32_WIN0_ON_PCI 0xc0000000 -#define _VME_CSR_ON_PCI 0xce000000 -#define _VME_A24_ON_PCI 0xcf000000 -#define _VME_A16_ON_PCI 0xcfff0000 - -/* start of the A32 window on the VME bus - * TODO: this should perhaps be a run-time configuration option - */ -#define _VME_A32_WIN0_ON_VME 0x20000000 - -/* if _VME_DRAM_OFFSET is defined, the BSP - * will map the board RAM onto the VME bus, starting - * at _VME_DRAM_OFFSET - */ -#define _VME_DRAM_OFFSET 0xc0000000 - -/* If your BSP requires a non-standard way to configure - * the VME interrupt manager then define the symbol - * - * BSP_VME_INSTALL_IRQ_MGR - * - * to a proper instruction sequence that installs the - * universe interrupt manager. This requires knowledge - * of the wiring between the universe and the PIC (main - * interrupt controller), i.e., which IRQ 'pins' of the - * universe are wired to which 'lines'/inputs at the PIC. - * (consult vmeUniverse.h for more information). - * - * When installing the universe IRQ manager it is also - * possible to specify whether it should try to share - * PIC interrupts with other sources. This might not - * be supported by all BSPs (but the unverse driver - * recognizes that). - * - * If BSP_VME_INSTALL_IRQ_MGR is undefined then - * the default algorithm is used (vme_universe.c): - * - * This default setup uses only a single wire. It reads - * the PIC 'line' from PCI configuration space and assumes - * this to be wired to the first (LIRQ0) IRQ input at the - * universe. The default setup tries to use interrupt - * sharing. - */ - -extern int BSP_VMEInit(void); -extern int BSP_VMEIrqMgrInstall(void); - -/** - * @defgroup powerpc_vme BSP_VME_INSTALL_IRQ_MGR Support - * - * @ingroup powerpc_mvme3100 - * - * @brief BSP_VME_INSTALL_IRQ_MGR Support Package - */ -#define BSP_VME_INSTALL_IRQ_MGR(err) \ - do { \ - err = vmeTsi148InstallIrqMgrAlt(\ - VMETSI148_IRQ_MGR_FLAG_SHARED, /* use shared IRQs */ \ - 0, BSP_VME0_IRQ, \ - 1, BSP_VME1_IRQ, \ - 2, BSP_VME2_IRQ, \ - 3, BSP_VME3_IRQ, \ - -1 /* terminate list */ \ - ); \ - } while (0) - -/* This BSP uses the Tsi148 Driver */ -#define _VME_DRIVER_TSI148 - -#endif diff --git a/c/src/lib/libbsp/powerpc/mvme5500/GT64260/GT64260TWSI.h b/c/src/lib/libbsp/powerpc/mvme5500/GT64260/GT64260TWSI.h deleted file mode 100644 index 1377e6f607..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/GT64260/GT64260TWSI.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __GT64260TWSI_h -#define __GT64260TWSI_h - -/* GT64260TWSI.h - header for the GT64260 Two-Wire Serial Interface */ - -/* TWSI Control Register Bits */ -#define TWSI_ACK 4 -#define TWSI_INTFLG 8 -#define TWSI_STOP 0x10 -#define TWSI_START 0x20 -#define TWSI_TWSIEN 0x40 -#define TWSI_INTEN 0x80 - -void GT64260TWSIinit(void); -int GT64260TWSIstart(void); -int GT64260TWSIwrite(unsigned char Data); -int GT64260TWSIread(unsigned char *, int lastByte); -int GT64260TWSIstop(void); - -#endif diff --git a/c/src/lib/libbsp/powerpc/mvme5500/GT64260/VPD.h b/c/src/lib/libbsp/powerpc/mvme5500/GT64260/VPD.h deleted file mode 100644 index 33aec8b74c..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/GT64260/VPD.h +++ /dev/null @@ -1,9 +0,0 @@ -/* The mapping of the Configuration VPD - * - * (C) 2004, NSLS, Brookhaven National Laboratory, - * S. Kate Feng, <feng1@bnl.gov> - * - */ - -#define VPD_ENET0_OFFSET 0x3c -#define VPD_ENET1_OFFSET 0x45 diff --git a/c/src/lib/libbsp/powerpc/mvme5500/GT64260/bspMvme5500.h b/c/src/lib/libbsp/powerpc/mvme5500/GT64260/bspMvme5500.h deleted file mode 100644 index 9fb53869ff..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/GT64260/bspMvme5500.h +++ /dev/null @@ -1,15 +0,0 @@ -/* GT64260 register base mapping on the MVME5500 - * - * (C) Shuchen K. Feng <feng1@bnl.gov>,NSLS, - * Brookhaven National Laboratory, 2003 - * - */ -#define _256M 0x10000000 -#define _512M 0x20000000 - -#define GT64260_REG_BASE 0xf1000000 /* Base of GT64260 Reg Space */ -#define GT64260_REG_SPACE_SIZE 0x10000 /* 64Kb Internal Reg Space */ - -#define GT64260_DEV1_BASE 0xf1100000 /* Device bank1(chip select 1) base - */ -#define GT64260_DEV1_SIZE 0x00100000 /* Device bank size */ diff --git a/c/src/lib/libbsp/powerpc/mvme5500/GT64260/gtreg.h b/c/src/lib/libbsp/powerpc/mvme5500/GT64260/gtreg.h deleted file mode 100644 index e9aaeff844..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/GT64260/gtreg.h +++ /dev/null @@ -1,810 +0,0 @@ -/* $NetBSD: gtreg.h,v 1.1 2003/03/05 22:08:22 matt Exp $ */ - -/* - * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Allegro Networks, Inc., and Wasabi Systems, Inc. - * 4. The name of Allegro Networks, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * 5. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND - * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC. - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DISCOVERY_DEV_GTREG_H_ -#define _DISCOVERY_DEV_GTREG_H_ - -#define GT__BIT(bit) (1U << (bit)) -#define GT__MASK(bit) (GT__BIT(bit) - 1) -#define GT__EXT(data, bit, len) (((data) >> (bit)) & GT__MASK(len)) -#define GT__CLR(data, bit, len) ((data) &= ~(GT__MASK(len) << (bit))) -#define GT__INS(new, bit) ((new) << (bit)) - - -/* - * Table 30: CPU Address Decode Register Map - */ -#define GT_SCS0_Low_Decode 0x0008 -#define GT_SCS0_High_Decode 0x0010 -#define GT_SCS1_Low_Decode 0x0208 -#define GT_SCS1_High_Decode 0x0210 -#define GT_SCS2_Low_Decode 0x0018 -#define GT_SCS2_High_Decode 0x0020 -#define GT_SCS3_Low_Decode 0x0218 -#define GT_SCS3_High_Decode 0x0220 -#define GT_CS0_Low_Decode 0x0028 -#define GT_CS0_High_Decode 0x0030 -#define GT_CS1_Low_Decode 0x0228 -#define GT_CS1_High_Decode 0x0230 -#define GT_CS2_Low_Decode 0x0248 -#define GT_CS2_High_Decode 0x0250 -#define GT_CS3_Low_Decode 0x0038 -#define GT_CS3_High_Decode 0x0040 -#define GT_BootCS_Low_Decode 0x0238 -#define GT_BootCS_High_Decode 0x0240 -#define GT_PCI0_IO_Low_Decode 0x0048 -#define GT_PCI0_IO_High_Decode 0x0050 -#define GT_PCI0_Mem0_Low_Decode 0x0058 -#define GT_PCI0_Mem0_High_Decode 0x0060 -#define GT_PCI0_Mem1_Low_Decode 0x0080 -#define GT_PCI0_Mem1_High_Decode 0x0088 -#define GT_PCI0_Mem2_Low_Decode 0x0258 -#define GT_PCI0_Mem2_High_Decode 0x0260 -#define GT_PCI0_Mem3_Low_Decode 0x0280 -#define GT_PCI0_Mem3_High_Decode 0x0288 -#define GT_PCI1_IO_Low_Decode 0x0090 -#define GT_PCI1_IO_High_Decode 0x0098 -#define GT_PCI1_Mem0_Low_Decode 0x00a0 -#define GT_PCI1_Mem0_High_Decode 0x00a8 -#define GT_PCI1_Mem1_Low_Decode 0x00b0 -#define GT_PCI1_Mem1_High_Decode 0x00b8 -#define GT_PCI1_Mem2_Low_Decode 0x02a0 -#define GT_PCI1_Mem2_High_Decode 0x02a8 -#define GT_PCI1_Mem3_Low_Decode 0x02b0 -#define GT_PCI1_Mem3_High_Decode 0x02b8 -#define GT_Internal_Decode 0x0068 -#define GT_CPU0_Low_Decode 0x0290 -#define GT_CPU0_High_Decode 0x0298 -#define GT_CPU1_Low_Decode 0x02c0 -#define GT_CPU1_High_Decode 0x02c8 -#define GT_PCI0_IO_Remap 0x00f0 -#define GT_PCI0_Mem0_Remap_Low 0x00f8 -#define GT_PCI0_Mem0_Remap_High 0x0320 -#define GT_PCI0_Mem1_Remap_Low 0x0100 -#define GT_PCI0_Mem1_Remap_High 0x0328 -#define GT_PCI0_Mem2_Remap_Low 0x02f8 -#define GT_PCI0_Mem2_Remap_High 0x0330 -#define GT_PCI0_Mem3_Remap_Low 0x0300 -#define GT_PCI0_Mem3_Remap_High 0x0338 -#define GT_PCI1_IO_Remap 0x0108 -#define GT_PCI1_Mem0_Remap_Low 0x0110 -#define GT_PCI1_Mem0_Remap_High 0x0340 -#define GT_PCI1_Mem1_Remap_Low 0x0118 -#define GT_PCI1_Mem1_Remap_High 0x0348 -#define GT_PCI1_Mem2_Remap_Low 0x0310 -#define GT_PCI1_Mem2_Remap_High 0x0350 -#define GT_PCI1_Mem3_Remap_Low 0x0318 -#define GT_PCI1_Mem3_Remap_High 0x0358 - - -/* - * Table 31: CPU Control Register Map - */ -#define GT_CPU_Cfg 0x0000 -#define GT_CPU_Mode 0x0120 -#define GT_CPU_Master_Ctl 0x0160 -#define GT_CPU_If_Xbar_Ctl_Low 0x0150 -#define GT_CPU_If_Xbar_Ctl_High 0x0158 -#define GT_CPU_If_Xbar_Timeout 0x0168 -#define GT_CPU_Rd_Rsp_Xbar_Ctl_Low 0x0170 -#define GT_CPU_Rd_Rsp_Xbar_Ctl_High 0x0178 - -/* - * Table 32: CPU Sync Barrier Register Map - */ -#define GT_PCI_Sync_Barrier(bus) (0x00c0 | ((bus) << 3)) -#define GT_PCI0_Sync_Barrier 0x00c0 -#define GT_PCI1_Sync_Barrier 0x00c8 - -/* - * Table 33: CPU Access Protection Register Map - */ -#define GT_Protect_Low_0 0x0180 -#define GT_Protect_High_0 0x0188 -#define GT_Protect_Low_1 0x0190 -#define GT_Protect_High_1 0x0198 -#define GT_Protect_Low_2 0x01a0 -#define GT_Protect_High_2 0x01a8 -#define GT_Protect_Low_3 0x01b0 -#define GT_Protect_High_3 0x01b8 -#define GT_Protect_Low_4 0x01c0 -#define GT_Protect_High_4 0x01c8 -#define GT_Protect_Low_5 0x01d0 -#define GT_Protect_High_5 0x01d8 -#define GT_Protect_Low_6 0x01e0 -#define GT_Protect_High_6 0x01e8 -#define GT_Protect_Low_7 0x01f0 -#define GT_Protect_High_7 0x01f8 - -/* - * Table 34: Snoop Control Register Map - */ -#define GT_Snoop_Base_0 0x0380 -#define GT_Snoop_Top_0 0x0388 -#define GT_Snoop_Base_1 0x0390 -#define GT_Snoop_Top_1 0x0398 -#define GT_Snoop_Base_2 0x03a0 -#define GT_Snoop_Top_2 0x03a8 -#define GT_Snoop_Base_3 0x03b0 -#define GT_Snoop_Top_3 0x03b8 - -/* - * Table 35: CPU Error Report Register Map - */ -#define GT_CPU_Error_Address_Low 0x0070 -#define GT_CPU_Error_Address_High 0x0078 -#define GT_CPU_Error_Data_Low 0x0128 -#define GT_CPU_Error_Data_High 0x0130 -#define GT_CPU_Error_Parity 0x0138 -#define GT_CPU_Error_Cause 0x0140 -#define GT_CPU_Error_Mask 0x0148 - -#define GT_DecodeAddr_SET(g, r, v) \ - do { \ - gt_read((g), GT_Internal_Decode); \ - gt_write((g), (r), ((v) & 0xfff00000) >> 20); \ - while ((gt_read((g), (r)) & 0xfff) != ((v) >> 20)); \ - } while (0) - -#define GT_LowAddr_GET(v) (GT__EXT((v), 0, 12) << 20) -#define GT_HighAddr_GET(v) ((GT__EXT((v), 0, 12) << 20) | 0xfffff) - -#define GT_MPP_Control0 0xf000 -#define GT_MPP_Control1 0xf004 -#define GT_MPP_Control2 0xf008 -#define GT_MPP_Control3 0xf00c - -/* <skf> added for GT64260 */ -#define GT_MPP_SerialPortMultiplex 0xf010 - -#define GT_GPP_IO_Control 0xf100 -#define GT_GPP_Level_Control 0xf110 -#define GT_GPP_Value 0xf104 -#define GT_GPP_Interrupt_Cause 0xf108 -#define GT_GPP_Interrupt_Mask 0xf10c -/* - * Table 36: SCS[0]* Low Decode Address, Offset: 0x008 - * Table 38: SCS[1]* Low Decode Address, Offset: 0x208 - * Table 40: SCS[2]* Low Decode Address, Offset: 0x018 - * Table 42: SCS[3]* Low Decode Address, Offset: 0x218 - * Table 44: CS[0]* Low Decode Address, Offset: 0x028 - * Table 46: CS[1]* Low Decode Address, Offset: 0x228 - * Table 48: CS[2]* Low Decode Address, Offset: 0x248 - * Table 50: CS[3]* Low Decode Address, Offset: 0x038 - * Table 52: BootCS* Low Decode Address, Offset: 0x238 - * Table 75: CPU 0 Low Decode Address, Offset: 0x290 - * Table 77: CPU 1 Low Decode Address, Offset: 0x2c0 - * - * 11:00 LowAddr SCS[0] Base Address - * 31:12 Reserved Must be 0. - */ - -/* - * Table 37: SCS[0]* High Decode Address, Offset: 0x010 - * Table 39: SCS[1]* High Decode Address, Offset: 0x210 - * Table 41: SCS[2]* High Decode Address, Offset: 0x020 - * Table 43: SCS[3]* High Decode Address, Offset: 0x220 - * Table 45: CS[0]* High Decode Address, Offset: 0x030 - * Table 47: CS[1]* High Decode Address, Offset: 0x230 - * Table 49: CS[2]* High Decode Address, Offset: 0x250 - * Table 51: CS[3]* High Decode Address, Offset: 0x040 - * Table 53: BootCS* High Decode Address, Offset: 0x240 - * Table 76: CPU 0 High Decode Address, Offset: 0x298 - * Table 78: CPU 1 High Decode Address, Offset: 0x2c8 - * - * 11:00 HighAddr SCS[0] Top Address - * 31:12 Reserved - */ - -/* - * Table 54: PCI_0 I/O Low Decode Address, Offset: 0x048 - * Table 56: PCI_0 Memory 0 Low Decode Address, Offset: 0x058 - * Table 58: PCI_0 Memory 1 Low Decode Address, Offset: 0x080 - * Table 60: PCI_0 Memory 2 Low Decode Address, Offset: 0x258 - * Table 62: PCI_0 Memory 3 Low Decode Address, Offset: 0x280 - * Table 64: PCI_1 I/O Low Decode Address, Offset: 0x090 - * Table 66: PCI_1 Memory 0 Low Decode Address, Offset: 0x0a0 - * Table 68: PCI_1 Memory 1 Low Decode Address, Offset: 0x0b0 - * Table 70: PCI_1 Memory 2 Low Decode Address, Offset: 0x2a0 - * Table 72: PCI_1 Memory 3 Low Decode Address, Offset: 0x2b0 - * - * 11:00 LowAddr PCI IO/Memory Space Base Address - * 23:12 Reserved - * 26:24 PCISwap PCI Master Data Swap Control (0: Byte Swap; - * 1: No swapping; 2: Both byte and word swap; - * 3: Word swap; 4..7: Reserved) - * 27:27 PCIReq64 PCI master REQ64* policy (Relevant only when - * configured to 64-bit PCI bus and not I/O) - * 0: Assert s REQ64* only when transaction - * is longer than 64-bits. - * 1: Always assert REQ64*. - * 31:28 Reserved - */ -#define GT_PCISwap_GET(v) GT__EXT((v), 24, 3) -#define GT_PCISwap_ByteSwap 0 -#define GT_PCISwap_NoSwap 1 -#define GT_PCISwap_ByteWordSwap 2 -#define GT_PCISwap_WordSwap 3 -#define GT_PCI_LowDecode_PCIReq64 GT__BIT(27) - -/* - * Table 55: PCI_0 I/O High Decode Address, Offset: 0x050 - * Table 57: PCI_0 Memory 0 High Decode Address, Offset: 0x060 - * Table 59: PCI_0 Memory 1 High Decode Address, Offset: 0x088 - * Table 61: PCI_0 Memory 2 High Decode Address, Offset: 0x260 - * Table 63: PCI_0 Memory 3 High Decode Address, Offset: 0x288 - * Table 65: PCI_1 I/O High Decode Address, Offset: 0x098 - * Table 67: PCI_1 Memory 0 High Decode Address, Offset: 0x0a8 - * Table 69: PCI_1 Memory 1 High Decode Address, Offset: 0x0b8 - * Table 71: PCI_1 Memory 2 High Decode Address, Offset: 0x2a8 - * Table 73: PCI_1 Memory 3 High Decode Address, Offset: 0x2b8 - * - * 11:00 HighAddr PCI_0 I/O Space Top Address - * 31:12 Reserved - */ - -/* - * Table 74: Internal Space Decode, Offset: 0x068 - * 15:00 IntDecode GT64260 Internal Space Base Address - * 23:16 Reserved - * 26:24 PCISwap Same as PCI_0 Memory 0 Low Decode Address. - * NOTE: Reserved for Galileo Technology usage. - * Relevant only for PCI master configuration - * transactions on the PCI bus. - * 31:27 Reserved - */ - -/* - * Table 79: PCI_0 I/O Address Remap, Offset: 0x0f0 - * Table 80: PCI_0 Memory 0 Address Remap Low, Offset: 0x0f8 - * Table 82: PCI_0 Memory 1 Address Remap Low, Offset: 0x100 - * Table 84: PCI_0 Memory 2 Address Remap Low, Offset: 0x2f8 - * Table 86: PCI_0 Memory 3 Address Remap Low, Offset: 0x300 - * Table 88: PCI_1 I/O Address Remap, Offset: 0x108 - * Table 89: PCI_1 Memory 0 Address Remap Low, Offset: 0x110 - * Table 91: PCI_1 Memory 1 Address Remap Low, Offset: 0x118 - * Table 93: PCI_1 Memory 2 Address Remap Low, Offset: 0x310 - * Table 95: PCI_1 Memory 3 Address Remap Low, Offset: 0x318 - * - * 11:00 Remap PCI IO/Memory Space Address Remap (31:20) - * 31:12 Reserved - */ - -/* - * Table 81: PCI_0 Memory 0 Address Remap High, Offset: 0x320 - * Table 83: PCI_0 Memory 1 Address Remap High, Offset: 0x328 - * Table 85: PCI_0 Memory 2 Address Remap High, Offset: 0x330 - * Table 87: PCI_0 Memory 3 Address Remap High, Offset: 0x338 - * Table 90: PCI_1 Memory 0 Address Remap High, Offset: 0x340 - * Table 92: PCI_1 Memory 1 Address Remap High, Offset: 0x348 - * Table 94: PCI_1 Memory 2 Address Remap High, Offset: 0x350 - * Table 96: PCI_1 Memory 3 Address Remap High, Offset: 0x358 - * - * 31:00 Remap PCI Memory Address Remap (high 32 bits) - */ - -/* - * Table 97: CPU Configuration, Offset: 0x000 - * 07:00 NoMatchCnt CPU Address Miss Counter - * 08:08 NoMatchCntEn CPU Address Miss Counter Enable - * NOTE: Relevant only if multi-GT is enabled. - * (0: Disabled; 1: Enabled) - * 09:09 NoMatchCntExt CPU address miss counter MSB - * 10:10 Reserved - * 11:11 AACKDelay Address Acknowledge Delay - * 0: AACK* is asserted one cycle after TS*. - * 1: AACK* is asserted two cycles after TS*. - * 12:12 Endianess Must be 0 - * NOTE: The GT64260 does not support the PowerPC - * Little Endian convention - * 13:13 Pipeline Pipeline Enable - * 0: Disabled. The GT64260 will not respond with - * AACK* to a new CPU transaction, before the - * previous transaction data phase completes. - * 1: Enabled. - * 14:14 Reserved - * 15:15 TADelay Transfer Acknowledge Delay - * 0: TA* is asserted one cycle after AACK* - * 1: TA* is asserted two cycles after AACK* - * 16:16 RdOOO Read Out of Order Completion - * 0: Not Supported, Data is always returned in - * order (DTI[0-2] is always driven - * 1: Supported - * 17:17 StopRetry Relevant only if PCI Retry is enabled - * 0: Keep Retry all PCI transactions targeted - * to the GT64260. - * 1: Stop Retry of PCI transactions. - * 18:18 MultiGTDec Multi-GT Address Decode - * 0: Normal address decoding - * 1: Multi-GT address decoding - * 19:19 DPValid CPU DP[0-7] Connection. CPU write parity ... - * 0: is not checked. (Not connected) - * 1: is checked (Connected) - * 21:20 Reserved - * 22:22 PErrProp Parity Error Propagation - * 0: GT64260 always drives good parity on - * DP[0-7] during CPU reads. - * 1: GT64260 drives bad parity on DP[0-7] in case - * the read response from the target interface - * comes with erroneous data indication - * (e.g. ECC error from SDRAM interface). - * 25:23 Reserved - * 26:26 APValid CPU AP[0-3] Connection. CPU address parity ... - * 0: is not checked. (Not connected) - * 1: is checked (Connected) - * 27:27 RemapWrDis Address Remap Registers Write Control - * 0: Write to Low Address decode register. - * Results in writing of the corresponding - * Remap register. - * 1: Write to Low Address decode register. No - * affect on the corresponding Remap register. - * 28:28 ConfSBDis Configuration Read Sync Barrier Disable - * 0: enabled; 1: disabled - * 29:29 IOSBDis I/O Read Sync Barrier Disable - * 0: enabled; 1: disabled - * 30:30 ClkSync Clocks Synchronization - * 0: The CPU interface is running with SysClk, - * which is asynchronous to TClk. - * 1: The CPU interface is running with TClk. - * 31:31 Reserved - */ -#define GT_CPUCfg_NoMatchCnt_GET(v) GT__EXT((v), 0, 8) -#define GT_CPUCfg_NoMatchCntEn GT__BIT( 9) -#define GT_CPUCfg_NoMatchCntExt GT__BIT(10) -#define GT_CPUCfg_AACKDelay GT__BIT(11) -#define GT_CPUCfg_Endianess GT__BIT(12) -#define GT_CPUCfg_Pipeline GT__BIT(13) -#define GT_CPUCfg_TADelay GT__BIT(15) -#define GT_CPUCfg_RdOOO GT__BIT(16) -#define GT_CPUCfg_StopRetry GT__BIT(17) -#define GT_CPUCfg_MultiGTDec GT__BIT(18) -#define GT_CPUCfg_DPValid GT__BIT(19) -#define GT_CPUCfg_PErrProp GT__BIT(22) -#define GT_CPUCfg_APValid GT__BIT(26) -#define GT_CPUCfg_RemapWrDis GT__BIT(27) -#define GT_CPUCfg_ConfSBDis GT__BIT(28) -#define GT_CPUCfg_IOSBDis GT__BIT(29) -#define GT_CPUCfg_ClkSync GT__BIT(30) - -/* - * Table 98: CPU Mode, Offset: 0x120, Read only - * 01:00 MultiGTID Multi-GT ID - * Represents the ID to which the GT64260 responds - * to during a multi-GT address decoding period. - * 02:02 MultiGT (0: Single; 1: Multiple) GT configuration - * 03:03 RetryEn (0: Don't; 1: Do) Retry PCI transactions - * 07:04 CPUType - * 0x0-0x3: Reserved - * 0x4: 64-bit PowerPC CPU, 60x bus - * 0x5: 64-bit PowerPC CPU, MPX bus - * 0x6-0xf: Reserved - * 31:08 Reserved - */ -#define GT_CPUMode_MultiGTID_GET(v) GT__EXT(v, 0, 2) -#define GT_CPUMode_MultiGT GT__BIT(2) -#define GT_CPUMode_RetryEn GT__BIT(3) -#define GT_CPUMode_CPUType_GET(v) GT__EXT(v, 4, 4) - -/* - * Table 99: CPU Master Control, Offset: 0x160 - * 07:00 Reserved - * 08:08 IntArb CPU Bus Internal Arbiter Enable - * NOTE: Only relevant to 60x bus mode. When - * running MPX bus, the GT64260 internal - * arbiter must be used. - * 0: Disabled. External arbiter is required. - * 1: Enabled. Use the GT64260 CPU bus arbiter. - * 09:09 IntBusCtl CPU Interface Unit Internal Bus Control - * NOTE: This bit must be set to 1. It is reserved - * for Galileo Technology usage. - * 0: Enable internal bus sharing between master - * and slave interfaces. - * 1: Disable internal bus sharing between master - * and slave interfaces. - * 10:10 MWrTrig Master Write Transaction Trigger - * 0: With first valid write data - * 1: With last valid write data - * 11:11 MRdTrig Master Read Response Trigger - * 0: With first valid read data - * 1: With last valid read data - * 12:12 CleanBlock Clean Block Snoop Transaction Support - * 0: CPU does not support clean block (603e,750) - * 1: CPU supports clean block (604e,G4) - * 13:13 FlushBlock Flush Block Snoop Transaction Support - * 0: CPU does not support flush block (603e,750) - * 1: CPU supports flush block (604e,G4) - * 31:14 Reserved - */ -#define GT_CPUMstrCtl_IntArb GT__BIT(8) -#define GT_CPUMstrCtl_IntBusCtl GT__BIT(9) -#define GT_CPUMstrCtl_MWrTrig GT__BIT(10) -#define GT_CPUMstrCtl_MRdTrig GT__BIT(11) -#define GT_CPUMstrCtl_CleanBlock GT__BIT(12) -#define GT_CPUMstrCtl_FlushBlock GT__BIT(13) - -#define GT_ArbSlice_SDRAM 0x0 /* SDRAM interface snoop request */ -#define GT_ArbSlice_DEVICE 0x1 /* Device request */ -#define GT_ArbSlice_NULL 0x2 /* NULL request */ -#define GT_ArbSlice_PCI0 0x3 /* PCI_0 access */ -#define GT_ArbSlice_PCI1 0x4 /* PCI_1 access */ -#define GT_ArbSlice_COMM 0x5 /* Comm unit access */ -#define GT_ArbSlice_IDMA0123 0x6 /* IDMA channels 0/1/2/3 access */ -#define GT_ArbSlice_IDMA4567 0x7 /* IDMA channels 4/5/6/7 access */ - /* 0x8-0xf: Reserved */ - -/* Pass in the slice number (from 0..16) as 'n' - */ -#define GT_XbarCtl_GET_ArbSlice(v, n) GT__EXT((v), (((n) & 7)*4, 4) - -/* - * Table 100: CPU Interface Crossbar Control Low, Offset: 0x150 - * 03:00 Arb0 Slice 0 of CPU Master pizza Arbiter - * 07:04 Arb1 Slice 1 of CPU Master pizza Arbiter - * 11:08 Arb2 Slice 2 of CPU Master pizza Arbiter - * 15:12 Arb3 Slice 3 of CPU Master pizza Arbiter - * 19:16 Arb4 Slice 4 of CPU Master pizza Arbiter - * 23:20 Arb5 Slice 5 of CPU Master pizza Arbiter - * 27:24 Arb6 Slice 6 of CPU Master pizza Arbiter - * 31:28 Arb7 Slice 7 of CPU Master pizza Arbiter - */ - -/* - * Table 101: CPU Interface Crossbar Control High, Offset: 0x158 - * 03:00 Arb8 Slice 8 of CPU Master pizza Arbiter - * 07:04 Arb9 Slice 9 of CPU Master pizza Arbiter - * 11:08 Arb10 Slice 10 of CPU Master pizza Arbiter - * 15:12 Arb11 Slice 11 of CPU Master pizza Arbiter - * 19:16 Arb12 Slice 12 of CPU Master pizza Arbiter - * 23:20 Arb13 Slice 13 of CPU Master pizza Arbiter - * 27:24 Arb14 Slice 14 of CPU Master pizza Arbiter - * 31:28 Arb15 Slice 15 of CPU Master pizza Arbiter - */ - -/* - * Table 102: CPU Interface Crossbar Timeout, Offset: 0x168 - * NOTE: Reserved for Galileo Technology usage. - * 07:00 Timeout Crossbar Arbiter Timeout Preset Value - * 15:08 Reserved - * 16:16 TimeoutEn Crossbar Arbiter Timer Enable - * (0: Enable; 1: Disable) - * 31:17 Reserved - */ - -/* - * Table 103: CPU Read Response Crossbar Control Low, Offset: 0x170 - * 03:00 Arb0 Slice 0 of CPU Slave pizza Arbiter - * 07:04 Arb1 Slice 1 of CPU Slave pizza Arbiter - * 11:08 Arb2 Slice 2 of CPU Slave pizza Arbiter - * 15:12 Arb3 Slice 3 of CPU Slave pizza Arbiter - * 19:16 Arb4 Slice 4 of CPU Slave pizza Arbiter - * 23:20 Arb5 Slice 5 of CPU Slave pizza Arbiter - * 27:24 Arb6 Slice 6 of CPU Slave pizza Arbiter - * 31:28 Arb7 Slice 7 of CPU Slave pizza Arbiter - */ -/* - * Table 104: CPU Read Response Crossbar Control High, Offset: 0x178 - * 03:00 Arb8 Slice 8 of CPU Slave pizza Arbiter - * 07:04 Arb9 Slice 9 of CPU Slave pizza Arbiter - * 11:08 Arb10 Slice 10 of CPU Slave pizza Arbiter - * 15:12 Arb11 Slice 11 of CPU Slave pizza Arbiter - * 19:16 Arb12 Slice 12 of CPU Slave pizza Arbiter - * 23:20 Arb13 Slice 13 of CPU Slave pizza Arbiter - * 27:24 Arb14 Slice 14 of CPU Slave pizza Arbiter - * 31:28 Arb15 Slice 15 of CPU Slave pizza Arbiter - */ - -/* - * Table 105: PCI_0 Sync Barrier Virtual Register, Offset: 0x0c0 - * Table 106: PCI_1 Sync Barrier Virtual Register, Offset: 0x0c8 - * NOTE: The read data is random and should be ignored. - * 31:00 SyncBarrier A CPU read from this register creates a - * synchronization barrier cycle. - */ - -/* - * Table 107: CPU Protect Address 0 Low, Offset: 0x180 - * Table 109: CPU Protect Address 1 Low, Offset: 0x190 - * Table 111: CPU Protect Address 2 Low, Offset: 0x1a0 - * Table 113: CPU Protect Address 3 Low, Offset: 0x1b0 - * Table 115: CPU Protect Address 4 Low, Offset: 0x1c0 - * Table 117: CPU Protect Address 5 Low, Offset: 0x1d0 - * Table 119: CPU Protect Address 6 Low, Offset: 0x1e0 - * Table 121: CPU Protect Address 7 Low, Offset: 0x1f0 - * - * 11:00 LowAddr CPU Protect Region Base Address - * Corresponds to address bits[31:20]. - * 15:12 Reserved. Must be 0 - * 16:16 AccProtect CPU Access Protect - * Access is (0: allowed; 1: forbidden) - * 17:17 WrProtect CPU Write Protect - * Writes are (0: allowed; 1: forbidden) - * 18:18 CacheProtect CPU caching protect. Caching (block read) - * is (0: allowed; 1: forbidden) - * 31:19 Reserved - */ -#define GT_CPU_AccProtect GT__BIT(16) -#define GT_CPU_WrProtect GT__BIT(17) -#define GT_CPU_CacheProtect GT__BIT(18) - -/* - * Table 108: CPU Protect Address 0 High, Offset: 0x188 - * Table 110: CPU Protect Address 1 High, Offset: 0x198 - * Table 112: CPU Protect Address 2 High, Offset: 0x1a8 - * Table 114: CPU Protect Address 3 High, Offset: 0x1b8 - * Table 116: CPU Protect Address 4 High, Offset: 0x1c8 - * Table 118: CPU Protect Address 5 High, Offset: 0x1d8 - * Table 120: CPU Protect Address 6 High, Offset: 0x1e8 - * Table 122: CPU Protect Address 7 High, Offset: 0x1f8 - * - * 11:00 HighAddr CPU Protect Region Top Address - * Corresponds to address bits[31:20] - * 31:12 Reserved - */ - -/* - * Table 123: Snoop Base Address 0, Offset: 0x380 - * Table 125: Snoop Base Address 1, Offset: 0x390 - * Table 127: Snoop Base Address 2, Offset: 0x3a0 - * Table 129: Snoop Base Address 3, Offset: 0x3b0 - * - * 11:00 LowAddr Snoop Region Base Address [31:20] - * 15:12 Reserved Must be 0. - * 17:16 Snoop Snoop Type - * 0x0: No Snoop - * 0x1: Snoop to WT region - * 0x2: Snoop to WB region - * 0x3: Reserved - * 31:18 Reserved - */ -#define GT_Snoop_GET(v) GT__EXT((v), 16, 2) -#define GT_Snoop_INS(v) GT__INS((v), 16) -#define GT_Snoop_None 0 -#define GT_Snoop_WT 1 -#define GT_Snoop_WB 2 - - -/* - * Table 124: Snoop Top Address 0, Offset: 0x388 - * Table 126: Snoop Top Address 1, Offset: 0x398 - * Table 128: Snoop Top Address 2, Offset: 0x3a8 - * Table 130: Snoop Top Address 3, Offset: 0x3b8 - * 11:00 HighAddr Snoop Region Top Address [31:20] - * 31:12 Reserved - */ - - -/* - * Table 131: CPU Error Address Low, Offset: 0x070, Read Only. - * In case of multiple errors, only the first one is latched. New error - * report latching is enabled only after the CPU Error Address Low register - * is being read. - * 31:00 ErrAddr Latched address bits [31:0] of a CPU - * transaction in case of: - * o illegal address (failed address decoding) - * o access protection violation - * o bad data parity - * o bad address parity - * Upon address latch, no new address are - * registered (due to additional error condition), - * until the register is being read. - */ - -/* - * Table 132: CPU Error Address High, Offset: 0x078, Read Only. - * Once data is latched, no new data can be registered (due to additional - * error condition), until CPU Error Low Address is being read (which - * implies, it should be the last being read by the interrupt handler). - * 03:00 Reserved - * 07:04 ErrPar Latched address parity bits in case - * of bad CPU address parity detection. - * 31:08 Reserved - */ -#define GT_CPUErrorAddrHigh_ErrPar_GET(v) GT__EXT((v), 4, 4) - -/* - * Table 133: CPU Error Data Low, Offset: 0x128, Read only. - * 31:00 PErrData Latched data bits [31:0] in case of bad data - * parity sampled on write transactions or on - * master read transactions. - */ - -/* - * Table 134: CPU Error Data High, Offset: 0x130, Read only. - * 31:00 PErrData Latched data bits [63:32] in case of bad data - * parity sampled on write transactions or on - * master read transactions. - */ - -/* - * Table 135: CPU Error Parity, Offset: 0x138, Read only. - * 07:00 PErrPar Latched data parity bus in case of bad data - * parity sampled on write transactions or on - * master read transactions. - * 31:10 Reserved - */ -#define GT_CPUErrorParity_PErrPar_GET(v) GT__EXT((v), 0, 8) - -/* - * Table 136: CPU Error Cause, Offset: 0x140 - * Bits[7:0] are clear only. A cause bit is set upon an error condition - * occurrence. Write a 0 value to clear the bit. Writing a 1 value has - * no affect. - * 00:00 AddrOut CPU Address Out of Range - * 01:01 AddrPErr Bad Address Parity Detected - * 02:02 TTErr Transfer Type Violation. - * The CPU attempts to burst (read or write) to an - * internal register. - * 03:03 AccErr Access to a Protected Region - * 04:04 WrErr Write to a Write Protected Region - * 05:05 CacheErr Read from a Caching protected region - * 06:06 WrDataPErr Bad Write Data Parity Detected - * 07:07 RdDataPErr Bad Read Data Parity Detected - * 26:08 Reserved - * 31:27 Sel Specifies the error event currently being - * reported in Error Address, Error Data, and - * Error Parity registers. - * 0x0: AddrOut - * 0x1: AddrPErr - * 0x2: TTErr - * 0x3: AccErr - * 0x4: WrErr - * 0x5: CacheErr - * 0x6: WrDataPErr - * 0x7: RdDataPErr - * 0x8-0x1f: Reserved - */ -#define GT_CPUError_AddrOut GT__BIT(GT_CPUError_Sel_AddrOut) -#define GT_CPUError_AddrPErr GT__BIT(GT_CPUError_Sel_AddrPErr) -#define GT_CPUError_TTErr GT__BIT(GT_CPUError_Sel_TTErr) -#define GT_CPUError_AccErr GT__BIT(GT_CPUError_Sel_AccErr) -#define GT_CPUError_WrErr GT__BIT(GT_CPUError_Sel_WrPErr) -#define GT_CPUError_CacheErr GT__BIT(GT_CPUError_Sel_CachePErr) -#define GT_CPUError_WrDataPErr GT__BIT(GT_CPUError_Sel_WrDataPErr) -#define GT_CPUError_RdDataPErr GT__BIT(GT_CPUError_Sel_RdDataPErr) - -#define GT_CPUError_Sel_AddrOut 0 -#define GT_CPUError_Sel_AddrPErr 1 -#define GT_CPUError_Sel_TTErr 2 -#define GT_CPUError_Sel_AccErr 3 -#define GT_CPUError_Sel_WrErr 4 -#define GT_CPUError_Sel_CacheErr 5 -#define GT_CPUError_Sel_WrDataPErr 6 -#define GT_CPUError_Sel_RdDataPErr 7 - -#define GT_CPUError_Sel_GET(v) GT__EXT((v), 27, 5) - -/* - * Table 137: CPU Error Mask, Offset: 0x148 - * 00:00 AddrOut If set to 1, enables AddrOut interrupt. - * 01:01 AddrPErr If set to 1, enables AddrPErr interrupt. - * 02:02 TTErr If set to 1, enables TTErr interrupt. - * 03:03 AccErr If set to 1, enables AccErr interrupt. - * 04:04 WrErr If set to 1, enables WrErr interrupt. - * 05:05 CacheErr If set to 1, enables CacheErr interrupt. - * 06:06 WrDataPErr If set to 1, enables WrDataPErr interrupt. - * 07:07 RdDataPErr If set to 1, enables RdDataPErr interrupt. - * 31:08 Reserved - */ - -/* Comm Unit Arbiter Control */ -#define GT_CommUnitArb_Ctrl 0xf300 /*<skf>*/ -/* - * Comm Unit Interrupt registers - */ -#define GT_CommUnitIntr_Cause 0xf310 -#define GT_CommUnitIntr_Mask 0xf314 -#define GT_CommUnitIntr_ErrAddr 0xf318 - -#define GT_CommUnitIntr_E0 0x00000007 -#define GT_CommUnitIntr_E1 0x00000070 -#define GT_CommUnitIntr_E2 0x00000700 -#define GT_CommUnitIntr_S0 0x00070000 -#define GT_CommUnitIntr_S1 0x00700000 -#define GT_CommUnitIntr_Sel 0x70000000 - -/* - * SDRAM Error Report (ECC) Registers - */ -#define GT_ECC_Data_Lo 0x484 /* latched Error Data (low) */ -#define GT_ECC_Data_Hi 0x480 /* latched Error Data (high) */ -#define GT_ECC_Addr 0x490 /* latched Error Address */ -#define GT_ECC_Rec 0x488 /* latched ECC code from SDRAM */ -#define GT_ECC_Calc 0x48c /* latched ECC code from SDRAM */ -#define GT_ECC_Ctl 0x494 /* ECC Control */ -#define GT_ECC_Count 0x498 /* ECC 1-bit error count */ - -/* - * Watchdog Registers - */ -#define GT_WDOG_Config 0xb410 -#define GT_WDOG_Value 0xb414 -#define GT_WDOG_Value_NMI GT__MASK(24) -#define GT_WDOG_Config_Preset GT__MASK(24) -#define GT_WDOG_Config_Ctl1a GT__BIT(24) -#define GT_WDOG_Config_Ctl1b GT__BIT(25) -#define GT_WDOG_Config_Ctl2a GT__BIT(26) -#define GT_WDOG_Config_Ctl2b GT__BIT(27) -#define GT_WDOG_Config_Enb GT__BIT(31) - -#define GT_WDOG_NMI_DFLT (GT__MASK(24) & GT_WDOG_Value_NMI) -#define GT_WDOG_Preset_DFLT (GT__MASK(22) & GT_WDOG_Config_Preset) - -/* - * Device Bus Interrupts - */ -#define GT_DEVBUS_ICAUSE 0x4d0 /* Device Interrupt Cause */ -#define GT_DEVBUS_IMASK 0x4d4 /* Device Interrupt Mask */ -#define GT_DEVBUS_ERR_ADDR 0x4d8 /* Device Error Address */ - -/* - * bit defines for GT_DEVBUS_ICAUSE, GT_DEVBUS_IMASK - */ -#define GT_DEVBUS_DBurstErr GT__BIT(0) -#define GT_DEVBUS_DRdyErr GT__BIT(1) -#define GT_DEVBUS_Sel GT__BIT(27) -#define GT_DEVBUS_RES ~(GT_DEVBUS_DBurstErr|GT_DEVBUS_DRdyErr|GT_DEVBUS_Sel) - -/* TWSI Interface - TWSI Interface Registers <skf> */ -#define TWSI_SLV_ADDR 0xc000 -#define TWSI_EXT_SLV_ADDR 0xc010 -#define TWSI_DATA 0xc004 -#define TWSI_CTRL 0xc008 -#define TWSI_STATUS 0xc00c -#define TWSI_BAUDE_RATE 0xc00c -#define TWSI_SFT_RST 0xc01c - -/* Section 25.2 : Table 734 <skf> */ - -#define GT64260_MAIN_INT_CAUSE_LO 0xc18 /* read Only */ -#define GT64260_MAIN_INT_CAUSE_HI 0xc68 /* read Only */ -#define GT64260_CPU_INT_MASK_LO 0xc1c -#define GT64260_CPU_INT_MASK_HI 0xc6c -#define GT64260_CPU_SEL_CAUSE 0xc70 /* read Only */ -#define GT_PCI0_INT_MASK_LO 0xc24 -#define GT_PCI0_INT_MASK_HI 0xc64 -#define GT_PCI0_SEL_CAUSE 0xc74 /* read Only */ -#define GT_PCI1_INT_MASK_LO 0xca4 -#define GT_PCI1_INT_MASK_HI 0xce4 -#define GT_PCI1_SEL_CAUSE 0xcf4 /* read Only */ -#define GT_CPU_INT0_MASK 0xe60 -#define GT_CPU_INT1_MASK 0xe64 -#define GT_CPU_INT2_MASK 0xe68 -#define GT_CPU_INT3_MASK 0xe6c - -#endif /* !_DISCOVERY_DEV_GTREG_H */ diff --git a/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am b/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am index 4b1c464502..4d7e0d4733 100644 --- a/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am +++ b/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am @@ -4,22 +4,12 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h noinst_PROGRAMS = -dist_project_lib_DATA += ../shared/startup/linkcmds.share -dist_project_lib_DATA += startup/linkcmds - noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -41,54 +31,35 @@ libbsp_a_SOURCES += startup/bspstart.c \ # pclock libbsp_a_SOURCES += ../../powerpc/shared/clock/p_clock.c -include_bsp_HEADERS = ../../powerpc/shared/console/uart.h -include_bsp_HEADERS += ../../powerpc/shared/console/consoleIo.h # console libbsp_a_SOURCES += ../../powerpc/shared/console/uart.c \ ../../powerpc/shared/console/console.c -include_bsp_HEADERS += pci/gtpcireg.h -include_bsp_HEADERS += ../../powerpc/shared/pci/pci.h # pci libbsp_a_SOURCES += pci/pci.c libbsp_a_SOURCES += pci/pci_interface.c libbsp_a_SOURCES += pci/detect_host_bridge.c libbsp_a_SOURCES += ../../shared/pci/pci_find_device.c -include_bsp_HEADERS += irq/irq.h # irq libbsp_a_SOURCES += irq/irq_init.c irq/BSP_irq.c # tod libbsp_a_SOURCES += ../../shared/tod.c tod/todcfg.c -include_bsp_HEADERS += vectors/bspException.h - # vectors libbsp_a_SOURCES += vectors/exceptionhandler.c \ ../../powerpc/shared/start/vectors_entry.S -include_bsp_HEADERS += GT64260/bspMvme5500.h GT64260/gtreg.h \ - GT64260/GT64260TWSI.h GT64260/VPD.h # GT64260 libbsp_a_SOURCES += GT64260/GT64260TWSI.c GT64260/MVME5500I2C.c -include_bsp_HEADERS += ../../shared/vmeUniverse/VME.h vme/VMEConfig.h \ - ../../shared/vmeUniverse/vmeUniverse.h \ - ../../shared/vmeUniverse/vmeUniverseDMA.h\ - ../../shared/vmeUniverse/bspVmeDmaList.h\ - ../../shared/vmeUniverse/VMEDMA.h \ - ../../shared/vmeUniverse/vme_am_defs.h # vme libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeUniverse.c\ ../shared/vme/vmeconfig.c ../../shared/vmeUniverse/bspVmeDmaList.c\ ../shared/vme/vme_universe.c if HAS_NETWORKING -include_bsp_HEADERS += network/if_100MHz/GT64260eth.h \ - network/if_100MHz/GT64260ethreg.h network/if_1GHz/if_wmreg.h \ - network/if_1GHz/pcireg.h - network_CPPFLAGS = -D_KERNEL -D__BSD_VISIBLE noinst_PROGRAMS += network.rel network_rel_SOURCES = network/if_100MHz/GT64260eth.c \ @@ -109,6 +80,9 @@ mvme5500start___OBJEXT__LDFLAGS = $(RTEMS_RELLDFLAGS) project_lib_DATA += mvme5500start.$(OBJEXT) +project_lib_DATA += linkcmds +dist_project_lib_DATA += ../shared/startup/linkcmds.share + libbsp_a_LIBADD = \ ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \ ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \ @@ -125,5 +99,5 @@ if HAS_NETWORKING libbsp_a_LIBADD += network.rel endif -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/mvme5500/headers.am diff --git a/c/src/lib/libbsp/powerpc/mvme5500/configure.ac b/c/src/lib/libbsp/powerpc/mvme5500/configure.ac index 2e93857cff..5da9add985 100644 --- a/c/src/lib/libbsp/powerpc/mvme5500/configure.ac +++ b/c/src/lib/libbsp/powerpc/mvme5500/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-mvme5500],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/mvme5500.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/mvme5500/include/bsp.h b/c/src/lib/libbsp/powerpc/mvme5500/include/bsp.h deleted file mode 100644 index c1b17cee10..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/include/bsp.h +++ /dev/null @@ -1,206 +0,0 @@ -/* - * Copyright (C) 1999 Eric Valette. valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - * (C) S. Kate Feng 2003-2007 : Modified it to support the mvme5500 BSP. - */ - -#ifndef LIBBSP_POWERPC_MVME5500_BSP_H -#define LIBBSP_POWERPC_MVME5500_BSP_H - -#ifndef ASM - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <libcpu/io.h> -#include <bsp/vectors.h> - -/* Board type */ -typedef enum { - undefined = 0, - MVME5500, - MVME6100 -} BSP_BoardTypes; - -BSP_BoardTypes BSP_getBoardType(void); - -/* Board type */ -typedef enum { - Undefined, - UNIVERSE2, - TSI148, -} BSP_VMEchipTypes; - -BSP_VMEchipTypes BSP_getVMEchipType(void); - -/* The version of Discovery system controller */ - -typedef enum { - notdefined, - GT64260A, - GT64260B, - MV64360, -} DiscoveryChipVersion; - -DiscoveryChipVersion BSP_getDiscoveryChipVersion(void); - -#define _256M 0x10000000 -#define _512M 0x20000000 - -#define GT64x60_REG_BASE 0xf1000000 /* Base of GT64260 Reg Space */ -#define GT64x60_REG_SPACE_SIZE 0x10000 /* 64Kb Internal Reg Space */ - -#define GT64x60_DEV1_BASE 0xf1100000 /* Device bank1(chip select 1) base - */ -#define GT64260_DEV1_SIZE 0x00100000 /* Device bank size */ - -/* fundamental addresses for this BSP (PREPxxx are from libcpu/io.h) */ -#define _IO_BASE GT64x60_REG_BASE - -#define BSP_NVRAM_BASE_ADDR 0xf1110000 - -#define BSP_RTC_INTA_REG 0x7ff0 -#define BSP_RTC_SECOND 0x7ff2 -#define BSP_RTC_MINUTE 0x7ff3 -#define BSP_RTC_HOUR 0x7ff4 -#define BSP_RTC_DATE 0x7ff5 -#define BSP_RTC_INTERRUPTS 0x7ff6 -#define BSP_RTC_WATCHDOG 0x7ff7 - -/* PCI0 Domain I/O space */ -#define PCI0_IO_BASE 0xf0000000 -#define PCI1_IO_BASE 0xf0800000 - -/* PCI 0 memory space as seen from the CPU */ -#define PCI0_MEM_BASE 0x80000000 -#define PCI_MEM_BASE 0 /* glue for vmeUniverse */ -#define PCI_MEM_BASE_ADJUSTMENT 0 - -/* address of our ram on the PCI bus */ -#define PCI_DRAM_OFFSET 0 - -/* PCI 1 memory space as seen from the CPU */ -#define PCI1_MEM_BASE 0xe0000000 -#define PCI1_MEM_SIZE 0x10000000 - -/* Needed for hot adding via PMCspan on the PCI0 local bus. - * This is board dependent, only because mvme5500 - * supports hot adding and has more than one local PCI - * bus. - */ -#define BSP_MAX_PCI_BUS_ON_PCI0 8 -#define BSP_MAX_PCI_BUS_ON_PCI1 2 -#define BSP_MAX_PCI_BUS (BSP_MAX_PCI_BUS_ON_PCI0+BSP_MAX_PCI_BUS_ON_PCI1) - - -/* The glues to Till's vmeUniverse, although the name does not - * actually reflect the relevant architect of the MVME5500. - */ -#define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET - -/* - * confdefs.h overrides for this BSP: - * - Interrupt stack space is not minimum if defined. - */ -#define BSP_INTERRUPT_STACK_SIZE (16 * 1024) /* <skf> 2/09 wants it to be adjustable by BSP */ - -/* uart.c uses out_8 instead of outb */ -#define BSP_UART_IOBASE_COM1 GT64x60_DEV1_BASE + 0x20000 -#define BSP_UART_IOBASE_COM2 GT64x60_DEV1_BASE + 0x21000 - -#define BSP_CONSOLE_PORT BSP_UART_COM1 /* console */ -#define BSP_UART_BAUD_BASE 115200 - -/* - * Total memory using RESIDUAL DATA - */ -extern unsigned int BSP_mem_size; -/* - * PCI Bus Frequency - */ -extern unsigned int BSP_bus_frequency; -/* - * processor clock frequency - */ -extern unsigned int BSP_processor_frequency; -/* - * Time base divisior (how many tick for 1 second). - */ -extern unsigned int BSP_time_base_divisor; - -#define BSP_Convert_decrementer( _value ) \ - ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value))) - -extern void bsp_reset(void); -/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */ -extern int BSP_disconnect_clock_handler(void); -extern int BSP_connect_clock_handler(void); - -unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet); - -/* - * Prototypes for methods called only from .S for dependency tracking - */ -char *save_boot_params( - void *r3, - void *r4, - void *r5, - char *cmdline_start, - char *cmdline_end -); -void zero_bss(void); - -/* - * Prototypes for methods in the BSP that cross file boundaries - */ -uint32_t probeMemoryEnd(void); -void pci_interface(void); -void BSP_printPicIsrTbl(void); -int I2Cread_eeprom( - unsigned char I2cBusAddr, - uint32_t devA2A1A0, - uint32_t AddrBytes, - unsigned char *pBuff, - uint32_t numBytes -); - -#if 0 -#define RTEMS_BSP_NETWORK_DRIVER_NAME "gt1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_GT64260eth_driver_attach -#else -#define RTEMS_BSP_NETWORK_DRIVER_NAME "wmG1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_i82544EI_driver_attach -#endif - -extern int RTEMS_BSP_NETWORK_DRIVER_ATTACH(); - -#define gccMemBar() RTEMS_COMPILER_MEMORY_BARRIER() - -static inline void lwmemBar(void) -{ - __asm__ volatile("lwsync":::"memory"); -} - -static inline void io_flush(void) -{ - __asm__ volatile("isync":::"memory"); -} - -static inline void memBar(void) -{ - __asm__ volatile("sync":::"memory"); -} - -static inline void ioBar(void) -{ - __asm__ volatile("eieio":::"memory"); -} - -#endif - -#endif /* !ASM */ diff --git a/c/src/lib/libbsp/powerpc/mvme5500/include/tm27.h b/c/src/lib/libbsp/powerpc/mvme5500/include/tm27.h deleted file mode 100644 index 2a80618cfb..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/include/tm27.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * @file - * @ingroup powerpc_mvme5500 - * @brief Implementations for interrupt mechanisms for Time Test 27 - */ - -/* - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -#include <bsp/irq.h> - -/* - * Stuff for Time Test 27 - */ - -#define MUST_WAIT_FOR_INTERRUPT 1 - -void nullFunc() {} -static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, - 0, - (rtems_irq_enable)nullFunc, - (rtems_irq_disable)nullFunc, - (rtems_irq_is_enabled) nullFunc}; - -void Install_tm27_vector(void (*_handler)()) -{ - clockIrqData.hdl = _handler; - if (!BSP_install_rtems_irq_handler (&clockIrqData)) { - printk("Error installing clock interrupt handler!\n"); - rtems_fatal_error_occurred(1); - } -} - -#define Cause_tm27_intr() \ - do { \ - uint32_t _clicks = 1; \ - __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ - } while (0) - - -#define Clear_tm27_intr() \ - do { \ - uint32_t _clicks = 0xffffffff; \ - __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ - } while (0) - -#define Lower_tm27_intr() \ - do { \ - uint32_t _msr = 0; \ - _ISR_Set_level( 0 ); \ - __asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ - _msr |= 0x8002; \ - __asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ - } while (0) - -#endif diff --git a/c/src/lib/libbsp/powerpc/mvme5500/irq/irq.h b/c/src/lib/libbsp/powerpc/mvme5500/irq/irq.h deleted file mode 100644 index 6704c2f626..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/irq/irq.h +++ /dev/null @@ -1,137 +0,0 @@ -/* irq.h - * - * This include file describe the data structure and the functions implemented - * by rtems to write interrupt handlers. - * - * CopyRight (C) 1999 valette@crf.canon.fr - * - * This code is heavilly inspired by the public specification of STREAM V2 - * that can be found at : - * - * <http://www.chorus.com/Documentation/index.html> by following - * the STREAM API Specification Document link. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - * Copyright 2004, 2005 Brookhaven National Laboratory and - * Shuchen Kate Feng <feng1@bnl.gov> - * - * - modified shared/irq/irq.h for Mvme5500 (no ISA devices/PIC) - * - Discovery GT64260 interrupt controller instead of 8259. - * - Added support for software IRQ priority levels. - * - modified to optimize the IRQ latency and handling - */ - -#ifndef LIBBSP_POWERPC_MVME5500_IRQ_IRQ_H -#define LIBBSP_POWERPC_MVME5500_IRQ_IRQ_H - -#define BSP_SHARED_HANDLER_SUPPORT 1 -#include <rtems/irq.h> - -#ifndef ASM - -#define OneTierIrqPrioTbl 1 - -/* - * Symbolic IRQ names and related definitions. - */ - -/* leave the ISA symbols in there, so we can reuse shared/irq.c - * Also, we start numbering PCI irqs at 16 because the OPENPIC - * driver relies on this when mapping irq number <-> vectors - * (OPENPIC_VEC_SOURCE in openpic.h) - */ - - /* See section 25.2 , Table 734 of GT64260 controller - * Main Interrupt Cause Low register - */ -#define BSP_MICL_IRQ_NUMBER (32) -#define BSP_MICL_IRQ_LOWEST_OFFSET (0) -#define BSP_MICL_IRQ_MAX_OFFSET (BSP_MICL_IRQ_LOWEST_OFFSET + BSP_MICL_IRQ_NUMBER -1) - /* - * Main Interrupt Cause High register - */ -#define BSP_MICH_IRQ_NUMBER (32) -#define BSP_MICH_IRQ_LOWEST_OFFSET (BSP_MICL_IRQ_MAX_OFFSET+1) -#define BSP_MICH_IRQ_MAX_OFFSET (BSP_MICH_IRQ_LOWEST_OFFSET + BSP_MICH_IRQ_NUMBER -1) - /* External GPP Interrupt assignements - */ -#define BSP_GPP_IRQ_NUMBER (32) -#define BSP_GPP_IRQ_LOWEST_OFFSET (BSP_MICH_IRQ_MAX_OFFSET+1) -#define BSP_GPP_IRQ_MAX_OFFSET (BSP_GPP_IRQ_LOWEST_OFFSET + BSP_GPP_IRQ_NUMBER - 1) - - /* - * PowerPc exceptions handled as interrupt where a rtems managed interrupt - * handler might be connected - */ -#define BSP_PROCESSOR_IRQ_NUMBER (1) -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_GPP_IRQ_MAX_OFFSET + 1) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) - - /* allow a couple of vectors for VME and counter/timer irq sources etc. - * This is probably not needed any more. - */ -#define BSP_MISC_IRQ_NUMBER (30) -#define BSP_MISC_IRQ_LOWEST_OFFSET (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) -#define BSP_MISC_IRQ_MAX_OFFSET (BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1) - - /* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_MISC_IRQ_MAX_OFFSET + 1) -#define BSP_MAIN_IRQ_NUMBER (64) -#define BSP_PIC_IRQ_NUMBER (96) -#define BSP_LOWEST_OFFSET (BSP_MICL_IRQ_LOWEST_OFFSET) -#define BSP_MAX_OFFSET (BSP_MISC_IRQ_MAX_OFFSET) - - /* Main CPU interrupt cause (Low) */ -#define BSP_MAIN_TIMER0_1_IRQ (BSP_MICL_IRQ_LOWEST_OFFSET+8) -#define BSP_MAIN_PCI0_7_0 (BSP_MICL_IRQ_LOWEST_OFFSET+12) -#define BSP_MAIN_PCI0_15_8 (BSP_MICL_IRQ_LOWEST_OFFSET+13) -#define BSP_MAIN_PCI0_23_16 (BSP_MICL_IRQ_LOWEST_OFFSET+14) -#define BSP_MAIN_PCI0_31_24 (BSP_MICL_IRQ_LOWEST_OFFSET+15) -#define BSP_MAIN_PCI1_7_0 (BSP_MICL_IRQ_LOWEST_OFFSET+16) -#define BSP_MAIN_PCI1_15_8 (BSP_MICL_IRQ_LOWEST_OFFSET+18) -#define BSP_MAIN_PCI1_23_16 (BSP_MICL_IRQ_LOWEST_OFFSET+19) -#define BSP_MAIN_PCI1_31_24 (BSP_MICL_IRQ_LOWEST_OFFSET+20) - - - /* Main CPU interrupt cause (High) */ -#define BSP_MAIN_ETH0_IRQ (BSP_MICH_IRQ_LOWEST_OFFSET) -#define BSP_MAIN_ETH1_IRQ (BSP_MICH_IRQ_LOWEST_OFFSET+1) -#define BSP_MAIN_ETH2_IRQ (BSP_MICH_IRQ_LOWEST_OFFSET+2) -#define BSP_MAIN_GPP7_0_IRQ (BSP_MICH_IRQ_LOWEST_OFFSET+24) -#define BSP_MAIN_GPP15_8_IRQ (BSP_MICH_IRQ_LOWEST_OFFSET+25) -#define BSP_MAIN_GPP23_16_IRQ (BSP_MICH_IRQ_LOWEST_OFFSET+26) -#define BSP_MAIN_GPP31_24_IRQ (BSP_MICH_IRQ_LOWEST_OFFSET+27) - - /* on the MVME5500, these are the GT64260B external GPP0 interrupt */ -#define BSP_PCI_IRQ_LOWEST_OFFSET (BSP_GPP_IRQ_LOWEST_OFFSET) -#define BSP_UART_COM2_IRQ (BSP_GPP_IRQ_LOWEST_OFFSET) -#define BSP_UART_COM1_IRQ (BSP_GPP_IRQ_LOWEST_OFFSET) -#define BSP_GPP8_IRQ_OFFSET (BSP_GPP_IRQ_LOWEST_OFFSET+8) -#define BSP_GPP_PMC1_INTA (BSP_GPP8_IRQ_OFFSET) -#define BSP_GPP16_IRQ_OFFSET (BSP_GPP_IRQ_LOWEST_OFFSET+16) -#define BSP_GPP24_IRQ_OFFSET (BSP_GPP_IRQ_LOWEST_OFFSET+24) -#define BSP_GPP_VME_VLINT0 (BSP_GPP_IRQ_LOWEST_OFFSET+12) -#define BSP_GPP_VME_VLINT1 (BSP_GPP_IRQ_LOWEST_OFFSET+13) -#define BSP_GPP_VME_VLINT2 (BSP_GPP_IRQ_LOWEST_OFFSET+14) -#define BSP_GPP_VME_VLINT3 (BSP_GPP_IRQ_LOWEST_OFFSET+15) -#define BSP_GPP_PMC2_INTA (BSP_GPP_IRQ_LOWEST_OFFSET+16) -#define BSP_GPP_82544_IRQ (BSP_GPP_IRQ_LOWEST_OFFSET+20) -#define BSP_GPP_WDT_NMI_IRQ (BSP_GPP_IRQ_LOWEST_OFFSET+24) -#define BSP_GPP_WDT_EXP_IRQ (BSP_GPP_IRQ_LOWEST_OFFSET+25) - - /* - * Some Processor execption handled as rtems IRQ symbolic name definition - */ -#define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET) - -extern void BSP_rtems_irq_mng_init(unsigned cpuId); - -#include <bsp/irq_supp.h> - -#endif -#endif diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.h b/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.h deleted file mode 100644 index 2703bb423e..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.h +++ /dev/null @@ -1,140 +0,0 @@ -/* GT64260eth.h - * - * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. - * All rights reserved. - * - * RTEMS/Mvme5500 port 2004 by S. Kate Feng, <feng1@bnl.gov>, - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Allegro Networks, Inc., and Wasabi Systems, Inc. - * 4. The name of Allegro Networks, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * 5. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND - * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC. - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* Keep the ring sizes a power of two for efficiency. - Making the Tx ring too long decreases the effectiveness of channel - bonding and packet priority. - There are no ill effects from too-large receive rings. */ -#define TX_RING_SIZE 32 -#define GT_NEXTTX(x) ((x + 1) % TX_RING_SIZE ) -#define TX_QUARTER_FULL TX_RING_SIZE/2 -#define TX_HALF_FULL TX_RING_SIZE/2 -#define RX_RING_SIZE 16 -#define HASH_TABLE_SIZE 16 -#define HASH_DRAM_SIZE HASH_TABLE_SIZE*1024 /* size of DRAM for hash table */ -#define INTR_ERR_SIZE 16 - -enum GTeth_txprio { - GE_TXPRIO_HI=1, - GE_TXPRIO_LO=0, - GE_TXPRIO_NONE=2 -}; -enum GTeth_rxprio { - GE_RXPRIO_HI=3, - GE_RXPRIO_MEDHI=2, - GE_RXPRIO_MEDLO=1, - GE_RXPRIO_LO=0 -}; - -struct GTeth_softc { - struct GTeth_desc txq_desc[TX_RING_SIZE]; /* transmit descriptor memory */ - struct GTeth_desc rxq_desc[RX_RING_SIZE]; /* receive descriptor memory */ - struct mbuf* txq_mbuf[TX_RING_SIZE]; /* transmit buffer memory */ - struct mbuf* rxq_mbuf[RX_RING_SIZE]; /* receive buffer memory */ - struct GTeth_softc *next_module; - volatile unsigned int intr_errsts[INTR_ERR_SIZE]; /* capture the right intr_status */ - unsigned int intr_err_ptr1; /* ptr used in GTeth_error() */ - unsigned int intr_err_ptr2; /* ptr used in ISR */ - struct ifqueue txq_pendq; /* these are ready to go to the GT */ - unsigned int txq_pending; - unsigned int txq_lo; /* next to be given to GT DMA */ - unsigned int txq_fi; /* next to be free */ - unsigned int txq_to_cpu; /* next to be returned to CPU */ - unsigned int txq_ei_gapcount; /* counter until next EI */ - unsigned int txq_nactive; /* number of active descriptors */ - unsigned int txq_nintr; /* number of txq desc. send TX_EVENT */ - unsigned int txq_outptr; /* where to put next transmit packet */ - unsigned int txq_inptr; /* start of 1st queued tx packet */ - unsigned int txq_free; /* free Tx queue slots. */ - unsigned txq_intrbits; /* bits to write to EIMR */ - unsigned txq_esdcmrbits; /* bits to write to ESDCMR */ - unsigned txq_epsrbits; /* bits to test with EPSR */ - - caddr_t txq_ectdp; /* offset to cur. tx desc ptr reg */ - unsigned long txq_desc_busaddr; /* bus addr of tx descriptors */ - caddr_t txq_buf_busaddr; /* bus addr of tx buffers */ - - struct mbuf *rxq_curpkt; /* mbuf for current packet */ - struct GTeth_desc *rxq_head_desc; /* rxq head descriptor */ - unsigned int rxq_fi; /* next to be returned to CPU */ - unsigned int rxq_active; /* # of descriptors given to GT */ - unsigned rxq_intrbits; /* bits to write to EIMR */ - unsigned long rxq_desc_busaddr; /* bus addr of rx descriptors */ - - struct arpcom arpcom; /* rtems if structure, contains ifnet */ - int sc_macno; /* which mac? 0, 1, or 2 */ - - unsigned int sc_tickflags; - #define GE_TICK_TX_IFSTART 0x0001 - #define GE_TICK_RX_RESTART 0x0002 - unsigned int sc_flags; - #define GE_ALLMULTI 0x0001 - #define GE_PHYSTSCHG 0x0002 - #define GE_RXACTIVE 0x0004 - unsigned sc_pcr; /* current EPCR value */ - unsigned sc_pcxr; /* current EPCXR value */ - unsigned sc_intrmask; /* current EIMR value */ - unsigned sc_idlemask; /* suspended EIMR bits */ - unsigned sc_max_frame_length; /* maximum frame length */ - unsigned rx_buf_sz; - - /* Hash table related members */ - unsigned long long *sc_hashtable; - unsigned int sc_hashmask; /* 0x1ff or 0x1fff */ - - rtems_id daemonTid; - rtems_id daemonSync; /* synchronization with the daemon */ - /* statistics */ - struct { - volatile unsigned long rxInterrupts; - - volatile unsigned long txInterrupts; - unsigned long txMultiBuffPacket; - unsigned long txMultiMaxLen; - unsigned long txSinglMaxLen; - unsigned long txMultiMaxLoop; - unsigned long txBuffMaxLen; - unsigned long length_errors; - unsigned long frame_errors; - unsigned long crc_errors; - unsigned long or_errors; /* overrun error */ - } stats; -}; diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260ethreg.h b/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260ethreg.h deleted file mode 100644 index d9081ccb53..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260ethreg.h +++ /dev/null @@ -1,879 +0,0 @@ -/* $NetBSD: GT64260ethreg.h,v 1.2 2003/03/17 16:41:16 matt Exp $ */ - -/* - * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Allegro Networks, Inc., and Wasabi Systems, Inc. - * 4. The name of Allegro Networks, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * 5. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND - * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC. - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _DEV_GTETHREG_H_ -#define _DEV_GTETHREG_H_ - -#define ETH__BIT(bit) (1U << (bit)) -#define ETH__LLBIT(bit) (1ULL << (bit)) -#define ETH__MASK(bit) (ETH__BIT(bit) - 1) -#define ETH__LLMASK(bit) (ETH__LLBIT(bit) - 1) -#define ETH__GEN(n, off) (0x2400+((n) << 10)+(ETH__ ## off)) -#define ETH__EXT(data, bit, len) (((data) >> (bit)) & ETH__MASK(len)) -#define ETH__LLEXT(data, bit, len) (((data) >> (bit)) & ETH__LLMASK(len)) -#define ETH__CLR(data, bit, len) ((data) &= ~(ETH__MASK(len) << (bit))) -#define ETH__INS(new, bit) ((new) << (bit)) -#define ETH__LLINS(new, bit) ((unsigned long long)(new) << (bit)) - -/* - * Descriptors used for both receive & transmit data. Note that the descriptor - * must start on a 4LW boundary. Since the GT accesses the descriptor as - * two 64-bit quantities, we must present them 32bit quantities in the right - * order based on endianess. - */ - -struct GTeth_desc { -#if defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN /* for mvme5500 */ - unsigned ed_lencnt; /* Buffer size is hi 16 bits; Byte count (rx) is lo 16 */ - unsigned ed_cmdsts; /* command (hi16)/status (lo16) bits */ - unsigned ed_nxtptr; /* next descriptor (must be 4LW aligned) */ - unsigned ed_bufptr; /* pointer to packet buffer */ -#endif -#if defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN - unsigned ed_cmdsts; /* command (hi16)/status (lo16) bits */ - unsigned ed_lencnt; /* length is hi 16 bits; count (rx) is lo 16 */ - unsigned ed_bufptr; /* pointer to packet buffer */ - unsigned ed_nxtptr; /* next descriptor (must be 4LW aligned) */ -#endif -}; - -/* Ethernet 0 address control (Low), Offset: 0xf200 */ -#define RxBSnoopEn ETH__BIT(6) /* Rx buffer snoop enable,1=enable*/ -#define TxBSnoopEn ETH__BIT(14) /* Tx buffer snoop enable */ -#define RxDSnoopEn ETH__BIT(22) /* Rx descriptor snoop enable */ -#define TxDSnoopEn ETH__BIT(30) /* Tx descriptor snoop enable */ - -/* Ethernet 0 address control (High), Offset: 0xf204 */ -#define HashSnoopEn ETH__BIT(6) /* Hash Table snoop enable */ - -/* <skf> */ -#define GT_CUU_Eth0_AddrCtrlLow 0xf200 -#define GT_CUU_Eth0_AddrCtrlHigh 0xf204 - -/* Table 578: Ethernet TX Descriptor - Command/Status word - * All bits except F, EI, AM, O are only valid if TX_CMD_L is also set, - * otherwise should be 0 (tx). - */ - -#define TX_STS_LC ETH__BIT(5) /* Late Collision */ -#define TX_STS_UR ETH__BIT(6) /* Underrun error */ -#define TX_STS_RL ETH__BIT(8) /* Retransmit Limit (excession coll) */ -#define TX_STS_COL ETH__BIT(9) /* Collision Occurred */ -#define TX_STS_RC(v) ETH__GETBITS(v, 10, 4) /* Retransmit Count */ -#define TX_STS_ES ETH__BIT(15) /* Error Summary (LC|UR|RL) */ -#define TX_CMD_L ETH__BIT(16) /* Last - End Of Packet */ -#define TX_CMD_F ETH__BIT(17) /* First - Start Of Packet */ -#define TX_CMD_P ETH__BIT(18) /* Pad Packet */ -#define TX_CMD_GC ETH__BIT(22) /* Generate CRC */ -#define TX_CMD_EI ETH__BIT(23) /* Enable Interrupt */ -#define TX_CMD_AM ETH__BIT(30) /* Auto Mode */ -#define TX_CMD_O ETH__BIT(31) /* Ownership (1=GT 0=CPU) */ - -#define TX_CMD_FIRST (TX_CMD_F|TX_CMD_O) -#define TX_CMD_LAST (TX_CMD_L|TX_CMD_GC|TX_CMD_P|TX_CMD_O) - -/* Table 608: Ethernet RX Descriptor - Command/Status Word - * All bits except F, EI, AM, O are only valid if RX_CMD_L is also set, - * otherwise should be ignored (rx). - */ -#define RX_STS_CE ETH__BIT(0) /* CRC Error */ -#define RX_STS_COL ETH__BIT(1) /* Collision sensed during reception */ -#define RX_STS_LC ETH__BIT(5) /* Late Collision (Reserved) */ -#define RX_STS_OR ETH__BIT(6) /* Overrun Error */ -#define RX_STS_MFL ETH__BIT(7) /* Max Frame Len Error */ -#define RX_STS_SF ETH__BIT(8) /* Short Frame Error (< 64 bytes) */ -#define RX_STS_FT ETH__BIT(11) /* Frame Type (1 = 802.3) */ -#define RX_STS_M ETH__BIT(12) /* Missed Frame */ -#define RX_STS_HE ETH__BIT(13) /* Hash Expired (manual match) */ -#define RX_STS_IGMP ETH__BIT(14) /* IGMP Packet */ -#define RX_STS_ES ETH__BIT(15) /* Error Summary (CE|COL|LC|OR|MFL|SF) */ -#define RX_CMD_L ETH__BIT(16) /* Last - End Of Packet */ -#define RX_CMD_F ETH__BIT(17) /* First - Start Of Packet */ -#define RX_CMD_EI ETH__BIT(23) /* Enable Interrupt */ -#define RX_CMD_AM ETH__BIT(30) /* Auto Mode */ -#define RX_CMD_O ETH__BIT(31) /* Ownership (1=GT 0=CPU) */ - -/* Table 586: Hash Table Entry Fields - */ -#define HSH_V ETH__LLBIT(0) /* Entry is valid */ -#define HSH_S ETH__LLBIT(1) /* Skip this entry */ -#define HSH_RD ETH__LLBIT(2) /* Receive(1) / Discard (0) */ -#define HSH_R ETH__LLBIT(2) /* Receive(1) */ -#define HSH_PRIO_GET(v) ETH__LLEXT(v, 51, 2) -#define HSH_PRIO_INS(v) ETH__LLINS(v, 51) -#define HSH_ADDR_MASK 0x7fffff8LLU -#define HSH_LIMIT 12 - - -#define ETH_EPAR 0x2000 /* PHY Address Register */ -#define ETH_ESMIR 0x2010 /* SMI Register */ - -#define ETH_BASE_ETH0 0x2400 /* Ethernet0 Register Base */ -#define ETH_BASE_ETH1 0x2800 /* Ethernet1 Register Base */ -#define ETH_BASE_ETH2 0x2c00 /* Ethernet2 Register Base */ -#define ETH_SIZE 0x0400 /* Register Space */ - -#define ETH__EBASE 0x0000 /* Base of Registers */ -#define ETH__EPCR 0x0000 /* Port Config. Register */ -#define ETH__EPCXR 0x0008 /* Port Config. Extend Reg */ -#define ETH__EPCMR 0x0010 /* Port Command Register */ -#define ETH__EPSR 0x0018 /* Port Status Register */ -#define ETH__ESPR 0x0020 /* Port Serial Parameters Reg */ -#define ETH__EHTPR 0x0028 /* Port Hash Table Pointer Reg*/ -#define ETH__EFCSAL 0x0030 /* Flow Control Src Addr Low */ -#define ETH__EFCSAH 0x0038 /* Flow Control Src Addr High */ -#define ETH__ESDCR 0x0040 /* SDMA Configuration Reg */ -#define ETH__ESDCMR 0x0048 /* SDMA Command Register */ -#define ETH__EICR 0x0050 /* Interrupt Cause Register */ -#define ETH__EIMR 0x0058 /* Interrupt Mask Register */ -#define ETH__EFRDP0 0x0080 /* First Rx Desc Pointer 0 */ -#define ETH__EFRDP1 0x0084 /* First Rx Desc Pointer 1 */ -#define ETH__EFRDP2 0x0088 /* First Rx Desc Pointer 2 */ -#define ETH__EFRDP3 0x008c /* First Rx Desc Pointer 3 */ -#define ETH__ECRDP0 0x00a0 /* Current Rx Desc Pointer 0 */ -#define ETH__ECRDP1 0x00a4 /* Current Rx Desc Pointer 1 */ -#define ETH__ECRDP2 0x00a8 /* Current Rx Desc Pointer 2 */ -#define ETH__ECRDP3 0x00ac /* Current Rx Desc Pointer 3 */ -#define ETH__ECTDP0 0x00e0 /* Current Tx Desc Pointer 0 */ -#define ETH__ECTDP1 0x00e4 /* Current Tx Desc Pointer 1 */ -#define ETH__EDSCP2P0L 0x0060 /* IP Differentiated Services - CodePoint to Priority0 low */ -#define ETH__EDSCP2P0H 0x0064 /* IP Differentiated Services - CodePoint to Priority0 high*/ -#define ETH__EDSCP2P1L 0x0068 /* IP Differentiated Services - CodePoint to Priority1 low */ -#define ETH__EDSCP2P1H 0x006c /* IP Differentiated Services - CodePoint to Priority1 high*/ -#define ETH__EVPT2P 0x0068 /* VLAN Prio. Tag to Priority */ -#define ETH__EMIBCTRS 0x0100 /* MIB Counters */ - -/* SKF : we are only concerned with the Ethernet0 for the mvme5500 board */ -#define ETH0_EBASE 0x2400 /* Base of Registers */ -#define ETH0_EPCR 0x2400 /* Port Config. Register */ -#define ETH0_EPCXR 0x2408 /* Port Config. Extend Reg */ -#define ETH0_EPCMR 0x2410 /* Port Command Register */ -#define ETH0_EPSR 0x2418 /* Port Status Register */ -#define ETH0_ESPR 0x2420 /* Port Serial Parameters Reg */ -#define ETH0_EHTPR 0x2428 /* Port Hash Table Pointer Reg*/ -#define ETH0_EFCSAL 0x2430 /* Flow Control Src Addr Low */ -#define ETH0_EFCSAH 0x2438 /* Flow Control Src Addr High */ -#define ETH0_ESDCR 0x2440 /* SDMA Configuration Reg */ -#define ETH0_ESDCMR 0x2448 /* SDMA Command Register */ -#define ETH0_EICR 0x2450 /* Interrupt Cause Register */ -#define ETH0_EIMR 0x2458 /* Interrupt Mask Register */ -#define ETH0_EFRDP0 0x2480 /* First Rx Desc Pointer 0 */ -#define ETH0_EFRDP1 0x2484 /* First Rx Desc Pointer 1 */ -#define ETH0_EFRDP2 0x2488 /* First Rx Desc Pointer 2 */ -#define ETH0_EFRDP3 0x248c /* First Rx Desc Pointer 3 */ -#define ETH0_ECRDP0 0x24a0 /* Current Rx Desc Pointer 0 */ -#define ETH0_ECRDP1 0x24a4 /* Current Rx Desc Pointer 1 */ -#define ETH0_ECRDP2 0x24a8 /* Current Rx Desc Pointer 2 */ -#define ETH0_ECRDP3 0x24ac /* Current Rx Desc Pointer 3 */ -#define ETH0_ECTDP0 0x24e0 /* Current Tx Desc Pointer 0 */ -#define ETH0_ECTDP1 0x24e4 /* Current Tx Desc Pointer 1 */ -#define ETH0_EDSCP2P0L 0x2460 /* IP Differentiated Services - CodePoint to Priority0 low */ -#define ETH0_EDSCP2P0H 0x2464 /* IP Differentiated Services - CodePoint to Priority0 high*/ -#define ETH0_EDSCP2P1L 0x2468 /* IP Differentiated Services - CodePoint to Priority1 low */ -#define ETH0_EDSCP2P1H 0x246c /* IP Differentiated Services - CodePoint to Priority1 high*/ -#define ETH0_EVPT2P 0x2468 /* VLAN Prio. Tag to Priority */ -#define ETH0_EMIBCTRS 0x2500 /* MIB Counters */ - -#define ETH_BASE(n) ETH__GEN(n, EBASE) -#define ETH_EPCR(n) ETH__GEN(n, EPCR) /* Port Config. Register */ -#define ETH_EPCXR(n) ETH__GEN(n, EPCXR) /* Port Config. Extend Reg */ -#define ETH_EPCMR(n) ETH__GEN(n, EPCMR) /* Port Command Register */ -#define ETH_EPSR(n) ETH__GEN(n, EPSR) /* Port Status Register */ -#define ETH_ESPR(n) ETH__GEN(n, ESPR) /* Port Serial Parameters Reg */ -#define ETH_EHTPR(n) ETH__GEN(n, EHPTR) /* Port Hash Table Pointer Reg*/ -#define ETH_EFCSAL(n) ETH__GEN(n, EFCSAL) /* Flow Control Src Addr Low */ -#define ETH_EFCSAH(n) ETH__GEN(n, EFCSAH) /* Flow Control Src Addr High */ -#define ETH_ESDCR(n) ETH__GEN(n, ESDCR) /* SDMA Configuration Reg */ -#define ETH_ESDCMR(n) ETH__GEN(n, ESDCMR) /* SDMA Command Register */ -#define ETH_EICR(n) ETH__GEN(n, EICR) /* Interrupt Cause Register */ -#define ETH_EIMR(n) ETH__GEN(n, EIMR) /* Interrupt Mask Register */ -#define ETH_EFRDP0(n) ETH__GEN(n, EFRDP0) /* First Rx Desc Pointer 0 */ -#define ETH_EFRDP1(n) ETH__GEN(n, EFRDP1) /* First Rx Desc Pointer 1 */ -#define ETH_EFRDP2(n) ETH__GEN(n, EFRDP2) /* First Rx Desc Pointer 2 */ -#define ETH_EFRDP3(n) ETH__GEN(n, EFRDP3) /* First Rx Desc Pointer 3 */ -#define ETH_ECRDP0(n) ETH__GEN(n, ECRDP0) /* Current Rx Desc Pointer 0 */ -#define ETH_ECRDP1(n) ETH__GEN(n, ECRDP1) /* Current Rx Desc Pointer 1 */ -#define ETH_ECRDP2(n) ETH__GEN(n, ECRDP2) /* Current Rx Desc Pointer 2 */ -#define ETH_ECRDP3(n) ETH__GEN(n, ECRDP3) /* Current Rx Desc Pointer 3 */ -#define ETH_ECTDP0(n) ETH__GEN(n, ECTDP0) /* Current Tx Desc Pointer 0 */ -#define ETH_ECTDP1(n) ETH__GEN(n, ECTDP1) /* Current Tx Desc Pointer 1 */ -#define ETH_EDSCP2P0L(n) ETH__GEN(n, EDSCP2P0L) /* IP Differentiated Services - CodePoint to Priority0 low */ -#define ETH_EDSCP2P0H(n) ETH__GEN(n, EDSCP2P0H) /* IP Differentiated Services - CodePoint to Priority0 high*/ -#define ETH_EDSCP2P1L(n) ETH__GEN(n, EDSCP2P1L) /* IP Differentiated Services - CodePoint to Priority1 low */ -#define ETH_EDSCP2P1H(n) ETH__GEN(n, EDSCP1P1H) /* IP Differentiated Services - CodePoint to Priority1 high*/ -#define ETH_EVPT2P(n) ETH__GEN(n, EVPT2P) /* VLAN Prio. Tag to Priority */ -#define ETH_EMIBCTRS(n) ETH__GEN(n, EMIBCTRS) /* MIB Counters */ - -#define ETH_EPAR_PhyAD_GET(v, n) (((v) >> ((n) * 5)) & 0x1f) - -#define ETH_ESMIR_READ(phy, reg) (ETH__INS(phy, 16)|\ - ETH__INS(reg, 21)|\ - ETH_ESMIR_ReadOpcode) -#define ETH_ESMIR_WRITE(phy, reg, val) (ETH__INS(phy, 16)|\ - ETH__INS(reg, 21)|\ - ETH__INS(val, 0)|\ - ETH_ESMIR_WriteOpcode) -#define ETH_ESMIR_Value_GET(v) ETH__EXT(v, 0, 16) -#define ETH_ESMIR_WriteOpcode 0 -#define ETH_ESMIR_ReadOpcode ETH__BIT(26) -#define ETH_ESMIR_ReadValid ETH__BIT(27) -#define ETH_ESMIR_Busy ETH__BIT(28) - -/* - * Table 597: Port Configuration Register (PCR) - * 00:00 PM Promiscuous mode - * 0: Normal mode (Frames are only received if the - * destination address is found in the hash - * table) - * 1: Promiscuous mode (Frames are received - * regardless of their destination address. - * Errored frames are discarded unless the Port - * Configuration register's PBF bit is set) - * 01:01 RBM Reject Broadcast Mode - * 0: Receive broadcast address - * 1: Reject frames with broadcast address - * Overridden by the promiscuous mode. - * 02:02 PBF Pass Bad Frames - * (0: Normal mode, 1: Pass bad Frames) - * The Ethernet receiver passes to the CPU errored - * frames (like fragments and collided packets) - * that are normally rejected. - * NOTE: Frames are only passed if they - * successfully pass address filtering. - * 06:03 Reserved - * 07:07 EN Enable (0: Disabled, 1: Enable) - * When enabled, the ethernet port is ready to - * transmit/receive. - * 09:08 LPBK Loop Back Mode - * 00: Normal mode - * 01: Internal loop back mode (TX data is looped - * back to the RX lines. No transition is seen - * on the interface pins) - * 10: External loop back mode (TX data is looped - * back to the RX lines and also transmitted - * out to the MII interface pins) - * 11: Reserved - * 10:10 FC Force Collision - * 0: Normal mode. - * 1: Force Collision on any TX frame. - * For RXM test (in Loopback mode). - * 11:11 Reserved. - * 12:12 HS Hash Size - * 0: 8K address filtering - * (256KB of memory space required). - * 1: 512 address filtering - * ( 16KB of memory space required). - * 13:13 HM Hash Mode (0: Hash Func. 0; 1: Hash Func. 1) - * 14:14 HDM Hash Default Mode - * 0: Discard addresses not found in address table - * 1: Pass addresses not found in address table - * 15:15 HD Duplex Mode (0: Half Duplex, 1: Full Duplex) - * NOTE: Valid only when auto-negotiation for - * duplex mode is disabled. - * 30:16 Reserved - * 31:31 ACCS Accelerate Slot Time - * (0: Normal mode, 1: Reserved) - */ -#define ETH_EPCR_PM ETH__BIT(0) -#define ETH_EPCR_RBM ETH__BIT(1) -#define ETH_EPCR_PBF ETH__BIT(2) -#define ETH_EPCR_EN ETH__BIT(7) -#define ETH_EPCR_LPBK_GET(v) ETH__BIT(v, 8, 2) -#define ETH_EPCR_LPBK_Normal 0 -#define ETH_EPCR_LPBK_Internal 1 -#define ETH_EPCR_LPBK_External 2 -#define ETH_EPCR_FC ETH__BIT(10) - -#define ETH_EPCR_HS ETH__BIT(12) -#define ETH_EPCR_HS_8K 0 -#define ETH_EPCR_HS_512 ETH_EPCR_HS - -#define ETH_EPCR_HM ETH__BIT(13) -#define ETH_EPCR_HM_0 0 -#define ETH_EPCR_HM_1 ETH_EPCR_HM - -#define ETH_EPCR_HDM ETH__BIT(14) -#define ETH_EPCR_HDM_Discard 0 -#define ETH_EPCR_HDM_Pass ETH_EPCR_HDM - -#define ETH_EPCR_HD_Half 0 -#define ETH_EPCR_HD_Full ETH_EPCR_HD_Full - -#define ETH_EPCR_ACCS ETH__BIT(31) - - - -/* - * Table 598: Port Configuration Extend Register (PCXR) - * 00:00 IGMP IGMP Packets Capture Enable - * 0: IGMP packets are treated as normal Multicast - * packets. - * 1: IGMP packets on IPv4/Ipv6 over Ethernet/802.3 - * are trapped and sent to high priority RX - * queue. - * 01:01 SPAN Spanning Tree Packets Capture Enable - * 0: BPDU (Bridge Protocol Data Unit) packets are - * treated as normal Multicast packets. - * 1: BPDU packets are trapped and sent to high - * priority RX queue. - * 02:02 PAR Partition Enable (0: Normal, 1: Partition) - * When more than 61 collisions occur while - * transmitting, the port enters Partition mode. - * It waits for the first good packet from the - * wire and then goes back to Normal mode. Under - * Partition mode it continues transmitting, but - * it does not receive. - * 05:03 PRIOtx Priority weight in the round-robin between high - * and low priority TX queues. - * 000: 1 pkt from HIGH, 1 pkt from LOW. - * 001: 2 pkt from HIGH, 1 pkt from LOW. - * 010: 4 pkt from HIGH, 1 pkt from LOW. - * 011: 6 pkt from HIGH, 1 pkt from LOW. - * 100: 8 pkt from HIGH, 1 pkt from LOW. - * 101: 10 pkt from HIGH, 1 pkt from LOW. - * 110: 12 pkt from HIGH, 1 pkt from LOW. - * 111: All pkt from HIGH, 0 pkt from LOW. LOW is - * served only if HIGH is empty. - * NOTE: If the HIGH queue is emptied before - * finishing the count, the count is reset - * until the next first HIGH comes in. - * 07:06 PRIOrx Default Priority for Packets Received on this - * Port (00: Lowest priority, 11: Highest priority) - * 08:08 PRIOrx_Override Override Priority for Packets Received on this - * Port (0: Do not override, 1: Override with - * <PRIOrx> field) - * 09:09 DPLXen Enable Auto-negotiation for Duplex Mode - * (0: Enable, 1: Disable) - * 11:10 FCTLen Enable Auto-negotiation for 802.3x Flow-control - * 0: Enable; When enabled, 1 is written (through - * SMI access) to the PHY's register 4 bit 10 - * to advertise flow-control capability. - * 1: Disable; Only enables flow control after the - * PHY address is set by the CPU. When changing - * the PHY address the flow control - * auto-negotiation must be disabled. - * 11:11 FLP Force Link Pass - * (0: Force Link Pass, 1: Do NOT Force Link pass) - * 12:12 FCTL 802.3x Flow-Control Mode (0: Enable, 1: Disable) - * NOTE: Only valid when auto negotiation for flow - * control is disabled. - * 13:13 Reserved - * 15:14 MFL Max Frame Length - * Maximum packet allowed for reception (including - * CRC): 00: 1518 bytes, 01: 1536 bytes, - * 10: 2048 bytes, 11: 64K bytes - * 16:16 MIBclrMode MIB Counters Clear Mode (0: Clear, 1: No effect) - * 17:17 MIBctrMode Reserved. (MBZ) - * 18:18 Speed Port Speed (0: 10Mbit/Sec, 1: 100Mbit/Sec) - * NOTE: Only valid if SpeedEn bit is set. - * 19:19 SpeedEn Enable Auto-negotiation for Speed - * (0: Enable, 1: Disable) - * 20:20 RMIIen RMII enable - * 0: Port functions as MII port - * 1: Port functions as RMII port - * 21:21 DSCPen DSCP enable - * 0: IP DSCP field decoding is disabled. - * 1: IP DSCP field decoding is enabled. - * 31:22 Reserved - */ -#define ETH_EPCXR_IGMP ETH__BIT(0) -#define ETH_EPCXR_SPAN ETH__BIT(1) -#define ETH_EPCXR_PAR ETH__BIT(2) -#define ETH_EPCXR_PRIOtx_GET(v) ETH__EXT(v, 3, 3) -#define ETH_EPCXR_PRIOrx_GET(v) ETH__EXT(v, 3, 3) -#define ETH_EPCXR_PRIOrx_Override ETH__BIT(8) -#define ETH_EPCXR_DLPXen ETH__BIT(9) -#define ETH_EPCXR_FCTLen ETH__BIT(10) -#define ETH_EPCXR_FLP ETH__BIT(11) -#define ETH_EPCXR_FCTL ETH__BIT(12) -#define ETH_EPCXR_MFL_GET(v) ETH__EXT(v, 14, 2) -#define ETH_EPCXR_MFL_1518 0 -#define ETH_EPCXR_MFL_1536 1 -#define ETH_EPCXR_MFL_2048 2 -#define ETH_EPCXR_MFL_64K 3 -#define ETH_EPCXR_MIBclrMode ETH__BIT(16) -#define ETH_EPCXR_MIBctrMode ETH__BIT(17) -#define ETH_EPCXR_Speed ETH__BIT(18) -#define ETH_EPCXR_SpeedEn ETH__BIT(19) -#define ETH_EPCXR_RMIIEn ETH__BIT(20) -#define ETH_EPCXR_DSCPEn ETH__BIT(21) - - - -/* - * Table 599: Port Command Register (PCMR) - * 14:00 Reserved - * 15:15 FJ Force Jam / Flow Control - * When in half-duplex mode, the CPU uses this bit - * to force collisions on the Ethernet segment. - * When the CPU recognizes that it is going to run - * out of receive buffers, it can force the - * transmitter to send jam frames, forcing - * collisions on the wire. To allow transmission - * on the Ethernet segment, the CPU must clear the - * FJ bit when more resources are available. When - * in full-duplex and flow-control is enabled, this - * bit causes the port's transmitter to send - * flow-control PAUSE packets. The CPU must reset - * this bit when more resources are available. - * 31:16 Reserved - */ - -#define ETH_EPCMR_FJ ETH__BIT(15) - - -/* - * Table 600: Port Status Register (PSR) -- Read Only - * 00:00 Speed Indicates Port Speed (0: 10Mbs, 1: 100Mbs) - * 01:01 Duplex Indicates Port Duplex Mode (0: Half, 1: Full) - * 02:02 Fctl Indicates Flow-control Mode - * (0: enabled, 1: disabled) - * 03:03 Link Indicates Link Status (0: down, 1: up) - * 04:04 Pause Indicates that the port is in flow-control - * disabled state. This bit is set when an IEEE - * 802.3x flow-control PAUSE (XOFF) packet is - * received (assuming that flow-control is - * enabled and the port is in full-duplex mode). - * Reset when XON is received, or when the XOFF - * timer has expired. - * 05:05 TxLow Tx Low Priority Status - * Indicates the status of the low priority - * transmit queue: (0: Stopped, 1: Running) - * 06:06 TxHigh Tx High Priority Status - * Indicates the status of the high priority - * transmit queue: (0: Stopped, 1: Running) - * 07:07 TXinProg TX in Progress - * Indicates that the port's transmitter is in an - * active transmission state. - * 31:08 Reserved - */ -#define ETH_EPSR_Speed ETH__BIT(0) -#define ETH_EPSR_Duplex ETH__BIT(1) -#define ETH_EPSR_Fctl ETH__BIT(2) -#define ETH_EPSR_Link ETH__BIT(3) -#define ETH_EPSR_Pause ETH__BIT(4) -#define ETH_EPSR_TxLow ETH__BIT(5) -#define ETH_EPSR_TxHigh ETH__BIT(6) -#define ETH_EPSR_TXinProg ETH__BIT(7) - - -/* - * Table 601: Serial Parameters Register (SPR) - * 01:00 JAM_LENGTH Two bits to determine the JAM Length - * (in Backpressure) as follows: - * 00 = 12K bit-times - * 01 = 24K bit-times - * 10 = 32K bit-times - * 11 = 48K bit-times - * 06:02 JAM_IPG Five bits to determine the JAM IPG. - * The step is four bit-times. The value may vary - * between 4 bit time to 124. - * 11:07 IPG_JAM_TO_DATA Five bits to determine the IPG JAM to DATA. - * The step is four bit-times. The value may vary - * between 4 bit time to 124. - * 16:12 IPG_DATA Inter-Packet Gap (IPG) - * The step is four bit-times. The value may vary - * between 12 bit time to 124. - * NOTE: These bits may be changed only when the - * Ethernet ports is disabled. - * 21:17 Data_Blind Data Blinder - * The number of nibbles from the beginning of the - * IPG, in which the IPG counter is restarted when - * detecting a carrier activity. Following this - * value, the port enters the Data Blinder zone and - * does not reset the IPG counter. This ensures - * fair access to the medium. - * The default is 10 hex (64 bit times - 2/3 of the - * default IPG). The step is 4 bit-times. Valid - * range is 3 to 1F hex nibbles. - * NOTE: These bits may be only changed when the - * Ethernet port is disabled. - * 22:22 Limit4 The number of consecutive packet collisions that - * occur before the collision counter is reset. - * 0: The port resets its collision counter after - * 16 consecutive retransmit trials and - * restarts the Backoff algorithm. - * 1: The port resets its collision counter and - * restarts the Backoff algorithm after 4 - * consecutive transmit trials. - * 31:23 Reserved - */ -#define ETH_ESPR_JAM_LENGTH_GET(v) ETH__EXT(v, 0, 2) -#define ETH_ESPR_JAM_IPG_GET(v) ETH__EXT(v, 2, 5) -#define ETH_ESPR_IPG_JAM_TO_DATA_GET(v) ETH__EXT(v, 7, 5) -#define ETH_ESPR_IPG_DATA_GET(v) ETH__EXT(v, 12, 5) -#define ETH_ESPR_Data_Bilnd_GET(v) ETH__EXT(v, 17, 5) -#define ETH_ESPR_Limit4(v) ETH__BIT(22) - -/* - * Table 602: Hash Table Pointer Register (HTPR) - * 31:00 HTP 32-bit pointer to the address table. - * Bits [2:0] must be set to zero. - */ - -/* - * Table 603: Flow Control Source Address Low (FCSAL) - * 15:0 SA[15:0] Source Address - * The least significant bits of the source - * address for the port. This address is used for - * Flow Control. - * 31:16 Reserved - */ - -/* - * Table 604: Flow Control Source Address High (FCSAH) - * 31:0 SA[47:16] Source Address - * The most significant bits of the source address - * for the port. This address is used for Flow - * Control. - */ - - -/* - * Table 605: SDMA Configuration Register (SDCR) - * 01:00 Reserved - * 05:02 RC Retransmit Count - * Sets the maximum number of retransmits per - * packet. After executing retransmit for RC - * times, the TX SDMA closes the descriptor with a - * Retransmit Limit error indication and processes - * the next packet. When RC is set to 0, the - * number of retransmits is unlimited. In this - * case, the retransmit process is only terminated - * if CPU issues an Abort command. - * 06:06 BLMR Big/Little Endian Receive Mode - * The DMA supports Big or Little Endian - * configurations on a per channel basis. The BLMR - * bit only affects data transfer to memory. - * 0: Big Endian - * 1: Little Endian - * 07:07 BLMT Big/Little Endian Transmit Mode - * The DMA supports Big or Little Endian - * configurations on a per channel basis. The BLMT - * bit only affects data transfer from memory. - * 0: Big Endian - * 1: Little Endian - * 08:08 POVR PCI Override - * When set, causes the SDMA to direct all its - * accesses in PCI_0 direction and overrides - * normal address decoding process. - * 09:09 RIFB Receive Interrupt on Frame Boundaries - * When set, the SDMA Rx generates interrupts only - * on frame boundaries (i.e. after writing the - * frame status to the descriptor). - * 11:10 Reserved - * 13:12 BSZ Burst Size - * Sets the maximum burst size for SDMA - * transactions: - * 00: Burst is limited to 1 64bit words. - * 01: Burst is limited to 2 64bit words. - * 10: Burst is limited to 4 64bit words. - * 11: Burst is limited to 8 64bit words. - * 31:14 Reserved - */ -#define ETH_ESDCR_RC_GET(v) ETH__EXT(v, 2, 4) -#define ETH_ESDCR_BLMR ETH__BIT(6) -#define ETH_ESDCR_BLMT ETH__BIT(7) -#define ETH_ESDCR_POVR ETH__BIT(8) -#define ETH_ESDCR_RIFB ETH__BIT(9) -#define ETH_ESDCR_BSZ_GET(v) ETH__EXT(v, 12, 2) -#define ETH_ESDCR_BSZ_SET(v, n) (ETH__CLR(v, 12, 2),\ - (v) |= ETH__INS(n, 12)) -#define ETH_ESDCR_BSZ_1 0 -#define ETH_ESDCR_BSZ_2 1 -#define ETH_ESDCR_BSZ_4 2 -#define ETH_ESDCR_BSZ_8 3 - -#define ETH_ESDCR_BSZ_Strings { "1 64-bit word", "2 64-bit words", \ - "4 64-bit words", "8 64-bit words" } - -/* - * Table 606: SDMA Command Register (SDCMR) - * 06:00 Reserved - * 07:07 ERD Enable RX DMA. - * Set to 1 by the CPU to cause the SDMA to start - * a receive process. Cleared when the CPU issues - * an Abort Receive command. - * 14:08 Reserved - * 15:15 AR Abort Receive - * Set to 1 by the CPU to abort a receive SDMA - * operation. When the AR bit is set, the SDMA - * aborts its current operation and moves to IDLE. - * No descriptor is closed. The AR bit is cleared - * upon entering IDLE. After setting the AR bit, - * the CPU must poll the bit to verify that the - * abort sequence is completed. - * 16:16 STDH Stop TX High - * Set to 1 by the CPU to stop the transmission - * process from the high priority queue at the end - * of the current frame. An interrupt is generated - * when the stop command has been executed. - * Writing 1 to STDH resets TXDH bit. - * Writing 0 to this bit has no effect. - * 17:17 STDL Stop TX Low - * Set to 1 by the CPU to stop the transmission - * process from the low priority queue at the end - * of the current frame. An interrupt is generated - * when the stop command has been executed. - * Writing 1 to STDL resets TXDL bit. - * Writing 0 to this bit has no effect. - * 22:18 Reserved - * 23:23 TXDH Start Tx High - * Set to 1 by the CPU to cause the SDMA to fetch - * the first descriptor and start a transmit - * process from the high priority Tx queue. - * Writing 1 to TXDH resets STDH bit. - * Writing 0 to this bit has no effect. - * 24:24 TXDL Start Tx Low - * Set to 1 by the CPU to cause the SDMA to fetch - * the first descriptor and start a transmit - * process from the low priority Tx queue. - * Writing 1 to TXDL resets STDL bit. - * Writing 0 to this bit has no effect. - * 30:25 Reserved - * 31:31 AT Abort Transmit - * Set to 1 by the CPU to abort a transmit DMA - * operation. When the AT bit is set, the SDMA - * aborts its current operation and moves to IDLE. - * No descriptor is closed. Cleared upon entering - * IDLE. After setting AT bit, the CPU must poll - * it in order to verify that the abort sequence - * is completed. - */ -#define ETH_ESDCMR_ERD ETH__BIT(7) -#define ETH_ESDCMR_AR ETH__BIT(15) -#define ETH_ESDCMR_STDH ETH__BIT(16) -#define ETH_ESDCMR_STDL ETH__BIT(17) -#define ETH_ESDCMR_TXDH ETH__BIT(23) -#define ETH_ESDCMR_TXDL ETH__BIT(24) -#define ETH_ESDCMR_AT ETH__BIT(31) - -/* - * Table 607: Interrupt Cause Register (ICR) - * 00:00 RxBuffer Rx Buffer Return - * Indicates an Rx buffer returned to CPU ownership - * or that the port finished reception of a Rx - * frame in either priority queues. - * NOTE: In order to get a Rx Buffer return per - * priority queue, use bit 19:16. This bit is - * set upon closing any Rx descriptor which - * has its EI bit set. To limit the - * interrupts to frame (rather than buffer) - * boundaries, the user must set SDMA - * Configuration register's RIFB bit. When - * the RIFB bit is set, an interrupt - * generates only upon closing the first - * descriptor of a received packet, if this - * descriptor has it EI bit set. - * 01:01 Reserved - * 02:02 TxBufferHigh Tx Buffer for High priority Queue - * Indicates a Tx buffer returned to CPU ownership - * or that the port finished transmission of a Tx - * frame. - * NOTE: This bit is set upon closing any Tx - * descriptor which has its EI bit set. To - * limit the interrupts to frame (rather than - * buffer) boundaries, the user must set EI - * only in the last descriptor. - * 03:03 TxBufferLow Tx Buffer for Low Priority Queue - * Indicates a Tx buffer returned to CPU ownership - * or that the port finished transmission of a Tx - * frame. - * NOTE: This bit is set upon closing any Tx - * descriptor which has its EI bit set. To - * limit the interrupts to frame (rather than - * buffer) boundaries, the user must set EI - * only in the last descriptor. - * 05:04 Reserved - * 06:06 TxEndHigh Tx End for High Priority Queue - * Indicates that the Tx DMA stopped processing the - * high priority queue after stop command, or that - * it reached the end of the high priority - * descriptor chain. - * 07:07 TxEndLow Tx End for Low Priority Queue - * Indicates that the Tx DMA stopped processing the - * low priority queue after stop command, or that - * it reached the end of the low priority - * descriptor chain. - * 08:08 RxError Rx Resource Error - * Indicates a Rx resource error event in one of - * the priority queues. - * NOTE: To get a Rx Resource Error Indication per - * priority queue, use bit 23:20. - * 09:09 Reserved - * 10:10 TxErrorHigh Tx Resource Error for High Priority Queue - * Indicates a Tx resource error event during - * packet transmission from the high priority queue - * 11:11 TxErrorLow Tx Resource Error for Low Priority Queue - * Indicates a Tx resource error event during - * packet transmission from the low priority queue - * 12:12 RxOVR Rx Overrun - * Indicates an overrun event that occurred during - * reception of a packet. - * 13:13 TxUdr Tx Underrun - * Indicates an underrun event that occurred during - * transmission of packet from either queue. - * 15:14 Reserved - * 16:16 RxBuffer-Queue[0] Rx Buffer Return in Priority Queue[0] - * Indicates a Rx buffer returned to CPU ownership - * or that the port completed reception of a Rx - * frame in a receive priority queue[0] - * 17:17 RxBuffer-Queue[1] Rx Buffer Return in Priority Queue[1] - * Indicates a Rx buffer returned to CPU ownership - * or that the port completed reception of a Rx - * frame in a receive priority queue[1]. - * 18:18 RxBuffer-Queue[2] Rx Buffer Return in Priority Queue[2] - * Indicates a Rx buffer returned to CPU ownership - * or that the port completed reception of a Rx - * frame in a receive priority queue[2]. - * 19:19 RxBuffer-Queue[3] Rx Buffer Return in Priority Queue[3] - * Indicates a Rx buffer returned to CPU ownership - * or that the port completed reception of a Rx - * frame in a receive priority queue[3]. - * 20:20 RxError-Queue[0] Rx Resource Error in Priority Queue[0] - * Indicates a Rx resource error event in receive - * priority queue[0]. - * 21:21 RxError-Queue[1] Rx Resource Error in Priority Queue[1] - * Indicates a Rx resource error event in receive - * priority queue[1]. - * 22:22 RxError-Queue[2] Rx Resource Error in Priority Queue[2] - * Indicates a Rx resource error event in receive - * priority queue[2]. - * 23:23 RxError-Queue[3] Rx Resource Error in Priority Queue[3] - * Indicates a Rx resource error event in receive - * priority queue[3]. - * 27:24 Reserved - * 28:29 MIIPhySTC MII PHY Status Change - * Indicates a status change reported by the PHY - * connected to this port. Set when the MII - * management interface block identifies a change - * in PHY's register 1. - * 29:29 SMIdone SMI Command Done - * Indicates that the SMI completed a MII - * management command (either read or write) that - * was initiated by the CPU writing to the SMI - * register. - * 30:30 Reserved - * 31:31 EtherIntSum Ethernet Interrupt Summary - * This bit is a logical OR of the (unmasked) bits - * [30:04] in the Interrupt Cause register. - */ - -#define ETH_IR_RxBuffer ETH__BIT(0) -#define ETH_IR_TxBufferHigh ETH__BIT(2) -#define ETH_IR_TxBufferLow ETH__BIT(3) -#define ETH_IR_TxEndHigh ETH__BIT(6) -#define ETH_IR_TxEndLow ETH__BIT(7) -#define ETH_IR_RxError ETH__BIT(8) -#define ETH_IR_TxErrorHigh ETH__BIT(10) -#define ETH_IR_TxErrorLow ETH__BIT(11) -#define ETH_IR_RxOVR ETH__BIT(12) -#define ETH_IR_TxUdr ETH__BIT(13) -#define ETH_IR_RxBuffer_0 ETH__BIT(16) -#define ETH_IR_RxBuffer_1 ETH__BIT(17) -#define ETH_IR_RxBuffer_2 ETH__BIT(18) -#define ETH_IR_RxBuffer_3 ETH__BIT(19) -#define ETH_IR_RxBuffer_GET(v) ETH__EXT(v, 16, 4) -#define ETH_IR_RxError_0 ETH__BIT(20) -#define ETH_IR_RxError_1 ETH__BIT(21) -#define ETH_IR_RxError_2 ETH__BIT(22) -#define ETH_IR_RxError_3 ETH__BIT(23) -#define ETH_IR_RxError_GET(v) ETH__EXT(v, 20, 4) -#define ETH_IR_RxBits (ETH_IR_RxBuffer_0|\ - ETH_IR_RxBuffer_1|\ - ETH_IR_RxBuffer_2|\ - ETH_IR_RxBuffer_3|\ - ETH_IR_RxError_0|\ - ETH_IR_RxError_1|\ - ETH_IR_RxError_2|\ - ETH_IR_RxError_3) -#define ETH_IR_MIIPhySTC ETH__BIT(28) -#define ETH_IR_SMIdone ETH__BIT(29) -#define ETH_IR_EtherIntSum (1<<31) -#define ETH_IR_Summary (1<<31) -#define ETH_IR_ErrorSum 0x803d00 -#define INTR_RX_ERROR 0x801100 -#define INTR_TX_ERROR 0x002c00 - -/* - * Table 608: Interrupt Mask Register (IMR) - * 31:00 Various Mask bits for the Interrupt Cause register. - */ - -/* - * Table 609: IP Differentiated Services CodePoint to Priority0 low (DSCP2P0L), - * 31:00 Priority0_low The LSB priority bits for DSCP[31:0] entries. - */ - -/* - * Table 610: IP Differentiated Services CodePoint to Priority0 high (DSCP2P0H) - * 31:00 Priority0_high The LSB priority bits for DSCP[63:32] entries. - */ - -/* - * Table 611: IP Differentiated Services CodePoint to Priority1 low (DSCP2P1L) - * 31:00 Priority1_low The MSB priority bits for DSCP[31:0] entries. - */ - -/* - * Table 612: IP Differentiated Services CodePoint to Priority1 high (DSCP2P1H) - * 31:00 Priority1_high The MSB priority bit for DSCP[63:32] entries. - */ - -/* - * Table 613: VLAN Priority Tag to Priority (VPT2P) - * 07:00 Priority0 The LSB priority bits for VLAN Priority[7:0] - * entries. - * 15:08 Priority1 The MSB priority bits for VLAN Priority[7:0] - * entries. - * 31:16 Reserved - */ -#endif /* _DEV_GTETHREG_H_ */ diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wmreg.h b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wmreg.h deleted file mode 100644 index 3e21c62581..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wmreg.h +++ /dev/null @@ -1,740 +0,0 @@ -/* $NetBSD: if_wmreg.h,v 1.22 2007/04/29 20:35:21 bouyer Exp $ */ - -/* - * Copyright (c) 2001 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * Some are added by Shuchen Kate Feng <feng1@bnl.gov>, - * NSLS, Brookhaven National Laboratory. All rights reserved. - * under the Deaprtment of Energy contract DE-AC02-98CH10886 - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Register description for the Intel i82542 (``Wiseman''), - * i82543 (``Livengood''), and i82544 (``Cordova'') Gigabit - * Ethernet chips. - */ - -/* - * The wiseman supports 64-bit PCI addressing. This structure - * describes the address in descriptors. - */ -typedef struct wiseman_addr { - uint32_t wa_low; /* low-order 32 bits */ - uint32_t wa_high; /* high-order 32 bits */ -} __attribute__((__packed__)) wiseman_addr_t; - -/* - * The Wiseman receive descriptor. - * - * The receive descriptor ring must be aligned to a 4K boundary, - * and there must be an even multiple of 8 descriptors in the ring. - */ -typedef volatile struct wiseman_rxdesc { - wiseman_addr_t wrx_addr; /* buffer address */ - - uint16_t wrx_len; /* buffer length */ - uint16_t wrx_cksum; /* checksum (starting at PCSS) */ - - uint8_t wrx_status; /* Rx status */ - uint8_t wrx_errors; /* Rx errors */ - uint16_t wrx_special; /* special field (VLAN, etc.) */ -} __attribute__((__packed__)) wiseman_rxdesc_t; - -/* wrx_status bits */ -#define WRX_ST_DD (1U << 0) /* descriptor done */ -#define WRX_ST_EOP (1U << 1) /* end of packet */ -#define WRX_ST_IXSM (1U << 2) /* ignore checksum indication */ -#define WRX_ST_VP (1U << 3) /* VLAN packet */ -#define WRX_ST_BPDU (1U << 4) /* ??? */ -#define WRX_ST_TCPCS (1U << 5) /* TCP checksum performed */ -#define WRX_ST_IPCS (1U << 6) /* IP checksum performed */ -#define WRX_ST_PIF (1U << 7) /* passed in-exact filter */ - -/* wrx_error bits */ -#define WRX_ER_CE (1U << 0) /* CRC error */ -#define WRX_ER_SE (1U << 1) /* symbol error */ -#define WRX_ER_SEQ (1U << 2) /* sequence error */ -#define WRX_ER_ICE (1U << 3) /* ??? */ -#define WRX_ER_CXE (1U << 4) /* carrier extension error */ -#define WRX_ER_TCPE (1U << 5) /* TCP checksum error */ -#define WRX_ER_IPE (1U << 6) /* IP checksum error */ -#define WRX_ER_RXE (1U << 7) /* Rx data error */ - -/* wrx_special field for VLAN packets */ -#define WRX_VLAN_ID(x) ((x) & 0x0fff) /* VLAN identifier */ -#define WRX_VLAN_CFI (1U << 12) /* Canonical Form Indicator */ -#define WRX_VLAN_PRI(x) (((x) >> 13) & 7)/* VLAN priority field */ - -/* - * The Wiseman transmit descriptor. - * - * The transmit descriptor ring must be aligned to a 4K boundary, - * and there must be an even multiple of 8 descriptors in the ring. - */ -typedef struct wiseman_tx_fields { - uint8_t wtxu_status; /* Tx status */ - uint8_t wtxu_options; /* options */ - uint16_t wtxu_vlan; /* VLAN info */ -} __attribute__((__packed__)) wiseman_txfields_t; -typedef volatile struct wiseman_txdesc { - wiseman_addr_t wtx_addr; /* buffer address */ - uint32_t wtx_cmdlen; /* command and length */ - wiseman_txfields_t wtx_fields; /* fields; see below */ -} __attribute__((__packed__)) wiseman_txdesc_t; - -/* Commands for wtx_cmdlen */ -#define WTX_CMD_EOP (1U << 24) /* end of packet */ -#define WTX_CMD_IFCS (1U << 25) /* insert FCS */ -#define WTX_CMD_RS (1U << 27) /* report status */ -#define WTX_CMD_RPS (1U << 28) /* report packet sent */ -#define WTX_CMD_DEXT (1U << 29) /* descriptor extension */ -#define WTX_CMD_VLE (1U << 30) /* VLAN enable */ -#define WTX_CMD_IDE (1U << 31) /* interrupt delay enable */ - -/* Descriptor types (if DEXT is set) */ -#define WTX_DTYP_C (0U << 20) /* context */ -#define WTX_DTYP_D (1U << 20) /* data */ - -/* wtx_fields status bits */ -#define WTX_ST_DD (1U << 0) /* descriptor done */ -#define WTX_ST_EC (1U << 1) /* excessive collisions */ -#define WTX_ST_LC (1U << 2) /* late collision */ -#define WTX_ST_TU (1U << 3) /* transmit underrun */ - -/* wtx_fields option bits for IP/TCP/UDP checksum offload */ -#define WTX_IXSM (1U << 0) /* IP checksum offload */ -#define WTX_TXSM (1U << 1) /* TCP/UDP checksum offload */ - -/* Maximum payload per Tx descriptor */ -#define WTX_MAX_LEN 4096 - -/* - * The Livengood TCP/IP context descriptor. - */ -struct livengood_tcpip_ctxdesc { - uint32_t tcpip_ipcs; /* IP checksum context */ - uint32_t tcpip_tucs; /* TCP/UDP checksum context */ - uint32_t tcpip_cmdlen; - uint32_t tcpip_seg; /* TCP segmentation context */ -}; - -/* commands for context descriptors */ -#define WTX_TCPIP_CMD_TCP (1U << 24) /* 1 = TCP, 0 = UDP */ -#define WTX_TCPIP_CMD_IP (1U << 25) /* 1 = IPv4, 0 = IPv6 */ -#define WTX_TCPIP_CMD_TSE (1U << 26) /* segmentation context valid */ - -#define WTX_TCPIP_IPCSS(x) ((x) << 0) /* checksum start */ -#define WTX_TCPIP_IPCSO(x) ((x) << 8) /* checksum value offset */ -#define WTX_TCPIP_IPCSE(x) ((x) << 16) /* checksum end */ - -#define WTX_TCPIP_TUCSS(x) ((x) << 0) /* checksum start */ -#define WTX_TCPIP_TUCSO(x) ((x) << 8) /* checksum value offset */ -#define WTX_TCPIP_TUCSE(x) ((x) << 16) /* checksum end */ - -#define WTX_TCPIP_SEG_STATUS(x) ((x) << 0) -#define WTX_TCPIP_SEG_HDRLEN(x) ((x) << 8) -#define WTX_TCPIP_SEG_MSS(x) ((x) << 16) - -/* - * PCI config registers used by the Wiseman. - */ -#define WM_PCI_MMBA PCI_MAPREG_START -/* registers for FLASH access on ICH8 */ -#define WM_ICH8_FLASH 0x0014 - -/* - * Wiseman Control/Status Registers. - */ -#define WMREG_CTRL 0x0000 /* Device Control Register */ -#define CTRL_FD (1U << 0) /* full duplex */ -#define CTRL_BEM (1U << 1) /* big-endian mode */ -#define CTRL_PRIOR (1U << 2) /* 0 = receive, 1 = fair */ -#define CTRL_LRST (1U << 3) /* link reset */ -#define CTRL_ASDE (1U << 5) /* auto speed detect enable */ -#define CTRL_SLU (1U << 6) /* set link up */ -#define CTRL_ILOS (1U << 7) /* invert loss of signal */ -#define CTRL_SPEED(x) ((x) << 8) /* speed (Livengood) */ -#define CTRL_SPEED_10 CTRL_SPEED(0) -#define CTRL_SPEED_100 CTRL_SPEED(1) -#define CTRL_SPEED_1000 CTRL_SPEED(2) -#define CTRL_SPEED_MASK CTRL_SPEED(3) -#define CTRL_FRCSPD (1U << 11) /* force speed (Livengood) */ -#define CTRL_FRCFDX (1U << 12) /* force full-duplex (Livengood) */ -#define CTRL_D_UD_EN (1U << 13) /* Dock/Undock enable */ -#define CTRL_D_UD_POL (1U << 14) /* Defined polarity of Dock/Undock indication in SDP[0] */ -#define CTRL_F_PHY_R (1U << 15) /* Reset both PHY ports, through PHYRST_N pin */ -#define CTRL_EXT_LINK_EN (1U << 16) /* enable link status from external LINK_0 and LINK_1 pins */ -#define CTRL_SWDPINS_SHIFT 18 -#define CTRL_SWDPINS_MASK 0x0f -#define CTRL_SWDPIN(x) (1U << (CTRL_SWDPINS_SHIFT + (x))) -#define CTRL_SWDPIO_SHIFT 22 -#define CTRL_SWDPIO_MASK 0x0f -#define CTRL_SWDPIO(x) (1U << (CTRL_SWDPIO_SHIFT + (x))) -#define CTRL_RST (1U << 26) /* device reset */ -#define CTRL_RFCE (1U << 27) /* Rx flow control enable */ -#define CTRL_TFCE (1U << 28) /* Tx flow control enable */ -#define CTRL_VME (1U << 30) /* VLAN Mode Enable */ -#define CTRL_PHY_RESET (1U << 31) /* PHY reset (Cordova) */ - -#define WMREG_CTRL_SHADOW 0x0004 /* Device Control Register (shadow) */ - -#define WMREG_STATUS 0x0008 /* Device Status Register */ -#define STATUS_FD (1U << 0) /* full duplex */ -#define STATUS_LU (1U << 1) /* link up */ -#define STATUS_TCKOK (1U << 2) /* Tx clock running */ -#define STATUS_RBCOK (1U << 3) /* Rx clock running */ -#define STATUS_FUNCID_SHIFT 2 /* 82546 function ID */ -#define STATUS_FUNCID_MASK 3 /* ... */ -#define STATUS_TXOFF (1U << 4) /* Tx paused */ -#define STATUS_TBIMODE (1U << 5) /* fiber mode (Livengood) */ -#define STATUS_SPEED(x) ((x) << 6) /* speed indication */ -#define STATUS_SPEED_10 STATUS_SPEED(0) -#define STATUS_SPEED_100 STATUS_SPEED(1) -#define STATUS_SPEED_1000 STATUS_SPEED(2) -#define STATUS_ASDV(x) ((x) << 8) /* auto speed det. val. (Livengood) */ -#define STATUS_MTXCKOK (1U << 10) /* MTXD clock running */ -#define STATUS_PCI66 (1U << 11) /* 66MHz bus (Livengood) */ -#define STATUS_BUS64 (1U << 12) /* 64-bit bus (Livengood) */ -#define STATUS_PCIX_MODE (1U << 13) /* PCIX mode (Cordova) */ -#define STATUS_PCIXSPD(x) ((x) << 14) /* PCIX speed indication (Cordova) */ -#define STATUS_PCIXSPD_50_66 STATUS_PCIXSPD(0) -#define STATUS_PCIXSPD_66_100 STATUS_PCIXSPD(1) -#define STATUS_PCIXSPD_100_133 STATUS_PCIXSPD(2) -#define STATUS_PCIXSPD_MASK STATUS_PCIXSPD(3) - -#define WMREG_EECD 0x0010 /* EEPROM Control Register */ -#define EECD_SK (1U << 0) /* clock */ -#define EECD_CS (1U << 1) /* chip select */ -#define EECD_DI (1U << 2) /* data in */ -#define EECD_DO (1U << 3) /* data out */ -#define EECD_FWE(x) ((x) << 4) /* flash write enable control */ -#define EECD_FWE_DISABLED EECD_FWE(1) -#define EECD_FWE_ENABLED EECD_FWE(2) -#define EECD_EE_REQ (1U << 6) /* (shared) EEPROM request */ -#define EECD_EE_GNT (1U << 7) /* (shared) EEPROM grant */ -#define EECD_EE_PRES (1U << 8) /* EEPROM present */ -#define EECD_EE_SIZE (1U << 9) /* EEPROM size - (0 = 64 word, 1 = 256 word) */ -#define EECD_EE_AUTORD (1U << 9) /* auto read done */ -#define EECD_EE_ABITS (1U << 10) /* EEPROM address bits - (based on type) */ -#define EECD_EE_TYPE (1U << 13) /* EEPROM type - (0 = Microwire, 1 = SPI) */ -#define EECD_SEC1VAL (1U << 22) /* Sector One Valid */ - -#define UWIRE_OPC_ERASE 0x04 /* MicroWire "erase" opcode */ -#define UWIRE_OPC_WRITE 0x05 /* MicroWire "write" opcode */ -#define UWIRE_OPC_READ 0x06 /* MicroWire "read" opcode */ - -#define SPI_OPC_WRITE 0x02 /* SPI "write" opcode */ -#define SPI_OPC_READ 0x03 /* SPI "read" opcode */ -#define SPI_OPC_A8 0x08 /* opcode bit 3 == address bit 8 */ -#define SPI_OPC_WREN 0x06 /* SPI "set write enable" opcode */ -#define SPI_OPC_WRDI 0x04 /* SPI "clear write enable" opcode */ -#define SPI_OPC_RDSR 0x05 /* SPI "read status" opcode */ -#define SPI_OPC_WRSR 0x01 /* SPI "write status" opcode */ -#define SPI_MAX_RETRIES 5000 /* max wait of 5ms for RDY signal */ - -#define SPI_SR_RDY 0x01 -#define SPI_SR_WEN 0x02 -#define SPI_SR_BP0 0x04 -#define SPI_SR_BP1 0x08 -#define SPI_SR_WPEN 0x80 - -#define EEPROM_OFF_MACADDR 0x00 /* MAC address offset */ -#define EEPROM_OFF_CFG1 0x0a /* config word 1 */ -#define EEPROM_OFF_CFG2 0x0f /* config word 2 */ -#define EEPROM_OFF_SWDPIN 0x20 /* SWD Pins (Cordova) */ - -#define EEPROM_CFG1_LVDID (1U << 0) -#define EEPROM_CFG1_LSSID (1U << 1) -#define EEPROM_CFG1_PME_CLOCK (1U << 2) -#define EEPROM_CFG1_PM (1U << 3) -#define EEPROM_CFG1_ILOS (1U << 4) -#define EEPROM_CFG1_SWDPIO_SHIFT 5 -#define EEPROM_CFG1_SWDPIO_MASK (0xf << EEPROM_CFG1_SWDPIO_SHIFT) -#define EEPROM_CFG1_IPS1 (1U << 8) -#define EEPROM_CFG1_LRST (1U << 9) -#define EEPROM_CFG1_FD (1U << 10) -#define EEPROM_CFG1_FRCSPD (1U << 11) -#define EEPROM_CFG1_IPS0 (1U << 12) -#define EEPROM_CFG1_64_32_BAR (1U << 13) - -#define EEPROM_CFG2_CSR_RD_SPLIT (1U << 1) -#define EEPROM_CFG2_APM_EN (1U << 2) -#define EEPROM_CFG2_64_BIT (1U << 3) -#define EEPROM_CFG2_MAX_READ (1U << 4) -#define EEPROM_CFG2_DMCR_MAP (1U << 5) -#define EEPROM_CFG2_133_CAP (1U << 6) -#define EEPROM_CFG2_MSI_DIS (1U << 7) -#define EEPROM_CFG2_FLASH_DIS (1U << 8) -#define EEPROM_CFG2_FLASH_SIZE(x) (((x) & 3) >> 9) -#define EEPROM_CFG2_ANE (1U << 11) -#define EEPROM_CFG2_PAUSE(x) (((x) & 3) >> 12) -#define EEPROM_CFG2_ASDE (1U << 14) -#define EEPROM_CFG2_APM_PME (1U << 15) -#define EEPROM_CFG2_SWDPIO_SHIFT 4 -#define EEPROM_CFG2_SWDPIO_MASK (0xf << EEPROM_CFG2_SWDPIO_SHIFT) - -#define EEPROM_SWDPIN_MASK 0xdf -#define EEPROM_SWDPIN_SWDPIN_SHIFT 0 -#define EEPROM_SWDPIN_SWDPIO_SHIFT 8 - -#define WMREG_EERD 0x0014 /* EEPROM read */ -#define EERD_DONE 0x02 /* done bit */ -#define EERD_START 0x01 /* First bit for telling part to start operation */ -#define EERD_ADDR_SHIFT 2 /* Shift to the address bits */ -#define EERD_DATA_SHIFT 16 /* Offset to data in EEPROM read/write registers */ - -#define WMREG_CTRL_EXT 0x0018 /* Extended Device Control Register */ -#define CTRL_EXT_GPI_EN(x) (1U << (x)) /* gpin interrupt enable */ -#define CTRL_EXT_SWDPINS_SHIFT 4 -#define CTRL_EXT_SWDPINS_MASK 0x0d -#define CTRL_EXT_SWDPIN(x) (1U << (CTRL_EXT_SWDPINS_SHIFT + (x) - 4)) -#define CTRL_EXT_SWDPIO_SHIFT 8 -#define CTRL_EXT_SWDPIO_MASK 0x0d -#define CTRL_EXT_SWDPIO(x) (1U << (CTRL_EXT_SWDPIO_SHIFT + (x) - 4)) -#define CTRL_EXT_ASDCHK (1U << 12) /* ASD check */ -#define CTRL_EXT_EE_RST (1U << 13) /* EEPROM reset */ -#define CTRL_EXT_IPS (1U << 14) /* invert power state bit 0 */ -#define CTRL_EXT_SPD_BYPS (1U << 15) /* speed select bypass */ -#define CTRL_EXT_IPS1 (1U << 16) /* invert power state bit 1 */ -#define CTRL_EXT_RO_DIS (1U << 17) /* relaxed ordering disabled */ -#define CTRL_EXT_LINK_MODE_MASK 0x00C00000 -#define CTRL_EXT_LINK_MODE_GMII 0x00000000 -#define CTRL_EXT_LINK_MODE_TBI 0x00C00000 -#define CTRL_EXT_LINK_MODE_KMRN 0x00000000 -#define CTRL_EXT_LINK_MODE_SERDES 0x00C00000 - - -#define WMREG_MDIC 0x0020 /* MDI Control Register */ -#define MDIC_DATA(x) ((x) & 0xffff) -#define MDIC_REGADD(x) ((x) << 16) -#define MDIC_PHYADD(x) ((x) << 21) -#define MDIC_OP_WRITE (1U << 26) -#define MDIC_OP_READ (2U << 26) -#define MDIC_READY (1U << 28) -#define MDIC_I (1U << 29) /* interrupt on MDI complete */ -#define MDIC_E (1U << 30) /* MDI error */ - -#define WMREG_FCAL 0x0028 /* Flow Control Address Low */ -#define FCAL_CONST 0x00c28001 /* Flow Control MAC addr low */ - -#define WMREG_FCAH 0x002c /* Flow Control Address High */ -#define FCAH_CONST 0x00000100 /* Flow Control MAC addr high */ - -#define WMREG_FCT 0x0030 /* Flow Control Type */ - -#define WMREG_VET 0x0038 /* VLAN Ethertype */ - -#define WMREG_RAL_BASE 0x0040 /* Receive Address List */ -#define WMREG_CORDOVA_RAL_BASE 0x5400 -#define WMREG_RAL_LO(b, x) ((b) + ((x) << 3)) -#define WMREG_RAL_HI(b, x) (WMREG_RAL_LO(b, x) + 4) - /* - * Receive Address List: The LO part is the low-order 32-bits - * of the MAC address. The HI part is the high-order 16-bits - * along with a few control bits. - */ -#define RAL_AS(x) ((x) << 16) /* address select */ -#define RAL_AS_DEST RAL_AS(0) /* (cordova?) */ -#define RAL_AS_SOURCE RAL_AS(1) /* (cordova?) */ -#define RAL_RDR1 (1U << 30) /* put packet in alt. rx ring */ -#define RAL_AV (1U << 31) /* entry is valid */ - -#define WM_RAL_TABSIZE 16 -#define WM_ICH8_RAL_TABSIZE 7 - -#define WMREG_ICR 0x00c0 /* Interrupt Cause Register */ -#define ICR_TXDW (1U << 0) /* Tx desc written back */ -#define ICR_TXQE (1U << 1) /* Tx queue empty */ -#define ICR_LSC (1U << 2) /* link status change */ -#define ICR_RXSEQ (1U << 3) /* receive sequence error */ -#define ICR_RXDMT0 (1U << 4) /* Rx ring 0 nearly empty */ -#define ICR_RXO (1U << 6) /* Rx overrun */ -#define ICR_RXT0 (1U << 7) /* Rx ring 0 timer */ -#define ICR_MDAC (1U << 9) /* MDIO access complete */ -#define ICR_RXCFG (1U << 10) /* Receiving /C/ */ -#define ICR_GPI(x) (1U << (x)) /* general purpose interrupts */ -#define ICR_INT (1U << 31) /* device generated an interrupt */ - -#define WMREG_ITR 0x00c4 /* Interrupt Throttling Register */ -#define ITR_IVAL_MASK 0xffff /* Interval mask */ -#define ITR_IVAL_SHIFT 0 /* Interval shift */ - -#define WMREG_ICS 0x00c8 /* Interrupt Cause Set Register */ - /* See ICR bits. */ - -#define WMREG_IMS 0x00d0 /* Interrupt Mask Set Register */ - /* See ICR bits. */ - -#define WMREG_IMC 0x00d8 /* Interrupt Mask Clear Register */ - /* See ICR bits. */ - -#define WMREG_RCTL 0x0100 /* Receive Control */ -#define RCTL_EN (1U << 1) /* receiver enable */ -#define RCTL_SBP (1U << 2) /* store bad packets */ -#define RCTL_UPE (1U << 3) /* unicast promisc. enable */ -#define RCTL_MPE (1U << 4) /* multicast promisc. enable */ -#define RCTL_LPE (1U << 5) /* large packet enable */ -#define RCTL_LBM(x) ((x) << 6) /* loopback mode */ -#define RCTL_LBM_NONE RCTL_LBM(0) -#define RCTL_LBM_PHY RCTL_LBM(3) -#define RCTL_RDMTS(x) ((x) << 8) /* receive desc. min thresh size */ -#define RCTL_RDMTS_1_2 RCTL_RDMTS(0) -#define RCTL_RDMTS_1_4 RCTL_RDMTS(1) -#define RCTL_RDMTS_1_8 RCTL_RDMTS(2) -#define RCTL_RDMTS_MASK RCTL_RDMTS(3) -#define RCTL_MO(x) ((x) << 12) /* multicast offset */ -#define RCTL_BAM (1U << 15) /* broadcast accept mode */ -#define RCTL_2k (0 << 16) /* 2k Rx buffers */ -#define RCTL_1k (1 << 16) /* 1k Rx buffers */ -#define RCTL_512 (2 << 16) /* 512 byte Rx buffers */ -#define RCTL_256 (3 << 16) /* 256 byte Rx buffers */ -#define RCTL_BSEX_16k (1 << 16) /* 16k Rx buffers (BSEX) */ -#define RCTL_BSEX_8k (2 << 16) /* 8k Rx buffers (BSEX) */ -#define RCTL_BSEX_4k (3 << 16) /* 4k Rx buffers (BSEX) */ -#define RCTL_DPF (1U << 22) /* discard pause frames */ -#define RCTL_PMCF (1U << 23) /* pass MAC control frames */ -#define RCTL_BSEX (1U << 25) /* buffer size extension (Livengood) */ -#define RCTL_SECRC (1U << 26) /* strip Ethernet CRC */ - -#define WMREG_OLD_RDTR0 0x0108 /* Receive Delay Timer (ring 0) */ -#define WMREG_RDTR 0x2820 -#define RDTR_FPD (1U << 31) /* flush partial descriptor */ - -#define WMREG_RADV 0x282c /* Receive Interrupt Absolute Delay Timer */ - -#define WMREG_OLD_RDBAL0 0x0110 /* Receive Descriptor Base Low (ring 0) */ -#define WMREG_RDBAL 0x2800 - -#define WMREG_OLD_RDBAH0 0x0114 /* Receive Descriptor Base High (ring 0) */ -#define WMREG_RDBAH 0x2804 - -#define WMREG_OLD_RDLEN0 0x0118 /* Receive Descriptor Length (ring 0) */ -#define WMREG_RDLEN 0x2808 - -#define WMREG_OLD_RDH0 0x0120 /* Receive Descriptor Head (ring 0) */ -#define WMREG_RDH 0x2810 - -#define WMREG_OLD_RDT0 0x0128 /* Receive Descriptor Tail (ring 0) */ -#define WMREG_RDT 0x2818 - -#define WMREG_RXDCTL 0x2828 /* Receive Descriptor Control */ -#define RXDCTL_PTHRESH(x) ((x) << 0) /* prefetch threshold */ -#define RXDCTL_HTHRESH(x) ((x) << 8) /* host threshold */ -#define RXDCTL_WTHRESH(x) ((x) << 16) /* write back threshold */ -#define RXDCTL_GRAN (1U << 24) /* 0 = cacheline, 1 = descriptor */ - -#define WMREG_OLD_RDTR1 0x0130 /* Receive Delay Timer (ring 1) */ - -#define WMREG_OLD_RDBA1_LO 0x0138 /* Receive Descriptor Base Low (ring 1) */ - -#define WMREG_OLD_RDBA1_HI 0x013c /* Receive Descriptor Base High (ring 1) */ - -#define WMREG_OLD_RDLEN1 0x0140 /* Receive Drscriptor Length (ring 1) */ - -#define WMREG_OLD_RDH1 0x0148 - -#define WMREG_OLD_RDT1 0x0150 - -#define WMREG_OLD_FCRTH 0x0160 /* Flow Control Rx Threshold Hi (OLD) */ -#define WMREG_FCRTL 0x2160 /* Flow Control Rx Threshold Lo */ -#define FCRTH_DFLT 0x00008000 - -#define WMREG_OLD_FCRTL 0x0168 /* Flow Control Rx Threshold Lo (OLD) */ -#define WMREG_FCRTH 0x2168 /* Flow Control Rx Threhsold Hi */ -#define FCRTL_DFLT 0x00004000 -#define FCRTL_XONE 0x80000000 /* Enable XON frame transmission */ - -#define WMREG_FCTTV 0x0170 /* Flow Control Transmit Timer Value */ -#define FCTTV_DFLT 0x00000600 - -#define WMREG_TXCW 0x0178 /* Transmit Configuration Word (TBI mode) */ - /* See MII ANAR_X bits. */ -#define TXCW_TxConfig (1U << 30) /* Tx Config */ -#define TXCW_ANE (1U << 31) /* Autonegotiate */ - -#define WMREG_RXCW 0x0180 /* Receive Configuration Word (TBI mode) */ - /* See MII ANLPAR_X bits. */ -#define RXCW_NC (1U << 26) /* no carrier */ -#define RXCW_IV (1U << 27) /* config invalid */ -#define RXCW_CC (1U << 28) /* config change */ -#define RXCW_C (1U << 29) /* /C/ reception */ -#define RXCW_SYNCH (1U << 30) /* synchronized */ -#define RXCW_ANC (1U << 31) /* autonegotiation complete */ - -#define WMREG_MTA 0x0200 /* Multicast Table Array */ -#define WMREG_CORDOVA_MTA 0x5200 - -#define WMREG_TCTL 0x0400 /* Transmit Control Register */ -#define TCTL_EN (1U << 1) /* transmitter enable */ -#define TCTL_PSP (1U << 3) /* pad short packets */ -#define TCTL_CT(x) (((x) & 0xff) << 4) /* 4:11 - collision threshold */ -#define TCTL_COLD(x) (((x) & 0x3ff) << 12) /* 12:21 - collision distance */ -#define TCTL_SWXOFF (1U << 22) /* software XOFF */ -#define TCTL_RTLC (1U << 24) /* retransmit on late collision */ -#define TCTL_NRTU (1U << 25) /* no retransmit on underrun */ -#define TCTL_MULR (1U << 28) /* multiple request */ - -#define TX_COLLISION_THRESHOLD 15 -#define TX_COLLISION_DISTANCE_HDX 512 -#define TX_COLLISION_DISTANCE_FDX 64 - -#define WMREG_TCTL_EXT 0x0404 /* Transmit Control Register */ -#define TCTL_EXT_BST_MASK 0x000003FF /* Backoff Slot Time */ -#define TCTL_EXT_GCEX_MASK 0x000FFC00 /* Gigabit Carry Extend Padding */ - -#define DEFAULT_80003ES2LAN_TCTL_EXT_GCEX 0x00010000 - -#define WMREG_TQSA_LO 0x0408 - -#define WMREG_TQSA_HI 0x040c - -#define WMREG_TIPG 0x0410 /* Transmit IPG Register */ -#define TIPG_IPGT(x) (x) /* IPG transmit time */ -#define TIPG_IPGR1(x) ((x) << 10) /* IPG receive time 1 */ -#define TIPG_IPGR2(x) ((x) << 20) /* IPG receive time 2 */ - -#define TIPG_WM_DFLT (TIPG_IPGT(0x0a) | TIPG_IPGR1(0x02) | TIPG_IPGR2(0x0a)) -#define TIPG_LG_DFLT (TIPG_IPGT(0x06) | TIPG_IPGR1(0x08) | TIPG_IPGR2(0x06)) -#define TIPG_1000T_DFLT (TIPG_IPGT(0x08) | TIPG_IPGR1(0x08) | TIPG_IPGR2(0x06)) -#define TIPG_1000T_80003_DFLT \ - (TIPG_IPGT(0x08) | TIPG_IPGR1(0x02) | TIPG_IPGR2(0x07)) -#define TIPG_10_100_80003_DFLT \ - (TIPG_IPGT(0x09) | TIPG_IPGR1(0x02) | TIPG_IPGR2(0x07)) - -#define WMREG_TQC 0x0418 - -#define WMREG_EEWR 0x102c /* EEPROM write */ - -#define WMREG_RDFH 0x2410 /* Receive Data FIFO Head */ - -#define WMREG_RDFT 0x2418 /* Receive Data FIFO Tail */ - -#define WMREG_RDFHS 0x2420 /* Receive Data FIFO Head Saved */ - -#define WMREG_RDFTS 0x2428 /* Receive Data FIFO Tail Saved */ - -#define WMREG_TDFH 0x3410 /* Transmit Data FIFO Head */ - -#define WMREG_TDFT 0x3418 /* Transmit Data FIFO Tail */ - -#define WMREG_TDFHS 0x3420 /* Transmit Data FIFO Head Saved */ - -#define WMREG_TDFTS 0x3428 /* Transmit Data FIFO Tail Saved */ - -#define WMREG_TDFPC 0x3430 /* Transmit Data FIFO Packet Count */ - -#define WMREG_OLD_TBDAL 0x0420 /* Transmit Descriptor Base Lo */ -#define WMREG_TBDAL 0x3800 - -#define WMREG_OLD_TBDAH 0x0424 /* Transmit Descriptor Base Hi */ -#define WMREG_TBDAH 0x3804 - -#define WMREG_OLD_TDLEN 0x0428 /* Transmit Descriptor Length */ -#define WMREG_TDLEN 0x3808 - -#define WMREG_OLD_TDH 0x0430 /* Transmit Descriptor Head */ -#define WMREG_TDH 0x3810 - -#define WMREG_OLD_TDT 0x0438 /* Transmit Descriptor Tail */ -#define WMREG_TDT 0x3818 - -#define WMREG_OLD_TIDV 0x0440 /* Transmit Delay Interrupt Value */ -#define WMREG_TIDV 0x3820 - -#define WMREG_TXDCTL 0x3828 /* Trandmit Descriptor Control */ -#define TXDCTL_PTHRESH(x) ((x) << 0) /* prefetch threshold */ -#define TXDCTL_HTHRESH(x) ((x) << 8) /* host threshold */ -#define TXDCTL_WTHRESH(x) ((x) << 16) /* write back threshold */ - -#define WMREG_TADV 0x382c /* Transmit Absolute Interrupt Delay Timer */ - -#define WMREG_AIT 0x0458 /* Adaptive IFS Throttle */ - -#define WMREG_VFTA 0x0600 - -#define WM_MC_TABSIZE 128 -#define WM_ICH8_MC_TABSIZE 32 -#define WM_VLAN_TABSIZE 128 - -#define WMREG_PBA 0x1000 /* Packet Buffer Allocation */ -#define PBA_BYTE_SHIFT 10 /* KB -> bytes */ -#define PBA_ADDR_SHIFT 7 /* KB -> quadwords */ -#define PBA_8K 0x0008 -#define PBA_12K 0x000c -#define PBA_16K 0x0010 /* 16K, default Tx allocation */ -#define PBA_22K 0x0016 -#define PBA_24K 0x0018 -#define PBA_30K 0x001e -#define PBA_32K 0x0020 -#define PBA_40K 0x0028 -#define PBA_48K 0x0030 /* 48K, default Rx allocation */ - -#define WMREG_PBS 0x1000 /* Packet Buffer Size (ICH8 only ?) */ - -#define WMREG_TXDMAC 0x3000 /* Transfer DMA Control */ -#define TXDMAC_DPP (1U << 0) /* disable packet prefetch */ - -#define WMREG_TSPMT 0x3830 /* TCP Segmentation Pad and Minimum - Threshold (Cordova) */ -#define TSPMT_TSMT(x) (x) /* TCP seg min transfer */ -#define TSPMT_TSPBP(x) ((x) << 16) /* TCP seg pkt buf padding */ - -#define WMREG_RXCSUM 0x5000 /* Receive Checksum register */ -#define RXCSUM_PCSS 0x000000ff /* Packet Checksum Start */ -#define RXCSUM_IPOFL (1U << 8) /* IP checksum offload */ -#define RXCSUM_TUOFL (1U << 9) /* TCP/UDP checksum offload */ -#define RXCSUM_IPV6OFL (1U << 10) /* IPv6 checksum offload */ - -#define WMREG_RXERRC 0x400C /* receive error Count - R/clr */ -#define WMREG_COLC 0x4028 /* collision Count - R/clr */ -#define WMREG_XONRXC 0x4048 /* XON Rx Count - R/clr */ -#define WMREG_XONTXC 0x404c /* XON Tx Count - R/clr */ -#define WMREG_XOFFRXC 0x4050 /* XOFF Rx Count - R/clr */ -#define WMREG_XOFFTXC 0x4054 /* XOFF Tx Count - R/clr */ -#define WMREG_FCRUC 0x4058 /* Flow Control Rx Unsupported Count - R/clr */ - -#define WMREG_KUMCTRLSTA 0x0034 /* MAC-PHY interface - RW */ -#define KUMCTRLSTA_MASK 0x0000FFFF -#define KUMCTRLSTA_OFFSET 0x001F0000 -#define KUMCTRLSTA_OFFSET_SHIFT 16 -#define KUMCTRLSTA_REN 0x00200000 - -#define KUMCTRLSTA_OFFSET_FIFO_CTRL 0x00000000 -#define KUMCTRLSTA_OFFSET_CTRL 0x00000001 -#define KUMCTRLSTA_OFFSET_INB_CTRL 0x00000002 -#define KUMCTRLSTA_OFFSET_DIAG 0x00000003 -#define KUMCTRLSTA_OFFSET_TIMEOUTS 0x00000004 -#define KUMCTRLSTA_OFFSET_INB_PARAM 0x00000009 -#define KUMCTRLSTA_OFFSET_HD_CTRL 0x00000010 -#define KUMCTRLSTA_OFFSET_M2P_SERDES 0x0000001E -#define KUMCTRLSTA_OFFSET_M2P_MODES 0x0000001F - -/* FIFO Control */ -#define KUMCTRLSTA_FIFO_CTRL_RX_BYPASS 0x00000008 -#define KUMCTRLSTA_FIFO_CTRL_TX_BYPASS 0x00000800 - -/* In-Band Control */ -#define KUMCTRLSTA_INB_CTRL_LINK_TMOUT_DFLT 0x00000500 -#define KUMCTRLSTA_INB_CTRL_DIS_PADDING 0x00000010 - -/* Half-Duplex Control */ -#define KUMCTRLSTA_HD_CTRL_10_100_DEFAULT 0x00000004 -#define KUMCTRLSTA_HD_CTRL_1000_DEFAULT 0x00000000 - -#define WMREG_MDPHYA 0x003C /* PHY address - RW */ - -#define WMREG_MANC2H 0x5860 /* Managment Control To Host - RW */ - -#define WMREG_SWSM 0x5b50 /* SW Semaphore */ -#define SWSM_SMBI 0x00000001 /* Driver Semaphore bit */ -#define SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */ -#define SWSM_WMNG 0x00000004 /* Wake MNG Clock */ -#define SWSM_DRV_LOAD 0x00000008 /* Driver Loaded Bit */ - -#define WMREG_SW_FW_SYNC 0x5b5c /* software-firmware semaphore */ -#define SWFW_EEP_SM 0x0001 /* eeprom access */ -#define SWFW_PHY0_SM 0x0002 /* first ctrl phy access */ -#define SWFW_PHY1_SM 0x0004 /* second ctrl phy access */ -#define SWFW_MAC_CSR_SM 0x0008 -#define SWFW_SOFT_SHIFT 0 /* software semaphores */ -#define SWFW_FIRM_SHIFT 16 /* firmware semaphores */ - -#define WMREG_EXTCNFCTR 0x0f00 /* Extended Configuration Control */ -#define EXTCNFCTR_PCIE_WRITE_ENABLE 0x00000001 -#define EXTCNFCTR_PHY_WRITE_ENABLE 0x00000002 -#define EXTCNFCTR_D_UD_ENABLE 0x00000004 -#define EXTCNFCTR_D_UD_LATENCY 0x00000008 -#define EXTCNFCTR_D_UD_OWNER 0x00000010 -#define EXTCNFCTR_MDIO_SW_OWNERSHIP 0x00000020 -#define EXTCNFCTR_MDIO_HW_OWNERSHIP 0x00000040 -#define EXTCNFCTR_EXT_CNF_POINTER 0x0FFF0000 -#define E1000_EXTCNF_CTRL_SWFLAG EXTCNFCTR_MDIO_SW_OWNERSHIP - -/* ich8 flash control */ -#define ICH_FLASH_COMMAND_TIMEOUT 5000 /* 5000 uSecs - adjusted */ -#define ICH_FLASH_ERASE_TIMEOUT 3000000 /* Up to 3 seconds - worst case */ -#define ICH_FLASH_CYCLE_REPEAT_COUNT 10 /* 10 cycles */ -#define ICH_FLASH_SEG_SIZE_256 256 -#define ICH_FLASH_SEG_SIZE_4K 4096 -#define ICH_FLASH_SEG_SIZE_64K 65536 - -#define ICH_CYCLE_READ 0x0 -#define ICH_CYCLE_RESERVED 0x1 -#define ICH_CYCLE_WRITE 0x2 -#define ICH_CYCLE_ERASE 0x3 - -#define ICH_FLASH_GFPREG 0x0000 -#define ICH_FLASH_HSFSTS 0x0004 /* Flash Status Register */ -#define HSFSTS_DONE 0x0001 /* Flash Cycle Done */ -#define HSFSTS_ERR 0x0002 /* Flash Cycle Error */ -#define HSFSTS_DAEL 0x0004 /* Direct Access error Log */ -#define HSFSTS_ERSZ_MASK 0x0018 /* Block/Sector Erase Size */ -#define HSFSTS_ERSZ_SHIFT 3 -#define HSFSTS_FLINPRO 0x0020 /* flash SPI cycle in Progress */ -#define HSFSTS_FLDVAL 0x4000 /* Flash Descriptor Valid */ -#define HSFSTS_FLLK 0x8000 /* Flash Configuration Lock-Down */ -#define ICH_FLASH_HSFCTL 0x0006 /* Flash control Register */ -#define HSFCTL_GO 0x0001 /* Flash Cycle Go */ -#define HSFCTL_CYCLE_MASK 0x0006 /* Flash Cycle */ -#define HSFCTL_CYCLE_SHIFT 1 -#define HSFCTL_BCOUNT_MASK 0x0300 /* Data Byte Count */ -#define HSFCTL_BCOUNT_SHIFT 8 -#define ICH_FLASH_FADDR 0x0008 -#define ICH_FLASH_FDATA0 0x0010 -#define ICH_FLASH_FRACC 0x0050 -#define ICH_FLASH_FREG0 0x0054 -#define ICH_FLASH_FREG1 0x0058 -#define ICH_FLASH_FREG2 0x005C -#define ICH_FLASH_FREG3 0x0060 -#define ICH_FLASH_FPR0 0x0074 -#define ICH_FLASH_FPR1 0x0078 -#define ICH_FLASH_SSFSTS 0x0090 -#define ICH_FLASH_SSFCTL 0x0092 -#define ICH_FLASH_PREOP 0x0094 -#define ICH_FLASH_OPTYPE 0x0096 -#define ICH_FLASH_OPMENU 0x0098 - -#define ICH_FLASH_REG_MAPSIZE 0x00A0 -#define ICH_FLASH_SECTOR_SIZE 4096 -#define ICH_GFPREG_BASE_MASK 0x1FFF -#define ICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF - -/* start of Kate Feng added */ -#define WMREG_GPTC 0x4080 /* Good packets transmitted count */ -#define WMREG_GPRC 0x4074 /* Good packets received count */ -#define WMREG_CRCERRS 0x4000 /* CRC Error Count */ -#define WMREG_RLEC 0x4040 /* Receive Length Error Count */ -/* end of Kate Feng added */ diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pcireg.h b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pcireg.h deleted file mode 100644 index 2b8b10d853..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pcireg.h +++ /dev/null @@ -1,386 +0,0 @@ -/* $NetBSD: pcireg.h,v 1.44 2003/12/02 16:31:06 briggs Exp $ */ - -/* - * Copyright (c) 1995, 1996, 1999, 2000 - * Christopher G. Demetriou. All rights reserved. - * Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved. - * Copyright (C) 2007 Brookhaven National Laboratory, Shuchen Kate Feng - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Charles M. Hannum. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#include <bsp.h> - -/* - * PCI Class and Revision Register; defines type and revision of device. - */ -#define PCI_CLASS_REG 0x08 - -#define PCI_CLASS_SHIFT 24 -#define PCI_CLASS_MASK 0xff -#define PCI_CLASS(cr) \ - (((cr) >> PCI_CLASS_SHIFT) & PCI_CLASS_MASK) - -#define PCI_SUBCLASS_SHIFT 16 -#define PCI_SUBCLASS_MASK 0xff -#define PCI_SUBCLASS(cr) \ - (((cr) >> PCI_SUBCLASS_SHIFT) & PCI_SUBCLASS_MASK) - -#define PCI_INTERFACE_SHIFT 8 -#define PCI_INTERFACE_MASK 0xff -#define PCI_INTERFACE(cr) \ - (((cr) >> PCI_INTERFACE_SHIFT) & PCI_INTERFACE_MASK) - -#define PCI_REVISION_SHIFT 0 -#define PCI_REVISION_MASK 0xff -#define PCI_REVISION(cr) \ - (((cr) >> PCI_REVISION_SHIFT) & PCI_REVISION_MASK) - -#define PCI_CLASS_CODE(mainclass, subclass, interface) \ - ((((mainclass) & PCI_CLASS_MASK) << PCI_CLASS_SHIFT) | \ - (((subclass) & PCI_SUBCLASS_MASK) << PCI_SUBCLASS_SHIFT) | \ - (((interface) & PCI_INTERFACE_MASK) << PCI_INTERFACE_SHIFT)) - -/* base classes */ -#define PCI_CLASS_PREHISTORIC 0x00 -#define PCI_CLASS_MASS_STORAGE 0x01 -#define PCI_CLASS_NETWORK 0x02 -#define PCI_CLASS_DISPLAY 0x03 -#define PCI_CLASS_MULTIMEDIA 0x04 -#define PCI_CLASS_MEMORY 0x05 -#define PCI_CLASS_BRIDGE 0x06 -#define PCI_CLASS_COMMUNICATIONS 0x07 -#define PCI_CLASS_SYSTEM 0x08 -#define PCI_CLASS_INPUT 0x09 -#define PCI_CLASS_DOCK 0x0a -#define PCI_CLASS_PROCESSOR 0x0b -#define PCI_CLASS_SERIALBUS 0x0c -#define PCI_CLASS_WIRELESS 0x0d -#define PCI_CLASS_I2O 0x0e -#define PCI_CLASS_SATCOM 0x0f -#define PCI_CLASS_CRYPTO 0x10 -#define PCI_CLASS_DASP 0x11 -#define PCI_CLASS_UNDEFINED 0xff - -/* 0x00 prehistoric subclasses */ -#define PCI_SUBCLASS_PREHISTORIC_MISC 0x00 -#define PCI_SUBCLASS_PREHISTORIC_VGA 0x01 - -/* 0x01 mass storage subclasses */ -#define PCI_SUBCLASS_MASS_STORAGE_SCSI 0x00 -#define PCI_SUBCLASS_MASS_STORAGE_IDE 0x01 -#define PCI_SUBCLASS_MASS_STORAGE_FLOPPY 0x02 -#define PCI_SUBCLASS_MASS_STORAGE_IPI 0x03 -#define PCI_SUBCLASS_MASS_STORAGE_RAID 0x04 -#define PCI_SUBCLASS_MASS_STORAGE_ATA 0x05 -#define PCI_SUBCLASS_MASS_STORAGE_SATA 0x06 -#define PCI_SUBCLASS_MASS_STORAGE_MISC 0x80 - -/* 0x02 network subclasses */ -#define PCI_SUBCLASS_NETWORK_ETHERNET 0x00 -#define PCI_SUBCLASS_NETWORK_TOKENRING 0x01 -#define PCI_SUBCLASS_NETWORK_FDDI 0x02 -#define PCI_SUBCLASS_NETWORK_ATM 0x03 -#define PCI_SUBCLASS_NETWORK_ISDN 0x04 -#define PCI_SUBCLASS_NETWORK_WORLDFIP 0x05 -#define PCI_SUBCLASS_NETWORK_PCIMGMULTICOMP 0x06 -#define PCI_SUBCLASS_NETWORK_MISC 0x80 - -/* 0x03 display subclasses */ -#define PCI_SUBCLASS_DISPLAY_VGA 0x00 -#define PCI_SUBCLASS_DISPLAY_XGA 0x01 -#define PCI_SUBCLASS_DISPLAY_3D 0x02 -#define PCI_SUBCLASS_DISPLAY_MISC 0x80 - -/* 0x04 multimedia subclasses */ -#define PCI_SUBCLASS_MULTIMEDIA_VIDEO 0x00 -#define PCI_SUBCLASS_MULTIMEDIA_AUDIO 0x01 -#define PCI_SUBCLASS_MULTIMEDIA_TELEPHONY 0x02 -#define PCI_SUBCLASS_MULTIMEDIA_MISC 0x80 - -/* 0x05 memory subclasses */ -#define PCI_SUBCLASS_MEMORY_RAM 0x00 -#define PCI_SUBCLASS_MEMORY_FLASH 0x01 -#define PCI_SUBCLASS_MEMORY_MISC 0x80 - -/* 0x06 bridge subclasses */ -#define PCI_SUBCLASS_BRIDGE_HOST 0x00 -#define PCI_SUBCLASS_BRIDGE_ISA 0x01 -#define PCI_SUBCLASS_BRIDGE_EISA 0x02 -#define PCI_SUBCLASS_BRIDGE_MC 0x03 /* XXX _MCA? */ -#define PCI_SUBCLASS_BRIDGE_PCI 0x04 -#define PCI_SUBCLASS_BRIDGE_PCMCIA 0x05 -#define PCI_SUBCLASS_BRIDGE_NUBUS 0x06 -#define PCI_SUBCLASS_BRIDGE_CARDBUS 0x07 -#define PCI_SUBCLASS_BRIDGE_RACEWAY 0x08 -#define PCI_SUBCLASS_BRIDGE_STPCI 0x09 -#define PCI_SUBCLASS_BRIDGE_INFINIBAND 0x0a -#define PCI_SUBCLASS_BRIDGE_MISC 0x80 - -/* 0x07 communications subclasses */ -#define PCI_SUBCLASS_COMMUNICATIONS_SERIAL 0x00 -#define PCI_SUBCLASS_COMMUNICATIONS_PARALLEL 0x01 -#define PCI_SUBCLASS_COMMUNICATIONS_MPSERIAL 0x02 -#define PCI_SUBCLASS_COMMUNICATIONS_MODEM 0x03 -#define PCI_SUBCLASS_COMMUNICATIONS_GPIB 0x04 -#define PCI_SUBCLASS_COMMUNICATIONS_SMARTCARD 0x05 -#define PCI_SUBCLASS_COMMUNICATIONS_MISC 0x80 - -/* 0x08 system subclasses */ -#define PCI_SUBCLASS_SYSTEM_PIC 0x00 -#define PCI_SUBCLASS_SYSTEM_DMA 0x01 -#define PCI_SUBCLASS_SYSTEM_TIMER 0x02 -#define PCI_SUBCLASS_SYSTEM_RTC 0x03 -#define PCI_SUBCLASS_SYSTEM_PCIHOTPLUG 0x04 -#define PCI_SUBCLASS_SYSTEM_MISC 0x80 - -/* 0x09 input subclasses */ -#define PCI_SUBCLASS_INPUT_KEYBOARD 0x00 -#define PCI_SUBCLASS_INPUT_DIGITIZER 0x01 -#define PCI_SUBCLASS_INPUT_MOUSE 0x02 -#define PCI_SUBCLASS_INPUT_SCANNER 0x03 -#define PCI_SUBCLASS_INPUT_GAMEPORT 0x04 -#define PCI_SUBCLASS_INPUT_MISC 0x80 - -/* 0x0a dock subclasses */ -#define PCI_SUBCLASS_DOCK_GENERIC 0x00 -#define PCI_SUBCLASS_DOCK_MISC 0x80 - -/* 0x0b processor subclasses */ -#define PCI_SUBCLASS_PROCESSOR_386 0x00 -#define PCI_SUBCLASS_PROCESSOR_486 0x01 -#define PCI_SUBCLASS_PROCESSOR_PENTIUM 0x02 -#define PCI_SUBCLASS_PROCESSOR_ALPHA 0x10 -#define PCI_SUBCLASS_PROCESSOR_POWERPC 0x20 -#define PCI_SUBCLASS_PROCESSOR_MIPS 0x30 -#define PCI_SUBCLASS_PROCESSOR_COPROC 0x40 - -/* 0x0c serial bus subclasses */ -#define PCI_SUBCLASS_SERIALBUS_FIREWIRE 0x00 -#define PCI_SUBCLASS_SERIALBUS_ACCESS 0x01 -#define PCI_SUBCLASS_SERIALBUS_SSA 0x02 -#define PCI_SUBCLASS_SERIALBUS_USB 0x03 -#define PCI_SUBCLASS_SERIALBUS_FIBER 0x04 /* XXX _FIBRECHANNEL */ -#define PCI_SUBCLASS_SERIALBUS_SMBUS 0x05 -#define PCI_SUBCLASS_SERIALBUS_INFINIBAND 0x06 -#define PCI_SUBCLASS_SERIALBUS_IPMI 0x07 -#define PCI_SUBCLASS_SERIALBUS_SERCOS 0x08 -#define PCI_SUBCLASS_SERIALBUS_CANBUS 0x09 - -/* 0x0d wireless subclasses */ -#define PCI_SUBCLASS_WIRELESS_IRDA 0x00 -#define PCI_SUBCLASS_WIRELESS_CONSUMERIR 0x01 -#define PCI_SUBCLASS_WIRELESS_RF 0x10 -#define PCI_SUBCLASS_WIRELESS_BLUETOOTH 0x11 -#define PCI_SUBCLASS_WIRELESS_BROADBAND 0x12 -#define PCI_SUBCLASS_WIRELESS_802_11A 0x20 -#define PCI_SUBCLASS_WIRELESS_802_11B 0x21 -#define PCI_SUBCLASS_WIRELESS_MISC 0x80 - -/* 0x0e I2O (Intelligent I/O) subclasses */ -#define PCI_SUBCLASS_I2O_STANDARD 0x00 - -/* 0x0f satellite communication subclasses */ -/* PCI_SUBCLASS_SATCOM_??? 0x00 / * XXX ??? */ -#define PCI_SUBCLASS_SATCOM_TV 0x01 -#define PCI_SUBCLASS_SATCOM_AUDIO 0x02 -#define PCI_SUBCLASS_SATCOM_VOICE 0x03 -#define PCI_SUBCLASS_SATCOM_DATA 0x04 - -/* 0x10 encryption/decryption subclasses */ -#define PCI_SUBCLASS_CRYPTO_NETCOMP 0x00 -#define PCI_SUBCLASS_CRYPTO_ENTERTAINMENT 0x10 -#define PCI_SUBCLASS_CRYPTO_MISC 0x80 - -/* 0x11 data acquisition and signal processing subclasses */ -#define PCI_SUBCLASS_DASP_DPIO 0x00 -#define PCI_SUBCLASS_DASP_TIMEFREQ 0x01 -#define PCI_SUBCLASS_DASP_SYNC 0x10 -#define PCI_SUBCLASS_DASP_MGMT 0x20 -#define PCI_SUBCLASS_DASP_MISC 0x80 - -/* - * PCI BIST/Header Type/Latency Timer/Cache Line Size Register. - */ -#define PCI_BHLC_REG 0x0c - -#define PCI_BIST_SHIFT 24 -#define PCI_BIST_MASK 0xff -#define PCI_BIST(bhlcr) \ - (((bhlcr) >> PCI_BIST_SHIFT) & PCI_BIST_MASK) - -#define PCI_HDRTYPE_SHIFT 16 -#define PCI_HDRTYPE_MASK 0xff -#define PCI_HDRTYPE(bhlcr) \ - (((bhlcr) >> PCI_HDRTYPE_SHIFT) & PCI_HDRTYPE_MASK) - -#define PCI_HDRTYPE_TYPE(bhlcr) \ - (PCI_HDRTYPE(bhlcr) & 0x7f) -#define PCI_HDRTYPE_MULTIFN(bhlcr) \ - ((PCI_HDRTYPE(bhlcr) & 0x80) != 0) - -#define PCI_LATTIMER_SHIFT 8 -#define PCI_LATTIMER_MASK 0xff -#define PCI_LATTIMER(bhlcr) \ - (((bhlcr) >> PCI_LATTIMER_SHIFT) & PCI_LATTIMER_MASK) - -#define PCI_CACHELINE_SHIFT 0 -#define PCI_CACHELINE_MASK 0xff -#define PCI_CACHELINE(bhlcr) \ - (((bhlcr) >> PCI_CACHELINE_SHIFT) & PCI_CACHELINE_MASK) - -#define PCI_BHLC_CODE(bist,type,multi,latency,cacheline) \ - ((((bist) & PCI_BIST_MASK) << PCI_BIST_SHIFT) | \ - (((type) & PCI_HDRTYPE_MASK) << PCI_HDRTYPE_SHIFT) | \ - (((multi)?0x80:0) << PCI_HDRTYPE_SHIFT) | \ - (((latency) & PCI_LATTIMER_MASK) << PCI_LATTIMER_SHIFT) | \ - (((cacheline) & PCI_CACHELINE_MASK) << PCI_CACHELINE_SHIFT)) - -/* - * PCI header type - */ -#define PCI_HDRTYPE_DEVICE 0 -#define PCI_HDRTYPE_PPB 1 -#define PCI_HDRTYPE_PCB 2 - -/* - * Mapping registers - */ -#define PCI_MAPREG_START 0x10 -#define PCI_MAPREG_END 0x28 -#define PCI_MAPREG_ROM 0x30 -#define PCI_MAPREG_PPB_END 0x18 -#define PCI_MAPREG_PCB_END 0x14 - -#define PCI_MAPREG_TYPE(mr) \ - ((mr) & PCI_MAPREG_TYPE_MASK) -#define PCI_MAPREG_TYPE_MASK 0x00000001 - -#define PCI_MAPREG_TYPE_MEM 0x00000000 -#define PCI_MAPREG_TYPE_IO 0x00000001 -#define PCI_MAPREG_ROM_ENABLE 0x00000001 - -#define PCI_MAPREG_MEM_TYPE(mr) \ - ((mr) & PCI_MAPREG_MEM_TYPE_MASK) -#define PCI_MAPREG_MEM_TYPE_MASK 0x00000006 - -#define PCI_MAPREG_MEM_TYPE_32BIT 0x00000000 -#define PCI_MAPREG_MEM_TYPE_32BIT_1M 0x00000002 -#define PCI_MAPREG_MEM_TYPE_64BIT 0x00000004 - -#define PCI_MAPREG_MEM_PREFETCHABLE(mr) \ - (((mr) & PCI_MAPREG_MEM_PREFETCHABLE_MASK) != 0) -#define PCI_MAPREG_MEM_PREFETCHABLE_MASK 0x00000008 - -#define PCI_MAPREG_MEM_ADDR(mr) \ - ((mr) & PCI_MAPREG_MEM_ADDR_MASK) -#define PCI_MAPREG_MEM_SIZE(mr) \ - (PCI_MAPREG_MEM_ADDR(mr) & -PCI_MAPREG_MEM_ADDR(mr)) -#define PCI_MAPREG_MEM_ADDR_MASK 0xfffffff0 - -#define PCI_MAPREG_MEM64_ADDR(mr) \ - ((mr) & PCI_MAPREG_MEM64_ADDR_MASK) -#define PCI_MAPREG_MEM64_SIZE(mr) \ - (PCI_MAPREG_MEM64_ADDR(mr) & -PCI_MAPREG_MEM64_ADDR(mr)) -#define PCI_MAPREG_MEM64_ADDR_MASK 0xfffffffffffffff0ULL - -#define PCI_MAPREG_IO_ADDR(mr) \ - ((mr+PCI0_IO_BASE) & PCI_MAPREG_IO_ADDR_MASK) -#define PCI_MAPREG_IO_SIZE(mr) \ - (PCI_MAPREG_IO_ADDR(mr) & -PCI_MAPREG_IO_ADDR(mr)) -#define PCI_MAPREG_IO_ADDR_MASK 0xfffffffc - -#define PCI_MAPREG_SIZE_TO_MASK(size) \ - (-(size)) - -#define PCI_MAPREG_NUM(offset) \ - (((unsigned)(offset)-PCI_MAPREG_START)/4) - - -/* - * Cardbus CIS pointer (PCI rev. 2.1) - */ -#define PCI_CARDBUS_CIS_REG 0x28 - -/* - * Subsystem identification register; contains a vendor ID and a device ID. - * Types/macros for PCI_ID_REG apply. - * (PCI rev. 2.1) - */ -#define PCI_SUBSYS_ID_REG 0x2c - -/* - * capabilities link list (PCI rev. 2.2) - */ -#define PCI_CAPLISTPTR_REG 0x34 /* header type 0 */ -#define PCI_CARDBUS_CAPLISTPTR_REG 0x14 /* header type 2 */ -#define PCI_CAPLIST_PTR(cpr) ((cpr) & 0xff) -#define PCI_CAPLIST_NEXT(cr) (((cr) >> 8) & 0xff) -#define PCI_CAPLIST_CAP(cr) ((cr) & 0xff) - -#define PCI_CAP_RESERVED0 0x00 -#define PCI_CAP_PWRMGMT 0x01 -#define PCI_CAP_AGP 0x02 -#define PCI_CAP_VPD 0x03 -#define PCI_CAP_SLOTID 0x04 -#define PCI_CAP_MSI 0x05 -#define PCI_CAP_CPCI_HOTSWAP 0x06 -#define PCI_CAP_PCIX 0x07 -#define PCI_CAP_LDT 0x08 -#define PCI_CAP_VENDSPEC 0x09 -#define PCI_CAP_DEBUGPORT 0x0a -#define PCI_CAP_CPCI_RSRCCTL 0x0b -#define PCI_CAP_HOTPLUG 0x0c -#define PCI_CAP_AGP8 0x0e -#define PCI_CAP_SECURE 0x0f -#define PCI_CAP_PCIEXPRESS 0x10 -#define PCI_CAP_MSIX 0x11 - -/* - * Vital Product Data; access via capability pointer (PCI rev 2.2). - */ -#define PCI_VPD_ADDRESS_MASK 0x7fff -#define PCI_VPD_ADDRESS_SHIFT 16 -#define PCI_VPD_ADDRESS(ofs) \ - (((ofs) & PCI_VPD_ADDRESS_MASK) << PCI_VPD_ADDRESS_SHIFT) -#define PCI_VPD_DATAREG(ofs) ((ofs) + 4) -#define PCI_VPD_OPFLAG 0x80000000 - -/* - * Power Management Capability; access via capability pointer. - */ - -/* Power Management Capability Register */ -#define PCI_PMCR 0x02 -#define PCI_PMCR_D1SUPP 0x0200 -#define PCI_PMCR_D2SUPP 0x0400 -/* Power Management Control Status Register */ -#define PCI_PMCSR 0x04 -#define PCI_PMCSR_STATE_MASK 0x03 -#define PCI_PMCSR_STATE_D0 0x00 -#define PCI_PMCSR_STATE_D1 0x01 -#define PCI_PMCSR_STATE_D2 0x02 -#define PCI_PMCSR_STATE_D3 0x03 - diff --git a/c/src/lib/libbsp/powerpc/mvme5500/pci/gtpcireg.h b/c/src/lib/libbsp/powerpc/mvme5500/pci/gtpcireg.h deleted file mode 100644 index 74751f6088..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/pci/gtpcireg.h +++ /dev/null @@ -1,99 +0,0 @@ -/* $NetBSD: gtpcireg.h,v 1.2 2003/03/24 17:03:18 matt Exp $ */ - -/* - * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Allegro Networks, Inc., and Wasabi Systems, Inc. - * 4. The name of Allegro Networks, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * 5. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND - * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC. - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ -#define PCI_ARBCTL_EN (1<<31) - -#define PCI_COMMAND_SB_DIS 0x2000 /* PCI configuration read will stop - * acting as sync barrier transactin - */ - -#define PCI_MEM_BASE_ADDR PCI_BASE_ADDRESS_4 - -#define PCI_IO_BASE_ADDR PCI_BASE_ADDRESS_5 - -#define PCI_STATUS_CLRERR_MASK 0xf9000000 /* <SKF> */ - -#define PCI_BARE_IntMemEn 0x200 - -#define PCI_ACCCTLBASEL_PrefetchEn 0x0001000 -#define PCI_ACCCTLBASEL_RdPrefetch 0x0010000 -#define PCI_ACCCTLBASEL_RdLinePrefetch 0x0020000 -#define PCI_ACCCTLBASEL_RdMulPrefetch 0x0040000 -#define PCI_ACCCTLBASEL_WBurst_8_QW 0x0100000 -#define PCI_ACCCTLBASEL_PCISwap_NoSwap 0x1000000 - -#define PCI0_P2P_CONFIG 0x1d14 -#define PCI_SNOOP_BASE0_LOW 0x1f00 -#define PCI_SNOOP_BASE0_HIGH 0x1f04 -#define PCI_SNOOP_TOP0 0x1f08 - -#define PCI0_SCS0_BAR_SIZE 0x0c08 -#define PCI0_SCS1_BAR_SIZE 0x0d08 -#define PCI0_SCS2_BAR_SIZE 0x0c0c -#define PCI0_SCS3_BAR_SIZE 0x0d0c - -#define PCI0_BASE_ADDR_REG_ENABLE 0x0c3c -#define PCI0_ARBITER_CNTL 0x1d00 -#define PCI0_ACCESS_CNTL_BASE0_LOW 0x1e00 -#define PCI0_ACCESS_CNTL_BASE0_HIGH 0x1e04 -#define PCI0_ACCESS_CNTL_BASE0_TOP 0x1e08 - -#define PCI0_ACCESS_CNTL_BASE1_LOW 0x1e10 -#define PCI0_ACCESS_CNTL_BASE1_HIGH 0x1e14 -#define PCI0_ACCESS_CNTL_BASE1_TOP 0x1e18 - -#define PCI1_BASE_ADDR_REG_ENABLE 0x0cbc -#define PCI1_ARBITER_CNTL 0x1d80 -#define PCI1_ACCESS_CNTL_BASE0_LOW 0x1e80 -#define PCI1_ACCESS_CNTL_BASE0_HIGH 0x1e84 -#define PCI1_ACCESS_CNTL_BASE0_TOP 0x1e88 - -#define PCI1_ACCESS_CNTL_BASE1_LOW 0x1e90 -#define PCI1_ACCESS_CNTL_BASE1_HIGH 0x1e94 -#define PCI1_ACCESS_CNTL_BASE1_TOP 0x1e98 - -#define PCI_SNOOP_BASE1_LOW 0x1f10 -#define PCI_SNOOP_BASE1_HIGH 0x1f14 -#define PCI_SNOOP_TOP1 0x1f18 - -#define PCI0_CMD_CNTL 0xc00 - -#define PCI1_P2P_CONFIG 0x1d94 -#define PCI1_CMD_CNTL 0xc80 -#define PCI1_CONFIG_ADDR 0xc78 -#define PCI1_CONFIG_DATA 0xc7c diff --git a/c/src/lib/libbsp/powerpc/mvme5500/preinstall.am b/c/src/lib/libbsp/powerpc/mvme5500/preinstall.am deleted file mode 100644 index 282acf416a..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/preinstall.am +++ /dev/null @@ -1,156 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_LIB)/linkcmds.share: ../shared/startup/linkcmds.share $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.share -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.share - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_INCLUDE)/bsp/uart.h: ../../powerpc/shared/console/uart.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h - -$(PROJECT_INCLUDE)/bsp/consoleIo.h: ../../powerpc/shared/console/consoleIo.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/consoleIo.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/consoleIo.h - -$(PROJECT_INCLUDE)/bsp/gtpcireg.h: pci/gtpcireg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gtpcireg.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/gtpcireg.h - -$(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h - -$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/bspException.h: vectors/bspException.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspException.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspException.h - -$(PROJECT_INCLUDE)/bsp/bspMvme5500.h: GT64260/bspMvme5500.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspMvme5500.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspMvme5500.h - -$(PROJECT_INCLUDE)/bsp/gtreg.h: GT64260/gtreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gtreg.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/gtreg.h - -$(PROJECT_INCLUDE)/bsp/GT64260TWSI.h: GT64260/GT64260TWSI.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/GT64260TWSI.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/GT64260TWSI.h - -$(PROJECT_INCLUDE)/bsp/VPD.h: GT64260/VPD.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VPD.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VPD.h - -$(PROJECT_INCLUDE)/bsp/VME.h: ../../shared/vmeUniverse/VME.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VME.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VME.h - -$(PROJECT_INCLUDE)/bsp/VMEConfig.h: vme/VMEConfig.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEConfig.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEConfig.h - -$(PROJECT_INCLUDE)/bsp/vmeUniverse.h: ../../shared/vmeUniverse/vmeUniverse.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverse.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverse.h - -$(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h: ../../shared/vmeUniverse/vmeUniverseDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h - -$(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h: ../../shared/vmeUniverse/bspVmeDmaList.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h - -$(PROJECT_INCLUDE)/bsp/VMEDMA.h: ../../shared/vmeUniverse/VMEDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEDMA.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEDMA.h - -$(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vme_am_defs.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vme_am_defs.h - -if HAS_NETWORKING -$(PROJECT_INCLUDE)/bsp/GT64260eth.h: network/if_100MHz/GT64260eth.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/GT64260eth.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/GT64260eth.h - -$(PROJECT_INCLUDE)/bsp/GT64260ethreg.h: network/if_100MHz/GT64260ethreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/GT64260ethreg.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/GT64260ethreg.h - -$(PROJECT_INCLUDE)/bsp/if_wmreg.h: network/if_1GHz/if_wmreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/if_wmreg.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/if_wmreg.h - -$(PROJECT_INCLUDE)/bsp/pcireg.h: network/if_1GHz/pcireg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pcireg.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pcireg.h -endif -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/mvme5500start.$(OBJEXT): mvme5500start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/mvme5500start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/mvme5500start.$(OBJEXT) - diff --git a/c/src/lib/libbsp/powerpc/mvme5500/bsp_specs b/c/src/lib/libbsp/powerpc/mvme5500/startup/bsp_specs index 2625609327..2625609327 100644 --- a/c/src/lib/libbsp/powerpc/mvme5500/bsp_specs +++ b/c/src/lib/libbsp/powerpc/mvme5500/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/mvme5500/vectors/bspException.h b/c/src/lib/libbsp/powerpc/mvme5500/vectors/bspException.h deleted file mode 100644 index 7cd816e818..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/vectors/bspException.h +++ /dev/null @@ -1,99 +0,0 @@ -#ifndef BSP_EXCEPTION_HANDLER_H -#define BSP_EXCEPTION_HANDLER_H - -/* A slightly improved exception 'default' exception handler for RTEMS / SVGM */ - -/* - * Authorship - * ---------- - * This software was created by - * Till Straumann <strauman@slac.stanford.edu>, 5/2002, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * This software was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#include <bsp/vectors.h> - -/* Two types of exception intercepting / catching is supported: - * - * - lowlevel handling (runs at IRQ level, before restoring any - * task context). - * - highlevel handling. - * - * A lowlevel user hook is invoked twice, before and after processing - * (printing) the exception. - * If the user hook returns a nonzero value, normal processing - * is skipped (including the second call to the hook) - * - * If the hook returns nonzero to the second call, no default - * 'panic' occurs. - * - * Default 'panic': - * - if a task context is available: - * - if a highlevel handler is installed, pass control - * to the highlevel handler when returning from the - * exception (the highlevel handler should probably - * do a longjmp()). Otherwise: - * - try to suspend interrupted task. - * - hang if no task context is available. - * - */ - -typedef struct BSP_ExceptionExtensionRec_ *BSP_ExceptionExtension; - -typedef int (*BSP_ExceptionHookProc)(BSP_Exception_frame *frame, BSP_ExceptionExtension ext, int after); - -typedef struct BSP_ExceptionExtensionRec_ { - BSP_ExceptionHookProc lowlevelHook; - int quiet; /* silence the exception handler */ - void (*highlevelHook)(BSP_ExceptionExtension); - /* user fields may be added after this */ -} BSP_ExceptionExtensionRec; - -#define SRR1_TEA_EXC (1<<(31-13)) -#define SRR1_MCP_EXC (1<<(31-12)) - -void -BSP_exceptionHandler(BSP_Exception_frame* excPtr); - -/* install an exception handler to the current task context */ -BSP_ExceptionExtension -BSP_exceptionHandlerInstall(BSP_ExceptionExtension e); - -#endif diff --git a/c/src/lib/libbsp/powerpc/mvme5500/vme/VMEConfig.h b/c/src/lib/libbsp/powerpc/mvme5500/vme/VMEConfig.h deleted file mode 100644 index ecc5789899..0000000000 --- a/c/src/lib/libbsp/powerpc/mvme5500/vme/VMEConfig.h +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef RTEMS_BSP_VME_CONFIG_H -#define RTEMS_BSP_VME_CONFIG_H -/* VMEConfig.h, S. Kate Feng modified it for MVME5500 3/04 - * - * May 2011 : Use the VME shared IRQ handlers. - * - * It seems that the implementation of VMEUNIVERSE_IRQ_MGR_FLAG_PW_WORKAROUND - * is not fully developed. The UNIV_REGOFF_VCSR_BS is defined for VME64 - * specification, which does not apply to a VME32 crate. In order to avoid - * spurious VME interrupts, a better and more universal solution is - * to flush the vmeUniverse FIFO by reading a register back within the - * users' Interrupt Service Routine (ISR) before returning. - * - * Some devices might require the ISR to issue an interrupt status READ - * after its IRQ is cleared, but before its corresponding interrupt - * is enabled again. - * - */ - -/* - * Prototypes - */ -int BSP_VMEInit(void); -int BSP_VMEIrqMgrInstall(void); - -/* BSP specific address space configuration parameters */ - -/* - * The BSP maps VME address ranges into - * one BAT. - * NOTE: the BSP (startup/bspstart.c) uses - * hardcoded window lengths that match this - * layout: - */ -#define _VME_A32_WIN0_ON_PCI 0x90000000 -/* If _VME_CSR_ON_PCI is defined then the A32 window is reduced to accommodate - * CSR for space. - */ -#define _VME_CSR_ON_PCI 0x9e000000 -#define _VME_A24_ON_PCI 0x9f000000 -#define _VME_A16_ON_PCI 0x9fff0000 - -/* Reuse BAT 0 for VME */ -#define BSP_VME_BAT_IDX 0 - -/* start of the A32 window on the VME bus - * TODO: this should perhaps be a configuration option - */ -#define _VME_A32_WIN0_ON_VME 0x20000000 - -/* if _VME_DRAM_OFFSET is defined, the BSP - * will map our RAM onto the VME bus, starting - * at _VME_DRAM_OFFSET - */ -#define _VME_DRAM_OFFSET 0x90000000 - -#define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err) \ - do { \ - err = vmeUniverseInstallIrqMgrAlt(VMEUNIVERSE_IRQ_MGR_FLAG_SHARED,\ - 0, BSP_GPP_VME_VLINT0, \ - 1, BSP_GPP_VME_VLINT1, \ - 2, BSP_GPP_VME_VLINT2, \ - 3, BSP_GPP_VME_VLINT3, \ - -1 /* terminate list */); \ - } while (0) - -#endif diff --git a/c/src/lib/libbsp/powerpc/psim/Makefile.am b/c/src/lib/libbsp/powerpc/psim/Makefile.am index 66150472d6..61f78140c3 100644 --- a/c/src/lib/libbsp/powerpc/psim/Makefile.am +++ b/c/src/lib/libbsp/powerpc/psim/Makefile.am @@ -4,19 +4,8 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h -include_HEADERS += include/psim.h - -include_bsp_HEADERS = ../shared/include/linker-symbols.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h -nodist_include_bsp_HEADERS += ../../shared/include/console-polled.h DISTCLEANFILES = include/bspopts.h @@ -30,8 +19,8 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA += rtems_crti.$(OBJEXT) +project_lib_DATA += linkcmds dist_project_lib_DATA += ../shared/startup/linkcmds.base -dist_project_lib_DATA += startup/linkcmds noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -52,8 +41,6 @@ libbsp_a_SOURCES += ../../shared/console-polled.c libbsp_a_SOURCES += console/console-io.c console/consupp.S # irq -include_bsp_HEADERS += irq/irq.h ../shared/openpic/openpic.h \ - ../../shared/include/irq-generic.h libbsp_a_SOURCES += irq/irq_init.c ../shared/irq/openpic_i8259_irq.c \ ../shared/openpic/openpic.c ../../shared/src/irq-server.c \ ../../shared/src/irq-generic.c ../../shared/src/irq-default-handler.c @@ -84,5 +71,5 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/altivec.rel -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/psim/headers.am diff --git a/c/src/lib/libbsp/powerpc/psim/configure.ac b/c/src/lib/libbsp/powerpc/psim/configure.ac index d97ac6c8c3..11f58874e3 100644 --- a/c/src/lib/libbsp/powerpc/psim/configure.ac +++ b/c/src/lib/libbsp/powerpc/psim/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-psim],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/psim.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/psim/include/bsp.h b/c/src/lib/libbsp/powerpc/psim/include/bsp.h deleted file mode 100644 index cffc9632e7..0000000000 --- a/c/src/lib/libbsp/powerpc/psim/include/bsp.h +++ /dev/null @@ -1,90 +0,0 @@ -/* bsp.h - * - * This include file contains all Papyrus board IO definitions. - * - * Author: Andrew Bray <andy@i-cubed.co.uk> - * - * COPYRIGHT (c) 1995 by i-cubed ltd. - * - * To anyone who acknowledges that this file is provided "AS IS" - * without any express or implied warranty: - * permission to use, copy, modify, and distribute this file - * for any purpose is hereby granted without fee, provided that - * the above copyright notice and this notice appears in all - * copies, and that the name of i-cubed limited not be used in - * advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. - * i-cubed limited makes no representations about the suitability - * of this software for any purpose. - * - * Derived from c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_PSIM_BSP_H -#define LIBBSP_POWERPC_PSIM_BSP_H - -#include <bspopts.h> - -#ifdef ASM -/* Definition of where to store registers in alignment handler */ -#define ALIGN_REGS 0x0140 - -#else -#include <rtems.h> -#include <libcpu/io.h> -#include <bsp/vectors.h> -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* Constants */ - -/* - * Information placed in the linkcmds file. - */ - -extern int end; /* last address in the program */ -extern int RAM_END; - -extern uint32_t BSP_mem_size; - -#define BSP_Convert_decrementer( _value ) ( (unsigned long long) _value ) - -/* macros */ -#define Processor_Synchronize() \ - __asm__ (" eieio ") - -/* - * Network configuration - */ -struct rtems_bsdnet_ifconfig; - -int rtems_ifsim_attach(struct rtems_bsdnet_ifconfig *ifcfg, int attaching); - -#define RTEMS_BSP_NETWORK_DRIVER_NAME "ifsim1" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ifsim_attach - -/* - * Interfaces to required Clock Driver support methods - */ -int BSP_disconnect_clock_handler(void); -int BSP_connect_clock_handler(void); - -#ifdef __cplusplus -} -#endif - -#endif /* ASM */ - -#define BSP_HAS_NO_VME - -#endif diff --git a/c/src/lib/libbsp/powerpc/psim/include/psim.h b/c/src/lib/libbsp/powerpc/psim/include/psim.h deleted file mode 100644 index e7b6fa7578..0000000000 --- a/c/src/lib/libbsp/powerpc/psim/include/psim.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * PSIM addresses and constants based upon the configuration - * of devices used in the script provided by RTEMS. - */ - -#ifndef __PSIM_h -#define __PSIM_h - -/* - * RAM Information - */ - -extern char RamBase[]; -extern char RamSize[]; - -/* - * RamBase/RamSize is defined by the linker script; - * CPP symbols are AFAIK unused and deprecated. - */ -#define PSIM_RAM_SIZE ((unsigned long)RamSize) -#define PSIM_RAM_BASE ((void*)RamBase) - -/* - * NVRAM/RTC Structure and Information - */ - -#define PSIM_RTC_FREEZE 0xc0 -#define PSIM_RTC_UPDATE 0x00 - -typedef struct { - volatile uint8_t Control; /* 0x04 */ - volatile uint8_t Second; /* 0x05 */ - volatile uint8_t Minute; /* 0x06 */ - volatile uint8_t Hour; /* 0x07 */ - volatile uint8_t Day; /* 0x08 */ - volatile uint8_t Date; /* 0x09 */ - volatile uint8_t Month; /* 0x0a */ - volatile uint8_t Year; /* 0x0b */ -} psim_rtc_t; - -/* - * System V IPC Semaphore -- Read Only - */ - -typedef struct { - volatile uint32_t obtain_value; /* 0x00 */ - volatile uint32_t lock; /* 0x04 */ - volatile uint32_t unlock; /* 0x08 */ -} psim_sysv_sem_t; - -typedef struct { - /* 0x0c000000 - 0x0c007FFF - AMD 29F040 */ - volatile uint8_t Flash[ 512 * 1024 ]; - - /* 0x0c080000 - 0x0c0FFFFF - NVRAM/NVRAM */ - volatile uint8_t nvram[ 512 * 1024 ]; - - /* 0x0c100000 - 0x0c100007 - NVRAM/RTC */ - psim_rtc_t RTC; - - /* 0x0c100008 - 0x0c10000F - NVRAM/RTC */ - uint8_t gap1[8]; - - /* 0x0c100010 - 0x0c10001b - System V IPC Semaphore */ - psim_sysv_sem_t Semaphore; - - /* 0x0c10001c - 0x0c10001f - NVRAM/RTC */ - uint8_t gap2[4]; - - /* 0x0c100020 - 0x0c10005F - Ethernet */ - volatile uint8_t Ethtap[ 64 ]; - - /* 0x0c100060 - 0x0c10FFFF - NVRAM/RTC */ - uint8_t gap3[65440]; - - /* 0x0c110000 - 0x0c12FFFF - System V IPC Shared Memory */ - uint8_t SharedMemory[ 128 * 1024 ]; - - /* 0x0c130000 - 0x0c170000 - OpenPIC IRQ Controller */ - volatile uint8_t OpenPIC[ 256 * 1024 ]; - -} psim_registers_t; - -/* - * Data Structure Overlay for Registers. See linkcmds for placement. - */ -extern psim_registers_t PSIM; - -#endif -/* end of include file */ diff --git a/c/src/lib/libbsp/powerpc/psim/include/tm27.h b/c/src/lib/libbsp/powerpc/psim/include/tm27.h deleted file mode 100644 index 3a41283a13..0000000000 --- a/c/src/lib/libbsp/powerpc/psim/include/tm27.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * @file - * @ingroup powerpc_psim - * @brief Implementations for interrupt mechanisms for Time Test 27 - */ - -/* - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -#include <bsp/irq.h> - -/* - * Stuff for Time Test 27 - */ - -#define MUST_WAIT_FOR_INTERRUPT 1 - -void nullFunc() {} -static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, - 0, - (rtems_irq_enable)nullFunc, - (rtems_irq_disable)nullFunc, - (rtems_irq_is_enabled) nullFunc}; - -void Install_tm27_vector(void (*_handler)()) -{ - clockIrqData.hdl = _handler; - if (!BSP_install_rtems_irq_handler (&clockIrqData)) { - printk("Error installing clock interrupt handler!\n"); - rtems_fatal_error_occurred(1); - } -} - -#define Cause_tm27_intr() \ - do { \ - uint32_t _clicks = 1; \ - __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ - } while (0) - - -#define Clear_tm27_intr() \ - do { \ - uint32_t _clicks = 0xffffffff; \ - __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ - } while (0) - -#define Lower_tm27_intr() \ - do { \ - uint32_t _msr = 0; \ - _ISR_Set_level( 0 ); \ - __asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ - _msr |= 0x8002; \ - __asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ - } while (0) - -#endif diff --git a/c/src/lib/libbsp/powerpc/psim/irq/irq.h b/c/src/lib/libbsp/powerpc/psim/irq/irq.h deleted file mode 100644 index 376c95a627..0000000000 --- a/c/src/lib/libbsp/powerpc/psim/irq/irq.h +++ /dev/null @@ -1,74 +0,0 @@ -/* irq.h - * - * This include file describe the data structure and the functions implemented - * by rtems to write interrupt handlers. - * - * CopyRight (C) 1999 valette@crf.canon.fr - * - * This code is heavilly inspired by the public specification of STREAM V2 - * that can be found at : - * - * <http://www.chorus.com/Documentation/index.html> by following - * the STREAM API Specification Document link. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_IRQ_H -#define LIBBSP_POWERPC_IRQ_H - -#define BSP_SHARED_HANDLER_SUPPORT 1 - -#ifndef ASM - -#include <rtems/irq.h> - - -/* - * Symblolic IRQ names and related definitions. - */ - -/* - * PCI IRQ handlers related definitions - * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE - */ -#define BSP_PCI_IRQ_NUMBER (16) -#define BSP_PCI_IRQ_LOWEST_OFFSET (0) -#define BSP_PCI_IRQ_MAX_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1) - -#define BSP_PROCESSOR_IRQ_NUMBER (1) -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET+BSP_PROCESSOR_IRQ_NUMBER-1) - - - /* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) -#define BSP_LOWEST_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET) -#define BSP_MAX_OFFSET (BSP_IRQ_NUMBER - 1) - - /* - * Some Processor execption handled as rtems IRQ symbolic name definition - */ -#define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET) - -#include <bsp/irq_supp.h> - -#define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET -#define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET - -#ifdef __cplusplus -extern "C" { -#endif - -void BSP_rtems_irq_mng_init(unsigned cpuId); - -#ifdef __cplusplus -} -#endif - -#endif -#endif diff --git a/c/src/lib/libbsp/powerpc/psim/preinstall.am b/c/src/lib/libbsp/powerpc/psim/preinstall.am deleted file mode 100644 index dd18989cb3..0000000000 --- a/c/src/lib/libbsp/powerpc/psim/preinstall.am +++ /dev/null @@ -1,95 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/psim.h: include/psim.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/psim.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/psim.h - -$(PROJECT_INCLUDE)/bsp/linker-symbols.h: ../shared/include/linker-symbols.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/linker-symbols.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/linker-symbols.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_INCLUDE)/bsp/console-polled.h: ../../shared/include/console-polled.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/console-polled.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/console-polled.h - -$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/openpic.h: ../shared/openpic/openpic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/openpic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/openpic.h - -$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h - diff --git a/c/src/lib/libbsp/powerpc/psim/bsp_specs b/c/src/lib/libbsp/powerpc/psim/startup/bsp_specs index 2625609327..2625609327 100644 --- a/c/src/lib/libbsp/powerpc/psim/bsp_specs +++ b/c/src/lib/libbsp/powerpc/psim/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/qemuppc/Makefile.am b/c/src/lib/libbsp/powerpc/qemuppc/Makefile.am index 7be4f11de3..6d887f2d47 100644 --- a/c/src/lib/libbsp/powerpc/qemuppc/Makefile.am +++ b/c/src/lib/libbsp/powerpc/qemuppc/Makefile.am @@ -4,16 +4,8 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h -nodist_include_bsp_HEADERS += ../../shared/include/console-polled.h DISTCLEANFILES = include/bspopts.h noinst_PROGRAMS = @@ -28,7 +20,7 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA += rtems_crti.$(OBJEXT) -dist_project_lib_DATA += startup/linkcmds +project_lib_DATA += linkcmds # startup startup_SOURCES = ../../shared/bspclean.c \ @@ -46,9 +38,6 @@ clock_SOURCES = ../shared/clock/clock.c console_SOURCES = ../../shared/console-polled.c console/console-io.c # irq -include_bsp_HEADERS = irq/irq.h \ - ../../shared/include/irq-generic.h \ - ../../shared/include/irq-info.h irq_SOURCES = irq_SOURCES += ../../shared/src/irq-default-handler.c irq_SOURCES += ../../shared/src/irq-generic.c @@ -70,5 +59,5 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/qemuppc/headers.am diff --git a/c/src/lib/libbsp/powerpc/qemuppc/configure.ac b/c/src/lib/libbsp/powerpc/qemuppc/configure.ac index 3209a0073c..0dab820017 100644 --- a/c/src/lib/libbsp/powerpc/qemuppc/configure.ac +++ b/c/src/lib/libbsp/powerpc/qemuppc/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-qemuppc],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/qemuppc.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/qemuppc/include/bsp.h b/c/src/lib/libbsp/powerpc/qemuppc/include/bsp.h deleted file mode 100644 index 240cfd3bea..0000000000 --- a/c/src/lib/libbsp/powerpc/qemuppc/include/bsp.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * This include file contains some definitions specific to the - * qemu powerpc Prep simulator - */ - -/* - * COPYRIGHT (c) 1989-2014. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_QEMUPPC_BSP_H -#define LIBBSP_POWERPC_QEMUPPC_BSP_H - -#ifndef ASM - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Convert decrementer value to tenths of microseconds (used by shared timer - * driver). - */ -#define BSP_Convert_decrementer( _value ) \ - ((int) (((_value) * 10) / bsp_clicks_per_usec)) - -/* - * Prototypes for methods that are referenced from .S - */ -void cmain(void); - -#ifdef __cplusplus -} -#endif - -#endif /* !ASM */ - -#endif diff --git a/c/src/lib/libbsp/powerpc/qemuppc/include/tm27.h b/c/src/lib/libbsp/powerpc/qemuppc/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/c/src/lib/libbsp/powerpc/qemuppc/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include <rtems/tm27-default.h> diff --git a/c/src/lib/libbsp/powerpc/qemuppc/irq/irq.h b/c/src/lib/libbsp/powerpc/qemuppc/irq/irq.h deleted file mode 100644 index 7124dbcaf8..0000000000 --- a/c/src/lib/libbsp/powerpc/qemuppc/irq/irq.h +++ /dev/null @@ -1,76 +0,0 @@ -/* irq.h - * - * This include file describe the data structure and the functions implemented - * by rtems to write interrupt handlers. - * - * CopyRight (C) 1999 valette@crf.canon.fr - * - * This code is heavilly inspired by the public specification of STREAM V2 - * that can be found at : - * - * <http://www.chorus.com/Documentation/index.html> by following - * the STREAM API Specification Document link. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_IRQ_H -#define LIBBSP_POWERPC_IRQ_H - -#define BSP_SHARED_HANDLER_SUPPORT 1 - -#ifndef ASM - -#include <rtems/irq.h> - - -/* - * Symblolic IRQ names and related definitions. - */ - -/* - * PCI IRQ handlers related definitions - * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE - */ -/* FIXME: do we need PCI interrrupts here ? */ -#define BSP_PCI_IRQ_NUMBER (16) -#define BSP_PCI_IRQ_LOWEST_OFFSET (0) -#define BSP_PCI_IRQ_MAX_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1) - -#define BSP_PROCESSOR_IRQ_NUMBER (1) -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET+BSP_PROCESSOR_IRQ_NUMBER-1) - - - /* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) -#define BSP_LOWEST_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET) -#define BSP_MAX_OFFSET (BSP_IRQ_NUMBER - 1) - - /* - * Some Processor execption handled as rtems IRQ symbolic name definition - */ -#define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET) - -#define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET - -#define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET - -/* #include <bsp/irq_supp.h> */ - -#ifdef __cplusplus -extern "C" { -#endif - -void BSP_rtems_irq_mng_init(unsigned cpuId); - -#ifdef __cplusplus -} -#endif - -#endif -#endif diff --git a/c/src/lib/libbsp/powerpc/qemuppc/preinstall.am b/c/src/lib/libbsp/powerpc/qemuppc/preinstall.am deleted file mode 100644 index 3867c4eed9..0000000000 --- a/c/src/lib/libbsp/powerpc/qemuppc/preinstall.am +++ /dev/null @@ -1,83 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_INCLUDE)/bsp/console-polled.h: ../../shared/include/console-polled.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/console-polled.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/console-polled.h - -$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h - -$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h - diff --git a/c/src/lib/libbsp/powerpc/qemuppc/bsp_specs b/c/src/lib/libbsp/powerpc/qemuppc/startup/bsp_specs index 2625609327..2625609327 100644 --- a/c/src/lib/libbsp/powerpc/qemuppc/bsp_specs +++ b/c/src/lib/libbsp/powerpc/qemuppc/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/qoriq/Makefile.am b/c/src/lib/libbsp/powerpc/qoriq/Makefile.am index 646dbfbc28..6760cece35 100644 --- a/c/src/lib/libbsp/powerpc/qoriq/Makefile.am +++ b/c/src/lib/libbsp/powerpc/qoriq/Makefile.am @@ -4,16 +4,8 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp -include_asmdir = $(includedir)/asm -include_uapi_asmdir = $(includedir)/uapi/asm +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h DISTCLEANFILES = include/bspopts.h EXTRA_DIST += README @@ -21,27 +13,6 @@ EXTRA_DIST += README noinst_PROGRAMS = -include_bsp_HEADERS = include/irq.h \ - ../../shared/include/irq-generic.h \ - ../../shared/include/irq-info.h \ - ../../shared/include/bootcard.h \ - ../../shared/include/utility.h \ - ../shared/include/start.h \ - ../shared/include/tictac.h \ - ../shared/include/linker-symbols.h \ - include/tsec-config.h \ - include/mmu.h \ - include/intercom.h \ - include/uart-bridge.h \ - include/qoriq.h - -include_asm_HEADERS = -include_asm_HEADERS += include/asm/epapr_hcalls.h -include_asm_HEADERS += include/asm/fsl_hcalls.h - -include_uapi_asm_HEADERS = -include_uapi_asm_HEADERS += include/uapi/asm/epapr_hcalls.h - EXTRA_DIST += start/start.S start.$(OBJEXT): start/start.S $(CPPASCOMPILE) -o $@ -c $< @@ -57,13 +28,13 @@ rtems_crtn.$(OBJEXT): ../../powerpc/shared/start/rtems_crtn.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA += rtems_crtn.$(OBJEXT) -dist_project_lib_DATA += startup/linkcmds \ - ../shared/startup/linkcmds.base \ - startup/linkcmds.qoriq_core_0 \ - startup/linkcmds.qoriq_core_1 \ - startup/linkcmds.qoriq_e500 \ - startup/linkcmds.qoriq_e6500_32 \ - startup/linkcmds.qoriq_e6500_64 +project_lib_DATA += linkcmds +dist_project_lib_DATA += ../shared/startup/linkcmds.base +dist_project_lib_DATA += startup/linkcmds.qoriq_core_0 +dist_project_lib_DATA += startup/linkcmds.qoriq_core_1 +dist_project_lib_DATA += startup/linkcmds.qoriq_e500 +dist_project_lib_DATA += startup/linkcmds.qoriq_e6500_32 +dist_project_lib_DATA += startup/linkcmds.qoriq_e6500_64 noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -141,5 +112,5 @@ if HAS_SMP libbsp_a_SOURCES += startup/bspsmp.c endif -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/qoriq/headers.am diff --git a/c/src/lib/libbsp/powerpc/qoriq/configure.ac b/c/src/lib/libbsp/powerpc/qoriq/configure.ac index f0e8af62d7..02fffa7e7a 100644 --- a/c/src/lib/libbsp/powerpc/qoriq/configure.ac +++ b/c/src/lib/libbsp/powerpc/qoriq/configure.ac @@ -2,6 +2,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-qoriq],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/qoriq_core_0.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.10]) @@ -168,7 +171,6 @@ AM_CONDITIONAL(HAS_SMP,[test "$rtems_cv_HAS_SMP" = "yes"]) RTEMS_BSP_CLEANUP_OPTIONS RTEMS_PPC_EXCEPTIONS -RTEMS_BSP_LINKCMDS AC_CONFIG_FILES([Makefile]) AC_OUTPUT diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/asm/epapr_hcalls.h b/c/src/lib/libbsp/powerpc/qoriq/include/asm/epapr_hcalls.h deleted file mode 100644 index 3d87cca611..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/asm/epapr_hcalls.h +++ /dev/null @@ -1,573 +0,0 @@ -/* - * ePAPR hcall interface - * - * Copyright 2008-2011 Freescale Semiconductor, Inc. - * - * Author: Timur Tabi <timur@freescale.com> - * - * This file is provided under a dual BSD/GPL license. When using or - * redistributing this file, you may do so under either license. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* A "hypercall" is an "sc 1" instruction. This header file file provides C - * wrapper functions for the ePAPR hypervisor interface. It is inteded - * for use by Linux device drivers and other operating systems. - * - * The hypercalls are implemented as inline assembly, rather than assembly - * language functions in a .S file, for optimization. It allows - * the caller to issue the hypercall instruction directly, improving both - * performance and memory footprint. - */ - -#ifndef _EPAPR_HCALLS_H -#define _EPAPR_HCALLS_H - -#include <uapi/asm/epapr_hcalls.h> - -#ifndef __ASSEMBLY__ -#include <sys/endian.h> - -/* - * Hypercall register clobber list - * - * These macros are used to define the list of clobbered registers during a - * hypercall. Technically, registers r0 and r3-r12 are always clobbered, - * but the gcc inline assembly syntax does not allow us to specify registers - * on the clobber list that are also on the input/output list. Therefore, - * the lists of clobbered registers depends on the number of register - * parmeters ("+r" and "=r") passed to the hypercall. - * - * Each assembly block should use one of the HCALL_CLOBBERSx macros. As a - * general rule, 'x' is the number of parameters passed to the assembly - * block *except* for r11. - * - * If you're not sure, just use the smallest value of 'x' that does not - * generate a compilation error. Because these are static inline functions, - * the compiler will only check the clobber list for a function if you - * compile code that calls that function. - * - * r3 and r11 are not included in any clobbers list because they are always - * listed as output registers. - * - * XER, CTR, and LR are currently listed as clobbers because it's uncertain - * whether they will be clobbered. - * - * Note that r11 can be used as an output parameter. - * - * The "memory" clobber is only necessary for hcalls where the Hypervisor - * will read or write guest memory. However, we add it to all hcalls because - * the impact is minimal, and we want to ensure that it's present for the - * hcalls that need it. -*/ - -/* List of common clobbered registers. Do not use this macro. */ -#define EV_HCALL_CLOBBERS "r0", "r12", "xer", "ctr", "lr", "cc", "memory" - -#define EV_HCALL_CLOBBERS8 EV_HCALL_CLOBBERS -#define EV_HCALL_CLOBBERS7 EV_HCALL_CLOBBERS8, "r10" -#define EV_HCALL_CLOBBERS6 EV_HCALL_CLOBBERS7, "r9" -#define EV_HCALL_CLOBBERS5 EV_HCALL_CLOBBERS6, "r8" -#define EV_HCALL_CLOBBERS4 EV_HCALL_CLOBBERS5, "r7" -#define EV_HCALL_CLOBBERS3 EV_HCALL_CLOBBERS4, "r6" -#define EV_HCALL_CLOBBERS2 EV_HCALL_CLOBBERS3, "r5" -#define EV_HCALL_CLOBBERS1 EV_HCALL_CLOBBERS2, "r4" - -extern bool epapr_paravirt_enabled; -extern uint32_t epapr_hypercall_start[]; - -#ifdef CONFIG_EPAPR_PARAVIRT -int __init epapr_paravirt_early_init(void); -#else -static inline int epapr_paravirt_early_init(void) { return 0; } -#endif - -/* - * We use "uintptr_t" to define a register because it's guaranteed to be a - * 32-bit integer on a 32-bit platform, and a 64-bit integer on a 64-bit - * platform. - * - * All registers are either input/output or output only. Registers that are - * initialized before making the hypercall are input/output. All - * input/output registers are represented with "+r". Output-only registers - * are represented with "=r". Do not specify any unused registers. The - * clobber list will tell the compiler that the hypercall modifies those - * registers, which is good enough. - */ - -/** - * ev_int_set_config - configure the specified interrupt - * @interrupt: the interrupt number - * @config: configuration for this interrupt - * @priority: interrupt priority - * @destination: destination CPU number - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_int_set_config(unsigned int interrupt, - uint32_t config, unsigned int priority, uint32_t destination) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - register uintptr_t r5 __asm__("r5"); - register uintptr_t r6 __asm__("r6"); - - r11 = EV_HCALL_TOKEN(EV_INT_SET_CONFIG); - r3 = interrupt; - r4 = config; - r5 = priority; - r6 = destination; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6) - : : EV_HCALL_CLOBBERS4 - ); - - return r3; -} - -/** - * ev_int_get_config - return the config of the specified interrupt - * @interrupt: the interrupt number - * @config: returned configuration for this interrupt - * @priority: returned interrupt priority - * @destination: returned destination CPU number - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_int_get_config(unsigned int interrupt, - uint32_t *config, unsigned int *priority, uint32_t *destination) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - register uintptr_t r5 __asm__("r5"); - register uintptr_t r6 __asm__("r6"); - - r11 = EV_HCALL_TOKEN(EV_INT_GET_CONFIG); - r3 = interrupt; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "=r" (r4), "=r" (r5), "=r" (r6) - : : EV_HCALL_CLOBBERS4 - ); - - *config = r4; - *priority = r5; - *destination = r6; - - return r3; -} - -/** - * ev_int_set_mask - sets the mask for the specified interrupt source - * @interrupt: the interrupt number - * @mask: 0=enable interrupts, 1=disable interrupts - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_int_set_mask(unsigned int interrupt, - unsigned int mask) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - - r11 = EV_HCALL_TOKEN(EV_INT_SET_MASK); - r3 = interrupt; - r4 = mask; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "+r" (r4) - : : EV_HCALL_CLOBBERS2 - ); - - return r3; -} - -/** - * ev_int_get_mask - returns the mask for the specified interrupt source - * @interrupt: the interrupt number - * @mask: returned mask for this interrupt (0=enabled, 1=disabled) - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_int_get_mask(unsigned int interrupt, - unsigned int *mask) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - - r11 = EV_HCALL_TOKEN(EV_INT_GET_MASK); - r3 = interrupt; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "=r" (r4) - : : EV_HCALL_CLOBBERS2 - ); - - *mask = r4; - - return r3; -} - -/** - * ev_int_eoi - signal the end of interrupt processing - * @interrupt: the interrupt number - * - * This function signals the end of processing for the the specified - * interrupt, which must be the interrupt currently in service. By - * definition, this is also the highest-priority interrupt. - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_int_eoi(unsigned int interrupt) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = EV_HCALL_TOKEN(EV_INT_EOI); - r3 = interrupt; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} - -/** - * ev_byte_channel_send - send characters to a byte stream - * @handle: byte stream handle - * @count: (input) num of chars to send, (output) num chars sent - * @buffer: pointer to a 16-byte buffer - * - * @buffer must be at least 16 bytes long, because all 16 bytes will be - * read from memory into registers, even if count < 16. - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_byte_channel_send(unsigned int handle, - unsigned int *count, const char buffer[EV_BYTE_CHANNEL_MAX_BYTES]) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - register uintptr_t r5 __asm__("r5"); - register uintptr_t r6 __asm__("r6"); - register uintptr_t r7 __asm__("r7"); - register uintptr_t r8 __asm__("r8"); - const uint32_t *p = (const uint32_t *) buffer; - - r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_SEND); - r3 = handle; - r4 = *count; - r5 = be32toh(p[0]); - r6 = be32toh(p[1]); - r7 = be32toh(p[2]); - r8 = be32toh(p[3]); - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), - "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7), "+r" (r8) - : : EV_HCALL_CLOBBERS6 - ); - - *count = r4; - - return r3; -} - -/** - * ev_byte_channel_receive - fetch characters from a byte channel - * @handle: byte channel handle - * @count: (input) max num of chars to receive, (output) num chars received - * @buffer: pointer to a 16-byte buffer - * - * The size of @buffer must be at least 16 bytes, even if you request fewer - * than 16 characters, because we always write 16 bytes to @buffer. This is - * for performance reasons. - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_byte_channel_receive(unsigned int handle, - unsigned int *count, char buffer[EV_BYTE_CHANNEL_MAX_BYTES]) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - register uintptr_t r5 __asm__("r5"); - register uintptr_t r6 __asm__("r6"); - register uintptr_t r7 __asm__("r7"); - register uintptr_t r8 __asm__("r8"); - uint32_t *p = (uint32_t *) buffer; - - r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_RECEIVE); - r3 = handle; - r4 = *count; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "+r" (r4), - "=r" (r5), "=r" (r6), "=r" (r7), "=r" (r8) - : : EV_HCALL_CLOBBERS6 - ); - - *count = r4; - p[0] = htobe32(r5); - p[1] = htobe32(r6); - p[2] = htobe32(r7); - p[3] = htobe32(r8); - - return r3; -} - -/** - * ev_byte_channel_poll - returns the status of the byte channel buffers - * @handle: byte channel handle - * @rx_count: returned count of bytes in receive queue - * @tx_count: returned count of free space in transmit queue - * - * This function reports the amount of data in the receive queue (i.e. the - * number of bytes you can read), and the amount of free space in the transmit - * queue (i.e. the number of bytes you can write). - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_byte_channel_poll(unsigned int handle, - unsigned int *rx_count, unsigned int *tx_count) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - register uintptr_t r5 __asm__("r5"); - - r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_POLL); - r3 = handle; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "=r" (r4), "=r" (r5) - : : EV_HCALL_CLOBBERS3 - ); - - *rx_count = r4; - *tx_count = r5; - - return r3; -} - -/** - * ev_int_iack - acknowledge an interrupt - * @handle: handle to the target interrupt controller - * @vector: returned interrupt vector - * - * If handle is zero, the function returns the next interrupt source - * number to be handled irrespective of the hierarchy or cascading - * of interrupt controllers. If non-zero, specifies a handle to the - * interrupt controller that is the target of the acknowledge. - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_int_iack(unsigned int handle, - unsigned int *vector) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - - r11 = EV_HCALL_TOKEN(EV_INT_IACK); - r3 = handle; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "=r" (r4) - : : EV_HCALL_CLOBBERS2 - ); - - *vector = r4; - - return r3; -} - -/** - * ev_doorbell_send - send a doorbell to another partition - * @handle: doorbell send handle - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_doorbell_send(unsigned int handle) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = EV_HCALL_TOKEN(EV_DOORBELL_SEND); - r3 = handle; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} - -/** - * ev_idle -- wait for next interrupt on this core - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int ev_idle(void) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = EV_HCALL_TOKEN(EV_IDLE); - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "=r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} - -#ifdef CONFIG_EPAPR_PARAVIRT -static inline unsigned long epapr_hypercall(unsigned long *in, - unsigned long *out, - unsigned long nr) -{ - unsigned long register r0 asm("r0"); - unsigned long register r3 asm("r3") = in[0]; - unsigned long register r4 asm("r4") = in[1]; - unsigned long register r5 asm("r5") = in[2]; - unsigned long register r6 asm("r6") = in[3]; - unsigned long register r7 asm("r7") = in[4]; - unsigned long register r8 asm("r8") = in[5]; - unsigned long register r9 asm("r9") = in[6]; - unsigned long register r10 asm("r10") = in[7]; - unsigned long register r11 asm("r11") = nr; - unsigned long register r12 asm("r12"); - - asm volatile("bl epapr_hypercall_start" - : "=r"(r0), "=r"(r3), "=r"(r4), "=r"(r5), "=r"(r6), - "=r"(r7), "=r"(r8), "=r"(r9), "=r"(r10), "=r"(r11), - "=r"(r12) - : "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7), "r"(r8), - "r"(r9), "r"(r10), "r"(r11) - : "memory", "cc", "xer", "ctr", "lr"); - - out[0] = r4; - out[1] = r5; - out[2] = r6; - out[3] = r7; - out[4] = r8; - out[5] = r9; - out[6] = r10; - out[7] = r11; - - return r3; -} -#else -static unsigned long epapr_hypercall(unsigned long *in, - unsigned long *out, - unsigned long nr) -{ - return EV_UNIMPLEMENTED; -} -#endif - -static inline long epapr_hypercall0_1(unsigned int nr, unsigned long *r2) -{ - unsigned long in[8]; - unsigned long out[8]; - unsigned long r; - - r = epapr_hypercall(in, out, nr); - *r2 = out[0]; - - return r; -} - -static inline long epapr_hypercall0(unsigned int nr) -{ - unsigned long in[8]; - unsigned long out[8]; - - return epapr_hypercall(in, out, nr); -} - -static inline long epapr_hypercall1(unsigned int nr, unsigned long p1) -{ - unsigned long in[8]; - unsigned long out[8]; - - in[0] = p1; - return epapr_hypercall(in, out, nr); -} - -static inline long epapr_hypercall2(unsigned int nr, unsigned long p1, - unsigned long p2) -{ - unsigned long in[8]; - unsigned long out[8]; - - in[0] = p1; - in[1] = p2; - return epapr_hypercall(in, out, nr); -} - -static inline long epapr_hypercall3(unsigned int nr, unsigned long p1, - unsigned long p2, unsigned long p3) -{ - unsigned long in[8]; - unsigned long out[8]; - - in[0] = p1; - in[1] = p2; - in[2] = p3; - return epapr_hypercall(in, out, nr); -} - -static inline long epapr_hypercall4(unsigned int nr, unsigned long p1, - unsigned long p2, unsigned long p3, - unsigned long p4) -{ - unsigned long in[8]; - unsigned long out[8]; - - in[0] = p1; - in[1] = p2; - in[2] = p3; - in[3] = p4; - return epapr_hypercall(in, out, nr); -} -#endif /* !__ASSEMBLY__ */ -#endif /* _EPAPR_HCALLS_H */ diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/asm/fsl_hcalls.h b/c/src/lib/libbsp/powerpc/qoriq/include/asm/fsl_hcalls.h deleted file mode 100644 index ba76c132aa..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/asm/fsl_hcalls.h +++ /dev/null @@ -1,653 +0,0 @@ -/* - * Freescale hypervisor call interface - * - * Copyright 2008-2010 Freescale Semiconductor, Inc. - * - * Author: Timur Tabi <timur@freescale.com> - * - * This file is provided under a dual BSD/GPL license. When using or - * redistributing this file, you may do so under either license. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _FSL_HCALLS_H -#define _FSL_HCALLS_H - -#include <stdint.h> -#include <asm/epapr_hcalls.h> - -#define FH_API_VERSION 1 - -#define FH_ERR_GET_INFO 1 -#define FH_PARTITION_GET_DTPROP 2 -#define FH_PARTITION_SET_DTPROP 3 -#define FH_PARTITION_RESTART 4 -#define FH_PARTITION_GET_STATUS 5 -#define FH_PARTITION_START 6 -#define FH_PARTITION_STOP 7 -#define FH_PARTITION_MEMCPY 8 -#define FH_DMA_ENABLE 9 -#define FH_DMA_DISABLE 10 -#define FH_SEND_NMI 11 -#define FH_VMPIC_GET_MSIR 12 -#define FH_SYSTEM_RESET 13 -#define FH_GET_CORE_STATE 14 -#define FH_ENTER_NAP 15 -#define FH_EXIT_NAP 16 -#define FH_CLAIM_DEVICE 17 -#define FH_PARTITION_STOP_DMA 18 - -/* vendor ID: Freescale Semiconductor */ -#define FH_HCALL_TOKEN(num) _EV_HCALL_TOKEN(EV_FSL_VENDOR_ID, num) - -/* - * We use "uintptr_t" to define a register because it's guaranteed to be a - * 32-bit integer on a 32-bit platform, and a 64-bit integer on a 64-bit - * platform. - * - * All registers are either input/output or output only. Registers that are - * initialized before making the hypercall are input/output. All - * input/output registers are represented with "+r". Output-only registers - * are represented with "=r". Do not specify any unused registers. The - * clobber list will tell the compiler that the hypercall modifies those - * registers, which is good enough. - */ - -/** - * fh_send_nmi - send NMI to virtual cpu(s). - * @vcpu_mask: send NMI to virtual cpu(s) specified by this mask. - * - * Returns 0 for success, or EINVAL for invalid vcpu_mask. - */ -static inline unsigned int fh_send_nmi(unsigned int vcpu_mask) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = FH_HCALL_TOKEN(FH_SEND_NMI); - r3 = vcpu_mask; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} - -/* Arbitrary limits to avoid excessive memory allocation in hypervisor */ -#define FH_DTPROP_MAX_PATHLEN 4096 -#define FH_DTPROP_MAX_PROPLEN 32768 - -/** - * fh_partition_get_dtprop - get a property from a guest device tree. - * @handle: handle of partition whose device tree is to be accessed - * @dtpath_addr: physical address of device tree path to access - * @propname_addr: physical address of name of property - * @propvalue_addr: physical address of property value buffer - * @propvalue_len: length of buffer on entry, length of property on return - * - * Returns zero on success, non-zero on error. - */ -static inline unsigned int fh_partition_get_dtprop(int handle, - uint64_t dtpath_addr, - uint64_t propname_addr, - uint64_t propvalue_addr, - uint32_t *propvalue_len) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - register uintptr_t r5 __asm__("r5"); - register uintptr_t r6 __asm__("r6"); - register uintptr_t r7 __asm__("r7"); - register uintptr_t r8 __asm__("r8"); - register uintptr_t r9 __asm__("r9"); - register uintptr_t r10 __asm__("r10"); - - r11 = FH_HCALL_TOKEN(FH_PARTITION_GET_DTPROP); - r3 = handle; - -#ifdef CONFIG_PHYS_64BIT - r4 = dtpath_addr >> 32; - r6 = propname_addr >> 32; - r8 = propvalue_addr >> 32; -#else - r4 = 0; - r6 = 0; - r8 = 0; -#endif - r5 = (uint32_t)dtpath_addr; - r7 = (uint32_t)propname_addr; - r9 = (uint32_t)propvalue_addr; - r10 = *propvalue_len; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), - "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7), - "+r" (r8), "+r" (r9), "+r" (r10) - : : EV_HCALL_CLOBBERS8 - ); - - *propvalue_len = r4; - return r3; -} - -/** - * Set a property in a guest device tree. - * @handle: handle of partition whose device tree is to be accessed - * @dtpath_addr: physical address of device tree path to access - * @propname_addr: physical address of name of property - * @propvalue_addr: physical address of property value - * @propvalue_len: length of property - * - * Returns zero on success, non-zero on error. - */ -static inline unsigned int fh_partition_set_dtprop(int handle, - uint64_t dtpath_addr, - uint64_t propname_addr, - uint64_t propvalue_addr, - uint32_t propvalue_len) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - register uintptr_t r6 __asm__("r6"); - register uintptr_t r8 __asm__("r8"); - register uintptr_t r5 __asm__("r5"); - register uintptr_t r7 __asm__("r7"); - register uintptr_t r9 __asm__("r9"); - register uintptr_t r10 __asm__("r10"); - - r11 = FH_HCALL_TOKEN(FH_PARTITION_SET_DTPROP); - r3 = handle; - -#ifdef CONFIG_PHYS_64BIT - r4 = dtpath_addr >> 32; - r6 = propname_addr >> 32; - r8 = propvalue_addr >> 32; -#else - r4 = 0; - r6 = 0; - r8 = 0; -#endif - r5 = (uint32_t)dtpath_addr; - r7 = (uint32_t)propname_addr; - r9 = (uint32_t)propvalue_addr; - r10 = propvalue_len; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), - "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7), - "+r" (r8), "+r" (r9), "+r" (r10) - : : EV_HCALL_CLOBBERS8 - ); - - return r3; -} - -/** - * fh_partition_restart - reboot the current partition - * @partition: partition ID - * - * Returns an error code if reboot failed. Does not return if it succeeds. - */ -static inline unsigned int fh_partition_restart(unsigned int partition) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = FH_HCALL_TOKEN(FH_PARTITION_RESTART); - r3 = partition; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} - -#define FH_PARTITION_STOPPED 0 -#define FH_PARTITION_RUNNING 1 -#define FH_PARTITION_STARTING 2 -#define FH_PARTITION_STOPPING 3 -#define FH_PARTITION_PAUSING 4 -#define FH_PARTITION_PAUSED 5 -#define FH_PARTITION_RESUMING 6 - -/** - * fh_partition_get_status - gets the status of a partition - * @partition: partition ID - * @status: returned status code - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_partition_get_status(unsigned int partition, - unsigned int *status) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - - r11 = FH_HCALL_TOKEN(FH_PARTITION_GET_STATUS); - r3 = partition; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "=r" (r4) - : : EV_HCALL_CLOBBERS2 - ); - - *status = r4; - - return r3; -} - -/** - * fh_partition_start - boots and starts execution of the specified partition - * @partition: partition ID - * @entry_point: guest physical address to start execution - * - * The hypervisor creates a 1-to-1 virtual/physical IMA mapping, so at boot - * time, guest physical address are the same as guest virtual addresses. - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_partition_start(unsigned int partition, - uint32_t entry_point, int load) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - register uintptr_t r5 __asm__("r5"); - - r11 = FH_HCALL_TOKEN(FH_PARTITION_START); - r3 = partition; - r4 = entry_point; - r5 = load; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "+r" (r4), "+r" (r5) - : : EV_HCALL_CLOBBERS3 - ); - - return r3; -} - -/** - * fh_partition_stop - stops another partition - * @partition: partition ID - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_partition_stop(unsigned int partition) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = FH_HCALL_TOKEN(FH_PARTITION_STOP); - r3 = partition; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} - -/** - * struct fh_sg_list: definition of the fh_partition_memcpy S/G list - * @source: guest physical address to copy from - * @target: guest physical address to copy to - * @size: number of bytes to copy - * @reserved: reserved, must be zero - * - * The scatter/gather list for fh_partition_memcpy() is an array of these - * structures. The array must be guest physically contiguous. - * - * This structure must be aligned on 32-byte boundary, so that no single - * strucuture can span two pages. - */ -struct fh_sg_list { - uint64_t source; /**< guest physical address to copy from */ - uint64_t target; /**< guest physical address to copy to */ - uint64_t size; /**< number of bytes to copy */ - uint64_t reserved; /**< reserved, must be zero */ -} __attribute__ ((aligned(32))); - -/** - * fh_partition_memcpy - copies data from one guest to another - * @source: the ID of the partition to copy from - * @target: the ID of the partition to copy to - * @sg_list: guest physical address of an array of &fh_sg_list structures - * @count: the number of entries in @sg_list - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_partition_memcpy(unsigned int source, - unsigned int target, uint64_t sg_list, unsigned int count) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - register uintptr_t r5 __asm__("r5"); - register uintptr_t r6 __asm__("r6"); - register uintptr_t r7 __asm__("r7"); - - r11 = FH_HCALL_TOKEN(FH_PARTITION_MEMCPY); - r3 = source; - r4 = target; - r5 = (uint32_t) sg_list; - -#ifdef CONFIG_PHYS_64BIT - r6 = sg_list >> 32; -#else - r6 = 0; -#endif - r7 = count; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), - "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7) - : : EV_HCALL_CLOBBERS5 - ); - - return r3; -} - -/** - * fh_dma_enable - enable DMA for the specified device - * @liodn: the LIODN of the I/O device for which to enable DMA - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_dma_enable(unsigned int liodn) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = FH_HCALL_TOKEN(FH_DMA_ENABLE); - r3 = liodn; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} - -/** - * fh_dma_disable - disable DMA for the specified device - * @liodn: the LIODN of the I/O device for which to disable DMA - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_dma_disable(unsigned int liodn) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = FH_HCALL_TOKEN(FH_DMA_DISABLE); - r3 = liodn; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} - - -/** - * fh_vmpic_get_msir - returns the MPIC-MSI register value - * @interrupt: the interrupt number - * @msir_val: returned MPIC-MSI register value - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_vmpic_get_msir(unsigned int interrupt, - unsigned int *msir_val) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - - r11 = FH_HCALL_TOKEN(FH_VMPIC_GET_MSIR); - r3 = interrupt; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "=r" (r4) - : : EV_HCALL_CLOBBERS2 - ); - - *msir_val = r4; - - return r3; -} - -/** - * fh_system_reset - reset the system - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_system_reset(void) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = FH_HCALL_TOKEN(FH_SYSTEM_RESET); - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "=r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} - - -/** - * fh_err_get_info - get platform error information - * @queue id: - * 0 for guest error event queue - * 1 for global error event queue - * - * @pointer to store the platform error data: - * platform error data is returned in registers r4 - r11 - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_err_get_info(int queue, uint32_t *bufsize, - uint32_t addr_hi, uint32_t addr_lo, int peek) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - register uintptr_t r5 __asm__("r5"); - register uintptr_t r6 __asm__("r6"); - register uintptr_t r7 __asm__("r7"); - - r11 = FH_HCALL_TOKEN(FH_ERR_GET_INFO); - r3 = queue; - r4 = *bufsize; - r5 = addr_hi; - r6 = addr_lo; - r7 = peek; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6), - "+r" (r7) - : : EV_HCALL_CLOBBERS5 - ); - - *bufsize = r4; - - return r3; -} - - -#define FH_VCPU_RUN 0 -#define FH_VCPU_IDLE 1 -#define FH_VCPU_NAP 2 - -/** - * fh_get_core_state - get the state of a vcpu - * - * @handle: handle of partition containing the vcpu - * @vcpu: vcpu number within the partition - * @state:the current state of the vcpu, see FH_VCPU_* - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_get_core_state(unsigned int handle, - unsigned int vcpu, unsigned int *state) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - - r11 = FH_HCALL_TOKEN(FH_GET_CORE_STATE); - r3 = handle; - r4 = vcpu; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "+r" (r4) - : : EV_HCALL_CLOBBERS2 - ); - - *state = r4; - return r3; -} - -/** - * fh_enter_nap - enter nap on a vcpu - * - * Note that though the API supports entering nap on a vcpu other - * than the caller, this may not be implmented and may return EINVAL. - * - * @handle: handle of partition containing the vcpu - * @vcpu: vcpu number within the partition - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_enter_nap(unsigned int handle, unsigned int vcpu) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - - r11 = FH_HCALL_TOKEN(FH_ENTER_NAP); - r3 = handle; - r4 = vcpu; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "+r" (r4) - : : EV_HCALL_CLOBBERS2 - ); - - return r3; -} - -/** - * fh_exit_nap - exit nap on a vcpu - * @handle: handle of partition containing the vcpu - * @vcpu: vcpu number within the partition - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_exit_nap(unsigned int handle, unsigned int vcpu) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - register uintptr_t r4 __asm__("r4"); - - r11 = FH_HCALL_TOKEN(FH_EXIT_NAP); - r3 = handle; - r4 = vcpu; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3), "+r" (r4) - : : EV_HCALL_CLOBBERS2 - ); - - return r3; -} -/** - * fh_claim_device - claim a "claimable" shared device - * @handle: fsl,hv-device-handle of node to claim - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_claim_device(unsigned int handle) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = FH_HCALL_TOKEN(FH_CLAIM_DEVICE); - r3 = handle; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} - -/** - * Run deferred DMA disabling on a partition's private devices - * - * This applies to devices which a partition owns either privately, - * or which are claimable and still actively owned by that partition, - * and which do not have the no-dma-disable property. - * - * @handle: partition (must be stopped) whose DMA is to be disabled - * - * Returns 0 for success, or an error code. - */ -static inline unsigned int fh_partition_stop_dma(unsigned int handle) -{ - register uintptr_t r11 __asm__("r11"); - register uintptr_t r3 __asm__("r3"); - - r11 = FH_HCALL_TOKEN(FH_PARTITION_STOP_DMA); - r3 = handle; - - asm volatile("bl epapr_hypercall_start" - : "+r" (r11), "+r" (r3) - : : EV_HCALL_CLOBBERS1 - ); - - return r3; -} -#endif diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h b/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h deleted file mode 100644 index d7e9e95b3f..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/bsp.h +++ /dev/null @@ -1,128 +0,0 @@ -/** - * @file - * - * @ingroup QorIQ - * - * @brief BSP API. - */ - -/* - * Copyright (c) 2010, 2017 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_QORIQ_BSP_H -#define LIBBSP_POWERPC_QORIQ_BSP_H - -#include <bspopts.h> - -#ifdef QORIQ_IS_HYPERVISOR_GUEST -#define QORIQ_THREAD_COUNT 1 -#else -#define QORIQ_THREAD_COUNT QORIQ_PHYSICAL_THREAD_COUNT -#endif - -#ifndef ASM - -#include <rtems.h> - -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define BSP_FEATURE_IRQ_EXTENSION - -#define BSP_FDT_IS_SUPPORTED - -#define QORIQ_CHIP(alpha, num) ((alpha) * 10000 + (num)) - -#define QORIQ_CHIP_P1020 QORIQ_CHIP('P', 1020) - -#define QORIQ_CHIP_T2080 QORIQ_CHIP('T', 2080) - -#define QORIQ_CHIP_T4240 QORIQ_CHIP('T', 4240) - -#define QORIQ_CHIP_VARIANT QORIQ_CHIP(QORIQ_CHIP_SERIES, QORIQ_CHIP_NUMBER) - -#define QORIQ_CHIP_IS_T_VARIANT(variant) ((variant) / 10000 == 'T') - -extern unsigned BSP_bus_frequency; - -struct rtems_bsdnet_ifconfig; - -int BSP_tsec_attach( - struct rtems_bsdnet_ifconfig *config, - int attaching -); - -int qoriq_if_intercom_attach_detach( - struct rtems_bsdnet_ifconfig *config, - int attaching -); - -#if defined(HAS_UBOOT) - /* Routine to obtain U-Boot environment variables */ - const char *bsp_uboot_getenv( - const char *name - ); -#endif - -void bsp_restart(void *addr) RTEMS_NO_RETURN; - -void *bsp_idle_thread( uintptr_t ignored ); -#define BSP_IDLE_TASK_BODY bsp_idle_thread - -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH BSP_tsec_attach -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH4 qoriq_if_intercom_attach_detach - -#define RTEMS_BSP_NETWORK_DRIVER_NAME "tsec1" -#define RTEMS_BSP_NETWORK_DRIVER_NAME2 "tsec2" -#define RTEMS_BSP_NETWORK_DRIVER_NAME3 "tsec3" -#define RTEMS_BSP_NETWORK_DRIVER_NAME4 "intercom1" - -/* Internal data and functions */ - -typedef struct { - uint64_t addr; - uint64_t r3; - uint32_t reserved_0; - uint32_t pir; - uint64_t r6; - uint32_t reserved_1[8]; -} qoriq_start_spin_table; - -extern qoriq_start_spin_table * -qoriq_start_spin_table_addr[QORIQ_CPU_COUNT / QORIQ_THREAD_COUNT]; - -void qoriq_start_thread(void); - -void qoriq_restart_secondary_processor( - const qoriq_start_spin_table *spin_table -) RTEMS_NO_RETURN; - -void qoriq_initialize_exceptions(void *interrupt_stack_begin); - -void qoriq_decrementer_dispatch(void); - -extern uint32_t bsp_time_base_frequency; - -extern uint32_t qoriq_clock_frequency; - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_POWERPC_QORIQ_BSP_H */ diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/intercom.h b/c/src/lib/libbsp/powerpc/qoriq/include/intercom.h deleted file mode 100644 index 39b2ba938e..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/intercom.h +++ /dev/null @@ -1,125 +0,0 @@ -/** - * @file - * - * @ingroup QorIQInterCom - * - * @brief Inter-Processor Communication API. - */ - -/* - * Copyright (c) 2011 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_QORIQ_INTERCOM_H -#define LIBBSP_POWERPC_QORIQ_INTERCOM_H - -#include <rtems.h> -#include <rtems/chain.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup QorIQInterCom QorIQ - Inter-Processor Communication Support - * - * @ingroup QorIQ - * - * @brief Inter-processor communication support. - * - * @{ - */ - -uint32_t qoriq_spin_lock(uint32_t *lock); - -void qoriq_spin_unlock(uint32_t *lock, uint32_t msr); - -#define INTERCOM_CORE_COUNT 2 - -#define INTERCOM_SERVICE_COUNT 8 - -typedef enum { - INTERCOM_TYPE_MPCI, - INTERCOM_TYPE_UART_0, - INTERCOM_TYPE_UART_1, - INTERCOM_TYPE_NETWORK, - INTERCOM_TYPE_CUSTOM_0, - INTERCOM_TYPE_CUSTOM_1, - INTERCOM_TYPE_CUSTOM_2, - INTERCOM_TYPE_CUSTOM_3, - INTERCOM_TYPE_CUSTOM_4 -} intercom_type; - -typedef enum { - INTERCOM_SIZE_64 = 0, - INTERCOM_SIZE_512, - INTERCOM_SIZE_2K, - INTERCOM_SIZE_4K -} intercom_size; - -typedef struct intercom_packet { - union { - struct intercom_packet *next; - rtems_chain_node node; - } glue; - intercom_type type_index; - intercom_size size_index; - uint32_t flags; - size_t size; - uint32_t cache_line_alignment [2]; - char data []; -} intercom_packet; - -typedef void (*intercom_service)(intercom_packet *packet, void *arg); - -void qoriq_intercom_init(void); - -void qoriq_intercom_start(void); - -void qoriq_intercom_service_install(intercom_type type, intercom_service service, void *arg); - -void qoriq_intercom_service_remove(intercom_type type); - -intercom_packet *qoriq_intercom_allocate_packet(intercom_type type, intercom_size size); - -void qoriq_intercom_send_packets(int destination_core, intercom_packet *first, intercom_packet *last); - -static inline void qoriq_intercom_send_packet(int destination_core, intercom_packet *packet) -{ - qoriq_intercom_send_packets(destination_core, packet, packet); -} - -void qoriq_intercom_broadcast_packets(intercom_packet *first, intercom_packet *last); - -static inline void qoriq_intercom_broadcast_packet(intercom_packet *packet) -{ - qoriq_intercom_broadcast_packets(packet, packet); -} - -void qoriq_intercom_send(int destination_core, intercom_type type, intercom_size size, const void *buf, size_t n); - -void qoriq_intercom_free_packet(intercom_packet *packet); - -intercom_packet *qoriq_intercom_clone_packet(const intercom_packet *packet); - -#ifdef RTEMS_MULTIPROCESSING - extern rtems_mpci_table qoriq_intercom_mpci; -#endif - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_QORIQ_INTERCOM_H */ diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/irq.h b/c/src/lib/libbsp/powerpc/qoriq/include/irq.h deleted file mode 100644 index e178057950..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/irq.h +++ /dev/null @@ -1,401 +0,0 @@ -/** - * @file - * - * @ingroup QorIQInterrupt - * - * @brief Interrupt API. - */ - -/* - * Copyright (c) 2010-2015 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_QORIQ_IRQ_H -#define LIBBSP_POWERPC_QORIQ_IRQ_H - -#include <bsp.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> -#include <rtems/score/processormask.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#ifdef QORIQ_IS_HYPERVISOR_GUEST - -#define BSP_INTERRUPT_VECTOR_MAX 1023 - -#else /* !QORIQ_IS_HYPERVISOR_GUEST */ - -#define QORIQ_IRQ_ERROR 0 - -#if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT) - -#define QORIQ_IRQ_PCI_EXPRESS_1 4 -#define QORIQ_IRQ_PCI_EXPRESS_2 5 -#define QORIQ_IRQ_PCI_EXPRESS_3 6 -#define QORIQ_IRQ_PCI_EXPRESS_4 7 -#define QORIQ_IRQ_PAMU 8 -#define QORIQ_IRQ_IFC 9 -#define QORIQ_IRQ_DMA_CHANNEL_1_1 12 -#define QORIQ_IRQ_DMA_CHANNEL_1_2 13 -#define QORIQ_IRQ_DMA_CHANNEL_1_3 14 -#define QORIQ_IRQ_DMA_CHANNEL_1_4 15 -#define QORIQ_IRQ_DMA_CHANNEL_2_1 16 -#define QORIQ_IRQ_DMA_CHANNEL_2_2 17 -#define QORIQ_IRQ_DMA_CHANNEL_2_3 18 -#define QORIQ_IRQ_DMA_CHANNEL_2_4 19 -#define QORIQ_IRQ_DUART_1 20 -#define QORIQ_IRQ_DUART_2 21 -#define QORIQ_IRQ_DUARL_I2C_1 22 -#define QORIQ_IRQ_DUARL_I2C_2 23 -#define QORIQ_IRQ_PCI_EXPRESS_1_INTA 24 -#define QORIQ_IRQ_PCI_EXPRESS_2_INTA 25 -#define QORIQ_IRQ_PCI_EXPRESS_3_INTA 26 -#define QORIQ_IRQ_PCI_EXPRESS_4_INTA 27 -#define QORIQ_IRQ_USB_1 28 -#define QORIQ_IRQ_USB_2 29 -#define QORIQ_IRQ_ESDHC 32 -#define QORIQ_IRQ_PERF_MON 36 -#define QORIQ_IRQ_ESPI 37 -#define QORIQ_IRQ_GPIO_2 38 -#define QORIQ_IRQ_GPIO_1 39 -#define QORIQ_IRQ_SATA_1 52 -#define QORIQ_IRQ_SATA_2 53 -#define QORIQ_IRQ_DMA_CHANNEL_1_5 60 -#define QORIQ_IRQ_DMA_CHANNEL_1_6 61 -#define QORIQ_IRQ_DMA_CHANNEL_1_7 62 -#define QORIQ_IRQ_DMA_CHANNEL_1_8 63 -#define QORIQ_IRQ_DMA_CHANNEL_2_5 64 -#define QORIQ_IRQ_DMA_CHANNEL_2_6 65 -#define QORIQ_IRQ_DMA_CHANNEL_2_7 66 -#define QORIQ_IRQ_DMA_CHANNEL_2_8 67 -#define QORIQ_IRQ_EVENT_PROC_UNIT_1 68 -#define QORIQ_IRQ_EVENT_PROC_UNIT_2 69 -#define QORIQ_IRQ_GPIO_3 70 -#define QORIQ_IRQ_GPIO_4 71 -#define QORIQ_IRQ_SEC_5_2_JOB_QUEUE_1 72 -#define QORIQ_IRQ_SEC_5_2_JOB_QUEUE_2 73 -#define QORIQ_IRQ_SEC_5_2_JOB_QUEUE_3 74 -#define QORIQ_IRQ_SEC_5_2_JOB_QUEUE_4 75 -#define QORIQ_IRQ_SEC_5_2_GLOBAL_ERROR 76 -#define QORIQ_IRQ_SEC_MON 77 -#define QORIQ_IRQ_EVENT_PROC_UNIT_3 78 -#define QORIQ_IRQ_EVENT_PROC_UNIT_4 79 -#define QORIQ_IRQ_FRAME_MGR 80 -#define QORIQ_IRQ_MDIO_1 84 -#define QORIQ_IRQ_MDIO_2 85 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_0 88 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_0 89 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_1 90 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_1 91 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_2 92 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_2 93 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_3 94 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_3 95 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_4 96 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_4 97 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_5 98 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_5 99 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_6 100 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_6 101 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_7 102 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_7 103 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_8 104 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_8 105 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_9 106 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_9 107 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_10 109 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_10 109 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_11 110 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_11 111 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_12 112 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_12 113 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_13 114 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_13 115 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_14 116 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_14 117 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_15 118 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_15 119 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_16 120 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_16 121 -#define QORIQ_IRQ_QUEUE_MGR_PORTAL_17 122 -#define QORIQ_IRQ_BUFFER_MGR_PORTAL_17 123 -#define QORIQ_IRQ_DMA_CHANNEL_3_1 240 -#define QORIQ_IRQ_DMA_CHANNEL_3_2 241 -#define QORIQ_IRQ_DMA_CHANNEL_3_3 242 -#define QORIQ_IRQ_DMA_CHANNEL_3_4 243 -#define QORIQ_IRQ_DMA_CHANNEL_3_5 244 -#define QORIQ_IRQ_DMA_CHANNEL_3_6 245 -#define QORIQ_IRQ_DMA_CHANNEL_3_7 246 -#define QORIQ_IRQ_DMA_CHANNEL_3_8 247 - -#define QORIQ_IRQ_EXT_BASE 256 - -#else /* QORIQ_CHIP_VARIANT */ - -/** - * @defgroup QoriqInterruptP1020 QorIQ - P1020 Internal Interrupt Sources - * - * @ingroup QorIQInterrupt - * - * @brief P1020 internal interrupt sources. - * - * @{ - */ - -#define QORIQ_IRQ_ETSEC_TX_1_GROUP_1 1 -#define QORIQ_IRQ_ETSEC_RX_1_GROUP_1 2 -#define QORIQ_IRQ_ETSEC_ER_1_GROUP_1 8 -#define QORIQ_IRQ_ETSEC_TX_3_GROUP_1 9 -#define QORIQ_IRQ_ETSEC_RX_3_GROUP_1 10 -#define QORIQ_IRQ_ETSEC_ER_3_GROUP_1 11 -#define QORIQ_IRQ_ETSEC_TX_2_GROUP_1 35 -#define QORIQ_IRQ_ETSEC_RX_2_GROUP_1 36 -#define QORIQ_IRQ_TDM 46 -#define QORIQ_IRQ_TDM_ERROR 47 -#define QORIQ_IRQ_ETSEC_ER_2_GROUP_1 51 - -/** @} */ - -/** - * @defgroup QoriqInterruptP2020 QorIQ - P2020 Internal Interrupt Sources - * - * @ingroup QorIQInterrupt - * - * @brief P2020 internal interrupt sources. - * - * @{ - */ - -#define QORIQ_IRQ_L2_CACHE 0 -#define QORIQ_IRQ_ECM 1 -#define QORIQ_IRQ_DDR_CONTROLLER 2 -#define QORIQ_IRQ_PCI_EXPRESS_3 8 -#define QORIQ_IRQ_PCI_EXPRESS_2 9 -#define QORIQ_IRQ_PCI_EXPRESS_1 10 -#define QORIQ_IRQ_SRIO_ERR_WRT_1_2 32 -#define QORIQ_IRQ_SRIO_OUT_DOORBELL_1 33 -#define QORIQ_IRQ_SRIO_IN_DOORBELL_1 34 -#define QORIQ_IRQ_SRIO_OUT_MSG_1 37 -#define QORIQ_IRQ_SRIO_IN_MSG_1 38 -#define QORIQ_IRQ_SRIO_OUT_MSG_2 39 -#define QORIQ_IRQ_SRIO_IN_MSG_2 40 - -/** @} */ - -/** - * @defgroup QoriqInterruptAll QorIQ - Internal Interrupt Sources - * - * @ingroup QorIQInterrupt - * - * @brief Internal interrupt sources. - * - * @{ - */ - -#define QORIQ_IRQ_ELBC 3 -#define QORIQ_IRQ_DMA_CHANNEL_1_1 4 -#define QORIQ_IRQ_DMA_CHANNEL_2_1 5 -#define QORIQ_IRQ_DMA_CHANNEL_3_1 6 -#define QORIQ_IRQ_DMA_CHANNEL_4_1 7 -#define QORIQ_IRQ_USB_1 12 -#define QORIQ_IRQ_ETSEC_TX_1 13 -#define QORIQ_IRQ_ETSEC_RX_1 14 -#define QORIQ_IRQ_ETSEC_TX_3 15 -#define QORIQ_IRQ_ETSEC_RX_3 16 -#define QORIQ_IRQ_ETSEC_ER_3 17 -#define QORIQ_IRQ_ETSEC_ER_1 18 -#define QORIQ_IRQ_ETSEC_TX_2 19 -#define QORIQ_IRQ_ETSEC_RX_2 20 -#define QORIQ_IRQ_ETSEC_ER_2 24 -#define QORIQ_IRQ_DUART_1 26 -#define QORIQ_IRQ_I2C 27 -#define QORIQ_IRQ_PERFORMANCE_MONITOR 28 -#define QORIQ_IRQ_SECURITY_1 29 -#define QORIQ_IRQ_USB_2 30 -#define QORIQ_IRQ_GPIO 31 -#define QORIQ_IRQ_SECURITY_2 42 -#define QORIQ_IRQ_ESPI 43 -#define QORIQ_IRQ_ETSEC_IEEE_1588_1 52 -#define QORIQ_IRQ_ETSEC_IEEE_1588_2 53 -#define QORIQ_IRQ_ETSEC_IEEE_1588_3 54 -#define QORIQ_IRQ_ESDHC 56 -#define QORIQ_IRQ_DMA_CHANNEL_1_2 60 -#define QORIQ_IRQ_DMA_CHANNEL_2_2 61 -#define QORIQ_IRQ_DMA_CHANNEL_3_2 62 -#define QORIQ_IRQ_DMA_CHANNEL_4_2 63 - -/** @} */ - -#define QORIQ_IRQ_EXT_BASE 64 - -#endif /* QORIQ_CHIP_VARIANT */ - -/** - * @defgroup QoriqInterruptExternal QorIQ - External Interrupt Sources - * - * @ingroup QorIQInterrupt - * - * @brief External interrupt sources. - * - * @{ - */ - -#define QORIQ_IRQ_EXT_0 (QORIQ_IRQ_EXT_BASE + 0) -#define QORIQ_IRQ_EXT_1 (QORIQ_IRQ_EXT_BASE + 1) -#define QORIQ_IRQ_EXT_2 (QORIQ_IRQ_EXT_BASE + 2) -#define QORIQ_IRQ_EXT_3 (QORIQ_IRQ_EXT_BASE + 3) -#define QORIQ_IRQ_EXT_4 (QORIQ_IRQ_EXT_BASE + 4) -#define QORIQ_IRQ_EXT_5 (QORIQ_IRQ_EXT_BASE + 5) -#define QORIQ_IRQ_EXT_6 (QORIQ_IRQ_EXT_BASE + 6) -#define QORIQ_IRQ_EXT_7 (QORIQ_IRQ_EXT_BASE + 7) -#define QORIQ_IRQ_EXT_8 (QORIQ_IRQ_EXT_BASE + 8) -#define QORIQ_IRQ_EXT_9 (QORIQ_IRQ_EXT_BASE + 9) -#define QORIQ_IRQ_EXT_10 (QORIQ_IRQ_EXT_BASE + 10) -#define QORIQ_IRQ_EXT_11 (QORIQ_IRQ_EXT_BASE + 11) - -/** @} */ - -/** - * @defgroup QoriqInterruptIPI QorIQ - Interprocessor Interrupts - * - * @ingroup QorIQInterrupt - * - * @brief Interprocessor interrupts. - * - * @{ - */ - -#define QORIQ_IRQ_IPI_BASE (QORIQ_IRQ_EXT_11 + 1) -#define QORIQ_IRQ_IPI_0 (QORIQ_IRQ_IPI_BASE + 0) -#define QORIQ_IRQ_IPI_1 (QORIQ_IRQ_IPI_BASE + 1) -#define QORIQ_IRQ_IPI_2 (QORIQ_IRQ_IPI_BASE + 2) -#define QORIQ_IRQ_IPI_3 (QORIQ_IRQ_IPI_BASE + 3) - -/** @} */ - -/** - * @defgroup QoriqInterruptIPI QorIQ - Message Interrupts - * - * @ingroup QorIQInterrupt - * - * @brief Message interrupts. - * - * @{ - */ - -#define QORIQ_IRQ_MI_BASE (QORIQ_IRQ_IPI_3 + 1) -#define QORIQ_IRQ_MI_0 (QORIQ_IRQ_MI_BASE + 0) -#define QORIQ_IRQ_MI_1 (QORIQ_IRQ_MI_BASE + 1) -#define QORIQ_IRQ_MI_2 (QORIQ_IRQ_MI_BASE + 2) -#define QORIQ_IRQ_MI_3 (QORIQ_IRQ_MI_BASE + 3) -#define QORIQ_IRQ_MI_4 (QORIQ_IRQ_MI_BASE + 4) -#define QORIQ_IRQ_MI_5 (QORIQ_IRQ_MI_BASE + 5) -#define QORIQ_IRQ_MI_6 (QORIQ_IRQ_MI_BASE + 6) -#define QORIQ_IRQ_MI_7 (QORIQ_IRQ_MI_BASE + 7) - -/** @} */ - -/** - * @defgroup QoriqInterruptIPI QorIQ - Shared Message Signaled Interrupts - * - * @ingroup QorIQInterrupt - * - * @brief Shared message signaled interrupts. - * - * @{ - */ - -#define QORIQ_IRQ_MSI_BASE (QORIQ_IRQ_MI_7 + 1) -#define QORIQ_IRQ_MSI_0 (QORIQ_IRQ_MSI_BASE + 0) -#define QORIQ_IRQ_MSI_1 (QORIQ_IRQ_MSI_BASE + 1) -#define QORIQ_IRQ_MSI_2 (QORIQ_IRQ_MSI_BASE + 2) -#define QORIQ_IRQ_MSI_3 (QORIQ_IRQ_MSI_BASE + 3) -#define QORIQ_IRQ_MSI_4 (QORIQ_IRQ_MSI_BASE + 4) -#define QORIQ_IRQ_MSI_5 (QORIQ_IRQ_MSI_BASE + 5) -#define QORIQ_IRQ_MSI_6 (QORIQ_IRQ_MSI_BASE + 6) -#define QORIQ_IRQ_MSI_7 (QORIQ_IRQ_MSI_BASE + 7) - -/** @} */ - -/** - * @defgroup QoriqInterruptIPI QorIQ - Global Timer Interrupts - * - * @ingroup QorIQInterrupt - * - * @brief Global Timer interrupts. - * - * @{ - */ - -#define QORIQ_IRQ_GT_BASE (QORIQ_IRQ_MSI_7 + 1) -#define QORIQ_IRQ_GT_A_0 (QORIQ_IRQ_GT_BASE + 0) -#define QORIQ_IRQ_GT_A_1 (QORIQ_IRQ_GT_BASE + 1) -#define QORIQ_IRQ_GT_A_2 (QORIQ_IRQ_GT_BASE + 2) -#define QORIQ_IRQ_GT_A_3 (QORIQ_IRQ_GT_BASE + 3) -#define QORIQ_IRQ_GT_B_0 (QORIQ_IRQ_GT_BASE + 4) -#define QORIQ_IRQ_GT_B_1 (QORIQ_IRQ_GT_BASE + 5) -#define QORIQ_IRQ_GT_B_2 (QORIQ_IRQ_GT_BASE + 6) -#define QORIQ_IRQ_GT_B_3 (QORIQ_IRQ_GT_BASE + 7) - -#define BSP_INTERRUPT_VECTOR_MAX QORIQ_IRQ_GT_B_3 - -/** @} */ - -#endif /* QORIQ_IS_HYPERVISOR_GUEST */ - -/** - * @defgroup QorIQInterrupt QorIQ - Interrupt Support - * - * @ingroup QorIQ - * - * @brief Interrupt support. - * - * @{ - */ - -#define BSP_INTERRUPT_VECTOR_MIN 0 - -#define QORIQ_PIC_PRIORITY_LOWEST 1 -#define QORIQ_PIC_PRIORITY_HIGHEST 15 -#define QORIQ_PIC_PRIORITY_DISABLED 0 -#define QORIQ_PIC_PRIORITY_INVALID (QORIQ_PIC_PRIORITY_HIGHEST + 1) -#define QORIQ_PIC_PRIORITY_DEFAULT (QORIQ_PIC_PRIORITY_LOWEST + 1) -#define QORIQ_PIC_PRIORITY_IS_VALID(p) \ - ((p) >= QORIQ_PIC_PRIORITY_DISABLED && (p) <= QORIQ_PIC_PRIORITY_HIGHEST) - -rtems_status_code qoriq_pic_set_priority( - rtems_vector_number vector, - int new_priority, - int *old_priority -); - -void bsp_interrupt_set_affinity( - rtems_vector_number vector, - const Processor_mask *affinity -); - -void bsp_interrupt_get_affinity( - rtems_vector_number vector, - Processor_mask *affinity -); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_QORIQ_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/mmu.h b/c/src/lib/libbsp/powerpc/qoriq/include/mmu.h deleted file mode 100644 index 4cacb1b375..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/mmu.h +++ /dev/null @@ -1,101 +0,0 @@ -/** - * @file - * - * @ingroup QorIQMMU - * - * @brief MMU API. - */ - -/* - * Copyright (c) 2011-2015 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_QORIQ_MMU_H -#define LIBBSP_POWERPC_QORIQ_MMU_H - -#include <stdint.h> -#include <stdbool.h> - -#include <bspopts.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup QorIQMMU QorIQ - MMU Support - * - * @ingroup QorIQ - * - * @brief MMU support. - * - * @{ - */ - -#define QORIQ_MMU_MIN_POWER 12 -#define QORIQ_MMU_MAX_POWER 30 -#define QORIQ_MMU_POWER_STEP 2 - -typedef struct { - uintptr_t begin; - uintptr_t last; - uint32_t mas1; - uint32_t mas2; - uint32_t mas3; - uint32_t mas7; -} qoriq_mmu_entry; - -typedef struct { - int count; - qoriq_mmu_entry entries [QORIQ_TLB1_ENTRY_COUNT]; -} qoriq_mmu_context; - -void qoriq_mmu_context_init(qoriq_mmu_context *self); - -bool qoriq_mmu_add( - qoriq_mmu_context *self, - uintptr_t begin, - uintptr_t last, - uint32_t mas1, - uint32_t mas2, - uint32_t mas3, - uint32_t mas7 -); - -void qoriq_mmu_partition(qoriq_mmu_context *self, int max_count); - -void qoriq_mmu_write_to_tlb1(qoriq_mmu_context *self, int first_tlb); - -void qoriq_mmu_change_perm(uint32_t test, uint32_t set, uint32_t clear); - -void qoriq_mmu_config(bool boot_processor, int first_tlb, int scratch_tlb); - -void qoriq_tlb1_write( - int esel, - uint32_t mas1, - uint32_t mas2, - uint32_t mas3, - uint32_t mas7, - uintptr_t ea, - int tsize -); - -void qoriq_tlb1_invalidate(int esel); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_QORIQ_MMU_H */ diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/qoriq.h b/c/src/lib/libbsp/powerpc/qoriq/include/qoriq.h deleted file mode 100644 index 2d28d0aec7..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/qoriq.h +++ /dev/null @@ -1,559 +0,0 @@ -/** - * @file - * - * @ingroup QorIQ - * - * @brief QorIQ Configuration, Control and Status Registers. - */ - -/* - * Copyright (c) 2010-2015 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_QORIQ_QORIQ_H -#define LIBBSP_POWERPC_QORIQ_QORIQ_H - -#include <bsp.h> -#include <bsp/tsec.h> -#include <bsp/utility.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define QORIQ_FILL(a, b, s) uint8_t reserved_ ## b [b - a - sizeof(s)] -#define QORIQ_RESERVE(a, b) uint8_t reserved_ ## b [b - a] - -typedef struct { - uint32_t reg; - QORIQ_FILL(0x00000, 0x00010, uint32_t); -} qoriq_pic_reg; - -typedef struct { - uint32_t ccr; - QORIQ_FILL(0x00000, 0x00010, uint32_t); - uint32_t bcr; - QORIQ_FILL(0x00010, 0x00020, uint32_t); - uint32_t vpr; - QORIQ_FILL(0x00020, 0x00030, uint32_t); - uint32_t dr; - QORIQ_FILL(0x00030, 0x00040, uint32_t); -} qoriq_pic_global_timer; - -#define GTCCR_TOG BSP_BBIT32(0) -#define GTCCR_COUNT_GET(reg) BSP_BFLD32GET(reg, 1, 31) - -#define GTBCR_CI BSP_BBIT32(0) -#define GTBCR_COUNT(val) BSP_BFLD32(val, 1, 31) -#define GTBCR_COUNT_GET(reg) BSP_BFLD32GET(reg, 1, 31) -#define GTBCR_COUNT_SET(reg, val) BSP_BFLD32SET(reg, val, 1, 31) - -typedef struct { - uint32_t misc; - QORIQ_FILL(0x00000, 0x00010, uint32_t); - uint32_t internal [2]; - QORIQ_FILL(0x00010, 0x00020, uint32_t [2]); -} qoriq_pic_bit_field; - -typedef struct { - uint32_t vpr; - QORIQ_FILL(0x00000, 0x00010, uint32_t); - uint32_t dr; - QORIQ_FILL(0x00010, 0x00020, uint32_t); -} qoriq_pic_src_cfg; - -typedef struct { - QORIQ_RESERVE(0x00000, 0x00040); - qoriq_pic_reg ipidr [4]; - uint32_t ctpr; - QORIQ_FILL(0x00080, 0x00090, uint32_t); - uint32_t whoami; - QORIQ_FILL(0x00090, 0x000a0, uint32_t); - uint32_t iack; - QORIQ_FILL(0x000a0, 0x000b0, uint32_t); - uint32_t eoi; - QORIQ_FILL(0x000b0, 0x01000, uint32_t); -} qoriq_pic_per_cpu; - -typedef struct { - uint32_t brr1; - QORIQ_FILL(0x00000, 0x00010, uint32_t); - uint32_t brr2; - QORIQ_FILL(0x00010, 0x00040, uint32_t); - qoriq_pic_reg ipidr [4]; - uint32_t ctpr; - QORIQ_FILL(0x00080, 0x00090, uint32_t); - uint32_t whoami; - QORIQ_FILL(0x00090, 0x000a0, uint32_t); - uint32_t iack; - QORIQ_FILL(0x000a0, 0x000b0, uint32_t); - uint32_t eoi; - QORIQ_FILL(0x000b0, 0x01000, uint32_t); - uint32_t frr; - QORIQ_FILL(0x01000, 0x01020, uint32_t); - uint32_t gcr; - QORIQ_FILL(0x01020, 0x01080, uint32_t); - uint32_t vir; - QORIQ_FILL(0x01080, 0x01090, uint32_t); - uint32_t pir; - QORIQ_FILL(0x01090, 0x010a0, uint32_t); - qoriq_pic_reg ipivpr [4]; - uint32_t svr; - QORIQ_FILL(0x010e0, 0x010f0, uint32_t); - uint32_t tfrra; - QORIQ_FILL(0x010f0, 0x01100, uint32_t); - qoriq_pic_global_timer gta [4]; - QORIQ_RESERVE(0x01200, 0x01300); - uint32_t tcra; - QORIQ_FILL(0x01300, 0x01308, uint32_t); - uint32_t erqsr; - QORIQ_FILL(0x01308, 0x01310, uint32_t); - qoriq_pic_bit_field irqsr; - qoriq_pic_bit_field cisr; - qoriq_pic_bit_field pm [4]; - QORIQ_RESERVE(0x013d0, 0x01400); - qoriq_pic_reg msgr03 [4]; - QORIQ_RESERVE(0x01440, 0x01500); - uint32_t mer03; - QORIQ_FILL(0x01500, 0x01510, uint32_t); - uint32_t msr03; - QORIQ_FILL(0x01510, 0x01600, uint32_t); - qoriq_pic_reg msir [8]; - QORIQ_RESERVE(0x01680, 0x01720); - uint32_t msisr; - QORIQ_FILL(0x01720, 0x01740, uint32_t); - uint32_t msiir; - QORIQ_FILL(0x01740, 0x020f0, uint32_t); - uint32_t tfrrb; - QORIQ_FILL(0x020f0, 0x02100, uint32_t); - qoriq_pic_global_timer gtb [4]; - QORIQ_RESERVE(0x02200, 0x02300); - uint32_t tcrb; - QORIQ_FILL(0x02300, 0x02400, uint32_t); - qoriq_pic_reg msgr47 [4]; - QORIQ_RESERVE(0x02440, 0x02500); - uint32_t mer47; - QORIQ_FILL(0x02500, 0x02510, uint32_t); - uint32_t msr47; - QORIQ_FILL(0x02510, 0x10000, uint32_t); - qoriq_pic_src_cfg ei [12]; - QORIQ_RESERVE(0x10180, 0x10200); - qoriq_pic_src_cfg ii_0 [160]; - qoriq_pic_src_cfg mi [8]; - QORIQ_RESERVE(0x11700, 0x11c00); - qoriq_pic_src_cfg msi [8]; - QORIQ_RESERVE(0x11d00, 0x13000); - qoriq_pic_src_cfg ii_1 [96]; - QORIQ_RESERVE(0x13c00, 0x20000); - qoriq_pic_per_cpu per_cpu [2]; -} qoriq_pic; - -#define GTTCR_ROVR(val) BSP_BFLD32(val, 5, 7) -#define GTTCR_ROVR_GET(reg) BSP_BFLD32GET(reg, 5, 7) -#define GTTCR_ROVR_SET(reg, val) BSP_BFLD32SET(reg, val, 5, 7) -#define GTTCR_RTM BSP_BBIT32(15) -#define GTTCR_CLKR(val) BSP_BFLD32(val, 22, 23) -#define GTTCR_CLKR_GET(reg) BSP_BFLD32GET(reg, 22, 23) -#define GTTCR_CLKR_SET(reg, val) BSP_BFLD32SET(reg, val, 22, 23) -#define GTTCR_CASC(val) BSP_BFLD32(val, 29, 31) -#define GTTCR_CASC_GET(reg) BSP_BFLD32GET(reg, 29, 31) -#define GTTCR_CASC_SET(reg, val) BSP_BFLD32SET(reg, val, 29, 31) - -typedef struct { -} qoriq_uart; - -typedef struct { - uint32_t gpdir; - uint32_t gpodr; - uint32_t gpdat; - uint32_t gpier; - uint32_t gpimr; - uint32_t gpicr; - uint32_t gpibe; - QORIQ_RESERVE(0x001c, 0x1000); -} qoriq_gpio; - -typedef struct { - QORIQ_RESERVE(0x000, 0x100); - uint16_t caplength; - uint16_t hciversion; - uint32_t hcsparams; - uint32_t hccparams; - QORIQ_RESERVE(0x10c, 0x120); - uint32_t dciversion; - uint32_t dccparams; - QORIQ_RESERVE(0x128, 0x140); - uint32_t usbcmd; - uint32_t usbsts; - uint32_t usbintr; - uint32_t frindex; - QORIQ_RESERVE(0x150, 0x154); - union { - uint32_t periodiclistbase; - uint32_t deviceaddr; - } perbase_devaddr; - union { - uint32_t asynclistaddr; - uint32_t addr; - } async_addr; - QORIQ_RESERVE(0x15c, 0x160); - uint32_t burstsize; - uint32_t txfilltuning; - QORIQ_RESERVE(0x168, 0x170); - uint32_t viewport; - QORIQ_RESERVE(0x174, 0x180); - uint32_t configflag; - uint32_t portsc1; - QORIQ_RESERVE(0x188, 0x1a8); - uint32_t usbmode; - uint32_t endptsetupstat; - uint32_t endpointprime; - uint32_t endptflush; - uint32_t endptstatus; - uint32_t endptcomplete; - uint32_t endptctrl[6]; - QORIQ_RESERVE(0x1d8, 0x400); - uint32_t snoop1; - uint32_t snoop2; - uint32_t age_cnt_thresh; - uint32_t pri_ctrl; - uint32_t si_ctrl; - QORIQ_RESERVE(0x414, 0x500); - uint32_t control; -} qoriq_usb; - -typedef struct { - uint32_t dsaddr; - uint32_t blkattr; - uint32_t cmdarg; - uint32_t xfertyp; - uint32_t cmdrsp0; - uint32_t cmdrsp1; - uint32_t cmdrsp2; - uint32_t cmdrsp3; - uint32_t datport; - uint32_t prsstat; - uint32_t proctl; - uint32_t sysctl; - uint32_t irqstat; - uint32_t irqstaten; - uint32_t irqsigen; - uint32_t autoc12err; - uint32_t hostcapblt; - uint32_t wml; - QORIQ_FILL(0x00044, 0x00050, uint32_t); - uint32_t fevt; - QORIQ_FILL(0x00050, 0x000fc, uint32_t); - uint32_t hostver; - QORIQ_FILL(0x000fc, 0x0040c, uint32_t); - uint32_t dcr; -} qoriq_esdhc; - -#if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT) - -typedef struct { - uint32_t ccsrbarh; - uint32_t ccsrbarl; - uint32_t ccsrar; - uint32_t altcbarh; - uint32_t altcbarl; - uint32_t altcar; - uint32_t bstrh; - uint32_t bstrl; - uint32_t bstar; -} qoriq_lcc; - -#define LCC_BSTAR_EN BSP_BBIT32(0) - -typedef struct { - uint32_t lawbarh; - uint32_t lawbarl; - uint32_t lawar; - uint32_t reserved_0xc; -} qoriq_law; - -typedef struct { - uint32_t reserved_0x0[640]; - uint32_t qmbm_warmrst; -} qoriq_dcfg; - -typedef struct { - QORIQ_RESERVE(0x0000, 0x1000); -} qoriq_bman; - -typedef struct { - QORIQ_RESERVE(0x0000, 0x1000); -} qoriq_qman; - -typedef struct { - QORIQ_RESERVE(0x000000, 0x100000); -} qoriq_fman; - -typedef struct { - qoriq_lcc lcc; - QORIQ_FILL(0x000000, 0x000c00, qoriq_lcc); - qoriq_law law [32]; - QORIQ_FILL(0x000c00, 0x001000, qoriq_law [32]); - QORIQ_RESERVE(0x001000, 0x040000); - qoriq_pic pic; - QORIQ_FILL(0x040000, 0x070000, qoriq_pic); - QORIQ_RESERVE(0x070000, 0x0e0000); - qoriq_dcfg dcfg; - QORIQ_FILL(0x0e0000, 0x0e1000, qoriq_dcfg); - QORIQ_RESERVE(0x0e1000, 0x114000); - qoriq_esdhc esdhc; - QORIQ_FILL(0x114000, 0x115000, qoriq_esdhc); - QORIQ_RESERVE(0x115000, 0x11c500); - qoriq_uart uart_0; - QORIQ_FILL(0x11c500, 0x11c600, qoriq_uart); - qoriq_uart uart_1; - QORIQ_FILL(0x11c600, 0x11d500, qoriq_uart); - qoriq_uart uart_2; - QORIQ_FILL(0x11d500, 0x11d600, qoriq_uart); - qoriq_uart uart_3; - QORIQ_FILL(0x11d600, 0x11e000, qoriq_uart); - QORIQ_RESERVE(0x11e000, 0x130000); - qoriq_gpio gpio[4]; - QORIQ_RESERVE(0x134000, 0x210000); - qoriq_usb usb_1; - QORIQ_FILL(0x210000, 0x211000, qoriq_usb); - QORIQ_RESERVE(0x211000, 0x318000); - qoriq_qman qman; - QORIQ_RESERVE(0x319000, 0x31a000); - qoriq_bman bman; - QORIQ_RESERVE(0x31b000, 0x400000); - qoriq_fman fman[2]; - QORIQ_RESERVE(0x600000, 0x2000000); -} qoriq_ccsr; - -#else /* QORIQ_CHIP_VARIANT */ - -typedef struct { - uint32_t ccsrbar; - uint32_t reserved_0; - uint32_t altcbar; - uint32_t reserved_1; - uint32_t altcar; - uint32_t reserved_2 [3]; - uint32_t bptr; -} qoriq_lcc; - -#define CCSRBAR_BASE_ADDR(val) BSP_BFLD32(val, 8, 23) -#define CCSRBAR_BASE_ADDR_GET(reg) BSP_BFLD32GET(reg, 8, 23) -#define CCSRBAR_BASE_ADDR_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 23) - -#define ALTCBAR_BASE_ADDR(val) BSP_BFLD32(val, 8, 23) -#define ALTCBAR_BASE_ADDR_GET(reg) BSP_BFLD32GET(reg, 8, 23) -#define ALTCBAR_BASE_ADDR_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 23) - -#define ALTCAR_EN BSP_BBIT32(0) -#define ALTCAR_TRGT_ID(val) BSP_BFLD32(val, 8, 11) -#define ALTCAR_TRGT_ID_GET(reg) BSP_BFLD32GET(reg, 8, 11) -#define ALTCAR_TRGT_ID_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 11) - -#define BPTR_EN BSP_BBIT32(0) -#define BPTR_BOOT_PAGE(val) BSP_BFLD32(val, 8, 31) -#define BPTR_BOOT_PAGE_GET(reg) BSP_BFLD32GET(reg, 8, 31) -#define BPTR_BOOT_PAGE_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 31) - -typedef struct { - uint32_t bar; - uint32_t reserved_0; - uint32_t ar; - uint32_t reserved_1 [5]; -} qoriq_law; - -#define LAWBAR_BASE_ADDR(val) BSP_BFLD32(val, 8, 31) -#define LAWBAR_BASE_ADDR_GET(reg) BSP_BFLD32GET(reg, 8, 31) -#define LAWBAR_BASE_ADDR_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 31) - -#define LAWAR_EN BSP_BBIT32(0) -#define LAWAR_TRGT(val) BSP_BFLD32(val, 8, 11) -#define LAWAR_TRGT_GET(reg) BSP_BFLD32GET(reg, 8, 11) -#define LAWAR_TRGT_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 11) -#define LAWAR_SIZE(val) BSP_BFLD32(val, 26, 31) -#define LAWAR_SIZE_GET(reg) BSP_BFLD32GET(reg, 26, 31) -#define LAWAR_SIZE_SET(reg, val) BSP_BFLD32SET(reg, val, 26, 31) - -typedef struct { -} qoriq_ecm; - -typedef struct { -} qoriq_ddr_controller; - -typedef struct { -} qoriq_i2c; - -typedef struct { -} qoriq_local_bus; - -typedef struct { -} qoriq_spi; - -typedef struct { -} qoriq_pci_express; - -typedef struct { -} qoriq_tdm; - -typedef struct { -} qoriq_l2_cache; - -typedef struct { -} qoriq_dma; - -typedef struct { -} qoriq_tdm_dma; - -typedef struct { -} qoriq_sec; - -typedef struct { -} qoriq_serial_rapid_io; - -typedef struct { -} qoriq_global_utilities; - -typedef struct { -} qoriq_performance_monitor; - -typedef struct { -} qoriq_debug_watchpoint; - -typedef struct { -} qoriq_serdes; - -typedef struct { -} qoriq_boot_rom; - -typedef struct { - qoriq_lcc lcc; - QORIQ_FILL(0x00000, 0x00c08, qoriq_lcc); - qoriq_law law [12]; - QORIQ_FILL(0x00c08, 0x01000, qoriq_law [12]); - qoriq_ecm ecm; - QORIQ_FILL(0x01000, 0x02000, qoriq_ecm); - qoriq_ddr_controller ddr_controller; - QORIQ_FILL(0x02000, 0x03000, qoriq_ddr_controller); - qoriq_i2c i2c; - QORIQ_FILL(0x03000, 0x04000, qoriq_i2c); - QORIQ_RESERVE(0x04000, 0x04500); - qoriq_uart uart_0; - QORIQ_FILL(0x04500, 0x04600, qoriq_uart); - qoriq_uart uart_1; - QORIQ_FILL(0x04600, 0x04700, qoriq_uart); - QORIQ_RESERVE(0x04700, 0x05000); - qoriq_local_bus local_bus; - QORIQ_FILL(0x05000, 0x06000, qoriq_local_bus); - qoriq_spi spi; - QORIQ_FILL(0x06000, 0x07000, qoriq_spi); - QORIQ_RESERVE(0x07000, 0x08000); - qoriq_pci_express pci_express_3; - QORIQ_FILL(0x08000, 0x09000, qoriq_pci_express); - qoriq_pci_express pci_express_2; - QORIQ_FILL(0x09000, 0x0a000, qoriq_pci_express); - qoriq_pci_express pci_express_1; - QORIQ_FILL(0x0a000, 0x0b000, qoriq_pci_express); - QORIQ_RESERVE(0x0b000, 0x0c000); - qoriq_dma dma_2; - QORIQ_FILL(0x0c000, 0x0d000, qoriq_dma); - QORIQ_RESERVE(0x0d000, 0x0f000); - qoriq_gpio gpio; - QORIQ_RESERVE(0x10000, 0x16000); - qoriq_tdm tdm; - QORIQ_FILL(0x16000, 0x17000, qoriq_tdm); - QORIQ_RESERVE(0x17000, 0x20000); - qoriq_l2_cache l2_cache; - QORIQ_FILL(0x20000, 0x21000, qoriq_l2_cache); - qoriq_dma dma_1; - QORIQ_FILL(0x21000, 0x22000, qoriq_dma); - qoriq_usb usb_1; - QORIQ_FILL(0x22000, 0x23000, qoriq_usb); - qoriq_usb usb_2; - QORIQ_FILL(0x23000, 0x24000, qoriq_usb); - tsec_registers tsec_1; - QORIQ_FILL(0x24000, 0x25000, tsec_registers); - tsec_registers tsec_2; - QORIQ_FILL(0x25000, 0x26000, tsec_registers); - tsec_registers tsec_3; - QORIQ_FILL(0x26000, 0x27000, tsec_registers); - QORIQ_RESERVE(0x27000, 0x2c000); - qoriq_tdm_dma tdm_dma; - QORIQ_FILL(0x2c000, 0x2d000, qoriq_tdm_dma); - QORIQ_RESERVE(0x2d000, 0x2e000); - qoriq_esdhc esdhc; - QORIQ_FILL(0x2e000, 0x2f000, qoriq_esdhc); - QORIQ_RESERVE(0x2f000, 0x30000); - qoriq_sec sec; - QORIQ_FILL(0x30000, 0x31000, qoriq_sec); - QORIQ_RESERVE(0x31000, 0x40000); - qoriq_pic pic; - QORIQ_FILL(0x40000, 0x80000, qoriq_pic); - QORIQ_RESERVE(0x80000, 0xb0000); - tsec_registers tsec_1_group_0; - QORIQ_FILL(0xb0000, 0xb1000, tsec_registers); - tsec_registers tsec_2_group_0; - QORIQ_FILL(0xb1000, 0xb2000, tsec_registers); - tsec_registers tsec_3_group_0; - QORIQ_FILL(0xb2000, 0xb3000, tsec_registers); - QORIQ_RESERVE(0xb3000, 0xb4000); - tsec_registers tsec_1_group_1; - QORIQ_FILL(0xb4000, 0xb5000, tsec_registers); - tsec_registers tsec_2_group_1; - QORIQ_FILL(0xb5000, 0xb6000, tsec_registers); - tsec_registers tsec_3_group_1; - QORIQ_FILL(0xb6000, 0xb7000, tsec_registers); - QORIQ_RESERVE(0xb7000, 0xc0000); - qoriq_serial_rapid_io serial_rapid_io; - QORIQ_FILL(0xc0000, 0xe0000, qoriq_serial_rapid_io); - qoriq_global_utilities global_utilities; - QORIQ_FILL(0xe0000, 0xe1000, qoriq_global_utilities); - qoriq_performance_monitor performance_monitor; - QORIQ_FILL(0xe1000, 0xe2000, qoriq_performance_monitor); - qoriq_debug_watchpoint debug_watchpoint; - QORIQ_FILL(0xe2000, 0xe3000, qoriq_debug_watchpoint); - qoriq_serdes serdes; - QORIQ_FILL(0xe3000, 0xe4000, qoriq_serdes); - QORIQ_RESERVE(0xe4000, 0xf0000); - qoriq_boot_rom boot_rom; - QORIQ_FILL(0xf0000, 0x100000, qoriq_boot_rom); -} qoriq_ccsr; - -#endif /* QORIQ_CHIP_VARIANT */ - -extern volatile qoriq_ccsr qoriq; - -#if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT) -extern uint8_t qoriq_bman_portal[2][16777216]; -extern uint8_t qoriq_qman_portal[2][16777216]; - -void qoriq_clear_ce_portal(void *base, size_t size); -void qoriq_clear_ci_portal(void *base, size_t size); -#endif - -static inline void qoriq_reset_qman_and_bman(void) -{ -#if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT) - qoriq.dcfg.qmbm_warmrst = 0x3; - - while ((qoriq.dcfg.qmbm_warmrst & 0x3) != 0) { - /* Wait for reset done */ - } -#endif -} - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_QORIQ_QORIQ_H */ diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/tm27.h b/c/src/lib/libbsp/powerpc/qoriq/include/tm27.h deleted file mode 100644 index 46264b7e67..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/tm27.h +++ /dev/null @@ -1,96 +0,0 @@ -/** - * @file - * - * @ingroup QorIQ - * - * @brief Support file for Timer Test 27. - */ - -/* - * Copyright (c) 2010-2015 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 - #error "This is an RTEMS internal file you must not include directly." -#endif /* _RTEMS_TMTEST27 */ - -#ifndef TMTESTS_TM27_H -#define TMTESTS_TM27_H - -#include <assert.h> - -#include <libcpu/powerpc-utility.h> - -#include <bsp/irq.h> -#include <bsp/qoriq.h> - -#define MUST_WAIT_FOR_INTERRUPT 1 - -#define IPI_INDEX_LOW 1 - -#define IPI_INDEX_HIGH 2 - -static void Install_tm27_vector(void (*handler)(rtems_vector_number)) -{ - rtems_status_code sc; - rtems_vector_number low = QORIQ_IRQ_IPI_0 + IPI_INDEX_LOW; - rtems_vector_number high = QORIQ_IRQ_IPI_0 + IPI_INDEX_HIGH; - - sc = rtems_interrupt_handler_install( - low, - "tm17 low", - RTEMS_INTERRUPT_UNIQUE, - (rtems_interrupt_handler) handler, - NULL - ); - assert(sc == RTEMS_SUCCESSFUL); - - sc = qoriq_pic_set_priority(low, 1, NULL); - assert(sc == RTEMS_SUCCESSFUL); - - sc = rtems_interrupt_handler_install( - high, - "tm17 high", - RTEMS_INTERRUPT_UNIQUE, - (rtems_interrupt_handler) handler, - NULL - ); - assert(sc == RTEMS_SUCCESSFUL); - - sc = qoriq_pic_set_priority(high, 2, NULL); - assert(sc == RTEMS_SUCCESSFUL); -} - -static void qoriq_tm27_cause(uint32_t ipi_index) -{ - uint32_t self = ppc_processor_id(); - - qoriq.pic.per_cpu[self].ipidr[ipi_index].reg = UINT32_C(1) << self; -} - -static void Cause_tm27_intr() -{ - qoriq_tm27_cause(IPI_INDEX_LOW); -} - -static void Clear_tm27_intr() -{ - /* Nothing to do */ -} - -static void Lower_tm27_intr(void) -{ - qoriq_tm27_cause(IPI_INDEX_HIGH); -} - -#endif /* TMTESTS_TM27_H */ diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/tsec-config.h b/c/src/lib/libbsp/powerpc/qoriq/include/tsec-config.h deleted file mode 100644 index b1a70e7486..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/tsec-config.h +++ /dev/null @@ -1,36 +0,0 @@ -/** - * @file - * - * @ingroup QorIQ - * - * @brief TSEC configuration. - */ - -/* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_QORIQ_TSEC_CONFIG_H -#define LIBBSP_POWERPC_QORIQ_TSEC_CONFIG_H - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define TSEC_COUNT 3 - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_QORIQ_TSEC_CONFIG_H */ diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/uapi/asm/epapr_hcalls.h b/c/src/lib/libbsp/powerpc/qoriq/include/uapi/asm/epapr_hcalls.h deleted file mode 100644 index b4504f3944..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/uapi/asm/epapr_hcalls.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * ePAPR hcall interface - * - * Copyright 2008-2011 Freescale Semiconductor, Inc. - * - * Author: Timur Tabi <timur@freescale.com> - * - * This file is provided under a dual BSD/GPL license. When using or - * redistributing this file, you may do so under either license. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _UAPI_ASM_POWERPC_EPAPR_HCALLS_H -#define _UAPI_ASM_POWERPC_EPAPR_HCALLS_H - -#define EV_BYTE_CHANNEL_SEND 1 -#define EV_BYTE_CHANNEL_RECEIVE 2 -#define EV_BYTE_CHANNEL_POLL 3 -#define EV_INT_SET_CONFIG 4 -#define EV_INT_GET_CONFIG 5 -#define EV_INT_SET_MASK 6 -#define EV_INT_GET_MASK 7 -#define EV_INT_IACK 9 -#define EV_INT_EOI 10 -#define EV_INT_SEND_IPI 11 -#define EV_INT_SET_TASK_PRIORITY 12 -#define EV_INT_GET_TASK_PRIORITY 13 -#define EV_DOORBELL_SEND 14 -#define EV_MSGSND 15 -#define EV_IDLE 16 - -/* vendor ID: epapr */ -#define EV_LOCAL_VENDOR_ID 0 /* for private use */ -#define EV_EPAPR_VENDOR_ID 1 -#define EV_FSL_VENDOR_ID 2 /* Freescale Semiconductor */ -#define EV_IBM_VENDOR_ID 3 /* IBM */ -#define EV_GHS_VENDOR_ID 4 /* Green Hills Software */ -#define EV_ENEA_VENDOR_ID 5 /* Enea */ -#define EV_WR_VENDOR_ID 6 /* Wind River Systems */ -#define EV_AMCC_VENDOR_ID 7 /* Applied Micro Circuits */ -#define EV_KVM_VENDOR_ID 42 /* KVM */ - -/* The max number of bytes that a byte channel can send or receive per call */ -#define EV_BYTE_CHANNEL_MAX_BYTES 16 - - -#define _EV_HCALL_TOKEN(id, num) (((id) << 16) | (num)) -#define EV_HCALL_TOKEN(hcall_num) _EV_HCALL_TOKEN(EV_EPAPR_VENDOR_ID, hcall_num) - -/* epapr return codes */ -#define EV_SUCCESS 0 -#define EV_EPERM 1 /* Operation not permitted */ -#define EV_ENOENT 2 /* Entry Not Found */ -#define EV_EIO 3 /* I/O error occurred */ -#define EV_EAGAIN 4 /* The operation had insufficient - * resources to complete and should be - * retried - */ -#define EV_ENOMEM 5 /* There was insufficient memory to - * complete the operation */ -#define EV_EFAULT 6 /* Bad guest address */ -#define EV_ENODEV 7 /* No such device */ -#define EV_EINVAL 8 /* An argument supplied to the hcall - was out of range or invalid */ -#define EV_INTERNAL 9 /* An internal error occurred */ -#define EV_CONFIG 10 /* A configuration error was detected */ -#define EV_INVALID_STATE 11 /* The object is in an invalid state */ -#define EV_UNIMPLEMENTED 12 /* Unimplemented hypercall */ -#define EV_BUFFER_OVERFLOW 13 /* Caller-supplied buffer too small */ - -#endif /* _UAPI_ASM_POWERPC_EPAPR_HCALLS_H */ diff --git a/c/src/lib/libbsp/powerpc/qoriq/include/uart-bridge.h b/c/src/lib/libbsp/powerpc/qoriq/include/uart-bridge.h deleted file mode 100644 index 97e6553b7c..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/include/uart-bridge.h +++ /dev/null @@ -1,72 +0,0 @@ -/** - * @file - * - * @ingroup QorIQUartBridge - * - * @brief UART to Intercom bridge API. - */ - -/* - * Copyright (c) 2011-2015 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_QORIQ_UART_BRIDGE_H -#define LIBBSP_POWERPC_QORIQ_UART_BRIDGE_H - -#include <rtems/termiostypes.h> - -#include <bsp/intercom.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup QorIQUartBridge QorIQ - UART to Intercom Bridge Support - * - * @ingroup QorIQ - * - * @brief UART to Intercom bridge support. - * - * @{ - */ - -typedef struct { - rtems_termios_device_context base; - const char *device_path; - intercom_type type; - rtems_id transmit_task; - rtems_chain_control transmit_fifo; -} uart_bridge_master_context; - -typedef struct { - rtems_termios_device_context base; - struct rtems_termios_tty *tty; - intercom_type type; - rtems_id transmit_task; - rtems_chain_control transmit_fifo; -} uart_bridge_slave_context; - -bool qoriq_uart_bridge_master_probe(rtems_termios_device_context *base); - -extern const rtems_termios_device_handler qoriq_uart_bridge_master; - -extern const rtems_termios_device_handler qoriq_uart_bridge_slave; - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_QORIQ_UART_BRIDGE_H */ diff --git a/c/src/lib/libbsp/powerpc/qoriq/preinstall.am b/c/src/lib/libbsp/powerpc/qoriq/preinstall.am deleted file mode 100644 index 5fe3411548..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/preinstall.am +++ /dev/null @@ -1,165 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - 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$(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crtn.$(OBJEXT): rtems_crtn.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crtn.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crtn.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base - -$(PROJECT_LIB)/linkcmds.qoriq_core_0: startup/linkcmds.qoriq_core_0 $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.qoriq_core_0 -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.qoriq_core_0 - -$(PROJECT_LIB)/linkcmds.qoriq_core_1: startup/linkcmds.qoriq_core_1 $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.qoriq_core_1 -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.qoriq_core_1 - -$(PROJECT_LIB)/linkcmds.qoriq_e500: startup/linkcmds.qoriq_e500 $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.qoriq_e500 -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.qoriq_e500 - -$(PROJECT_LIB)/linkcmds.qoriq_e6500_32: startup/linkcmds.qoriq_e6500_32 $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.qoriq_e6500_32 -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.qoriq_e6500_32 - -$(PROJECT_LIB)/linkcmds.qoriq_e6500_64: startup/linkcmds.qoriq_e6500_64 $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.qoriq_e6500_64 -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.qoriq_e6500_64 - diff --git a/c/src/lib/libbsp/powerpc/qoriq/bsp_specs b/c/src/lib/libbsp/powerpc/qoriq/startup/bsp_specs index 001c45b3c4..001c45b3c4 100644 --- a/c/src/lib/libbsp/powerpc/qoriq/bsp_specs +++ b/c/src/lib/libbsp/powerpc/qoriq/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/shared/console/consoleIo.h b/c/src/lib/libbsp/powerpc/shared/console/consoleIo.h deleted file mode 100644 index e62c9d143c..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/console/consoleIo.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * consoleIo.h -- console I/O package interface - * - * Copyright (C) 1999 Eric Valette. valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef __CONSOLE_IO_H -#define __CONSOLE_IO_H - -typedef enum { - CONSOLE_LOG = 1, - CONSOLE_SERIAL = 2, - CONSOLE_VGA = 3, - CONSOLE_VACUUM = 4 -}ioType; - -typedef volatile unsigned char * __io_ptr; - -typedef struct { - __io_ptr io_base; - __io_ptr isa_mem_base; -} board_memory_map; - -extern board_memory_map *ptr_mem_map; - -extern int select_console(ioType t); -/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */ -extern void debug_putc(const unsigned char c); -extern void debug_putc_onlcr(const char c); -extern int debug_getc(void); -extern int debug_tstc(void); -int kbdreset(void); - -#endif diff --git a/c/src/lib/libbsp/powerpc/shared/console/uart.h b/c/src/lib/libbsp/powerpc/shared/console/uart.h deleted file mode 100644 index b7539b5b7b..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/console/uart.h +++ /dev/null @@ -1,190 +0,0 @@ - -/* - * This software is Copyright (C) 1998 by T.sqware - all rights limited - * It is provided in to the public domain "as is", can be freely modified - * as far as this copyight notice is kept unchanged, but does not imply - * an endorsement by T.sqware of the product in which it is included. - */ - -#ifndef _BSPUART_H -#define _BSPUART_H - -#include <bsp/irq.h> - -#include <sys/ioctl.h> -#include <rtems/libio.h> - -void BSP_uart_init(int uart, int baud, int hwFlow); -void BSP_uart_set_baud(int uart, int baud); -void BSP_uart_intr_ctrl(int uart, int cmd); -void BSP_uart_throttle(int uart); -void BSP_uart_unthrottle(int uart); -int BSP_uart_polled_status(int uart); -void BSP_uart_polled_write(int uart, int val); -int BSP_uart_polled_read(int uart); -void BSP_uart_termios_set(int uart, void *ttyp); -ssize_t BSP_uart_termios_write_com(int minor, const char *buf, size_t len); -int BSP_uart_termios_read_com (int minor); -void BSP_uart_termios_isr_com1(void *unused); -void BSP_uart_termios_isr_com2(void *unused); -void BSP_uart_dbgisr_com1(void); -void BSP_uart_dbgisr_com2(void); -int BSP_uart_install_isr(int uart, rtems_irq_hdl handler); -int BSP_uart_remove_isr(int uart, rtems_irq_hdl handler); -ssize_t BSP_uart_termios_write_polled(int minor, const char *buf, size_t len); -int BSP_uart_get_break_cb(int uart, rtems_libio_ioctl_args_t *arg); -int BSP_uart_set_break_cb(int uart, rtems_libio_ioctl_args_t *arg); - -extern unsigned BSP_poll_char_via_serial(void); -extern void BSP_output_char_via_serial(const char val); -extern int BSPConsolePort; -extern int BSPBaseBaud; - -/* Special IOCTLS to install a lowlevel 'BREAK' handler */ - -/* pass a BSP_UartBreakCb pointer to ioctl when retrieving - * or installing break callback - */ -typedef void (*BSP_UartBreakCbProc)( - int uartMinor, - unsigned uartRBRLSRStatus, - void *termiosPrivatePtr, - void *private -); - -typedef struct BSP_UartBreakCbRec_ { - BSP_UartBreakCbProc handler; /* NOTE: handler runs in INTERRUPT CONTEXT */ - void *private; /* closure pointer which is passed to the callback */ -} BSP_UartBreakCbRec, *BSP_UartBreakCb; - -#define BIOCGETBREAKCB _IOR('b',1,sizeof(BSP_UartBreakCbRec)) -#define BIOCSETBREAKCB _IOW('b',2,sizeof(BSP_UartBreakCbRec)) - -/* - * Command values for BSP_uart_intr_ctrl(), - * values are strange in order to catch errors - * with assert - */ -#define BSP_UART_INTR_CTRL_DISABLE (0) -#define BSP_UART_INTR_CTRL_GDB (0xaa) /* RX only */ -#define BSP_UART_INTR_CTRL_ENABLE (0xbb) /* Normal operations */ -#define BSP_UART_INTR_CTRL_TERMIOS (0xcc) /* RX & line status */ - -/* Return values for uart_polled_status() */ -#define BSP_UART_STATUS_ERROR (-1) /* No character */ -#define BSP_UART_STATUS_NOCHAR (0) /* No character */ -#define BSP_UART_STATUS_CHAR (1) /* Character present */ -#define BSP_UART_STATUS_BREAK (2) /* Break point is detected */ - -/* PC UART definitions */ -#define BSP_UART_COM1 (0) -#define BSP_UART_COM2 (1) - -/* - * Offsets from base - */ - -/* DLAB 0 */ -#define RBR (0) /* Rx Buffer Register (read) */ -#define THR (0) /* Tx Buffer Register (write) */ -#define IER (1) /* Interrupt Enable Register */ - -/* DLAB X */ -#define IIR (2) /* Interrupt Ident Register (read) */ -#define FCR (2) /* FIFO Control Register (write) */ -#define LCR (3) /* Line Control Register */ -#define MCR (4) /* Modem Control Register */ -#define LSR (5) /* Line Status Register */ -#define MSR (6) /* Modem Status Register */ -#define SCR (7) /* Scratch register */ - -/* DLAB 1 */ -#define DLL (0) /* Divisor Latch, LSB */ -#define DLM (1) /* Divisor Latch, MSB */ -#define AFR (2) /* Alternate Function register */ - -/* - * Interrupt source definition via IIR - */ -#define MODEM_STATUS 0 -#define NO_MORE_INTR 1 -#define TRANSMITTER_HODING_REGISTER_EMPTY 2 -#define RECEIVER_DATA_AVAIL 4 -#define RECEIVER_ERROR 6 -#define CHARACTER_TIMEOUT_INDICATION 12 - -/* - * Bits definition of IER - */ -#define RECEIVE_ENABLE 0x1 -#define TRANSMIT_ENABLE 0x2 -#define RECEIVER_LINE_ST_ENABLE 0x4 -#define MODEM_ENABLE 0x8 -#define INTERRUPT_DISABLE 0x0 - -/* - * Bits definition of the Line Status Register (LSR) - */ -#define DR 0x01 /* Data Ready */ -#define OE 0x02 /* Overrun Error */ -#define PE 0x04 /* Parity Error */ -#define FE 0x08 /* Framing Error */ -#define BI 0x10 /* Break Interrupt */ -#define THRE 0x20 /* Transmitter Holding Register Empty */ -#define TEMT 0x40 /* Transmitter Empty */ -#define ERFIFO 0x80 /* Error receive Fifo */ - -/* - * Bits definition of the MODEM Control Register (MCR) - */ -#define DTR 0x01 /* Data Terminal Ready */ -#define RTS 0x02 /* Request To Send */ -#define OUT_1 0x04 /* Output 1, (reserved on COMPAQ I/O Board) */ -#define OUT_2 0x08 /* Output 2, Enable Asynchronous Port Interrupts */ -#define LB 0x10 /* Enable Internal Loop Back */ - -/* - * Bits definition of the Line Control Register (LCR) - */ -#define CHR_5_BITS 0 -#define CHR_6_BITS 1 -#define CHR_7_BITS 2 -#define CHR_8_BITS 3 - -#define WL 0x03 /* Word length mask */ -#define STB 0x04 /* 1 Stop Bit, otherwise 2 Stop Bits */ -#define PEN 0x08 /* Parity Enabled */ -#define EPS 0x10 /* Even Parity Select, otherwise Odd */ -#define SP 0x20 /* Stick Parity */ -#define BCB 0x40 /* Break Control Bit */ -#define DLAB 0x80 /* Enable Divisor Latch Access */ - -/* - * Bits definition of the MODEM Status Register (MSR) - */ -#define DCTS 0x01 /* Delta Clear To Send */ -#define DDSR 0x02 /* Delta Data Set Ready */ -#define TERI 0x04 /* Trailing Edge Ring Indicator */ -#define DDCD 0x08 /* Delta Carrier Detect Indicator */ -#define CTS 0x10 /* Clear To Send (when loop back is active) */ -#define DSR 0x20 /* Data Set Ready (when loop back is active) */ -#define RI 0x40 /* Ring Indicator (when loop back is active) */ -#define DCD 0x80 /* Data Carrier Detect (when loop back is active) */ - -/* - * Bits definition of the FIFO Control Register : WD16C552 or NS16550 - */ - -#define FIFO_CTRL 0x01 /* Set to 1 permit access to other bits */ -#define FIFO_EN 0x01 /* Enable the FIFO */ -#define XMIT_RESET 0x02 /* Transmit FIFO Reset */ -#define RCV_RESET 0x04 /* Receive FIFO Reset */ -#define FCR3 0x08 /* do not understand manual! */ - -#define RECEIVE_FIFO_TRIGGER1 0x00 /* trigger RX interrupt after 1 byte */ -#define RECEIVE_FIFO_TRIGGER4 0x40 /* trigger RX interrupt after 4 bytes */ -#define RECEIVE_FIFO_TRIGGER8 0x80 /* trigger RX interrupt after 8 bytes */ -#define RECEIVE_FIFO_TRIGGER12 0xc0 /* trigger RX interrupt after 12 bytes */ -#define TRIG_LEVEL 0xc0 /* Mask for the trigger level */ - -#endif /* _BSPUART_H */ diff --git a/c/src/lib/libbsp/powerpc/shared/flash/flashPgm.h b/c/src/lib/libbsp/powerpc/shared/flash/flashPgm.h deleted file mode 100644 index 19f2c4708e..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/flash/flashPgm.h +++ /dev/null @@ -1,209 +0,0 @@ -#ifndef BSP_FLASH_PGM_API_H -#define BSP_FLASH_PGM_API_H - -/* Trivial Flash Programmer */ - -/* Author: Till Straumann <strauman@slac.stanford.edu>, 2006 - * NOTE: copyright info at the bottom of this file - */ - -/* IMPORTANT NOTE - * - * The flash API is NOT THREAD SAFE. During the execution of any of the - * BSP_flashXXX() routines, flash (residing in the same device) - * MUST NOT be accessed by other threads in ANY way (NOT EVEN READ!). - * Read operations may return internal device register contents - * instead of memory array data when issued while a flash device - * is erased, written or queried by the library. - * - * The routines are intended for occasional maintenance use only - * (i.e., not for implementing a file system or similar). - * - * While polling for the completion of block erase operations the - * CPU is yielded to other threads. Busy waiting (interrupts and - * thread dispatching remain enabled) on write operations is employed. - */ - -#include <stdio.h> - -#ifdef __cplusplus - extern "C" { -#endif - -/* Disengage flash write protection. Write protection is implemented - * at the board or chipset level by disabling all write operations/bus cycles - * to the flash device(s). - * With write protection enabled, nothing but 'ordinary' (array) read operations - * are possible. - * Write protection must be disabled not only to erase and write contents - * but also in order to read ID, size, status etc. - * None of the operations (except for BSP_flashWriteEnable()) are possible - * on a write-protected device. - * - * 'bank': flash bank # (usually 0) - * RETURNS: 0 on success, nonzero on error (printing message to stderr). - * - * NOTES: - some boards (MVME5500) don't support 'bank' granularity but - * enable/disable write protection for all devices at once. - * - a jumper-based protection mechanism might be in place - * in addition to the software-based one. Consult the user's - * manual of your board for more information. - */ -int -BSP_flashWriteEnable(int bank); - -/* Engage flash write protection (see above) - */ -int -BSP_flashWriteDisable(int bank); - -/* Erase a region of flash memory. - * 'bank': flash bank # (usually 0). - * 'offset': destination address offset (from start of bank). - * 'size': number of bytes to erase. - * 'quiet': if non-zero, suppress confirmation message / prompt - * if > 1 also suppress the progress indicator. - * - * RETURNS: 0 on success, nonzero on error (printing messages to stderr). - * - * NOTES: - 'offset' and 'size' must be block-aligned. Common 16-bit devices - * have a block size of 0x20000 bytes. If two such devices are - * operated in parallel to form a 32-bit word then the 'effective' - * block size is 0x40000 bytes. The block size can be queried by - * BSP_flashBlockSize(int bank); - * - * - erase operation is verified. - */ -int -BSP_flashErase(int bank, uint32_t offset, uint32_t size, int quiet); - -/* Write data from a buffer to flash. The target area is erased if necessary. - * - * 'bank': flash bank # (usually 0). - * 'offset': destination address offset (from start of bank). - * 'src': data source block address (in memory). - *'n_bytes': number of bytes to copy. - * 'quiet': if non-zero, suppress confirmation message / prompt - * if > 1 also suppress the progress indicator. - * - * NOTES: - Erase operations are only performed where necessary. I.e., - * if one or both of the boundaries of the destination region is/are - * not block-aligned then adjacent data are preserved provided that - * the relevant chunks of the destination are blank (erased). - * - * | <neighbour> fffffff | - * ^--- destination ----- ^ - * | : block boundary - * f : blank/erased pieces - * - * (If the start of the destination region up to the next block boundary - * is blank then '<neighbour>'-data is preserved. The end of the - * destination is treated the same way.) - * - * - user confirmation is requested before changes are made - * - * - 'src' must not point into the destination bank (no copy - * within a flash bank). - * - * - erase and write operations are verified. - * - * RETURNS: 0 on success, nonzero on error (message printed to stderr). - */ -int -BSP_flashWrite(int bank, uint32_t offset, const char *src, uint32_t n_bytes, int quiet); - -/* Copy contents of a file to flash. - * - * 'fname': Path of a file. - * 'quiet': if non-zero, suppress confirmation message / prompt - * if > 1 also suppress the progress indicator. - * - * NOTES: Convenience wrapper around BSP_flashWrite(); see above for - * args and return value. - */ -int -BSP_flashWriteFile(int bank, uint32_t offset, const char *path, int quiet); - -/* Dump info about available flash to file - * (stdout is used if f==NULL). - * - * RETURNS: 0 - * NOTES: Write protection must be disengaged (see above); - */ -int -BSP_flashDumpInfo(FILE *f); - -/* - * Obtain starting-address of flash bank (as seen from CPU) - * (returns ((uint32_t) -1) if the bank argument is invalid). - */ - -uint32_t -BSP_flashStart(int bank); - -/* - * Obtain size of flash bank (returns ((uint32_t) -1) if the - * bank argument is invalid). - */ -uint32_t -BSP_flashSize(int bank); - -/* - * Obtain block size of flash bank (sector size times - * number of devices in parallel; the block size determines - * alignment and granularity accepted by BSP_flashErase() - * (returns ((uint32_t) -1) if the bank argument is invalid). - */ -uint32_t -BSP_flashBlockSize(int bank); - -#ifdef __cplusplus - } -#endif - -/* - * Authorship - * ---------- - * This software was created by - * Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * The software was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#endif diff --git a/c/src/lib/libbsp/powerpc/shared/flash/flashPgmPvt.h b/c/src/lib/libbsp/powerpc/shared/flash/flashPgmPvt.h deleted file mode 100644 index c26b8ed01d..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/flash/flashPgmPvt.h +++ /dev/null @@ -1,274 +0,0 @@ -#ifndef FLASH_GLUE_INTERFACE_H -#define FLASH_GLUE_INTERFACE_H - - -/* Trivial flash programmer (for restrictions see below) */ - -/* Author: Till Straumann <strauman@slac.stanford.edu>, 2006 */ - -/* DO NOT INCLUDE THIS HEADER FROM APPLICATION CODE */ - -/* - * Glue interface -- to be used only internally by BSP - * and chip drivers: - * - BSP provides info about what chip drivers to use - * as well as 'wiring' info (how many devices are - * operated in parallel etc). - * - Chip drivers provide low-level 'methods' / 'ops' - * for performing basic operations which are used - * by the code in 'flash.c'. - */ - -/* To keep things simple, this API makes a few assumptions about the - * hardware: - * - * - devices operate with 16-bit data width - * - two devices are used in parallel (stride 4) to - * provide 32-bit data. I.e., the devices are - * organized like this: - * unsigned short flash[FLASH_SIZE][2]; - * - no endianness issues (i.e., flash endianness == CPU endianness) - * - fixed block size - * - fixed buffer size - * - all devices in a bank are identical - * - NOT THREAD SAFE; no locking scheme is implemented. - * - cannot copy within same flash bank. - * - write-timeout uses polling/busy-wait - * - * FIXME: code should be revised to remove assumptions on stride and 16-bit - * width to make it more generic. - */ - -/* - * Authorship - * ---------- - * This software was created by - * Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * The software was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#include <stdint.h> - -#define NumberOf(arr) (sizeof(arr)/sizeof(arr[0])) - -#define FLASH_STRIDE(b) 4 /* bytes; currently fixed */ -#define FLASH_WIDTH(b) ((b)->width) -#define FLASH_NDEVS(b) (FLASH_STRIDE(b)/FLASH_WIDTH(b)) - -/* Type declarations */ - -/* Registers */ -typedef uint8_t _u8_a_t __attribute__((may_alias)); -typedef uint16_t _u16_a_t __attribute__((may_alias)); -typedef uint32_t _u32_a_t __attribute__((may_alias)); - -/* Register addresses */ -typedef volatile _u8_a_t *A8; -typedef volatile _u16_a_t *A16; -typedef volatile _u32_a_t *A32; - -struct flash_bank_ops; - -/* - * Description of a flash bank. Multiple - * devices that are used in parallel to - * make up words of FLASH_STRIDE bytes - * are a 'physical' bank. - * - * A bank can even be a 'logical' bank - * if it includes chip-select logic, i.e., - * int can contain multiple adjacent - * 'physical' banks - * - * The BSP must provide an array of 'bankdesc' - * structs and it must initialize the fields - * - * 'start' - * size of bank; may be set to zero to instruct - * the driver to scan a bank of 'max_size' for - * devices (i.e., bank may not be fully populated) - * 'max_size' - * size of fully populated bank (defines address range - * that is scanned for devices). - * If 'max_size' is negative then scanning starts from - * the top rather than from the bottom. - * 'width' - * width of a single device (in bytes). E.g., if - * 2 16-bit devices are used to form a (ATM fixed) - * stride of 4 then 'width = 2'. If four 8-bit - * devices are employed then 'width=1'. - * 'knownVendors' - * array of vendors descriptions to use for scanning - * the bank. - * - */ -struct bankdesc { - uint32_t start; /* start of bank (CPU address) */ - uint32_t size; /* in bytes (figured out automatically) */ - int max_size; /* in case multiple banks are adjacent; - * if max_size < 0 then the bank is scanned - * backwards (from top->bottom) for devices - */ - int width; /* FIXME there might be implicit assumptions still - * that width == 2 - */ - struct vendesc *knownVendors; - /* TODO: we assume identical devices within a bank... */ - - /* The next three variables cache information obtained - * from the applicable vendor and device descriptions. - * They are written by BSP_flashCheckId(). - */ - uint32_t fblksz; /* block size in bytes; includes counting - * parallel 16-bit devices, i.e., if a - * single device has a block-size of xxx - * then fblksz = xxx*ndevs. - */ - struct devdesc *dd; - struct flash_bank_ops *ops; -}; - -struct devdesc { - uint32_t id; /* numerical ID (matched against - * ID read from device). - */ - char *name; /* informational name */ - uint32_t size; /* bytes */ - uint32_t bufsz; /* size of write buffer (bytes) */ - uint32_t fblksz; /* sector/block size (bytes) */ -}; - -struct vendesc { - uint32_t id; /* numerical ID (matched against - * ID read from device). - */ - char *name; /* informational name */ - - /* array of supported devices; - * the 'ops' specified below - * are used to access these devices - */ - struct devdesc *known_devs; - /* access methods for talking to - * devices associated with this - * vendor description. - */ - struct flash_bank_ops *ops; -}; - -/* Device Access Methods ('ops'); these must be - * implemented by low-level chip drivers - */ - -struct flash_bank_ops { -/* Read vendor/device ID; Return 0 on success, nonzero if unable to read id */ - int (*get_id)(struct bankdesc *b, uint32_t addr, uint32_t *pVendorId, uint32_t *pDeviceId); -/* Unlock block holding 'addr'ess - * - * NOTES: - device switched back to array mode on exit. - * - 'addr' must be 32-bit aligned. - */ - - void (*unlock_block)(struct bankdesc *b, uint32_t addr); -/* Lock block holding 'addr'ess - * - * NOTES: - device switched back to array mode on exit. - * - 'addr' must be 32-bit aligned. - */ - - void (*lock_block)(struct bankdesc *b, uint32_t addr); -/* Erase single block holding 'addr'ess. The routine may - * assume that the address is block/sector aligned. - * - * RETURNS: zero on error, device status on failure. - * - * NOTES: - device switched back to array mode on exit. - * - 'addr' must be 32-bit aligned. - */ - int (*erase_block)(struct bankdesc *b, uint32_t addr); -/* Query the status of the device and assert it's readiness - * leave off in array-reading mode. - * - * RETURNS: 0 on success, error status (result of status query) on error. - * - * NOTES: - error message is printed to stderr. - * - device switched back to array mode on exit. - * - 'addr' must be 32-bit aligned. - */ - uint32_t (*check_ready)(struct bankdesc *b, uint32_t addr); -/* Dump status bits (F_CMD_RD_STA results); - * 'verbose' prints non-error bits, too - */ - void (*print_stat)(struct bankdesc *b, uint32_t sta, int verbose); -/* Switch to array mode; 'addr' can be assumed to be stride-aligned */ - void (*array_mode)(struct bankdesc *b, uint32_t addr); -/* Write N bytes from 'src' to flash: - * 'src[0] .. src[N-1]' -> addr[0]..addr[N-1]. - * N may be assumed to be a multiple of 'stride' - * RETURNS: failure status or zero on success. - */ - uint32_t (*write_line)(struct bankdesc *b, uint32_t addr, const char *src, uint32_t N); -}; - -/* BSP ops (detect banks, handle write-protection on board); - * these must be implemented by the BSP. - */ - -struct flash_bsp_ops { -/* Return descriptor for bank # 'bank' or NULL (invalid arg) */ - struct bankdesc *(*bankcheck)(int bank, int quiet); -/* set (enbl:1), clear (enbl:0) or query (enbl:-1) - * on-board write protection. - * - * RETURNS 0 on success, nonzero on error. - */ - int (*flash_wp)(int bank, int enbl); -/* read a running us clock (for polling timeout) */ - uint32_t (*read_us_timer)(); -}; - -/* This must be provided by the BSP */ -extern struct flash_bsp_ops BSP_flashBspOps; - -/* Available low-level flash drivers, so far */ -extern struct vendesc BSP_flash_vendor_intel[]; -extern struct vendesc BSP_flash_vendor_spansion[]; - -#endif diff --git a/c/src/lib/libbsp/powerpc/shared/include/linker-symbols.h b/c/src/lib/libbsp/powerpc/shared/include/linker-symbols.h deleted file mode 100644 index de7a6c483d..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/include/linker-symbols.h +++ /dev/null @@ -1,139 +0,0 @@ -/** - * @file - * - * @ingroup powerpc_linker - * - * @brief Symbols defined in linker command base file. - */ - -/* - * Copyright (c) 2010, 2016 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_SHARED_LINKER_SYMBOLS_H -#define LIBBSP_POWERPC_SHARED_LINKER_SYMBOLS_H - -#include <libcpu/powerpc-utility.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup powerpc_linker Linker Support - * - * @ingroup powerpc_shared - * - * @brief Linker support. - * - * @{ - */ - -LINKER_SYMBOL(bsp_section_start_begin) -LINKER_SYMBOL(bsp_section_start_end) -LINKER_SYMBOL(bsp_section_start_size) - -LINKER_SYMBOL(bsp_section_fast_text_begin) -LINKER_SYMBOL(bsp_section_fast_text_end) -LINKER_SYMBOL(bsp_section_fast_text_size) -LINKER_SYMBOL(bsp_section_fast_text_load_begin) -LINKER_SYMBOL(bsp_section_fast_text_load_end) - -LINKER_SYMBOL(bsp_section_text_begin) -LINKER_SYMBOL(bsp_section_text_end) -LINKER_SYMBOL(bsp_section_text_size) -LINKER_SYMBOL(bsp_section_text_load_begin) -LINKER_SYMBOL(bsp_section_text_load_end) - -LINKER_SYMBOL(bsp_section_rodata_begin) -LINKER_SYMBOL(bsp_section_rodata_end) -LINKER_SYMBOL(bsp_section_rodata_size) -LINKER_SYMBOL(bsp_section_rodata_load_begin) -LINKER_SYMBOL(bsp_section_rodata_load_end) - -LINKER_SYMBOL(bsp_section_fast_data_begin) -LINKER_SYMBOL(bsp_section_fast_data_end) -LINKER_SYMBOL(bsp_section_fast_data_size) -LINKER_SYMBOL(bsp_section_fast_data_load_begin) -LINKER_SYMBOL(bsp_section_fast_data_load_end) - -LINKER_SYMBOL(bsp_section_data_begin) -LINKER_SYMBOL(bsp_section_data_end) -LINKER_SYMBOL(bsp_section_data_size) -LINKER_SYMBOL(bsp_section_data_load_begin) -LINKER_SYMBOL(bsp_section_data_load_end) - -LINKER_SYMBOL(bsp_section_bss_begin) -LINKER_SYMBOL(bsp_section_bss_end) -LINKER_SYMBOL(bsp_section_bss_size) - -LINKER_SYMBOL(bsp_section_sbss_begin) -LINKER_SYMBOL(bsp_section_sbss_end) -LINKER_SYMBOL(bsp_section_sbss_size) - -LINKER_SYMBOL(bsp_section_rwextra_begin) -LINKER_SYMBOL(bsp_section_rwextra_end) -LINKER_SYMBOL(bsp_section_rwextra_size) - -LINKER_SYMBOL(bsp_section_work_begin) -LINKER_SYMBOL(bsp_section_work_end) -LINKER_SYMBOL(bsp_section_work_size) - -LINKER_SYMBOL(bsp_section_stack_begin) -LINKER_SYMBOL(bsp_section_stack_end) -LINKER_SYMBOL(bsp_section_stack_size) - -LINKER_SYMBOL(bsp_section_nocache_begin) -LINKER_SYMBOL(bsp_section_nocache_end) -LINKER_SYMBOL(bsp_section_nocache_size) -LINKER_SYMBOL(bsp_section_nocache_load_begin) -LINKER_SYMBOL(bsp_section_nocache_load_end) - -LINKER_SYMBOL(bsp_section_nocachenoload_begin) -LINKER_SYMBOL(bsp_section_nocachenoload_end) -LINKER_SYMBOL(bsp_section_nocachenoload_size) - -LINKER_SYMBOL(bsp_section_nocacheheap_begin) -LINKER_SYMBOL(bsp_section_nocacheheap_end) -LINKER_SYMBOL(bsp_section_nocacheheap_size) - -LINKER_SYMBOL(bsp_section_nvram_begin) -LINKER_SYMBOL(bsp_section_nvram_end) -LINKER_SYMBOL(bsp_section_nvram_size) - -#define BSP_FAST_TEXT_SECTION __attribute__((section(".bsp_fast_text"))) - -#define BSP_FAST_DATA_SECTION __attribute__((section(".bsp_fast_data"))) - -#define BSP_NOCACHE_SECTION __attribute__((section(".bsp_nocache"))) - -#define BSP_NOCACHE_SUBSECTION(subsection) \ - __attribute__((section(".bsp_nocache." # subsection))) - -#define BSP_NOCACHENOLOAD_SECTION __attribute__((section(".bsp_noload_nocache"))) - -#define BSP_NOCACHENOLOAD_SUBSECTION(subsection) \ - __attribute__((section(".bsp_noload_nocache." # subsection))) - -#define BSP_NVRAM_SECTION __attribute__((section(".bsp_nvram"))) - -#define BSP_NVRAM_SUBSECTION(subsection) \ - __attribute__((section(".bsp_nvram." # subsection))) - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_SHARED_LINKER_SYMBOLS_H */ diff --git a/c/src/lib/libbsp/powerpc/shared/include/nvram.h b/c/src/lib/libbsp/powerpc/shared/include/nvram.h deleted file mode 100644 index f579544336..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/include/nvram.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - * PreP compliant NVRAM access - * - * This file can be found in motorla or IBP PPC site. - */ - -#ifndef _PPC_NVRAM_H -#define _PPC_NVRAM_H - -#define NVRAM_AS0 0x74 -#define NVRAM_AS1 0x75 -#define NVRAM_DATA 0x77 - -/* RTC Offsets */ - -#define MOTO_RTC_SECONDS 0x1FF9 -#define MOTO_RTC_MINUTES 0x1FFA -#define MOTO_RTC_HOURS 0x1FFB -#define MOTO_RTC_DAY_OF_WEEK 0x1FFC -#define MOTO_RTC_DAY_OF_MONTH 0x1FFD -#define MOTO_RTC_MONTH 0x1FFE -#define MOTO_RTC_YEAR 0x1FFF -#define MOTO_RTC_CONTROLA 0x1FF8 -#define MOTO_RTC_CONTROLB 0x1FF9 - -#ifndef BCD_TO_BIN -#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10) -#endif - -#ifndef BIN_TO_BCD -#define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10) -#endif - -/* Structure map for NVRAM on PowerPC Reference Platform */ -/* All fields are either character/byte strings which are valid either - endian or they are big-endian numbers. - - There are a number of Date and Time fields which are in RTC format, - big-endian. These are stored in UT (GMT). - - For enum's: if given in hex then they are bit significant, i.e. only - one bit is on for each enum. -*/ - -#define NVSIZE 4096 /* size of NVRAM */ -#define OSAREASIZE 512 /* size of OSArea space */ -#define CONFSIZE 1024 /* guess at size of Configuration space */ - -#ifndef ASM - -typedef struct _SECURITY { - unsigned long BootErrCnt; /* Count of boot password errors */ - unsigned long ConfigErrCnt; /* Count of config password errors */ - unsigned long BootErrorDT[2]; /* Date&Time from RTC of last error in pw */ - unsigned long ConfigErrorDT[2]; /* Date&Time from RTC of last error in pw */ - unsigned long BootCorrectDT[2]; /* Date&Time from RTC of last correct pw */ - unsigned long ConfigCorrectDT[2]; /* Date&Time from RTC of last correct pw */ - unsigned long BootSetDT[2]; /* Date&Time from RTC of last set of pw */ - unsigned long ConfigSetDT[2]; /* Date&Time from RTC of last set of pw */ - unsigned char Serial[16]; /* Box serial number */ -} SECURITY; - -typedef enum _OS_ID { - Unknown = 0, - Firmware = 1, - AIX = 2, - NT = 3, - MKOS2 = 4, - MKAIX = 5, - Taligent = 6, - Solaris = 7, - MK = 12 -} OS_ID; - -typedef struct _ERROR_LOG { - unsigned char ErrorLogEntry[40]; /* To be architected */ -} ERROR_LOG; - -typedef enum _BOOT_STATUS { - BootStarted = 0x01, - BootFinished = 0x02, - RestartStarted = 0x04, - RestartFinished = 0x08, - PowerFailStarted = 0x10, - PowerFailFinished = 0x20, - ProcessorReady = 0x40, - ProcessorRunning = 0x80, - ProcessorStart = 0x0100 -} BOOT_STATUS; - -typedef struct _RESTART_BLOCK { - unsigned short Version; - unsigned short Revision; - unsigned long ResumeReserve1[2]; - volatile unsigned long BootStatus; - unsigned long CheckSum; /* Checksum of RESTART_BLOCK */ - void* RestartAddress; - void* SaveAreaAddr; - unsigned long SaveAreaLength; -} RESTART_BLOCK; - -typedef enum _OSAREA_USAGE { - Empty = 0, - Used = 1 -} OSAREA_USAGE; - -typedef enum _PM_MODE { - Suspend = 0x80, /* Part of state is in memory */ - Normal = 0x00 /* No power management in effect */ -} PMMode; - -typedef struct _HEADER { - unsigned short Size; /* NVRAM size in K(1024) */ - unsigned char Version; /* Structure map different */ - unsigned char Revision; /* Structure map the same -may - be new values in old fields - in other words old code still works */ - unsigned short Crc1; /* check sum from beginning of nvram to OSArea */ - unsigned short Crc2; /* check sum of config */ - unsigned char LastOS; /* OS_ID */ - unsigned char Endian; /* B if big endian, L if little endian */ - unsigned char OSAreaUsage;/* OSAREA_USAGE */ - unsigned char PMMode; /* Shutdown mode */ - RESTART_BLOCK RestartBlock; - SECURITY Security; - ERROR_LOG ErrorLog[2]; - - /* Global Environment information */ - void* GEAddress; - unsigned long GELength; - - /* Date&Time from RTC of last change to Global Environment */ - unsigned long GELastWriteDT[2]; - - /* Configuration information */ - void* ConfigAddress; - unsigned long ConfigLength; - - /* Date&Time from RTC of last change to Configuration */ - unsigned long ConfigLastWriteDT[2]; - unsigned long ConfigCount; /* Count of entries in Configuration */ - - /* OS dependent temp area */ - void* OSAreaAddress; - unsigned long OSAreaLength; - - /* Date&Time from RTC of last change to OSArea */ - unsigned long OSAreaLastWriteDT[2]; -} HEADER; - -/* Here is the whole map of the NVRAM */ -typedef struct _NVRAM_MAP { - HEADER Header; - unsigned char GEArea[NVSIZE-CONFSIZE-OSAREASIZE-sizeof(HEADER)]; - unsigned char OSArea[OSAREASIZE]; - unsigned char ConfigArea[CONFSIZE]; -} NVRAM_MAP; - -/* Routines to manipulate the NVRAM */ -void init_prep_nvram(void); -char *prep_nvram_get_var(const char *name); -char *prep_nvram_first_var(void); -char *prep_nvram_next_var(char *name); - -#endif /* ASM */ - -#endif /* _PPC_NVRAM_H */ diff --git a/c/src/lib/libbsp/powerpc/shared/include/start.h b/c/src/lib/libbsp/powerpc/shared/include/start.h deleted file mode 100644 index ab718a87ee..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/include/start.h +++ /dev/null @@ -1,84 +0,0 @@ -/** - * @file - * - * @ingroup powerpc_start - * - * @brief System low level start. - */ - -/* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_SHARED_START_H -#define LIBBSP_POWERPC_SHARED_START_H - -#include <stddef.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup powerpc_start PowerPC System Start - * - * @ingroup powerpc_shared - * - * @brief PowerPC low level start. - * - * @{ - */ - -#define BSP_START_TEXT_SECTION __attribute__((section(".bsp_start_text"))) - -#define BSP_START_DATA_SECTION __attribute__((section(".bsp_start_data"))) - -/** -* @brief System start entry. -*/ -void _start(void); - -/** - * Zeros @a byte_count bytes starting at @a begin. - * - * It wraps around in case of an address overflow. The stack will not be used. - * The code is position independent. It uses the data cache block zero - * instruction in case the data cache is enabled. There are no alignment - * constains for @a begin and @a byte_count. - * - * @see bsp_start_zero_begin, bsp_start_zero_end, and bsp_start_zero_size. - */ -void BSP_START_TEXT_SECTION bsp_start_zero(void *begin, size_t byte_count); - -/** - * @brief Symbol which equals the bsp_start_zero() code begin. - */ -extern char bsp_start_zero_begin []; - -/** - * @brief Symbol which equals the bsp_start_zero() code end. - */ -extern char bsp_start_zero_end []; - -/** - * @brief Symbol which equals the bsp_start_zero() code size. - */ -extern char bsp_start_zero_size []; - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_SHARED_START_H */ diff --git a/c/src/lib/libbsp/powerpc/shared/include/tictac.h b/c/src/lib/libbsp/powerpc/shared/include/tictac.h deleted file mode 100644 index 31c7386943..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/include/tictac.h +++ /dev/null @@ -1,78 +0,0 @@ -/** - * @file - * - * @ingroup powerpc_shared - * - * @brief Header file for tic-tac code. - */ - -/* - * Copyright (c) 2008 - * Embedded Brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * rtems@embedded-brains.de - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -/** - * @brief Reset reference ticks for tac(). - */ -static inline void tic() -{ - uint32_t tmp; - asm volatile ( - "mftb 0;" - "stw 0, ppc_tic_tac@sdarel(13);" - : "=r" (tmp) - ); -} - -/** - * @brief Returns number of ticks since last tic(). - */ -static inline uint32_t tac() -{ - uint32_t ticks; - uint32_t tmp; - asm volatile ( - "mftb %0;" - "lwz %1, ppc_tic_tac@sdarel(13);" - "subf %0, %1, %0;" - : "=r" (ticks), "=r" (tmp) - ); - return ticks; -} - -/** - * @brief Reset reference ticks for bam(). - */ -static inline void boom() -{ - uint32_t tmp; - asm volatile ( - "mftb 0;" - "stw 0, ppc_boom_bam@sdarel(13);" - : "=r" (tmp) - ); -} - -/** - * @brief Returns number of ticks since last boom(). - */ -static inline uint32_t bam() -{ - uint32_t ticks; - uint32_t tmp; - asm volatile ( - "mftb %0;" - "lwz %1, ppc_boom_bam@sdarel(13);" - "subf %0, %1, %0;" - : "=r" (ticks), "=r" (tmp) - ); - return ticks; -} diff --git a/c/src/lib/libbsp/powerpc/shared/include/u-boot-board-info.h b/c/src/lib/libbsp/powerpc/shared/include/u-boot-board-info.h deleted file mode 100644 index b377705687..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/include/u-boot-board-info.h +++ /dev/null @@ -1,146 +0,0 @@ -/* - * (C) Copyright 2000 - 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - ******************************************************************** - * NOTE: This header file defines an interface to U-Boot. Including - * this (unmodified) header file in another file is considered normal - * use of U-Boot, and does *not* fall under the heading of "derived - * work". - ******************************************************************** - */ - -#ifndef __U_BOOT_H__ -#define __U_BOOT_H__ - -/* - * Board information passed to Linux kernel from U-Boot - * - * include/asm-ppc/u-boot.h - */ - -#ifndef __ASSEMBLY__ - -typedef struct bd_info { - unsigned long bi_memstart; /* start of DRAM memory */ - phys_size_t bi_memsize; /* size of DRAM memory in bytes */ - unsigned long bi_flashstart; /* start of FLASH memory */ - unsigned long bi_flashsize; /* size of FLASH memory */ - unsigned long bi_flashoffset; /* reserved area for startup monitor */ - unsigned long bi_sramstart; /* start of SRAM memory */ - unsigned long bi_sramsize; /* size of SRAM memory */ -#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \ - || defined(CONFIG_E500) || defined(CONFIG_MPC86xx) - unsigned long bi_immr_base; /* base of IMMR register */ -#endif -#if defined(CONFIG_MPC5xxx) - unsigned long bi_mbar_base; /* base of internal registers */ -#endif -#if defined(CONFIG_MPC83xx) - unsigned long bi_immrbar; -#endif -#if defined(CONFIG_MPC8220) - unsigned long bi_mbar_base; /* base of internal registers */ - unsigned long bi_inpfreq; /* Input Freq, In MHz */ - unsigned long bi_pcifreq; /* PCI Freq, in MHz */ - unsigned long bi_pevfreq; /* PEV Freq, in MHz */ - unsigned long bi_flbfreq; /* Flexbus Freq, in MHz */ - unsigned long bi_vcofreq; /* VCO Freq, in MHz */ -#endif - unsigned long bi_bootflags; /* boot / reboot flag (Unused) */ - unsigned long bi_ip_addr; /* IP Address */ - unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */ - unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ - unsigned long bi_intfreq; /* Internal Freq, in MHz */ - unsigned long bi_busfreq; /* Bus Freq, in MHz */ -#if defined(CONFIG_CPM2) - unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ - unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ - unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ - unsigned long bi_vco; /* VCO Out from PLL, in MHz */ -#endif -#if defined(CONFIG_MPC512X) - unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */ -#endif /* CONFIG_MPC512X */ -#if defined(CONFIG_MPC5xxx) - unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ - unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ -#endif - unsigned long bi_baudrate; /* Console Baudrate */ -#if defined(CONFIG_405) || \ - defined(CONFIG_405GP) || \ - defined(CONFIG_405CR) || \ - defined(CONFIG_405EP) || \ - defined(CONFIG_405EZ) || \ - defined(CONFIG_405EX) || \ - defined(CONFIG_440) - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */ - unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */ - unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */ - unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ - unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ -#endif -#if defined(CONFIG_HYMOD) - hymod_conf_t bi_hymod_conf; /* hymod configuration information */ -#endif - -#ifdef CONFIG_HAS_ETH1 - unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH2 - unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH3 - unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH4 - unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH5 - unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */ -#endif - -#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ - defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \ - defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) - unsigned int bi_opbfreq; /* OPB clock in Hz */ - int bi_iic_fast[2]; /* Use fast i2c mode */ -#endif -#if defined(CONFIG_NX823) - unsigned char bi_sernum[8]; -#endif -#if defined(CONFIG_4xx) -#if defined(CONFIG_440GX) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) - int bi_phynum[4]; /* Determines phy mapping */ - int bi_phymode[4]; /* Determines phy mode */ -#elif defined(CONFIG_405EP) || defined(CONFIG_440) - int bi_phynum[2]; /* Determines phy mapping */ - int bi_phymode[2]; /* Determines phy mode */ -#else - int bi_phynum[1]; /* Determines phy mapping */ - int bi_phymode[1]; /* Determines phy mode */ -#endif -#endif /* defined(CONFIG_4xx) */ -} bd_t; - -#endif /* __ASSEMBLY__ */ -#endif /* __U_BOOT_H__ */ diff --git a/c/src/lib/libbsp/powerpc/shared/motorola/motorola.h b/c/src/lib/libbsp/powerpc/shared/motorola/motorola.h deleted file mode 100644 index 14360d56d1..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/motorola/motorola.h +++ /dev/null @@ -1,69 +0,0 @@ -/* motorola.h - * - * This include file describe the data structure and the functions implemented - * by rtems to identify motorola boards. - * - * CopyRight (C) 1999 valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_SHARED_MOTOROLA_MOTOROLA_H -#define LIBBSP_POWERPC_SHARED_MOTOROLA_MOTOROLA_H - -#include <bsp/residual.h> -#include <bsp/pci.h> - -typedef enum { - PREP_IBM = 0, - PREP_Radstone = 1, - PREP_Motorola = 2 -} prep_t; - -typedef enum { - MVME_2400 = 0, - MVME_2400_750 = 1, - GENESIS = 2, - POWERSTACK_E = 3, - BLACKAWK = 4, - OMAHA = 5, - UTAH = 6, - POWERSTACK_EX = 7, - MESQUITE = 8, - SITKA = 9, - MESQUITE_W_HAC = 10, - MTX_PLUS = 11, - MTX_WO_PP = 12, - MTX_W_PP = 13, - MVME_2300 = 14, - MVME_2300SC_2600 = 15, - MVME_2600_W_MVME712M = 16, - MVME_2600_2700_W_MVME761 = 17, - MVME_3600_W_MVME712M = 18, - MVME_3600_W_MVME761 = 19, - MVME_1600 = 20, - /* In the table, slot 21 is the marker for end of automatic probe and scan */ - MVME_2100 = 22, - MOTOROLA_UNKNOWN = 255 -} motorolaBoard; - -typedef enum { - HOST_BRIDGE_RAVEN = 0, - HOST_BRIDGE_HAWK = 1, - HOST_BRIDGE_UNKNOWN = 255 -} motorolaHostBridge; - -#define MOTOROLA_CPUTYPE_REG 0x800 -#define MOTOROLA_BASETYPE_REG 0x803 - -extern prep_t checkPrepBoardType(RESIDUAL *res); -extern prep_t currentPrepType; -extern motorolaBoard getMotorolaBoard(void); -extern motorolaBoard currentBoard; -extern const char* motorolaBoardToString(motorolaBoard); -extern const struct _int_map *motorolaIntMap(motorolaBoard board); -extern const void *motorolaIntSwizzle(motorolaBoard board); - -#endif /* LIBBSP_POWERPC_SHARED_MOTOROLA_MOTOROLA_H */ diff --git a/c/src/lib/libbsp/powerpc/shared/motorola/vpd.h b/c/src/lib/libbsp/powerpc/shared/motorola/vpd.h deleted file mode 100644 index 23e49ac9f0..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/motorola/vpd.h +++ /dev/null @@ -1,143 +0,0 @@ -#ifndef PPC_MOTLOAD_VPD_H -#define PPC_MOTLOAD_VPD_H - -/* MotLoad VPD format */ - -/* Till Straumann, 2005; see copyright notice at the end of this file */ - -#ifdef __cplusplus - extern "C" { -#endif - -/* -VPD = "MOTOROLA" , { field } - -field = type_byte, length_byte, { data } -*/ - -/* Known fields so far */ -typedef enum { - ProductIdent = 0x01, /* String */ - AssemblyNumber = 0x02, /* String */ - SerialNumber = 0x03, /* String */ - CpuClockHz = 0x05, /* binary (5bytes), 0x01 byte appended to unsigned int */ - BusClockHz = 0x06, /* binary (5bytes), 0x01 byte appended to unsigned int */ - EthernetAddr = 0x08, /* binary (7bytes), 0x00 byte appended, 2nd has 0x01 appended */ - CpuType = 0x09, /* String */ - EEpromCrc = 0x0a, /* binary (4bytes) */ - FlashConfig = 0x0b, /* binary */ - L2CacheConfig = 0x0e, /* binary */ - VPDRevision = 0x0f, /* binary (4bytes) */ - L3CacheConfig = 0x19, /* binary */ - End = 0xff -} VpdKey; - -typedef struct { - VpdKey key; /* key for the data item to be read into 'buf' */ - char instance; /* instance # (starting with 0) - some keys are present more than one time */ - void *buf; /* pointer to area where the data item is to be stored */ - int buflen; /* available space in the buffer */ - char found; /* set by BSP_vpdRetrieveFields() to the original length as found in the PROM */ -} VpdBufRec, *VpdBuf; - - -#define VPD_END { key:End, } - - -/* Scan the VPD EEPROM for a number of fields - * - * Pass an array of VpdBufRec items. The routine - * fills the 'buf'fers for all keys that are found - * and sets the 'found' field to the original length - * of the data (i.e., as found in the PROM) so that - * the routine could be called again with a larger - * buffer. - * - * NOTE: - the array must be terminated by a VPD_END record! - * - no CRC check is performed. - * - INTERRUPT MANAGEMENT MUST BE FUNCTIONAL - * - * RETURNS: 0 on success, -1 if any read errors were - * encountered or if the "MOTOROLA" header - * was not found. - */ -int -BSP_vpdRetrieveFields(VpdBuf data); - -/* Example: - * Read 2nd ethernet address: - * - * char enet_addr_2[6]; - * - * VpdBufRec enetVpd [] = { - * { key: EthernetAddr, instance: 1, buf: enet_addr_2, buflen: 2}, - * VPD_END - * }; - * - * if ( BSP_vpdRetrieveFields(enetVpd) ) { - * error("ethernet address couldn't be read\n"); - * } else if ( enetVpd[0].found < 6 ) { - * error("2nd ethernet address not found in VPD\n"); - * } else { - * use_it(enet_addr_2); - * } - */ - - -/* Simple wrapper if only one field is needed - * - * RETURNS: original length if key is found, -1 on error or if key is not found - */ -int -BSP_vpdRetrieveKey(VpdKey k, void *buf, int buflen, int instance); - -#ifdef __cplusplus - } -#endif - -/* - * Authorship - * ---------- - * This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was - * created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * - * Acknowledgement of sponsorship - * ------------------------------ - * The 'beatnik' BSP was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#endif diff --git a/c/src/lib/libbsp/powerpc/shared/openpic/openpic.h b/c/src/lib/libbsp/powerpc/shared/openpic/openpic.h deleted file mode 100644 index df782596b5..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/openpic/openpic.h +++ /dev/null @@ -1,378 +0,0 @@ -/* - * openpic.h -- OpenPIC definitions - * - * Copyright (C) 1997 Geert Uytterhoeven - * - * This file is based on the following documentation: - * - * The Open Programmable Interrupt Controller (PIC) - * Register Interface Specification Revision 1.2 - * - * Issue Date: October 1995 - * - * Issued jointly by Advanced Micro Devices and Cyrix Corporation - * - * AMD is a registered trademark of Advanced Micro Devices, Inc. - * Copyright (C) 1995, Advanced Micro Devices, Inc. and Cyrix, Inc. - * All Rights Reserved. - * - * To receive a copy of this documentation, send an email to openpic@amd.com. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - * - * Modified to compile in RTEMS development environment - * by Eric Valette - * - * Copyright (C) 1999 Eric Valette. valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_OPENPIC_H -#define _RTEMS_OPENPIC_H - - /* - * OpenPIC supports up to 2048 interrupt sources and up to 32 processors - */ -#define OPENPIC_MAX_SOURCES 2048 -#define OPENPIC_MAX_PROCESSORS 32 - -#define OPENPIC_NUM_TIMERS 4 -#define OPENPIC_NUM_IPI 4 -#define OPENPIC_NUM_PRI 16 -#define OPENPIC_NUM_VECTORS 256 - - /* - * Vector numbers - */ - -#define OPENPIC_VEC_SOURCE 0x10 /* and up */ -#define OPENPIC_VEC_TIMER 0x40 /* and up */ -#define OPENPIC_VEC_IPI 0x50 /* and up */ -#define OPENPIC_VEC_SPURIOUS 99 - - /* - * OpenPIC Registers are 32 bits and aligned on 128 bit boundaries - */ - -typedef struct _OpenPIC_Reg { - unsigned int Reg; /* Little endian! */ - char Pad[0xc]; -} OpenPIC_Reg; - - /* - * Per Processor Registers - */ - -typedef struct _OpenPIC_Processor { - /* - * Private Shadow Registers (for SLiC backwards compatibility) - */ - unsigned int IPI0_Dispatch_Shadow; /* Write Only */ - char Pad1[0x4]; - unsigned int IPI0_Vector_Priority_Shadow; /* Read/Write */ - char Pad2[0x34]; - /* - * Interprocessor Interrupt Command Ports - */ - OpenPIC_Reg _IPI_Dispatch[OPENPIC_NUM_IPI]; /* Write Only */ - /* - * Current Task Priority Register - */ - OpenPIC_Reg _Current_Task_Priority; /* Read/Write */ - char Pad3[0x10]; - /* - * Interrupt Acknowledge Register - */ - OpenPIC_Reg _Interrupt_Acknowledge; /* Read Only */ - /* - * End of Interrupt (EOI) Register - */ - OpenPIC_Reg _EOI; /* Read/Write */ - char Pad5[0xf40]; -} OpenPIC_Processor; - - /* - * Timer Registers - */ - -typedef struct _OpenPIC_Timer { - OpenPIC_Reg _Current_Count; /* Read Only */ - OpenPIC_Reg _Base_Count; /* Read/Write */ - OpenPIC_Reg _Vector_Priority; /* Read/Write */ - OpenPIC_Reg _Destination; /* Read/Write */ -} OpenPIC_Timer; - - /* - * Global Registers - */ - -typedef struct _OpenPIC_Global { - /* - * Feature Reporting Registers - */ - OpenPIC_Reg _Feature_Reporting0; /* Read Only */ - OpenPIC_Reg _Feature_Reporting1; /* Future Expansion */ - /* - * Global Configuration Registers - */ - OpenPIC_Reg _Global_Configuration0; /* Read/Write */ - OpenPIC_Reg _Global_Configuration1; /* Future Expansion */ - /* - * Vendor Specific Registers - */ - OpenPIC_Reg _Vendor_Specific[4]; - /* - * Vendor Identification Register - */ - OpenPIC_Reg _Vendor_Identification; /* Read Only */ - /* - * Processor Initialization Register - */ - OpenPIC_Reg _Processor_Initialization; /* Read/Write */ - /* - * IPI Vector/Priority Registers - */ - OpenPIC_Reg _IPI_Vector_Priority[OPENPIC_NUM_IPI]; /* Read/Write */ - /* - * Spurious Vector Register - */ - OpenPIC_Reg _Spurious_Vector; /* Read/Write */ - /* - * Global Timer Registers - */ - OpenPIC_Reg _Timer_Frequency; /* Read/Write */ - OpenPIC_Timer Timer[OPENPIC_NUM_TIMERS]; - char Pad1[0xee00]; -} OpenPIC_Global; - - /* - * Interrupt Source Registers - */ - -typedef struct _OpenPIC_Source { - OpenPIC_Reg _Vector_Priority; /* Read/Write */ - OpenPIC_Reg _Destination; /* Read/Write */ -} OpenPIC_Source; - - /* - * OpenPIC Register Map - */ - -struct OpenPIC { - char Pad1[0x1000]; - /* - * Global Registers - */ - OpenPIC_Global Global; - /* - * Interrupt Source Configuration Registers - */ - OpenPIC_Source Source[OPENPIC_MAX_SOURCES]; - /* - * Per Processor Registers - */ - OpenPIC_Processor Processor[OPENPIC_MAX_PROCESSORS]; -}; - -extern volatile struct OpenPIC *OpenPIC; - - /* - * Current Task Priority Register - */ - -#define OPENPIC_CURRENT_TASK_PRIORITY_MASK 0x0000000f - - /* - * Who Am I Register - */ - -#define OPENPIC_WHO_AM_I_ID_MASK 0x0000001f - - /* - * Feature Reporting Register 0 - */ - -#define OPENPIC_FEATURE_LAST_SOURCE_MASK 0x07ff0000 -#define OPENPIC_FEATURE_LAST_SOURCE_SHIFT 16 -#define OPENPIC_FEATURE_LAST_PROCESSOR_MASK 0x00001f00 -#define OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT 8 -#define OPENPIC_FEATURE_VERSION_MASK 0x000000ff - - /* - * Global Configuration Register 0 - */ - -#define OPENPIC_CONFIG_RESET 0x80000000 -#define OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE 0x20000000 -#define OPENPIC_CONFIG_BASE_MASK 0x000fffff - - /* - * Vendor Identification Register - */ - -#define OPENPIC_VENDOR_ID_STEPPING_MASK 0x00ff0000 -#define OPENPIC_VENDOR_ID_STEPPING_SHIFT 16 -#define OPENPIC_VENDOR_ID_DEVICE_ID_MASK 0x0000ff00 -#define OPENPIC_VENDOR_ID_DEVICE_ID_SHIFT 8 -#define OPENPIC_VENDOR_ID_VENDOR_ID_MASK 0x000000ff - - /* - * Vector/Priority Registers - */ - -#define OPENPIC_MASK 0x80000000 -#define OPENPIC_ACTIVITY 0x40000000 /* Read Only */ -#define OPENPIC_PRIORITY_MASK 0x000f0000 -#define OPENPIC_PRIORITY_SHIFT 16 -#define OPENPIC_VECTOR_MASK 0x000000ff - - /* - * Interrupt Source Registers - */ - -#define OPENPIC_SENSE_POLARITY 0x00800000 /* Undoc'd */ -#define OPENPIC_SENSE_LEVEL 0x00400000 - - /* - * Timer Registers - */ - -#define OPENPIC_COUNT_MASK 0x7fffffff -#define OPENPIC_TIMER_TOGGLE 0x80000000 -#define OPENPIC_TIMER_COUNT_INHIBIT 0x80000000 - - /* - * Aliases to make life simpler - */ - -/* Per Processor Registers */ -#define IPI_Dispatch(i) _IPI_Dispatch[i].Reg -#define Current_Task_Priority _Current_Task_Priority.Reg -#define Interrupt_Acknowledge _Interrupt_Acknowledge.Reg -#define EOI _EOI.Reg - -/* Global Registers */ -#define Feature_Reporting0 _Feature_Reporting0.Reg -#define Feature_Reporting1 _Feature_Reporting1.Reg -#define Global_Configuration0 _Global_Configuration0.Reg -#define Global_Configuration1 _Global_Configuration1.Reg -#define Vendor_Specific(i) _Vendor_Specific[i].Reg -#define Vendor_Identification _Vendor_Identification.Reg -#define Processor_Initialization _Processor_Initialization.Reg -#define IPI_Vector_Priority(i) _IPI_Vector_Priority[i].Reg -#define Spurious_Vector _Spurious_Vector.Reg -#define Timer_Frequency _Timer_Frequency.Reg - -/* Timer Registers */ -#define Current_Count _Current_Count.Reg -#define Base_Count _Base_Count.Reg -#define Vector_Priority _Vector_Priority.Reg -#define Destination _Destination.Reg - -/* Interrupt Source Registers */ -#define Vector_Priority _Vector_Priority.Reg -#define Destination _Destination.Reg - - /* - * Vendor and Device IDs - */ - -#define OPENPIC_VENDOR_ID_APPLE 0x14 -#define OPENPIC_DEVICE_ID_APPLE_HYDRA 0x46 - - /* - * OpenPIC Operations - */ - -/* - * Handle EPIC differences. Unfortunately, I don't know of an easy - * way to tell an EPIC from a normal PIC at run-time. Therefore, - * the BSP must enable a few quirks if it knows that an EPIC is being - * used: - * - If the BSP uses the serial interrupt mode / 'multiplexer' then - * EOI must be delayed by at least 16 SRAM_CLK cycles to avoid - * spurious interrupts. - * It is the BSP's responsibility to set up an appropriate delay - * (in timebase-clock cycles) at init time using - * 'openpic_set_eoi_delay()'. This is ONLY necessary when using - * an EPIC in serial mode. - * - The EPIC sources start at an offset of 16 in the register - * map, i.e., on an EPIC you'd say Sources[ x + 16 ] where - * on a PIC you would say Sources[ x ]. - * Again, the BSP can set an offset that is used by the - * calls dealing with 'Interrupt Sources' - * openpic_enable_irq() - * openpic_disable_irq() - * openpic_initirq() - * openpic_mapirq() - * openpic_set_sense() - * openpic_get_source_priority() - * openpic_set_source_priority() - * the desired source offset parameter is passed to openpic_init(). - * - * The routine 'openpic_set_eoi_delay()' returns the previous/old - * value of the delay parameter. - */ -extern unsigned openpic_set_eoi_delay(unsigned tb_cycles); - - -/* Global Operations */ - -/* num_sources: number of sources to use; if zero this value - * is read from the device, if nonzero the value read from - * the device is overridden. - * 'polarities' and 'senses' are arrays defining the desired - * polarities (active hi [nonzero]/lo [zero]) and - * senses (level [nonzero]/edge [zero]). - * Either of the two array pointers may be NULL resulting - * in the driver choosing default values of: 'active low' - * and 'level sensitive', respectively. - * NOTE: if you do pass arrays then their size must either - * match the number of sources read from the device or - * that value must be overridden by specifying - * a non-zero 'num_sources' parameter. - * - * Nonzero 'epic_freq' activates the EOI delay if the EPIC is - * configured in serial mode (driver assumes firmware performs initial - * EPIC setup). The BSP must pass the clock frequency of the EPIC - * serial interface here. - */ -extern void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses, int num_sources, int source_offset, unsigned long epic_freq); - -extern void openpic_reset(void); -extern void openpic_enable_8259_pass_through(void); -extern void openpic_disable_8259_pass_through(void); -extern unsigned int openpic_irq(unsigned int cpu); -extern void openpic_eoi(unsigned int cpu); -extern unsigned int openpic_get_priority(unsigned int cpu); -extern void openpic_set_priority(unsigned int cpu, unsigned int pri); -extern unsigned int openpic_get_spurious(void); -extern void openpic_set_spurious(unsigned int vector); -extern void openpic_init_processor(unsigned int cpumask); - -/* Interprocessor Interrupts */ -extern void openpic_initipi(unsigned int ipi, unsigned int pri, unsigned int vector); -extern void openpic_cause_IPI(unsigned int cpu, unsigned int ipi, unsigned int cpumask); - -/* Timer Interrupts */ -extern void openpic_inittimer(unsigned int timer, unsigned int pri, unsigned int vector); -extern void openpic_settimer(unsigned int timer, unsigned int base_count, int irq_enable); -extern unsigned int openpic_gettimer(unsigned int timer); -extern void openpic_maptimer(unsigned int timer, unsigned int cpumask); - -/* Interrupt Sources */ -extern void openpic_enable_irq(unsigned int irq); -extern int openpic_disable_irq(unsigned int irq); -extern void openpic_initirq(unsigned int irq, unsigned int pri, unsigned int vector, int polarity, - int is_level); -extern void openpic_mapirq(unsigned int irq, unsigned int cpumask); -extern void openpic_set_sense(unsigned int irq, int sense); -extern unsigned int openpic_get_source_priority(unsigned int irq); -extern void openpic_set_source_priority(unsigned int irq, unsigned int pri); - -#endif /* RTEMS_OPENPIC_H */ diff --git a/c/src/lib/libbsp/powerpc/shared/pci/pci.h b/c/src/lib/libbsp/powerpc/shared/pci/pci.h deleted file mode 100644 index 42dc43875b..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/pci/pci.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * PCI defines and function prototypes - * - * For more information, please consult the following manuals (look at - * http://www.pcisig.com/ for how to get them): - * - * PCI BIOS Specification - * PCI Local Bus Specification - * PCI to PCI Bridge Specification - * PCI System Design Guide - */ - -/* - * Copyright 1994, Drew Eckhardt - * Copyright 1997, 1998 Martin Mares <mj@atrey.karlin.mff.cuni.cz> - */ - -#ifndef BSP_POWERPC_PCI_H -#define BSP_POWERPC_PCI_H - -#include <rtems/pci.h> -#include <stdio.h> - -struct _pin_routes -{ - int pin; - int int_name[4]; -}; -struct _int_map -{ - int bus; - int slot; - int opts; - struct _pin_routes pin_route[5]; -}; - -/* If there's a conflict between a name in the routing table and - * what's already set on the device, reprogram the device setting - * to reflect int_name[0] for the routing table entry - */ -#define PCI_FIXUP_OPT_OVERRIDE_NAME (1<<0) - -/* - * This is assumed to be provided by the BSP. - */ -void detect_host_bridge(void); - -void FixupPCI( const struct _int_map *, int (*swizzler)(int,int) ); - -/* FIXME: This probably belongs into rtems/pci.h */ -extern unsigned char pci_bus_count(); - -/* FIXME: This also is generic and could go into rtems/pci.h */ - -/* Scan pci config space and run a user callback on each - * device present; the user callback may return 0 to - * continue the scan or a value > 0 to abort the scan. - * Return values < 0 are reserved and must not be used. - * - * RETURNS: a (opaque) handle pointing to the bus/slot/fn-triple - * just after where the scan was aborted by a callback - * returning 1 (see above) or NULL if all devices were - * scanned. - * The handle may be passed to this routine to resume the - * scan continuing with the device after the one causing the - * abort. - * Pass a NULL 'handle' argument to start scanning from - * the beginning (bus/slot/fn = 0/0/0). - */ -typedef void *BSP_PciScanHandle; -typedef int (*BSP_PciScannerCb)(int bus, int slot, int fun, void *uarg); - -BSP_PciScanHandle -BSP_pciScan(BSP_PciScanHandle handle, BSP_PciScannerCb cb, void *uarg); - -/* Dump basic config. space info to a file. The argument may - * be NULL in which case 'stdout' is used. - * NOTE: the C-library must be functional before you can use - * this routine. - */ -void -BSP_pciConfigDump(FILE *fp); - -#endif /* BSP_POWERPC_PCI_H */ diff --git a/c/src/lib/libbsp/powerpc/shared/residual/pnp.h b/c/src/lib/libbsp/powerpc/shared/residual/pnp.h deleted file mode 100644 index 203a1a46d3..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/residual/pnp.h +++ /dev/null @@ -1,644 +0,0 @@ -/* 11/02/95 */ -/*----------------------------------------------------------------------------*/ -/* Plug and Play header definitions */ -/*----------------------------------------------------------------------------*/ - -/* Structure map for PnP on PowerPC Reference Platform */ -/* See Plug and Play ISA Specification, Version 1.0, May 28, 1993. It */ -/* (or later versions) is available on Compuserve in the PLUGPLAY area. */ -/* This code has extensions to that specification, namely new short and */ -/* long tag types for platform dependent information */ - -/* Warning: LE notation used throughout this file */ - -/* For enum's: if given in hex then they are bit significant, i.e. */ -/* only one bit is on for each enum */ - - -#ifndef _PNP_ -#define _PNP_ - -#ifndef ASM -#define MAX_MEM_REGISTERS 9 -#define MAX_IO_PORTS 20 -#define MAX_IRQS 7 -/*#define MAX_DMA_CHANNELS 7*/ - -/* Interrupt controllers */ - -#define PNPinterrupt0 "PNP0000" /* AT Interrupt Controller */ -#define PNPinterrupt1 "PNP0001" /* EISA Interrupt Controller */ -#define PNPinterrupt2 "PNP0002" /* MCA Interrupt Controller */ -#define PNPinterrupt3 "PNP0003" /* APIC */ -#define PNPExtInt "IBM000D" /* PowerPC Extended Interrupt Controller */ - -/* Timers */ - -#define PNPtimer0 "PNP0100" /* AT Timer */ -#define PNPtimer1 "PNP0101" /* EISA Timer */ -#define PNPtimer2 "PNP0102" /* MCA Timer */ - -/* DMA controllers */ - -#define PNPdma0 "PNP0200" /* AT DMA Controller */ -#define PNPdma1 "PNP0201" /* EISA DMA Controller */ -#define PNPdma2 "PNP0202" /* MCA DMA Controller */ - -/* start of August 15, 1994 additions */ -/* CMOS */ -#define PNPCMOS "IBM0009" /* CMOS */ - -/* L2 Cache */ -#define PNPL2 "IBM0007" /* L2 Cache */ - -/* NVRAM */ -#define PNPNVRAM "IBM0008" /* NVRAM */ - -/* Power Management */ -#define PNPPM "IBM0005" /* Power Management */ -/* end of August 15, 1994 additions */ - -/* Keyboards */ - -#define PNPkeyboard0 "PNP0300" /* IBM PC/XT KB Cntlr (83 key, no mouse) */ -#define PNPkeyboard1 "PNP0301" /* Olivetti ICO (102 key) */ -#define PNPkeyboard2 "PNP0302" /* IBM PC/AT KB Cntlr (84 key) */ -#define PNPkeyboard3 "PNP0303" /* IBM Enhanced (101/2 key, PS/2 mouse) */ -#define PNPkeyboard4 "PNP0304" /* Nokia 1050 KB Cntlr */ -#define PNPkeyboard5 "PNP0305" /* Nokia 9140 KB Cntlr */ -#define PNPkeyboard6 "PNP0306" /* Standard Japanese KB Cntlr */ -#define PNPkeyboard7 "PNP0307" /* Microsoft Windows (R) KB Cntlr */ - -/* Parallel port controllers */ - -#define PNPparallel0 "PNP0400" /* Standard LPT Parallel Port */ -#define PNPparallel1 "PNP0401" /* ECP Parallel Port */ -#define PNPepp "IBM001C" /* EPP Parallel Port */ - -/* Serial port controllers */ - -#define PNPserial0 "PNP0500" /* Standard PC Serial port */ -#define PNPSerial1 "PNP0501" /* 16550A Compatible Serial port */ - -/* Disk controllers */ - -#define PNPdisk0 "PNP0600" /* Generic ESDI/IDE/ATA Compat HD Cntlr */ -#define PNPdisk1 "PNP0601" /* Plus Hardcard II */ -#define PNPdisk2 "PNP0602" /* Plus Hardcard IIXL/EZ */ - -/* Diskette controllers */ - -#define PNPdiskette0 "PNP0700" /* PC Standard Floppy Disk Controller */ - -/* Display controllers */ - -#define PNPdisplay0 "PNP0900" /* VGA Compatible */ -#define PNPdisplay1 "PNP0901" /* Video Seven VGA */ -#define PNPdisplay2 "PNP0902" /* 8514/A Compatible */ -#define PNPdisplay3 "PNP0903" /* Trident VGA */ -#define PNPdisplay4 "PNP0904" /* Cirrus Logic Laptop VGA */ -#define PNPdisplay5 "PNP0905" /* Cirrus Logic VGA */ -#define PNPdisplay6 "PNP0906" /* Tseng ET4000 or ET4000/W32 */ -#define PNPdisplay7 "PNP0907" /* Western Digital VGA */ -#define PNPdisplay8 "PNP0908" /* Western Digital Laptop VGA */ -#define PNPdisplay9 "PNP0909" /* S3 */ -#define PNPdisplayA "PNP090A" /* ATI Ultra Pro/Plus (Mach 32) */ -#define PNPdisplayB "PNP090B" /* ATI Ultra (Mach 8) */ -#define PNPdisplayC "PNP090C" /* XGA Compatible */ -#define PNPdisplayD "PNP090D" /* ATI VGA Wonder */ -#define PNPdisplayE "PNP090E" /* Weitek P9000 Graphics Adapter */ -#define PNPdisplayF "PNP090F" /* Oak Technology VGA */ - -/* Peripheral busses */ - -#define PNPbuses0 "PNP0A00" /* ISA Bus */ -#define PNPbuses1 "PNP0A01" /* EISA Bus */ -#define PNPbuses2 "PNP0A02" /* MCA Bus */ -#define PNPbuses3 "PNP0A03" /* PCI Bus */ -#define PNPbuses4 "PNP0A04" /* VESA/VL Bus */ - -/* RTC, BIOS, planar devices */ - -#define PNPspeaker0 "PNP0800" /* AT Style Speaker Sound */ -#define PNPrtc0 "PNP0B00" /* AT RTC */ -#define PNPpnpbios0 "PNP0C00" /* PNP BIOS (only created by root enum) */ -#define PNPpnpbios1 "PNP0C01" /* System Board Memory Device */ -#define PNPpnpbios2 "PNP0C02" /* Math Coprocessor */ -#define PNPpnpbios3 "PNP0C03" /* PNP BIOS Event Notification Interrupt */ - -/* PCMCIA controller */ - -#define PNPpcmcia0 "PNP0E00" /* Intel 82365 Compatible PCMCIA Cntlr */ - -/* Mice */ - -#define PNPmouse0 "PNP0F00" /* Microsoft Bus Mouse */ -#define PNPmouse1 "PNP0F01" /* Microsoft Serial Mouse */ -#define PNPmouse2 "PNP0F02" /* Microsoft Inport Mouse */ -#define PNPmouse3 "PNP0F03" /* Microsoft PS/2 Mouse */ -#define PNPmouse4 "PNP0F04" /* Mousesystems Mouse */ -#define PNPmouse5 "PNP0F05" /* Mousesystems 3 Button Mouse - COM2 */ -#define PNPmouse6 "PNP0F06" /* Genius Mouse - COM1 */ -#define PNPmouse7 "PNP0F07" /* Genius Mouse - COM2 */ -#define PNPmouse8 "PNP0F08" /* Logitech Serial Mouse */ -#define PNPmouse9 "PNP0F09" /* Microsoft Ballpoint Serial Mouse */ -#define PNPmouseA "PNP0F0A" /* Microsoft PNP Mouse */ -#define PNPmouseB "PNP0F0B" /* Microsoft PNP Ballpoint Mouse */ - -/* Modems */ - -#define PNPmodem0 "PNP9000" /* Specific IDs TBD */ - -/* Network controllers */ - -#define PNPnetworkC9 "PNP80C9" /* IBM Token Ring */ -#define PNPnetworkCA "PNP80CA" /* IBM Token Ring II */ -#define PNPnetworkCB "PNP80CB" /* IBM Token Ring II/Short */ -#define PNPnetworkCC "PNP80CC" /* IBM Token Ring 4/16Mbs */ -#define PNPnetwork27 "PNP8327" /* IBM Token Ring (All types) */ -#define PNPnetworket "IBM0010" /* IBM Ethernet used by Power PC */ -#define PNPneteisaet "IBM2001" /* IBM Ethernet EISA adapter */ -#define PNPAMD79C970 "IBM0016" /* AMD 79C970 (PCI Ethernet) */ - -/* SCSI controllers */ - -#define PNPscsi0 "PNPA000" /* Adaptec 154x Compatible SCSI Cntlr */ -#define PNPscsi1 "PNPA001" /* Adaptec 174x Compatible SCSI Cntlr */ -#define PNPscsi2 "PNPA002" /* Future Domain 16-700 Compat SCSI Cntlr*/ -#define PNPscsi3 "PNPA003" /* Panasonic CDROM Adapter (SBPro/SB16) */ -#define PNPscsiF "IBM000F" /* NCR 810 SCSI Controller */ -#define PNPscsi825 "IBM001B" /* NCR 825 SCSI Controller */ -#define PNPscsi875 "IBM0018" /* NCR 875 SCSI Controller */ - -/* Sound/Video, Multimedia */ - -#define PNPmm0 "PNPB000" /* Sound Blaster Compatible Sound Device */ -#define PNPmm1 "PNPB001" /* MS Windows Sound System Compat Device */ -#define PNPmmF "IBM000E" /* Crystal CS4231 Audio Device */ -#define PNPv7310 "IBM0015" /* ASCII V7310 Video Capture Device */ -#define PNPmm4232 "IBM0017" /* Crystal CS4232 Audio Device */ -#define PNPpmsyn "IBM001D" /* YMF 289B chip (Yamaha) */ -#define PNPgp4232 "IBM0012" /* Crystal CS4232 Game Port */ -#define PNPmidi4232 "IBM0013" /* Crystal CS4232 MIDI */ - -/* Operator Panel */ -#define PNPopctl "IBM000B" /* Operator's panel */ - -/* Service Processor */ -#define PNPsp "IBM0011" /* IBM Service Processor */ -#define PNPLTsp "IBM001E" /* Lightning/Terlingua Support Processor */ -#define PNPLTmsp "IBM001F" /* Lightning/Terlingua Mini-SP */ - -/* Memory Controller */ -#define PNPmemctl "IBM000A" /* Memory controller */ - -/* Graphics Assist */ -#define PNPg_assist "IBM0014" /* Graphics Assist */ - -/* Miscellaneous Device Controllers */ -#define PNPtablet "IBM0019" /* IBM Tablet Controller */ - -/* PNP Packet Handles */ - -#define S1_Packet 0x0A /* Version resource */ -#define S2_Packet 0x15 /* Logical DEVID (without flags) */ -#define S2_Packet_flags 0x16 /* Logical DEVID (with flags) */ -#define S3_Packet 0x1C /* Compatible device ID */ -#define S4_Packet 0x22 /* IRQ resource (without flags) */ -#define S4_Packet_flags 0x23 /* IRQ resource (with flags) */ -#define S5_Packet 0x2A /* DMA resource */ -#define S6_Packet 0x30 /* Depend funct start (w/o priority) */ -#define S6_Packet_priority 0x31 /* Depend funct start (w/ priority) */ -#define S7_Packet 0x38 /* Depend funct end */ -#define S8_Packet 0x47 /* I/O port resource (w/o fixed loc) */ -#define S9_Packet_fixed 0x4B /* I/O port resource (w/ fixed loc) */ -#define S14_Packet 0x71 /* Vendor defined */ -#define S15_Packet 0x78 /* End of resource (w/o checksum) */ -#define S15_Packet_checksum 0x79 /* End of resource (w/ checksum) */ -#define L1_Packet 0x81 /* Memory range */ -#define L1_Shadow 0x20 /* Memory is shadowable */ -#define L1_32bit_mem 0x18 /* 32-bit memory only */ -#define L1_8_16bit_mem 0x10 /* 8- and 16-bit supported */ -#define L1_Decode_Hi 0x04 /* decode supports high address */ -#define L1_Cache 0x02 /* read cacheable, write-through */ -#define L1_Writeable 0x01 /* Memory is writeable */ -#define L2_Packet 0x82 /* ANSI ID string */ -#define L3_Packet 0x83 /* Unicode ID string */ -#define L4_Packet 0x84 /* Vendor defined */ -#define L5_Packet 0x85 /* Large I/O */ -#define L6_Packet 0x86 /* 32-bit Fixed Loc Mem Range Desc */ -#define END_TAG 0x78 /* End of resource */ -#define DF_START_TAG 0x30 /* Dependent function start */ -#define DF_START_TAG_priority 0x31 /* Dependent function start */ -#define DF_END_TAG 0x38 /* Dependent function end */ -#define SUBOPTIMAL_CONFIGURATION 0x2 /* Priority byte sub optimal config */ - -/* Device Base Type Codes */ - -typedef enum _PnP_BASE_TYPE { - Reserved = 0, - MassStorageDevice = 1, - NetworkInterfaceController = 2, - DisplayController = 3, - MultimediaController = 4, - MemoryController = 5, - BridgeController = 6, - CommunicationsDevice = 7, - SystemPeripheral = 8, - InputDevice = 9, - ServiceProcessor = 0x0A, /* 11/2/95 */ - } PnP_BASE_TYPE; - -/* Device Sub Type Codes */ - -typedef enum _PnP_SUB_TYPE { - SCSIController = 0, - IDEController = 1, - FloppyController = 2, - IPIController = 3, - OtherMassStorageController = 0x80, - - EthernetController = 0, - TokenRingController = 1, - FDDIController = 2, - OtherNetworkController = 0x80, - - VGAController= 0, - SVGAController= 1, - XGAController= 2, - OtherDisplayController = 0x80, - - VideoController = 0, - AudioController = 1, - OtherMultimediaController = 0x80, - - RAM = 0, - FLASH = 1, - OtherMemoryDevice = 0x80, - - HostProcessorBridge = 0, - ISABridge = 1, - EISABridge = 2, - MicroChannelBridge = 3, - PCIBridge = 4, - PCMCIABridge = 5, - VMEBridge = 6, - OtherBridgeDevice = 0x80, - - RS232Device = 0, - ATCompatibleParallelPort = 1, - OtherCommunicationsDevice = 0x80, - - ProgrammableInterruptController = 0, - DMAController = 1, - SystemTimer = 2, - RealTimeClock = 3, - L2Cache = 4, - NVRAM = 5, - PowerManagement = 6, - CMOS = 7, - OperatorPanel = 8, - ServiceProcessorClass1 = 9, - ServiceProcessorClass2 = 0xA, - ServiceProcessorClass3 = 0xB, - GraphicAssist = 0xC, - SystemPlanar = 0xF, /* 10/5/95 */ - OtherSystemPeripheral = 0x80, - - KeyboardController = 0, - Digitizer = 1, - MouseController = 2, - TabletController = 3, /* 10/27/95 */ - OtherInputController = 0x80, - - GeneralMemoryController = 0, - } PnP_SUB_TYPE; - -/* Device Interface Type Codes */ - -typedef enum _PnP_INTERFACE { - General = 0, - GeneralSCSI = 0, - GeneralIDE = 0, - ATACompatible = 1, - - GeneralFloppy = 0, - Compatible765 = 1, - NS398_Floppy = 2, /* NS Super I/O wired to use index - register at port 398 and data - register at port 399 */ - NS26E_Floppy = 3, /* Ports 26E and 26F */ - NS15C_Floppy = 4, /* Ports 15C and 15D */ - NS2E_Floppy = 5, /* Ports 2E and 2F */ - CHRP_Floppy = 6, /* CHRP Floppy in PR*P system */ - - GeneralIPI = 0, - - GeneralEther = 0, - GeneralToken = 0, - GeneralFDDI = 0, - - GeneralVGA = 0, - GeneralSVGA = 0, - GeneralXGA = 0, - - GeneralVideo = 0, - GeneralAudio = 0, - CS4232Audio = 1, /* CS 4232 Plug 'n Play Configured */ - - GeneralRAM = 0, - GeneralFLASH = 0, - PCIMemoryController = 0, /* PCI Config Method */ - RS6KMemoryController = 1, /* RS6K Config Method */ - - GeneralHostBridge = 0, - GeneralISABridge = 0, - GeneralEISABridge = 0, - GeneralMCABridge = 0, - GeneralPCIBridge = 0, - PCIBridgeDirect = 0, - PCIBridgeIndirect = 1, - PCIBridgeRS6K = 2, - GeneralPCMCIABridge = 0, - GeneralVMEBridge = 0, - - GeneralRS232 = 0, - COMx = 1, - Compatible16450 = 2, - Compatible16550 = 3, - NS398SerPort = 4, /* NS Super I/O wired to use index - register at port 398 and data - register at port 399 */ - NS26ESerPort = 5, /* Ports 26E and 26F */ - NS15CSerPort = 6, /* Ports 15C and 15D */ - NS2ESerPort = 7, /* Ports 2E and 2F */ - - GeneralParPort = 0, - LPTx = 1, - NS398ParPort = 2, /* NS Super I/O wired to use index - register at port 398 and data - register at port 399 */ - NS26EParPort = 3, /* Ports 26E and 26F */ - NS15CParPort = 4, /* Ports 15C and 15D */ - NS2EParPort = 5, /* Ports 2E and 2F */ - - GeneralPIC = 0, - ISA_PIC = 1, - EISA_PIC = 2, - MPIC = 3, - RS6K_PIC = 4, - - GeneralDMA = 0, - ISA_DMA = 1, - EISA_DMA = 2, - - GeneralTimer = 0, - ISA_Timer = 1, - EISA_Timer = 2, - GeneralRTC = 0, - ISA_RTC = 1, - - StoreThruOnly = 1, - StoreInEnabled = 2, - RS6KL2Cache = 3, - - IndirectNVRAM = 0, /* Indirectly addressed */ - DirectNVRAM = 1, /* Memory Mapped */ - IndirectNVRAM24 = 2, /* Indirectly addressed - 24 bit */ - - GeneralPowerManagement = 0, - EPOWPowerManagement = 1, - PowerControl = 2, /* d1378 */ - - GeneralCMOS = 0, - - GeneralOPPanel = 0, - HarddiskLight = 1, - CDROMLight = 2, - PowerLight = 3, - KeyLock = 4, - ANDisplay = 5, /* AlphaNumeric Display */ - SystemStatusLED = 6, /* 3 digit 7 segment LED */ - CHRP_SystemStatusLED = 7, /* CHRP LEDs in PR*P system */ - - GeneralServiceProcessor = 0, - - TransferData = 1, - IGMC32 = 2, - IGMC64 = 3, - - GeneralSystemPlanar = 0, /* 10/5/95 */ - - } PnP_INTERFACE; - -/* PnP resources */ - -/* Compressed ASCII is 5 bits per char; 00001=A ... 11010=Z */ - -typedef struct _SERIAL_ID { - unsigned char VendorID0; /* Bit(7)=0 */ - /* Bits(6:2)=1st character in */ - /* compressed ASCII */ - /* Bits(1:0)=2nd character in */ - /* compressed ASCII bits(4:3) */ - unsigned char VendorID1; /* Bits(7:5)=2nd character in */ - /* compressed ASCII bits(2:0) */ - /* Bits(4:0)=3rd character in */ - /* compressed ASCII */ - unsigned char VendorID2; /* Product number - vendor assigned */ - unsigned char VendorID3; /* Product number - vendor assigned */ - -/* Serial number is to provide uniqueness if more than one board of same */ -/* type is in system. Must be "FFFFFFFF" if feature not supported. */ - - unsigned char Serial0; /* Unique serial number bits (7:0) */ - unsigned char Serial1; /* Unique serial number bits (15:8) */ - unsigned char Serial2; /* Unique serial number bits (23:16) */ - unsigned char Serial3; /* Unique serial number bits (31:24) */ - unsigned char Checksum; - } SERIAL_ID; - -typedef enum _PnPItemName { - Unused = 0, - PnPVersion = 1, - LogicalDevice = 2, - CompatibleDevice = 3, - IRQFormat = 4, - DMAFormat = 5, - StartDepFunc = 6, - EndDepFunc = 7, - IOPort = 8, - FixedIOPort = 9, - Res1 = 10, - Res2 = 11, - Res3 = 12, - SmallVendorItem = 14, - EndTag = 15, - MemoryRange = 1, - ANSIIdentifier = 2, - UnicodeIdentifier = 3, - LargeVendorItem = 4, - MemoryRange32 = 5, - MemoryRangeFixed32 = 6, - } PnPItemName; - -/* Define a bunch of access functions for the bits in the tag field */ - -/* Tag type - 0 = small; 1 = large */ -#define tag_type(t) (((t) & 0x80)>>7) -#define set_tag_type(t,v) (t = (t & 0x7f) | ((v)<<7)) - -/* Small item name is 4 bits - one of PnPItemName enum above */ -#define tag_small_item_name(t) (((t) & 0x78)>>3) -#define set_tag_small_item_name(t,v) (t = (t & 0x07) | ((v)<<3)) - -/* Small item count is 3 bits - count of further bytes in packet */ -#define tag_small_count(t) ((t) & 0x07) -#define set_tag_count(t,v) (t = (t & 0x78) | (v)) - -/* Large item name is 7 bits - one of PnPItemName enum above */ -#define tag_large_item_name(t) ((t) & 0x7f) -#define set_tag_large_item_name(t,v) (t = (t | 0x80) | (v)) - -/* a PnP resource is a bunch of contiguous TAG packets ending with an end tag */ - -typedef union _PnP_TAG_PACKET { - struct _S1_Pack{ /* VERSION PACKET */ - unsigned char Tag; /* small tag = 0x0a */ - unsigned char Version[2]; /* PnP version, Vendor version */ - } S1_Pack; - - struct _S2_Pack{ /* LOGICAL DEVICE ID PACKET */ - unsigned char Tag; /* small tag = 0x15 or 0x16 */ - unsigned char DevId[4]; /* Logical device id */ - unsigned char Flags[2]; /* bit(0) boot device; */ - /* bit(7:1) cmd in range x31-x37 */ - /* bit(7:0) cmd in range x28-x3f (opt)*/ - } S2_Pack; - - struct _S3_Pack{ /* COMPATIBLE DEVICE ID PACKET */ - unsigned char Tag; /* small tag = 0x1c */ - unsigned char CompatId[4]; /* Compatible device id */ - } S3_Pack; - - struct _S4_Pack{ /* IRQ PACKET */ - unsigned char Tag; /* small tag = 0x22 or 0x23 */ - unsigned char IRQMask[2]; /* bit(0) is IRQ0, ...; */ - /* bit(0) is IRQ8 ... */ - unsigned char IRQInfo; /* optional; assume bit(0)=1; else */ - /* bit(0) - high true edge sensitive */ - /* bit(1) - low true edge sensitive */ - /* bit(2) - high true level sensitive*/ - /* bit(3) - low true level sensitive */ - /* bit(7:4) - must be 0 */ - } S4_Pack; - - struct _S5_Pack{ /* DMA PACKET */ - unsigned char Tag; /* small tag = 0x2a */ - unsigned char DMAMask; /* bit(0) is channel 0 ... */ - unsigned char DMAInfo; - } S5_Pack; - - struct _S6_Pack{ /* START DEPENDENT FUNCTION PACKET */ - unsigned char Tag; /* small tag = 0x30 or 0x31 */ - unsigned char Priority; /* Optional; if missing then x01; else*/ - /* x00 = best possible */ - /* x01 = acceptible */ - /* x02 = sub-optimal but functional */ - } S6_Pack; - - struct _S7_Pack{ /* END DEPENDENT FUNCTION PACKET */ - unsigned char Tag; /* small tag = 0x38 */ - } S7_Pack; - - struct _S8_Pack{ /* VARIABLE I/O PORT PACKET */ - unsigned char Tag; /* small tag x47 */ - unsigned char IOInfo; /* x0 = decode only bits(9:0); */ -#define ISAAddr16bit 0x01 /* x01 = decode bits(15:0) */ - unsigned char RangeMin[2]; /* Min base address */ - unsigned char RangeMax[2]; /* Max base address */ - unsigned char IOAlign; /* base alignmt, incr in 1B blocks */ - unsigned char IONum; /* number of contiguous I/O ports */ - } S8_Pack; - - struct _S9_Pack{ /* FIXED I/O PORT PACKET */ - unsigned char Tag; /* small tag = 0x4b */ - unsigned char Range[2]; /* base address 10 bits */ - unsigned char IONum; /* number of contiguous I/O ports */ - } S9_Pack; - - struct _S14_Pack{ /* VENDOR DEFINED PACKET */ - unsigned char Tag; /* small tag = 0x7m m = 1-7 */ - union _S14_Data{ - unsigned char Data[7]; /* Vendor defined */ - struct _S14_PPCPack{ /* Pr*p s14 pack */ - unsigned char Type; /* 00=non-IBM */ - unsigned char PPCData[6]; /* Vendor defined */ - } S14_PPCPack; - } S14_Data; - } S14_Pack; - - struct _S15_Pack{ /* END PACKET */ - unsigned char Tag; /* small tag = 0x78 or 0x79 */ - unsigned char Check; /* optional - checksum */ - } S15_Pack; - - struct _L1_Pack{ /* MEMORY RANGE PACKET */ - unsigned char Tag; /* large tag = 0x81 */ - unsigned char Count0; /* x09 */ - unsigned char Count1; /* x00 */ - unsigned char Data[9]; /* a variable array of bytes, */ - /* count in tag */ - } L1_Pack; - - struct _L2_Pack{ /* ANSI ID STRING PACKET */ - unsigned char Tag; /* large tag = 0x82 */ - unsigned char Count0; /* Length of string */ - unsigned char Count1; - unsigned char Identifier[1]; /* a variable array of bytes, */ - /* count in tag */ - } L2_Pack; - - struct _L3_Pack{ /* UNICODE ID STRING PACKET */ - unsigned char Tag; /* large tag = 0x83 */ - unsigned char Count0; /* Length + 2 of string */ - unsigned char Count1; - unsigned char Country0; /* TBD */ - unsigned char Country1; /* TBD */ - unsigned char Identifier[1]; /* a variable array of bytes, */ - /* count in tag */ - } L3_Pack; - - struct _L4_Pack{ /* VENDOR DEFINED PACKET */ - unsigned char Tag; /* large tag = 0x84 */ - unsigned char Count0; - unsigned char Count1; - union _L4_Data{ - unsigned char Data[1]; /* a variable array of bytes, */ - /* count in tag */ - struct _L4_PPCPack{ /* Pr*p L4 packet */ - unsigned char Type; /* 00=non-IBM */ - unsigned char PPCData[1]; /* a variable array of bytes, */ - /* count in tag */ - } L4_PPCPack; - } L4_Data; - } L4_Pack; - - struct _L5_Pack{ - unsigned char Tag; /* large tag = 0x85 */ - unsigned char Count0; /* Count = 17 */ - unsigned char Count1; - unsigned char Data[17]; - } L5_Pack; - - struct _L6_Pack{ - unsigned char Tag; /* large tag = 0x86 */ - unsigned char Count0; /* Count = 9 */ - unsigned char Count1; - unsigned char Data[9]; - } L6_Pack; - - } PnP_TAG_PACKET; - -#endif /* ASM */ -#endif /* ndef _PNP_ */ diff --git a/c/src/lib/libbsp/powerpc/shared/residual/residual.h b/c/src/lib/libbsp/powerpc/shared/residual/residual.h deleted file mode 100644 index 1bf1a34e20..0000000000 --- a/c/src/lib/libbsp/powerpc/shared/residual/residual.h +++ /dev/null @@ -1,356 +0,0 @@ -/* 7/18/95 */ -/*----------------------------------------------------------------------------*/ -/* Residual Data header definitions and prototypes */ -/*----------------------------------------------------------------------------*/ - -/* Structure map for RESIDUAL on PowerPC Reference Platform */ -/* residual.h - Residual data structure passed in r3. */ -/* Load point passed in r4 to boot image. */ -/* For enum's: if given in hex then they are bit significant, */ -/* i.e. only one bit is on for each enum */ -/* Reserved fields must be filled with zeros. */ - - -#ifndef _RESIDUAL_ -#define _RESIDUAL_ - -#ifndef ASM - -#include <stdint.h> - -#define MAX_CPUS 32 /* These should be set to the maximum */ -#define MAX_MEMS 64 /* number possible for this system. */ -#define MAX_DEVICES 256 /* Changing these will change the */ -#define AVE_PNP_SIZE 32 /* structure, hence the version of */ -#define MAX_MEM_SEGS 64 /* this header file. */ - -/*----------------------------------------------------------------------------*/ -/* Public structures... */ -/*----------------------------------------------------------------------------*/ - -#include <bsp/pnp.h> - -typedef enum _L1CACHE_TYPE { - NoneCAC = 0, - SplitCAC = 1, - CombinedCAC = 2 - } L1CACHE_TYPE; - -typedef enum _TLB_TYPE { - NoneTLB = 0, - SplitTLB = 1, - CombinedTLB = 2 - } TLB_TYPE; - -typedef enum _FIRMWARE_SUPPORT { - Conventional = 0x01, - OpenFirmware = 0x02, - Diagnostics = 0x04, - LowDebug = 0x08, - Multiboot = 0x10, - LowClient = 0x20, - Hex41 = 0x40, - FAT = 0x80, - ISO9660 = 0x0100, - SCSI_InitiatorID_Override = 0x0200, - Tape_Boot = 0x0400, - FW_Boot_Path = 0x0800 - } FIRMWARE_SUPPORT; - -typedef enum _FIRMWARE_SUPPLIERS { - IBMFirmware = 0x00, - MotoFirmware = 0x01, /* 7/18/95 */ - FirmWorks = 0x02, /* 10/5/95 */ - Bull = 0x03, /* 04/03/96 */ - QEMU = ('q'<<24) | ('e'<<16) | ('m'<<8) | ('u'<<0), - } FIRMWARE_SUPPLIERS; - -typedef enum _ENDIAN_SWITCH_METHODS { - UsePort92 = 0x01, - UsePCIConfigA8 = 0x02, - UseFF001030 = 0x03, - } ENDIAN_SWITCH_METHODS; - -typedef enum _SPREAD_IO_METHODS { - UsePort850 = 0x00, -/*UsePCIConfigA8 = 0x02,*/ - } SPREAD_IO_METHODS; - -typedef struct _VPD { - - /* Box dependent stuff */ - unsigned char PrintableModel[32]; /* Null terminated string. - Must be of the form: - vvv,<20h>,<model designation>,<0x0> - where vvv is the vendor ID - e.g. IBM PPS MODEL 6015<0x0> */ - unsigned char Serial[16]; /* 12/94: - Serial Number; must be of the form: - vvv<serial number> where vvv is the - vendor ID. - e.g. IBM60151234567<20h><20h> */ - unsigned char Reserved[48]; - unsigned long FirmwareSupplier; /* See FirmwareSuppliers enum */ - unsigned long FirmwareSupports; /* See FirmwareSupport enum */ - unsigned long NvramSize; /* Size of nvram in bytes */ - unsigned long NumSIMMSlots; - unsigned short EndianSwitchMethod; /* See EndianSwitchMethods enum */ - unsigned short SpreadIOMethod; /* See SpreadIOMethods enum */ - unsigned long SmpIar; - unsigned long RAMErrLogOffset; /* Heap offset to error log */ - unsigned long Reserved5; - unsigned long Reserved6; - unsigned long ProcessorHz; /* Processor clock frequency in Hertz */ - unsigned long ProcessorBusHz; /* Processor bus clock frequency */ - unsigned long Reserved7; - unsigned long TimeBaseDivisor; /* (Bus clocks per timebase tic)*1000 */ - unsigned long WordWidth; /* Word width in bits */ - unsigned long PageSize; /* Page size in bytes */ - unsigned long CoherenceBlockSize; /* Unit of transfer in/out of cache - for which coherency is maintained; - normally <= CacheLineSize. */ - unsigned long GranuleSize; /* Unit of lock allocation to avoid */ - /* false sharing of locks. */ - - /* L1 Cache variables */ - unsigned long CacheSize; /* L1 Cache size in KB. This is the */ - /* total size of the L1, whether */ - /* combined or split */ - unsigned long CacheAttrib; /* L1CACHE_TYPE */ - unsigned long CacheAssoc; /* L1 Cache associativity. Use this - for combined cache. If split, put - zeros here. */ - unsigned long CacheLineSize; /* L1 Cache line size in bytes. Use - for combined cache. If split, put - zeros here. */ - /* For split L1 Cache: (= combined if combined cache) */ - unsigned long I_CacheSize; - unsigned long I_CacheAssoc; - unsigned long I_CacheLineSize; - unsigned long D_CacheSize; - unsigned long D_CacheAssoc; - unsigned long D_CacheLineSize; - - /* Translation Lookaside Buffer variables */ - unsigned long TLBSize; /* Total number of TLBs on the system */ - unsigned long TLBAttrib; /* Combined I+D or split TLB */ - unsigned long TLBAssoc; /* TLB Associativity. Use this for - combined TLB. If split, put zeros - here. */ - /* For split TLB: (= combined if combined TLB) */ - unsigned long I_TLBSize; - unsigned long I_TLBAssoc; - unsigned long D_TLBSize; - unsigned long D_TLBAssoc; - - unsigned long ExtendedVPD; /* Offset to extended VPD area; - null if unused */ - } VPD; - -typedef enum _DEVICE_FLAGS { - Enabled = 0x4000, /* 1 - PCI device is enabled */ - Integrated = 0x2000, - Failed = 0x1000, /* 1 - device failed POST code tests */ - Static = 0x0800, /* 0 - dynamically configurable - 1 - static */ - Dock = 0x0400, /* 0 - not a docking station device - 1 - is a docking station device */ - Boot = 0x0200, /* 0 - device cannot be used for BOOT - 1 - can be a BOOT device */ - Configurable = 0x0100, /* 1 - device is configurable */ - Disableable = 0x80, /* 1 - device can be disabled */ - PowerManaged = 0x40, /* 0 - not managed; 1 - managed */ - ReadOnly = 0x20, /* 1 - device is read only */ - Removable = 0x10, /* 1 - device is removable */ - ConsoleIn = 0x08, - ConsoleOut = 0x04, - Input = 0x02, - Output = 0x01 - } DEVICE_FLAGS; - -typedef enum _BUS_ID { - ISADEVICE = 0x01, - EISADEVICE = 0x02, - PCIDEVICE = 0x04, - PCMCIADEVICE = 0x08, - PNPISADEVICE = 0x10, - MCADEVICE = 0x20, - MXDEVICE = 0x40, /* Devices on mezzanine bus */ - PROCESSORDEVICE = 0x80, /* Devices on processor bus */ - VMEDEVICE = 0x100, - } BUS_ID; - -typedef struct _DEVICE_ID { - unsigned long BusId; /* See BUS_ID enum above */ - unsigned long DevId; /* Big Endian format */ - unsigned long SerialNum; /* For multiple usage of a single - DevId */ - unsigned long Flags; /* See DEVICE_FLAGS enum above */ - unsigned char BaseType; /* See pnp.h for bit definitions */ - unsigned char SubType; /* See pnp.h for bit definitions */ - unsigned char Interface; /* See pnp.h for bit definitions */ - unsigned char Spare; - } DEVICE_ID; - -typedef union _BUS_ACCESS { - struct _PnPAccess{ - unsigned char CSN; - unsigned char LogicalDevNumber; - unsigned short ReadDataPort; - } PnPAccess; - struct _ISAAccess{ - unsigned char SlotNumber; /* ISA Slot Number generally not - available; 0 if unknown */ - unsigned char LogicalDevNumber; - unsigned short ISAReserved; - } ISAAccess; - struct _MCAAccess{ - unsigned char SlotNumber; - unsigned char LogicalDevNumber; - unsigned short MCAReserved; - } MCAAccess; - struct _PCMCIAAccess{ - unsigned char SlotNumber; - unsigned char LogicalDevNumber; - unsigned short PCMCIAReserved; - } PCMCIAAccess; - struct _EISAAccess{ - unsigned char SlotNumber; - unsigned char FunctionNumber; - unsigned short EISAReserved; - } EISAAccess; - struct _PCIAccess{ - unsigned char BusNumber; - unsigned char DevFuncNumber; - unsigned short PCIReserved; - } PCIAccess; - struct _ProcBusAccess{ - unsigned char BusNumber; - unsigned char BUID; - unsigned short ProcBusReserved; - } ProcBusAccess; - } BUS_ACCESS; - -/* Per logical device information */ -typedef struct _PPC_DEVICE { - DEVICE_ID DeviceId; - BUS_ACCESS BusAccess; - - /* The following three are offsets into the DevicePnPHeap */ - /* All are in PnP compressed format */ - unsigned long AllocatedOffset; /* Allocated resource description */ - unsigned long PossibleOffset; /* Possible resource description */ - unsigned long CompatibleOffset; /* Compatible device identifiers */ - } PPC_DEVICE; - -typedef enum _CPU_STATE { - CPU_GOOD = 0, /* CPU is present, and active */ - CPU_GOOD_FW = 1, /* CPU is present, and in firmware */ - CPU_OFF = 2, /* CPU is present, but inactive */ - CPU_FAILED = 3, /* CPU is present, but failed POST */ - CPU_NOT_PRESENT = 255 /* CPU not present */ - } CPU_STATE; - -typedef struct _PPC_CPU { - unsigned long CpuType; /* Result of mfspr from Processor - Version Register (PVR). - PVR(0-15) = Version (e.g. 601) - PVR(16-31 = EC Level */ - unsigned char CpuNumber; /* CPU Number for this processor */ - unsigned char CpuState; /* CPU State, see CPU_STATE enum */ - unsigned short Reserved; - } PPC_CPU; - -typedef struct _PPC_MEM { - unsigned long SIMMSize; /* 0 - absent or bad - 8M, 32M (in MB) */ - } PPC_MEM; - -typedef enum _MEM_USAGE { - Other = 0x8000, - ResumeBlock = 0x4000, /* for use by power management */ - SystemROM = 0x2000, /* Flash memory (populated) */ - UnPopSystemROM = 0x1000, /* Unpopulated part of SystemROM area */ - IOMemory = 0x0800, - SystemIO = 0x0400, - SystemRegs = 0x0200, - PCIAddr = 0x0100, - PCIConfig = 0x80, - ISAAddr = 0x40, - Unpopulated = 0x20, /* Unpopulated part of System Memory */ - Free = 0x10, /* Free part of System Memory */ - BootImage = 0x08, /* BootImage part of System Memory */ - FirmwareCode = 0x04, /* FirmwareCode part of System Memory */ - FirmwareHeap = 0x02, /* FirmwareHeap part of System Memory */ - FirmwareStack = 0x01 /* FirmwareStack part of System Memory*/ - } MEM_USAGE; - -typedef struct _MEM_MAP { - unsigned long Usage; /* See MEM_USAGE above */ - unsigned long BasePage; /* Page number measured in 4KB pages */ - unsigned long PageCount; /* Page count measured in 4KB pages */ - } MEM_MAP; - -typedef struct _RESIDUAL { - unsigned long ResidualLength; /* Length of Residual */ - unsigned char Version; /* of this data structure */ - unsigned char Revision; /* of this data structure */ - unsigned short EC; /* of this data structure */ - /* VPD */ - VPD VitalProductData; - /* CPU */ - unsigned short MaxNumCpus; /* Max CPUs in this system */ - unsigned short ActualNumCpus; /* ActualNumCpus < MaxNumCpus means */ - /* that there are unpopulated or */ - /* otherwise unusable cpu locations */ - PPC_CPU Cpus[MAX_CPUS]; - /* Memory */ - unsigned long TotalMemory; /* Total amount of memory installed */ - unsigned long GoodMemory; /* Total amount of good memory */ - unsigned long ActualNumMemSegs; - MEM_MAP Segs[MAX_MEM_SEGS]; - unsigned long ActualNumMemories; - PPC_MEM Memories[MAX_MEMS]; - /* Devices */ - unsigned long ActualNumDevices; - PPC_DEVICE Devices[MAX_DEVICES]; - unsigned char DevicePnPHeap[2*MAX_DEVICES*AVE_PNP_SIZE]; - } RESIDUAL; - -#ifndef NULL -#define NULL 0 -#endif - -static inline int -residual_fw_is_qemu(RESIDUAL *r) -{ - return QEMU == r->VitalProductData.FirmwareSupplier; -} - -extern RESIDUAL residualCopy; - -extern void print_residual_device_info(void); -#ifndef __BOOT__ -extern PPC_DEVICE *residual_find_device(RESIDUAL *res, unsigned long BusMask, - unsigned char * DevID, int BaseType, - int SubType, int Interface, int n); -#else -extern PPC_DEVICE *residual_find_device(unsigned long BusMask, - unsigned char * DevID, int BaseType, - int SubType, int Interface, int n); -#endif -extern PnP_TAG_PACKET *PnP_find_packet(unsigned char *p, unsigned packet_tag, - int n); -extern PnP_TAG_PACKET *PnP_find_small_vendor_packet(unsigned char *p, - unsigned packet_type, - int n); -extern PnP_TAG_PACKET *PnP_find_large_vendor_packet(unsigned char *p, - unsigned packet_type, - int n); -/* - * Prototypes for methods called only from .S for dependency tracking - */ -uint32_t res_copy(void); - -#endif /* ASM */ -#endif /* ndef _RESIDUAL_ */ diff --git a/c/src/lib/libbsp/powerpc/ss555/Makefile.am b/c/src/lib/libbsp/powerpc/ss555/Makefile.am index a2cd12f4f2..afa059e5a3 100644 --- a/c/src/lib/libbsp/powerpc/ss555/Makefile.am +++ b/c/src/lib/libbsp/powerpc/ss555/Makefile.am @@ -4,28 +4,19 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h -include_bsp_HEADERS = irq/irq.h - EXTRA_DIST += times -dist_project_lib_DATA += startup/linkcmds - EXTRA_DIST += ../../powerpc/shared/start/rtems_crti.S rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = rtems_crti.$(OBJEXT) +project_lib_DATA += linkcmds + noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -55,5 +46,5 @@ libbsp_a_LIBADD = \ ../../../libcpu/@RTEMS_CPU@/mpc5xx/timer.rel \ ../../../libcpu/@RTEMS_CPU@/mpc5xx/vectors.rel -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/ss555/headers.am diff --git a/c/src/lib/libbsp/powerpc/ss555/configure.ac b/c/src/lib/libbsp/powerpc/ss555/configure.ac index f586a58bc2..159755d8eb 100644 --- a/c/src/lib/libbsp/powerpc/ss555/configure.ac +++ b/c/src/lib/libbsp/powerpc/ss555/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-mbx5xx],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/ss555.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/ss555/include/bsp.h b/c/src/lib/libbsp/powerpc/ss555/include/bsp.h deleted file mode 100644 index a82d10a667..0000000000 --- a/c/src/lib/libbsp/powerpc/ss555/include/bsp.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * This file includes definitions for the Intec SS555. - */ - -/* - * SS555 port sponsored by Defence Research and Development Canada - Suffield - * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) - * - * Derived from c/src/lib/libbsp/powerpc/mbx8xx/include/bsp.h: - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_SS555_BSP_H -#define LIBBSP_POWERPC_SS555_BSP_H - -#ifndef ASM - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <mpc5xx.h> -#include <mpc5xx/console.h> -#include <libcpu/vectors.h> -#include <bsp/irq.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Clock definitions - */ - -#define BSP_CRYSTAL_HZ 4000000 /* crystal frequency, Hz */ -#define BSP_CLOCK_HZ 40000000 /* CPU clock frequency, Hz - -/* - * I/O definitions - * - * The SS555 board includes a CPLD to control on-board features and - * off-board devices. - */ -typedef struct cpld_ { - uint8_t cs3a[32]; /* Chip select 3A */ - uint8_t pad0[0x200000 - 0x000020]; - - uint8_t cs3b[32]; /* Chip select 3B */ - uint8_t pad2[0x400000 - 0x200020]; - - uint8_t cs3c[32]; /* Chip select 3C */ - uint8_t pad4[0x600000 - 0x400020]; - - uint8_t cs3d[32]; /* Chip select 3D */ - uint8_t pad6[0x800000 - 0x600020]; - - uint8_t serial_ints; /* Enable/disable serial interrupts */ - uint8_t serial_resets; /* Enable/disable serial resets */ - uint8_t serial_ack; /* Acknowledge serial transfers */ - uint8_t pad8[0xA00000 - 0x800003]; - - uint8_t iflash_writess; /* Enable/disable internal-flash writes */ - uint8_t nflash_writess; /* Enable/disable NAND-flash writes */ - uint8_t padA[0xC00000 - 0xA00002]; -} cpld_t; - -extern volatile cpld_t cpld; /* defined in linkcmds */ - -/* clock/p_clock.c */ -extern int BSP_disconnect_clock_handler (void); - -extern int BSP_connect_clock_handler (rtems_irq_hdl hdl); - -/* - * Prototypes for methods called from .S to support dependency tracking. - */ -void _InitSS555(void); - -#ifdef __cplusplus -} -#endif - -#endif /* !ASM */ - -#endif diff --git a/c/src/lib/libbsp/powerpc/ss555/include/tm27.h b/c/src/lib/libbsp/powerpc/ss555/include/tm27.h deleted file mode 100644 index 5106801744..0000000000 --- a/c/src/lib/libbsp/powerpc/ss555/include/tm27.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * @file - * @ingroup powerpc_ss555 - * @brief Implementations for interrupt mechanisms for Time Test 27 - */ - -/* - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -/* - * Stuff for Time Test 27 - * - * The following require that IRQ7 be jumpered to ground. On the SS555, - * this can be done by shorting together CN5 pin 48 and CN5 pin 50. - */ - -#define MUST_WAIT_FOR_INTERRUPT 1 - -#define Install_tm27_vector( handler ) \ -{ \ - extern rtems_irq_connect_data tm27IrqData; \ - usiu.siel |= (1 << 17); \ - usiu.sipend |= (1 << 17); \ - \ - tm27IrqData.hdl = (rtems_irq_hdl)handler; \ - BSP_install_rtems_irq_handler (&tm27IrqData); \ -} - -#define Cause_tm27_intr() \ -{ \ - usiu.siel &= ~(1 << 17); \ -} - -#define Clear_tm27_intr() \ -{ \ - usiu.siel |= (1 << 17); \ - usiu.sipend |= (1 << 17); \ -} - -#define Lower_tm27_intr() \ -{ \ - ppc_cached_irq_mask |= (1 << 17); \ - usiu.simask = ppc_cached_irq_mask; \ -} - -#endif diff --git a/c/src/lib/libbsp/powerpc/ss555/irq/irq.h b/c/src/lib/libbsp/powerpc/ss555/irq/irq.h deleted file mode 100644 index 44e39608b1..0000000000 --- a/c/src/lib/libbsp/powerpc/ss555/irq/irq.h +++ /dev/null @@ -1,66 +0,0 @@ -/* irq.h - * - * This include file describe the data structure and the functions implemented - * by rtems to write interrupt handlers. - * - * - * SS555 port sponsored by Defence Research and Development Canada - Suffield - * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) - * - * Derived from libbsp/powerpc/mbx8xx/irq/irq.h: - * - * CopyRight (C) 1999 valette@crf.canon.fr - * - * This code is heavilly inspired by the public specification of STREAM V2 - * that can be found at : - * - * <http://www.chorus.com/Documentation/index.html> by following - * the STREAM API Specification Document link. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_SS555_IRQ_IRQ_H -#define LIBBSP_POWERPC_SS555_IRQ_IRQ_H - -#include <libcpu/irq.h> - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * These are no longer prototyped anywhere else. This appears to be - * remnants of the IRQ code upgrade. - * - * --joel 28 April 2010 - */ -int CPU_install_rtems_irq_handler(const rtems_irq_connect_data* irq); -int CPU_get_current_rtems_irq_handler(rtems_irq_connect_data* irq); -int CPU_remove_rtems_irq_handler(const rtems_irq_connect_data* irq); -int CPU_rtems_irq_mngt_set(rtems_irq_global_settings* config); -int CPU_rtems_irq_mngt_get(rtems_irq_global_settings** config); -void C_default_exception_handler(CPU_Exception_frame* excPtr); - -/* - * The SS555 has no external interrupt controller chip, so use the standard - * routines from the CPU-dependent code. - */ -#define BSP_install_rtems_irq_handler(ptr) CPU_install_rtems_irq_handler(ptr) -#define BSP_get_current_rtems_irq_handler(ptr) CPU_get_current_rtems_irq_handler(ptr) -#define BSP_remove_rtems_irq_handler(ptr) CPU_remove_rtems_irq_handler(ptr) -#define BSP_rtems_irq_mngt_set(config) CPU_rtems_irq_mngt_set(config) -#define BSP_rtems_irq_mngt_get(config) CPU_rtems_irq_mngt_get(config) -#define BSP_rtems_irq_mng_init(cpuId) CPU_rtems_irq_mng_init(cpuId) - -#ifdef __cplusplus -} -#endif - -#endif /* ASM */ - -#endif /* LIBBSP_POWERPC_SS555_IRQ_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/ss555/preinstall.am b/c/src/lib/libbsp/powerpc/ss555/preinstall.am deleted file mode 100644 index c051571ead..0000000000 --- a/c/src/lib/libbsp/powerpc/ss555/preinstall.am +++ /dev/null @@ -1,67 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - diff --git a/c/src/lib/libbsp/powerpc/ss555/bsp_specs b/c/src/lib/libbsp/powerpc/ss555/startup/bsp_specs index 2625609327..2625609327 100644 --- a/c/src/lib/libbsp/powerpc/ss555/bsp_specs +++ b/c/src/lib/libbsp/powerpc/ss555/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/t32mppc/Makefile.am b/c/src/lib/libbsp/powerpc/t32mppc/Makefile.am index 811e244dfb..bb7b7875ad 100644 --- a/c/src/lib/libbsp/powerpc/t32mppc/Makefile.am +++ b/c/src/lib/libbsp/powerpc/t32mppc/Makefile.am @@ -4,14 +4,8 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h DISTCLEANFILES = include/bspopts.h EXTRA_DIST += README @@ -19,15 +13,6 @@ EXTRA_DIST += README noinst_PROGRAMS = -include_bsp_HEADERS = include/irq.h \ - ../../shared/include/irq-generic.h \ - ../../shared/include/irq-info.h \ - ../../shared/include/bootcard.h \ - ../../shared/include/utility.h \ - ../shared/include/start.h \ - ../shared/include/tictac.h \ - ../shared/include/linker-symbols.h - EXTRA_DIST += start/start.S start.$(OBJEXT): start/start.S $(CPPASCOMPILE) -o $@ -c $< @@ -38,9 +23,9 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA += rtems_crti.$(OBJEXT) -dist_project_lib_DATA += startup/linkcmds \ - ../shared/startup/linkcmds.base \ - startup/linkcmds.t32mppc +project_lib_DATA += linkcmds +dist_project_lib_DATA += ../shared/startup/linkcmds.base +dist_project_lib_DATA += startup/linkcmds.t32mppc noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -88,5 +73,5 @@ if HAS_SMP libbsp_a_SOURCES += ../../shared/bspsmp.c endif -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/t32mppc/headers.am diff --git a/c/src/lib/libbsp/powerpc/t32mppc/configure.ac b/c/src/lib/libbsp/powerpc/t32mppc/configure.ac index efaf446f73..bb86f6149d 100644 --- a/c/src/lib/libbsp/powerpc/t32mppc/configure.ac +++ b/c/src/lib/libbsp/powerpc/t32mppc/configure.ac @@ -2,6 +2,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-qoriq],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/t32mppc.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.10]) @@ -33,7 +36,6 @@ AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") RTEMS_BSP_CLEANUP_OPTIONS RTEMS_PPC_EXCEPTIONS -RTEMS_BSP_LINKCMDS AC_CONFIG_FILES([Makefile]) AC_OUTPUT diff --git a/c/src/lib/libbsp/powerpc/t32mppc/include/bsp.h b/c/src/lib/libbsp/powerpc/t32mppc/include/bsp.h deleted file mode 100644 index c27f235ef6..0000000000 --- a/c/src/lib/libbsp/powerpc/t32mppc/include/bsp.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2012, 2017 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_T32MPPC_BSP_H -#define LIBBSP_POWERPC_T32MPPC_BSP_H - -#include <bspopts.h> - -#ifndef ASM - -#include <rtems.h> - -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define BSP_FEATURE_IRQ_EXTENSION - -extern uint32_t bsp_time_base_frequency; - -void t32mppc_decrementer_dispatch(void); - -#endif /* ASM */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_T32MPPC_BSP_H */ diff --git a/c/src/lib/libbsp/powerpc/t32mppc/include/irq.h b/c/src/lib/libbsp/powerpc/t32mppc/include/irq.h deleted file mode 100644 index 0053aa5ac1..0000000000 --- a/c/src/lib/libbsp/powerpc/t32mppc/include/irq.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright (c) 2012, 2017 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_T32MPPC_IRQ_H -#define LIBBSP_POWERPC_T32MPPC_IRQ_H - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> -#include <rtems/score/processormask.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define BSP_INTERRUPT_VECTOR_MIN 0 -#define BSP_INTERRUPT_VECTOR_MAX 0 - -RTEMS_INLINE_ROUTINE void bsp_interrupt_set_affinity( - rtems_vector_number vector, - const Processor_mask *affinity -) -{ - (void) vector; - (void) affinity; -} - -RTEMS_INLINE_ROUTINE void bsp_interrupt_get_affinity( - rtems_vector_number vector, - Processor_mask *affinity -) -{ - (void) vector; - _Processor_mask_From_index( affinity, 0 ); -} - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_POWERPC_T32MPPC_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/t32mppc/include/tm27.h b/c/src/lib/libbsp/powerpc/t32mppc/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/c/src/lib/libbsp/powerpc/t32mppc/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include <rtems/tm27-default.h> diff --git a/c/src/lib/libbsp/powerpc/t32mppc/preinstall.am b/c/src/lib/libbsp/powerpc/t32mppc/preinstall.am deleted file mode 100644 index 0dfb26fa4c..0000000000 --- a/c/src/lib/libbsp/powerpc/t32mppc/preinstall.am +++ /dev/null @@ -1,103 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h - -$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h - -$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h - -$(PROJECT_INCLUDE)/bsp/tictac.h: ../shared/include/tictac.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tictac.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tictac.h - -$(PROJECT_INCLUDE)/bsp/linker-symbols.h: ../shared/include/linker-symbols.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/linker-symbols.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/linker-symbols.h - -$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base - -$(PROJECT_LIB)/linkcmds.t32mppc: startup/linkcmds.t32mppc $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.t32mppc -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.t32mppc - diff --git a/c/src/lib/libbsp/powerpc/t32mppc/bsp_specs b/c/src/lib/libbsp/powerpc/t32mppc/startup/bsp_specs index f8bbffbdf6..f8bbffbdf6 100644 --- a/c/src/lib/libbsp/powerpc/t32mppc/bsp_specs +++ b/c/src/lib/libbsp/powerpc/t32mppc/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am b/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am index 5b21dc1b7a..5531021385 100644 --- a/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am +++ b/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am @@ -4,24 +4,12 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h noinst_PROGRAMS = -include_bsp_HEADERS = include/tqm.h include/8xx_immap.h \ - include/irq.h \ - ../../shared/include/irq-generic.h \ - ../../shared/include/irq-info.h \ - spi/spi.h EXTRA_DIST += start/start.S start.$(OBJEXT): start/start.S @@ -33,9 +21,9 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA += rtems_crti.$(OBJEXT) -project_lib_DATA += startup/linkcmds +project_lib_DATA += linkcmds +dist_project_lib_DATA += startup/linkcmds.tqm8xx dist_project_lib_DATA += startup/linkcmds.tqm8xx_base -EXTRA_DIST += startup/linkcmds.tqm8xx noinst_LIBRARIES = libbsp.a libbsp_a_SOURCES = @@ -92,5 +80,5 @@ if HAS_NETWORKING libbsp_a_LIBADD += network.rel endif -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/tqm8xx/headers.am diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/configure.ac b/c/src/lib/libbsp/powerpc/tqm8xx/configure.ac index e94c509ae6..57216624f1 100644 --- a/c/src/lib/libbsp/powerpc/tqm8xx/configure.ac +++ b/c/src/lib/libbsp/powerpc/tqm8xx/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-tqm8xx],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/pghplus.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) @@ -95,7 +98,6 @@ RTEMS_BSPOPTS_HELP([BSP_USE_NETWORK_SCC], AC_CONFIG_FILES([Makefile]) RTEMS_BSP_CLEANUP_OPTIONS -RTEMS_BSP_LINKCMDS RTEMS_PPC_EXCEPTIONS diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/include/8xx_immap.h b/c/src/lib/libbsp/powerpc/tqm8xx/include/8xx_immap.h deleted file mode 100644 index c1c414e25f..0000000000 --- a/c/src/lib/libbsp/powerpc/tqm8xx/include/8xx_immap.h +++ /dev/null @@ -1,477 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS BSP support for TQ modules | -+-----------------------------------------------------------------+ -| Partially based on the code references which are named below. | -| Adaptions, modifications, enhancements and any recent parts of | -| the code are: | -| Copyright (c) 2007 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains definitions to interact with TQC's | -| processor modules | -\*===============================================================*/ -/* derived from mbx8xx BSP */ -/* - * MPC8xx Internal Memory Map - * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - * - * The I/O on the MPC860 is comprised of blocks of special registers - * and the dual port ram for the Communication Processor Module. - * Within this space are functional units such as the SIU, memory - * controller, system timers, and other control functions. It is - * a combination that I found difficult to separate into logical - * functional files.....but anyone else is welcome to try. -- Dan - */ -#ifndef __IMMAP_8XX__ -#define __IMMAP_8XX__ - -/* System configuration registers. -*/ -typedef struct sys_conf { - unsigned int sc_siumcr; - unsigned int sc_sypcr; - unsigned int sc_swt; - char res1[2]; - unsigned short sc_swsr; - unsigned int sc_sipend; - unsigned int sc_simask; - unsigned int sc_siel; - unsigned int sc_sivec; - unsigned int sc_tesr; - char res2[0xc]; - unsigned int sc_sdcr; - char res3[0x4c]; -} sysconf8xx_t; - -/* PCMCIA configuration registers. -*/ -typedef struct pcmcia_conf { - unsigned int pcmc_pbr0; - unsigned int pcmc_por0; - unsigned int pcmc_pbr1; - unsigned int pcmc_por1; - unsigned int pcmc_pbr2; - unsigned int pcmc_por2; - unsigned int pcmc_pbr3; - unsigned int pcmc_por3; - unsigned int pcmc_pbr4; - unsigned int pcmc_por4; - unsigned int pcmc_pbr5; - unsigned int pcmc_por5; - unsigned int pcmc_pbr6; - unsigned int pcmc_por6; - unsigned int pcmc_pbr7; - unsigned int pcmc_por7; - char res1[0x20]; - unsigned int pcmc_pgcra; - unsigned int pcmc_pgcrb; - unsigned int pcmc_pscr; - char res2[4]; - unsigned int pcmc_pipr; - char res3[4]; - unsigned int pcmc_per; - char res4[4]; -} pcmconf8xx_t; - -/* Memory controller registers. -*/ -typedef struct mem_ctlr { - unsigned int memc_br0; - unsigned int memc_or0; - unsigned int memc_br1; - unsigned int memc_or1; - unsigned int memc_br2; - unsigned int memc_or2; - unsigned int memc_br3; - unsigned int memc_or3; - unsigned int memc_br4; - unsigned int memc_or4; - unsigned int memc_br5; - unsigned int memc_or5; - unsigned int memc_br6; - unsigned int memc_or6; - unsigned int memc_br7; - unsigned int memc_or7; - char res1[0x24]; - unsigned int memc_mar; - unsigned int memc_mcr; - char res2[4]; - unsigned int memc_mamr; - unsigned int memc_mbmr; - unsigned short memc_mstat; - unsigned short memc_mptpr; - unsigned int memc_mdr; - char res3[0x80]; -} memctl8xx_t; - -/* System Integration Timers. -*/ -typedef struct sys_int_timers { - unsigned short sit_tbscr; - unsigned int sit_tbreff0; - unsigned int sit_tbreff1; - char res1[0x14]; - unsigned short sit_rtcsc; - unsigned int sit_rtc; - unsigned int sit_rtsec; - unsigned int sit_rtcal; - char res2[0x10]; - unsigned short sit_piscr; - char res3[2]; - unsigned int sit_pitc; - unsigned int sit_pitr; - char res4[0x34]; -} sit8xx_t; - -#define TBSCR_TBIRQ_MASK ((unsigned short)0xff00) -#define TBSCR_REFA ((unsigned short)0x0080) -#define TBSCR_REFB ((unsigned short)0x0040) -#define TBSCR_REFAE ((unsigned short)0x0008) -#define TBSCR_REFBE ((unsigned short)0x0004) -#define TBSCR_TBF ((unsigned short)0x0002) -#define TBSCR_TBE ((unsigned short)0x0001) - -#define RTCSC_RTCIRQ_MASK ((unsigned short)0xff00) -#define RTCSC_SEC ((unsigned short)0x0080) -#define RTCSC_ALR ((unsigned short)0x0040) -#define RTCSC_38K ((unsigned short)0x0010) -#define RTCSC_SIE ((unsigned short)0x0008) -#define RTCSC_ALE ((unsigned short)0x0004) -#define RTCSC_RTF ((unsigned short)0x0002) -#define RTCSC_RTE ((unsigned short)0x0001) - -#define PISCR_PIRQ_MASK ((unsigned short)0xff00) -#define PISCR_PS ((unsigned short)0x0080) -#define PISCR_PIE ((unsigned short)0x0004) -#define PISCR_PTF ((unsigned short)0x0002) -#define PISCR_PTE ((unsigned short)0x0001) - -/* Clocks and Reset. -*/ -typedef struct clk_and_reset { - unsigned int car_sccr; - unsigned int car_plprcr; - unsigned int car_rsr; - char res[0x74]; /* Reserved area */ -} car8xx_t; - -/* System Integration Timers keys. -*/ -typedef struct sitk { - unsigned int sitk_tbscrk; - unsigned int sitk_tbreff0k; - unsigned int sitk_tbreff1k; - unsigned int sitk_tbk; - char res1[0x10]; - unsigned int sitk_rtcsck; - unsigned int sitk_rtck; - unsigned int sitk_rtseck; - unsigned int sitk_rtcalk; - char res2[0x10]; - unsigned int sitk_piscrk; - unsigned int sitk_pitck; - char res3[0x38]; -} sitk8xx_t; - -/* Clocks and reset keys. -*/ -typedef struct cark { - unsigned int cark_sccrk; - unsigned int cark_plprcrk; - unsigned int cark_rsrk; - char res[0x474]; -} cark8xx_t; - -/* The key to unlock registers maintained by keep-alive power. -*/ -#define KAPWR_KEY ((unsigned int)0x55ccaa33) - -/* LCD interface. MPC821 Only. -*/ -typedef struct lcd { - unsigned short lcd_lcolr[16]; - char res[0x20]; - unsigned int lcd_lccr; - unsigned int lcd_lchcr; - unsigned int lcd_lcvcr; - char res2[4]; - unsigned int lcd_lcfaa; - unsigned int lcd_lcfba; - char lcd_lcsr; - char res3[0x7]; -} lcd8xx_t; - -/* I2C -*/ -typedef struct i2c { - unsigned char i2c_i2mod; - char res1[3]; - unsigned char i2c_i2add; - char res2[3]; - unsigned char i2c_i2brg; - char res3[3]; - unsigned char i2c_i2com; - char res4[3]; - unsigned char i2c_i2cer; - char res5[3]; - unsigned char i2c_i2cmr; - char res6[0x8b]; -} i2c8xx_t; - -/* DMA control/status registers. -*/ -typedef struct sdma_csr { - char res1[4]; - unsigned int sdma_sdar; - unsigned char sdma_sdsr; - char res3[3]; - unsigned char sdma_sdmr; - char res4[3]; - unsigned char sdma_idsr1; - char res5[3]; - unsigned char sdma_idmr1; - char res6[3]; - unsigned char sdma_idsr2; - char res7[3]; - unsigned char sdma_idmr2; - char res8[0x13]; -} sdma8xx_t; - -/* Communication Processor Module Interrupt Controller. -*/ -typedef struct cpm_ic { - unsigned short cpic_civr; - char res[0xe]; - unsigned int cpic_cicr; - unsigned int cpic_cipr; - unsigned int cpic_cimr; - unsigned int cpic_cisr; -} cpic8xx_t; - -/* Input/Output Port control/status registers. -*/ -typedef struct io_port { - unsigned short iop_padir; - unsigned short iop_papar; - unsigned short iop_paodr; - unsigned short iop_padat; - char res1[8]; - unsigned short iop_pcdir; - unsigned short iop_pcpar; - unsigned short iop_pcso; - unsigned short iop_pcdat; - unsigned short iop_pcint; - char res2[6]; - unsigned short iop_pddir; - unsigned short iop_pdpar; - char res3[2]; - unsigned short iop_pddat; - char res4[8]; -} iop8xx_t; - -/* Communication Processor Module Timers -*/ -typedef struct cpm_timers { - unsigned short cpmt_tgcr; - char res1[0xe]; - unsigned short cpmt_tmr1; - unsigned short cpmt_tmr2; - unsigned short cpmt_trr1; - unsigned short cpmt_trr2; - unsigned short cpmt_tcr1; - unsigned short cpmt_tcr2; - unsigned short cpmt_tcn1; - unsigned short cpmt_tcn2; - unsigned short cpmt_tmr3; - unsigned short cpmt_tmr4; - unsigned short cpmt_trr3; - unsigned short cpmt_trr4; - unsigned short cpmt_tcr3; - unsigned short cpmt_tcr4; - unsigned short cpmt_tcn3; - unsigned short cpmt_tcn4; - unsigned short cpmt_ter1; - unsigned short cpmt_ter2; - unsigned short cpmt_ter3; - unsigned short cpmt_ter4; - char res2[8]; -} cpmtimer8xx_t; - -/* Finally, the Communication Processor stuff..... -*/ -typedef struct scc { /* Serial communication channels */ - unsigned int scc_gsmrl; - unsigned int scc_gsmrh; - unsigned short scc_pmsr; - char res1[2]; - unsigned short scc_todr; - unsigned short scc_dsr; - unsigned short scc_scce; - char res2[2]; - unsigned short scc_sccm; - char res3; - unsigned char scc_sccs; - char res4[8]; -} scc_t; - -typedef struct smc { /* Serial management channels */ - char res1[2]; - unsigned short smc_smcmr; - char res2[2]; - unsigned char smc_smce; - char res3[3]; - unsigned char smc_smcm; - char res4[5]; -} smc_t; - -/* MPC860T Fast Ethernet Controller. It isn't part of the CPM, but - * it fits within the address space. - */ -typedef struct fec { - unsigned int fec_addr_low; /* LS 32 bits of station address */ - unsigned short fec_addr_high; /* MS 16 bits of address */ - unsigned short res1; - unsigned int fec_hash_table_high; - unsigned int fec_hash_table_low; - unsigned int fec_r_des_start; - unsigned int fec_x_des_start; - unsigned int fec_r_buff_size; - unsigned int res2[9]; - unsigned int fec_ecntrl; - unsigned int fec_ievent; - unsigned int fec_imask; - unsigned int fec_ivec; - unsigned int fec_r_des_active; - unsigned int fec_x_des_active; - unsigned int res3[10]; - unsigned int fec_mii_data; - unsigned int fec_mii_speed; - unsigned int res4[17]; - unsigned int fec_r_bound; - unsigned int fec_r_fstart; - unsigned int res5[6]; - unsigned int fec_x_fstart; - unsigned int res6[17]; - unsigned int fec_fun_code; - unsigned int res7[3]; - unsigned int fec_r_cntrl; - unsigned int fec_r_hash; - unsigned int res8[14]; - unsigned int fec_x_cntrl; - unsigned int res9[0x1e]; -} fec_t; - -typedef struct comm_proc { - /* General control and status registers. - */ - unsigned short cp_cpcr; - char res1[2]; - unsigned short cp_rccr; - char res2[6]; - unsigned short cp_cpmcr1; - unsigned short cp_cpmcr2; - unsigned short cp_cpmcr3; - unsigned short cp_cpmcr4; - char res3[2]; - unsigned short cp_rter; - char res4[2]; - unsigned short cp_rtmr; - char res5[0x14]; - - /* Baud rate generators. - */ - unsigned int cp_brgc1; - unsigned int cp_brgc2; - unsigned int cp_brgc3; - unsigned int cp_brgc4; - - /* Serial Communication Channels. - */ - scc_t cp_scc[4]; - - /* Serial Management Channels. - */ - smc_t cp_smc[2]; - - /* Serial Peripheral Interface. - */ - unsigned short cp_spmode; - char res6[4]; - unsigned char cp_spie; - char res7[3]; - unsigned char cp_spim; - char res8[2]; - unsigned char cp_spcom; - char res9[2]; - - /* Parallel Interface Port. - */ - char res10[2]; - unsigned short cp_pipc; - char res11[2]; - unsigned short cp_ptpr; - unsigned int cp_pbdir; - unsigned int cp_pbpar; - char res12[2]; - unsigned short cp_pbodr; - unsigned int cp_pbdat; - char res13[0x18]; - - /* Serial Interface and Time Slot Assignment. - */ - unsigned int cp_simode; - unsigned char cp_sigmr; - char res14; - unsigned char cp_sistr; - unsigned char cp_sicmr; - char res15[4]; - unsigned int cp_sicr; - unsigned int cp_sirp; - char res16[0x10c]; - unsigned char cp_siram[0x200]; - - /* The fast ethernet controller is not really part of the CPM, - * but it resides in the address space. - */ - fec_t cp_fec; - char res18[0x1000]; - - /* Dual Ported RAM follows. - * There are many different formats for this memory area - * depending upon the devices used and options chosen. - */ - unsigned char cp_dpmem[0x1000]; /* BD / Data / ucode */ - unsigned char res19[0xc00]; - unsigned char cp_dparam[0x400]; /* Parameter RAM */ -} cpm8xx_t; - -/* Internal memory map. -*/ -typedef struct immap { - sysconf8xx_t im_siu_conf; /* SIU Configuration */ - pcmconf8xx_t im_pcmcia; /* PCMCIA Configuration */ - memctl8xx_t im_memctl; /* Memory Controller */ - sit8xx_t im_sit; /* System integration timers */ - car8xx_t im_clkrst; /* Clocks and reset */ - sitk8xx_t im_sitk; /* Sys int timer keys */ - cark8xx_t im_clkrstk; /* Clocks and reset keys */ - lcd8xx_t im_lcd; /* LCD (821 only) */ - i2c8xx_t im_i2c; /* I2C control/status */ - sdma8xx_t im_sdma; /* SDMA control/status */ - cpic8xx_t im_cpic; /* CPM Interrupt Controller */ - iop8xx_t im_ioport; /* IO Port control/status */ - cpmtimer8xx_t im_cpmtimer; /* CPM timers */ - cpm8xx_t im_cpm; /* Communication processor */ -} immap_t; - -#endif /* __IMMAP_8XX__ */ diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h b/c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h deleted file mode 100644 index 5c8eae81b4..0000000000 --- a/c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h +++ /dev/null @@ -1,169 +0,0 @@ -/* - * RTEMS TQM8xx BSP - * This include file contains all board IO definitions. - */ - -/* - * This file has been adapted to MPC8xx by: - * Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> - * Copyright (c) 2008 - * Embedded Brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * rtems@embedded-brains.de - * - * COPYRIGHT (c) 1989-2008. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_POWERPC_TQM8XX_BSP_H -#define LIBBSP_POWERPC_TQM8XX_BSP_H - -/* - * indicate, that BSP is booted via TQMMon - */ -#define BSP_HAS_TQMMON - -#include <libcpu/powerpc-utility.h> - -LINKER_SYMBOL(TopRamReserved); - -LINKER_SYMBOL( bsp_ram_start); -LINKER_SYMBOL( bsp_ram_end); -LINKER_SYMBOL( bsp_ram_size); - -LINKER_SYMBOL( bsp_rom_start); -LINKER_SYMBOL( bsp_rom_end); -LINKER_SYMBOL( bsp_rom_size); - -LINKER_SYMBOL( bsp_section_text_start); -LINKER_SYMBOL( bsp_section_text_end); -LINKER_SYMBOL( bsp_section_text_size); - -LINKER_SYMBOL( bsp_section_data_start); -LINKER_SYMBOL( bsp_section_data_end); -LINKER_SYMBOL( bsp_section_data_size); - -LINKER_SYMBOL( bsp_section_bss_start); -LINKER_SYMBOL( bsp_section_bss_end); -LINKER_SYMBOL( bsp_section_bss_size); - -LINKER_SYMBOL( bsp_interrupt_stack_start); -LINKER_SYMBOL( bsp_interrupt_stack_end); -LINKER_SYMBOL( bsp_interrupt_stack_size); - -LINKER_SYMBOL( bsp_work_area_start); - -#ifndef ASM - -#include <bspopts.h> - -#include <rtems.h> -#include <rtems/irq.h> -#include <mpc8xx.h> -#include <mpc8xx/cpm.h> -#include <mpc8xx/mmu.h> -#include <mpc8xx/console.h> -#include <bsp/vectors.h> -#include <bsp/tqm.h> -#include <libcpu/powerpc-utility.h> -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Network driver configuration - */ -struct rtems_bsdnet_ifconfig; - -#if BSP_USE_NETWORK_FEC -extern int rtems_fec_enet_driver_attach (struct rtems_bsdnet_ifconfig *config, - int attaching); -#define RTEMS_BSP_FEC_NETWORK_DRIVER_NAME "fec1" -#define RTEMS_BSP_FEC_NETWORK_DRIVER_ATTACH rtems_fec_enet_driver_attach -#endif - -#if BSP_USE_NETWORK_SCC -extern int rtems_scc_enet_driver_attach (struct rtems_bsdnet_ifconfig *config, - int attaching); -#define RTEMS_BSP_SCC_NETWORK_DRIVER_NAME "scc1" -#define RTEMS_BSP_SCC_NETWORK_DRIVER_ATTACH rtems_scc_enet_driver_attach -#endif - -#if BSP_USE_NETWORK_FEC -#define RTEMS_BSP_NETWORK_DRIVER_NAME RTEMS_BSP_FEC_NETWORK_DRIVER_NAME -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH RTEMS_BSP_FEC_NETWORK_DRIVER_ATTACH -#elif BSP_USE_NETWORK_SCC -#define RTEMS_BSP_NETWORK_DRIVER_NAME RTEMS_BSP_SCC_NETWORK_DRIVER_NAME -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH RTEMS_BSP_SCC_NETWORK_DRIVER_ATTACH -#endif -/* - * We need to decide how much memory will be non-cacheable. This - * will mainly be memory that will be used in DMA (network and serial - * buffers). - */ -#define NOCACHE_MEM_SIZE 512*1024 - -/* - * indicate, that BSP has IDE driver - */ -#undef RTEMS_BSP_HAS_IDE_DRIVER - -/* - * SPI driver configuration - */ - - /* select values for SPI addressing */ -#define PGHPLUS_SPI_ADDR_EEPROM 0 -#define PGHPLUS_SPI_ADDR_DISP4 1 - /* NOTE: DISP4 occupies two consecutive addresses for data and control port */ -#define PGHPLUS_SPI_ADDR_DISP4_DATA (PGHPLUS_SPI_ADDR_DISP4) -#define PGHPLUS_SPI_ADDR_DISP4_CTRL (PGHPLUS_SPI_ADDR_DISP4_DATA+1) - - /* bit masks for Port B lines */ -#define PGHPLUS_PB_SPI_EEP_CE_MSK (1<< 0) -#define PGHPLUS_PB_SPI_DISP4_RS_MSK (1<<15) -#define PGHPLUS_PB_SPI_DISP4_CE_MSK (1<<14) - -/* - * our (internal) bus frequency - */ -extern uint32_t BSP_bus_frequency; - -/* - * Interfaces to required Clock Driver support methods - */ -int BSP_disconnect_clock_handler(void); -int BSP_connect_clock_handler (rtems_irq_hdl); - -extern uint32_t bsp_clock_speed; - -char serial_getc(void); - -int serial_tstc(void); - -void serial_init(void); - -int mbx8xx_console_get_configuration(void); - -void _InitTQM8xx (void); - -rtems_status_code bsp_register_spi(void); - -void *bsp_idle_thread( uintptr_t ignored ); - -void cpu_init(void); - -#ifdef __cplusplus -} -#endif - -#endif -#endif diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/include/irq.h b/c/src/lib/libbsp/powerpc/tqm8xx/include/irq.h deleted file mode 100644 index 2d66829037..0000000000 --- a/c/src/lib/libbsp/powerpc/tqm8xx/include/irq.h +++ /dev/null @@ -1,160 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS TQM8xx BSP | -+-----------------------------------------------------------------+ -| This file has been adapted to MPC8xx by | -| Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | -| Copyright (c) 2008 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -| | -| See the other copyright notice below for the original parts. | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains the console driver | -\*===============================================================*/ -/* derived from: generic MPC83xx BSP */ -#ifndef TQM8xx_IRQ_IRQ_H -#define TQM8xx_IRQ_IRQ_H - -#include <stdbool.h> - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -/* - * the following definitions specify the indices used - * to interface the interrupt handler API - */ - -/* - * Peripheral IRQ handlers related definitions - */ -#define BSP_SIU_PER_IRQ_NUMBER 16 -#define BSP_SIU_IRQ_LOWEST_OFFSET 0 -#define BSP_SIU_IRQ_MAX_OFFSET (BSP_SIU_IRQ_LOWEST_OFFSET\ - +BSP_SIU_PER_IRQ_NUMBER-1) - -#define BSP_IS_SIU_IRQ(irqnum) \ - (((irqnum) >= BSP_SIU_IRQ_LOWEST_OFFSET) && \ - ((irqnum) <= BSP_SIU_IRQ_MAX_OFFSET)) - -#define BSP_CPM_PER_IRQ_NUMBER 32 -#define BSP_CPM_IRQ_LOWEST_OFFSET (BSP_SIU_IRQ_MAX_OFFSET+1) -#define BSP_CPM_IRQ_MAX_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET\ - +BSP_CPM_PER_IRQ_NUMBER-1) - -#define BSP_IS_CPM_IRQ(irqnum) \ - (((irqnum) >= BSP_CPM_IRQ_LOWEST_OFFSET) && \ - ((irqnum) <= BSP_CPM_IRQ_MAX_OFFSET)) -/* - * Processor IRQ handlers related definitions - */ -#define BSP_PROCESSOR_IRQ_NUMBER 1 -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET+1) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\ - +BSP_PROCESSOR_IRQ_NUMBER-1) - -#define BSP_IS_PROCESSOR_IRQ(irqnum) \ - (((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \ - ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET)) -/* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1) -#define BSP_LOWEST_OFFSET BSP_SIU_IRQ_LOWEST_OFFSET -#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET - -#define BSP_IS_VALID_IRQ(irqnum) \ - (BSP_IS_PROCESSOR_IRQ(irqnum) \ - || BSP_IS_SIU_IRQ(irqnum) \ - || BSP_IS_CPM_IRQ(irqnum)) - -#ifndef ASM -#ifdef __cplusplus -extern "C" { -#endif - -/* - * index table for the module specific handlers, a few entries are only placeholders - */ - typedef enum { - BSP_SIU_EXT_IRQ_0 = BSP_SIU_IRQ_LOWEST_OFFSET + 0, - BSP_SIU_INT_IRQ_0 = BSP_SIU_IRQ_LOWEST_OFFSET + 1, - BSP_SIU_EXT_IRQ_1 = BSP_SIU_IRQ_LOWEST_OFFSET + 2, - BSP_SIU_INT_IRQ_1 = BSP_SIU_IRQ_LOWEST_OFFSET + 3, - BSP_SIU_EXT_IRQ_2 = BSP_SIU_IRQ_LOWEST_OFFSET + 4, - BSP_SIU_INT_IRQ_2 = BSP_SIU_IRQ_LOWEST_OFFSET + 5, - BSP_SIU_EXT_IRQ_3 = BSP_SIU_IRQ_LOWEST_OFFSET + 6, - BSP_SIU_INT_IRQ_3 = BSP_SIU_IRQ_LOWEST_OFFSET + 7, - BSP_SIU_EXT_IRQ_4 = BSP_SIU_IRQ_LOWEST_OFFSET + 8, - BSP_SIU_INT_IRQ_4 = BSP_SIU_IRQ_LOWEST_OFFSET + 9, - BSP_SIU_EXT_IRQ_5 = BSP_SIU_IRQ_LOWEST_OFFSET + 10, - BSP_SIU_INT_IRQ_5 = BSP_SIU_IRQ_LOWEST_OFFSET + 11, - BSP_SIU_EXT_IRQ_6 = BSP_SIU_IRQ_LOWEST_OFFSET + 12, - BSP_SIU_INT_IRQ_6 = BSP_SIU_IRQ_LOWEST_OFFSET + 13, - BSP_SIU_EXT_IRQ_7 = BSP_SIU_IRQ_LOWEST_OFFSET + 14, - BSP_SIU_INT_IRQ_7 = BSP_SIU_IRQ_LOWEST_OFFSET + 15, - BSP_SIU_IRQ_LAST = BSP_SIU_IRQ_MAX_OFFSET, - /* - * Some CPM IRQ symbolic name definition - */ - BSP_CPM_IRQ_ERROR = (BSP_CPM_IRQ_LOWEST_OFFSET), - BSP_CPM_IRQ_PARALLEL_IO_PC4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 1), - BSP_CPM_IRQ_PARALLEL_IO_PC5 = (BSP_CPM_IRQ_LOWEST_OFFSET + 2), - BSP_CPM_IRQ_SMC2_OR_PIP = (BSP_CPM_IRQ_LOWEST_OFFSET + 3), - BSP_CPM_IRQ_SMC1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 4), - BSP_CPM_IRQ_SPI = (BSP_CPM_IRQ_LOWEST_OFFSET + 5), - BSP_CPM_IRQ_PARALLEL_IO_PC6 = (BSP_CPM_IRQ_LOWEST_OFFSET + 6), - BSP_CPM_IRQ_TIMER_4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 7), - BSP_CPM_IRQ_PARALLEL_IO_PC7 = (BSP_CPM_IRQ_LOWEST_OFFSET + 9), - BSP_CPM_IRQ_PARALLEL_IO_PC8 = (BSP_CPM_IRQ_LOWEST_OFFSET + 10), - BSP_CPM_IRQ_PARALLEL_IO_PC9 = (BSP_CPM_IRQ_LOWEST_OFFSET + 11), - BSP_CPM_IRQ_TIMER_3 = (BSP_CPM_IRQ_LOWEST_OFFSET + 12), - BSP_CPM_IRQ_PARALLEL_IO_PC10= (BSP_CPM_IRQ_LOWEST_OFFSET + 14), - BSP_CPM_IRQ_PARALLEL_IO_PC11= (BSP_CPM_IRQ_LOWEST_OFFSET + 15), - BSP_CPM_I2C = (BSP_CPM_IRQ_LOWEST_OFFSET + 16), - BSP_CPM_RISC_TIMER_TABLE = (BSP_CPM_IRQ_LOWEST_OFFSET + 17), - BSP_CPM_IRQ_TIMER_2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 18), - BSP_CPM_IDMA2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 20), - BSP_CPM_IDMA1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 21), - BSP_CPM_SDMA_CHANNEL_BUS_ERR= (BSP_CPM_IRQ_LOWEST_OFFSET + 22), - BSP_CPM_IRQ_PARALLEL_IO_PC12= (BSP_CPM_IRQ_LOWEST_OFFSET + 23), - BSP_CPM_IRQ_PARALLEL_IO_PC13= (BSP_CPM_IRQ_LOWEST_OFFSET + 24), - BSP_CPM_IRQ_TIMER_1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 25), - BSP_CPM_IRQ_PARALLEL_IO_PC14= (BSP_CPM_IRQ_LOWEST_OFFSET + 26), - BSP_CPM_IRQ_SCC4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 27), - BSP_CPM_IRQ_SCC3 = (BSP_CPM_IRQ_LOWEST_OFFSET + 28), - BSP_CPM_IRQ_SCC2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 29), - BSP_CPM_IRQ_SCC1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 30), - BSP_CPM_IRQ_PARALLEL_IO_PC15= (BSP_CPM_IRQ_LOWEST_OFFSET + 31), - BSP_CPM_IRQ_LAST = BSP_CPM_IRQ_MAX_OFFSET, - } rtems_irq_symbolic_name; - - /* - * Symbolic name for CPM interrupt on SIU Internal level 2 - */ -#define BSP_CPM_INTERRUPT BSP_SIU_INT_IRQ_2 -#define BSP_PERIODIC_TIMER BSP_SIU_INT_IRQ_6 -#define BSP_FAST_ETHERNET_CTRL BSP_SIU_INT_IRQ_3 - -#define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET - -#define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET - -extern int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine); - -#ifdef __cplusplus -} -#endif -#endif /* ASM */ - -#endif /* TQM8XX_IRQ_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/include/tm27.h b/c/src/lib/libbsp/powerpc/tqm8xx/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/c/src/lib/libbsp/powerpc/tqm8xx/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include <rtems/tm27-default.h> diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/include/tqm.h b/c/src/lib/libbsp/powerpc/tqm8xx/include/tqm.h deleted file mode 100644 index 11f6001304..0000000000 --- a/c/src/lib/libbsp/powerpc/tqm8xx/include/tqm.h +++ /dev/null @@ -1,51 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS BSP support for TQ modules | -+-----------------------------------------------------------------+ -| Partially based on the code references which are named below. | -| Adaptions, modifications, enhancements and any recent parts of | -| the code are: | -| Copyright (c) 2007 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains definitions to interact with TQC's | -| processor modules | -\*===============================================================*/ - -#ifndef __TQM_H__ -#define __TQM_H__ -#include <rtems.h> - -typedef struct { - uint32_t sdram_size; /* existing SDRAM size */ - uint32_t flash_base; /* start address flash */ - uint32_t flash_size; /* existing Flash size */ - uint32_t flash_offset; - uint32_t sram_base; /* start address sram */ - uint32_t sram_size; /* existing sram size */ - uint32_t immr_base; /* start address internal memory map */ - uint32_t reboot; /* reboot flag */ - uint8_t ip_addr[4]; /* IP address */ - uint8_t eth_addr[6]; /* ethernet (MAC) address */ - uint8_t gap_42[2]; /* gap for alignment */ - void (*put_char)(int c); /* function to output characters */ -} tqm_bd_info_t; - -#define TQM_BD_INFO_ADDR 0x3400 -#define TQM_BD_INFO (*(tqm_bd_info_t *)TQM_BD_INFO_ADDR) - -#define TQM_CONF_INFO_BLOCK_ADDR 0x4001fe00 - -#define IMAP_ADDR ((unsigned int)0xfa200000) -#define IMAP_SIZE ((unsigned int)(64 * 1024)) - -#endif /* __TQM_H__ */ diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am b/c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am deleted file mode 100644 index 5b27200561..0000000000 --- a/c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am +++ /dev/null @@ -1,95 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_INCLUDE)/bsp/tqm.h: include/tqm.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tqm.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tqm.h - -$(PROJECT_INCLUDE)/bsp/8xx_immap.h: include/8xx_immap.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/8xx_immap.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/8xx_immap.h - -$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h - -$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h - -$(PROJECT_INCLUDE)/bsp/spi.h: spi/spi.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/spi.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/spi.h - -$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_LIB)/linkcmds.tqm8xx_base: startup/linkcmds.tqm8xx_base $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.tqm8xx_base -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.tqm8xx_base - diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.h b/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.h deleted file mode 100644 index e2af971c8d..0000000000 --- a/c/src/lib/libbsp/powerpc/tqm8xx/spi/spi.h +++ /dev/null @@ -1,146 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS support for MPC8xx | -+-----------------------------------------------------------------+ -| Copyright (c) 2009 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains the MPC8xx SPI driver declarations | -\*===============================================================*/ -#ifndef _M8XX_SPIDRV_H -#define _M8XX_SPIDRV_H - -#include <mpc8xx.h> -#include <rtems/libi2c.h> -#include <rtems/irq.h> - -#ifdef __cplusplus -extern "C" { -#endif - -typedef struct m8xx_spi_softc { - int initialized; - rtems_id irq_sema_id; - rtems_isr_entry old_handler; - m8xxBufferDescriptor_t *rx_bd; - m8xxBufferDescriptor_t *tx_bd; -} m8xx_spi_softc_t ; - -typedef struct { - rtems_libi2c_bus_t bus_desc; - m8xx_spi_softc_t softc; -} m8xx_spi_desc_t; - -/*=========================================================================*\ -| Function: | -\*-------------------------------------------------------------------------*/ -rtems_status_code m8xx_spi_init -( -/*-------------------------------------------------------------------------*\ -| Purpose: | -| initialize the driver | -+---------------------------------------------------------------------------+ -| Input Parameters: | -\*-------------------------------------------------------------------------*/ - rtems_libi2c_bus_t *bh /* bus specifier structure */ - ); -/*-------------------------------------------------------------------------*\ -| Return Value: | -| o = ok or error code | -\*=========================================================================*/ - -/*=========================================================================*\ -| Function: | -\*-------------------------------------------------------------------------*/ -int m8xx_spi_read_bytes -( -/*-------------------------------------------------------------------------*\ -| Purpose: | -| receive some bytes from SPI device | -+---------------------------------------------------------------------------+ -| Input Parameters: | -\*-------------------------------------------------------------------------*/ - rtems_libi2c_bus_t *bh, /* bus specifier structure */ - unsigned char *buf, /* buffer to store bytes */ - int len /* number of bytes to receive */ - ); -/*-------------------------------------------------------------------------*\ -| Return Value: | -| number of bytes received or (negative) error code | -\*=========================================================================*/ - -/*=========================================================================*\ -| Function: | -\*-------------------------------------------------------------------------*/ -int m8xx_spi_write_bytes -( -/*-------------------------------------------------------------------------*\ -| Purpose: | -| send some bytes to SPI device | -+---------------------------------------------------------------------------+ -| Input Parameters: | -\*-------------------------------------------------------------------------*/ - rtems_libi2c_bus_t *bh, /* bus specifier structure */ - unsigned char *buf, /* buffer to send */ - int len /* number of bytes to send */ - - ); -/*-------------------------------------------------------------------------*\ -| Return Value: | -| number of bytes sent or (negative) error code | -\*=========================================================================*/ - -/*=========================================================================*\ -| Function: | -\*-------------------------------------------------------------------------*/ -rtems_status_code m8xx_spi_set_tfr_mode -( -/*-------------------------------------------------------------------------*\ -| Purpose: | -| set SPI to desired baudrate/clock mode/character mode | -+---------------------------------------------------------------------------+ -| Input Parameters: | -\*-------------------------------------------------------------------------*/ - rtems_libi2c_bus_t *bh, /* bus specifier structure */ - const rtems_libi2c_tfr_mode_t *tfr_mode /* transfer mode info */ - ); -/*-------------------------------------------------------------------------*\ -| Return Value: | -| rtems_status_code | -\*=========================================================================*/ - -/*=========================================================================*\ -| Function: | -\*-------------------------------------------------------------------------*/ -int m8xx_spi_ioctl -( -/*-------------------------------------------------------------------------*\ -| Purpose: | -| perform selected ioctl function for SPI | -+---------------------------------------------------------------------------+ -| Input Parameters: | -\*-------------------------------------------------------------------------*/ - rtems_libi2c_bus_t *bh, /* bus specifier structure */ - int cmd, /* ioctl command code */ - void *arg /* additional argument array */ - ); -/*-------------------------------------------------------------------------*\ -| Return Value: | -| rtems_status_code | -\*=========================================================================*/ - -#ifdef __cplusplus -} -#endif - - -#endif /* _M8XX_SPIDRV_H */ diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/bsp_specs b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bsp_specs index b5cd6764ce..b5cd6764ce 100644 --- a/c/src/lib/libbsp/powerpc/tqm8xx/bsp_specs +++ b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/virtex/Makefile.am b/c/src/lib/libbsp/powerpc/virtex/Makefile.am index 9b6de34f50..232ec7b190 100644 --- a/c/src/lib/libbsp/powerpc/virtex/Makefile.am +++ b/c/src/lib/libbsp/powerpc/virtex/Makefile.am @@ -4,29 +4,16 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp +dist_project_lib_DATA = startup/bsp_specs -dist_project_lib_DATA = bsp_specs - -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h -include_HEADERS += include/xparameters_dflt.h if HAS_NETWORKING -include_HEADERS += network/xiltemac.h endif -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h - -include_bsp_HEADERS = - DISTCLEANFILES = include/bspopts.h noinst_PROGRAMS = -include_bsp_HEADERS += ../shared/include/linker-symbols.h - EXTRA_DIST += start/start.S start.$(OBJEXT): start/start.S $(CPPASCOMPILE) -o $@ -c $< @@ -38,7 +25,7 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S project_lib_DATA += rtems_crti.$(OBJEXT) # Link commands -project_lib_DATA += startup/linkcmds +project_lib_DATA += linkcmds dist_project_lib_DATA += ../shared/startup/linkcmds.base noinst_LIBRARIES = libbsp.a @@ -60,10 +47,6 @@ libbsp_a_SOURCES += console/consolelite.c ../../shared/console.c \ ../../shared/console_read.c ../../shared/console_write.c # irq -include_bsp_HEADERS += ../../shared/include/irq-generic.h -include_bsp_HEADERS += ../../shared/include/irq-info.h -include_bsp_HEADERS += include/opbintctrl.h -include_bsp_HEADERS += irq/irq.h libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c libbsp_a_SOURCES += ../../shared/src/irq-generic.c libbsp_a_SOURCES += ../../shared/src/irq-info.c @@ -98,5 +81,5 @@ if HAS_NETWORKING libbsp_a_LIBADD += network.rel endif -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/virtex/headers.am diff --git a/c/src/lib/libbsp/powerpc/virtex/configure.ac b/c/src/lib/libbsp/powerpc/virtex/configure.ac index 323d9759ed..8c910b5b3a 100644 --- a/c/src/lib/libbsp/powerpc/virtex/configure.ac +++ b/c/src/lib/libbsp/powerpc/virtex/configure.ac @@ -4,6 +4,8 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-virtex],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/virtex.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) @@ -45,7 +47,7 @@ RTEMS_BSP_CLEANUP_OPTIONS # Explicitly list all Makefiles here AC_CONFIG_FILES([ Makefile -startup/linkcmds +linkcmds:startup/linkcmds.in ]) RTEMS_PPC_EXCEPTIONS diff --git a/c/src/lib/libbsp/powerpc/virtex/include/bsp.h b/c/src/lib/libbsp/powerpc/virtex/include/bsp.h deleted file mode 100644 index 2f61ee2517..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex/include/bsp.h +++ /dev/null @@ -1,84 +0,0 @@ -/* bsp.h - * - * This include file contains all GEN405 board IO definitions. - * - * derived from helas403/include/bsp.h: - * Id: bsp.h,v 1.4 2001/06/18 17:01:48 joel Exp - * Author: Thomas Doerfler <td@imd.m.isar.de> - * IMD Ingenieurbuero fuer Microcomputertechnik - * - * COPYRIGHT (c) 1998 by IMD - * - * Changes from IMD are covered by the original distributions terms. - * This file has been derived from the papyrus BSP. - * - * Author: Andrew Bray <andy@i-cubed.co.uk> - * - * COPYRIGHT (c) 1995 by i-cubed ltd. - * - * To anyone who acknowledges that this file is provided "AS IS" - * without any express or implied warranty: - * permission to use, copy, modify, and distribute this file - * for any purpose is hereby granted without fee, provided that - * the above copyright notice and this notice appears in all - * copies, and that the name of i-cubed limited not be used in - * advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. - * i-cubed limited makes no representations about the suitability - * of this software for any purpose. - * - * Derived from c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - */ - -#ifndef LIBBSP_POWERPC_VIRTEX_BSP_H -#define LIBBSP_POWERPC_VIRTEX_BSP_H - -#include <bspopts.h> - -#ifdef ASM -/* Definition of where to store registers in alignment handler */ -#define ALIGN_REGS 0x0140 - -#else -#include <rtems.h> -#include <bsp/irq.h> -#include <bsp/vectors.h> -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif - -#define BSP_FEATURE_IRQ_EXTENSION - -#define BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN - -/* miscellaneous stuff assumed to exist */ -extern bool bsp_timer_internal_clock; /* TRUE, when timer runs with CPU clk */ - -/* Network Defines */ -#if 1 /* EB/doe changes */ -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" -#else -#include "xiltemac.h" -#define RTEMS_BSP_NETWORK_DRIVER_NAME XILTEMAC_DRIVER_PREFIX -#endif -struct rtems_bsdnet_ifconfig; -extern int xilTemac_driver_attach(struct rtems_bsdnet_ifconfig*, int ); -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH xilTemac_driver_attach - -#ifdef __cplusplus -} -#endif - -#endif /* ASM */ - -#endif diff --git a/c/src/lib/libbsp/powerpc/virtex/include/opbintctrl.h b/c/src/lib/libbsp/powerpc/virtex/include/opbintctrl.h deleted file mode 100644 index 4ade0e48f8..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex/include/opbintctrl.h +++ /dev/null @@ -1,75 +0,0 @@ -/* opbintctrl.h - * - * This file contains definitions and declarations for the - * Xilinx Off Processor Bus (OPB) Interrupt Controller - * - * Author: Keith Robertson <kjrobert@alumni.uwaterloo.ca> - * COPYRIGHT (c) 2005 by Linn Products Ltd, Scotland - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _INCLUDE_OPBINTCTRL_H -#define _INCLUDE_OPBINTCTRL_H - -#include <rtems.h> -#include <rtems/system.h> -#include <rtems/score/isr.h> -#include <rtems/irq.h> -#include <bspopts.h> -#include RTEMS_XPARAMETERS_H - -#define USE_GREG_INTERRUPTS - -#ifdef __cplusplus -extern "C" { -#endif - - -/* extern XIntc InterruptController; - */ - - -/* Maximum number of IRQs. Defined in vhdl model */ -#define OPB_INTC_IRQ_MAX XPAR_INTC_MAX_NUM_INTR_INPUTS - -/* Width of INTC registers. Defined in vhdl model */ -#define OPB_INTC_REGISTER_WIDTH 32 - -/* Base Register address and register offsets. Defined in vhdl model */ -#define OPB_INTC_BASE XPAR_INTC_SINGLE_BASEADDR - - - - - -/* Interrupt Status Register */ -#define OPB_INTC_ISR 0x0 -/* Interrupt Pending Register (ISR && IER) */ -#define OPB_INTC_IPR 0x4 -/* Interrupt Enable Register */ -#define OPB_INTC_IER 0x8 -/* Interrupt Acknowledge Register */ -#define OPB_INTC_IAR 0xC -/* Set Interrupt Enable (same as read/mask/write to IER) */ -#define OPB_INTC_SIE 0x10 -/* Clear Interrupt Enable (same as read/mask/write to IER) */ -#define OPB_INTC_CIE 0x14 -/* Interrupt Vector Address (highest priority vector number from IPR) */ -#define OPB_INTC_IVR 0x18 -/* Master Enable Register */ -#define OPB_INTC_MER 0x1C - -/* Master Enable Register: Hardware Interrupt Enable */ -#define OPB_INTC_MER_HIE 0x2 - -/* Master Enable Register: Master IRQ Enable */ -#define OPB_INTC_MER_ME 0x1 - -#ifdef __cplusplus -} -#endif - -#endif /* _INCLUDE_OPBINTCTRL_H */ diff --git a/c/src/lib/libbsp/powerpc/virtex/include/tm27.h b/c/src/lib/libbsp/powerpc/virtex/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include <rtems/tm27-default.h> diff --git a/c/src/lib/libbsp/powerpc/virtex/include/xparameters_dflt.h b/c/src/lib/libbsp/powerpc/virtex/include/xparameters_dflt.h deleted file mode 100644 index b31cb26fe8..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex/include/xparameters_dflt.h +++ /dev/null @@ -1,192 +0,0 @@ -/******************************************************************* -* -* CAUTION: This file is automatically generated by libgen. -* Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 -* DO NOT EDIT. -* -* Copyright (c) 2005 Xilinx, Inc. All rights reserved. -* -* Description: Driver parameters -* -*******************************************************************/ - -#define STDIN_BASEADDRESS 0x40600000 -#define STDOUT_BASEADDRESS 0x40600000 - -/******************************************************************/ - -/* Definitions for driver PLBARB */ -#define XPAR_XPLBARB_NUM_INSTANCES 1 - -/* Definitions for peripheral PLB */ -#define XPAR_PLB_BASEADDR 0x00000000 -#define XPAR_PLB_HIGHADDR 0x00000000 -#define XPAR_PLB_DEVICE_ID 0 -#define XPAR_PLB_PLB_NUM_MASTERS 3 - - -/******************************************************************/ - -/* Definitions for driver OPBARB */ -#define XPAR_XOPBARB_NUM_INSTANCES 1 - -/* Definitions for peripheral OPB */ -#define XPAR_OPB_BASEADDR 0xFFFFFFFF -#define XPAR_OPB_HIGHADDR 0x00000000 -#define XPAR_OPB_DEVICE_ID 0 -#define XPAR_OPB_NUM_MASTERS 1 - - -/******************************************************************/ - -/* Definitions for driver UARTLITE */ -#define XPAR_XUARTLITE_NUM_INSTANCES 1 - -/* Definitions for peripheral CONSOLE */ -#define XPAR_CONSOLE_BASEADDR 0x40600000 -#define XPAR_CONSOLE_HIGHADDR 0x4060FFFF -#define XPAR_CONSOLE_DEVICE_ID 0 -#define XPAR_CONSOLE_BAUDRATE 115200 -#define XPAR_CONSOLE_USE_PARITY 0 -#define XPAR_CONSOLE_ODD_PARITY 0 -#define XPAR_CONSOLE_DATA_BITS 8 - - -/******************************************************************/ - -/* Definitions for driver GPIO */ -#define XPAR_XGPIO_NUM_INSTANCES 3 - -/* Definitions for peripheral LEDS */ -#define XPAR_LEDS_BASEADDR 0x40000000 -#define XPAR_LEDS_HIGHADDR 0x4000FFFF -#define XPAR_LEDS_DEVICE_ID 0 -#define XPAR_LEDS_INTERRUPT_PRESENT 0 -#define XPAR_LEDS_IS_DUAL 0 - - -/* Definitions for peripheral PBLEDS */ -#define XPAR_PBLEDS_BASEADDR 0x40020000 -#define XPAR_PBLEDS_HIGHADDR 0x4002FFFF -#define XPAR_PBLEDS_DEVICE_ID 1 -#define XPAR_PBLEDS_INTERRUPT_PRESENT 0 -#define XPAR_PBLEDS_IS_DUAL 0 - - -/* Definitions for peripheral PUSHBUTTONS */ -#define XPAR_PUSHBUTTONS_BASEADDR 0x40040000 -#define XPAR_PUSHBUTTONS_HIGHADDR 0x4004FFFF -#define XPAR_PUSHBUTTONS_DEVICE_ID 2 -#define XPAR_PUSHBUTTONS_INTERRUPT_PRESENT 1 -#define XPAR_PUSHBUTTONS_IS_DUAL 0 - - -/******************************************************************/ - -/* Definitions for driver TMRCTR */ -#define XPAR_XTMRCTR_NUM_INSTANCES 1 - -/* Definitions for peripheral OPBTIMER */ -#define XPAR_OPBTIMER_BASEADDR 0x41C00000 -#define XPAR_OPBTIMER_HIGHADDR 0x41C0FFFF -#define XPAR_OPBTIMER_DEVICE_ID 0 - - -/******************************************************************/ - -#define XPAR_INTC_MAX_NUM_INTR_INPUTS 3 -#define XPAR_XINTC_HAS_IPR 1 -#define XPAR_XINTC_USE_DCR 0 -/* Definitions for driver INTC */ -#define XPAR_XINTC_NUM_INSTANCES 1 - -/* Definitions for peripheral INTC */ -#define XPAR_INTC_BASEADDR 0x41200000 -#define XPAR_INTC_HIGHADDR 0x4120FFFF -#define XPAR_INTC_DEVICE_ID 0 -#define XPAR_INTC_KIND_OF_INTR 0x00000000 - - -/******************************************************************/ - -#define XPAR_INTC_SINGLE_BASEADDR 0x41200000 -#define XPAR_INTC_SINGLE_HIGHADDR 0x4120FFFF -#define XPAR_INTC_SINGLE_DEVICE_ID XPAR_INTC_DEVICE_ID -#define XPAR_OPBTIMER_INTERRUPT_MASK 0X000001 -#define XPAR_INTC_OPBTIMER_INTERRUPT_INTR 0 -#define XPAR_ETHERNET_IP2INTC_IRPT_MASK 0X000002 -#define XPAR_INTC_ETHERNET_IP2INTC_IRPT_INTR 1 -#define XPAR_PUSHBUTTONS_IP2INTC_IRPT_MASK 0X000004 -#define XPAR_INTC_PUSHBUTTONS_IP2INTC_IRPT_INTR 2 - -/******************************************************************/ - -/* Definitions for driver DDR */ -#define XPAR_XDDR_NUM_INSTANCES 1 - -/* Definitions for peripheral DDR_SDRAM_64MX32 */ -#define XPAR_DDR_SDRAM_64MX32_ECC_BASEADDR 0xFFFFFFFF -#define XPAR_DDR_SDRAM_64MX32_ECC_HIGHADDR 0x00000000 -#define XPAR_DDR_SDRAM_64MX32_DEVICE_ID 0 -#define XPAR_DDR_SDRAM_64MX32_INCLUDE_ECC_INTR 0 - - -/******************************************************************/ - -/* Definitions for peripheral DDR_SDRAM_64MX32 */ -#define XPAR_DDR_SDRAM_64MX32_MEM0_BASEADDR 0x00000000 -#define XPAR_DDR_SDRAM_64MX32_MEM0_HIGHADDR 0x03FFFFFF - -/******************************************************************/ - - -/* Definitions for peripheral HARD_TEMAC_0 */ -#define XPAR_HARD_TEMAC_0_PHY_TYPE 1 - - -/******************************************************************/ - -/* Definitions for driver TEMAC */ -#define XPAR_XTEMAC_NUM_INSTANCES 1 - -/* Definitions for peripheral ETHERNET */ -#define XPAR_ETHERNET_DEVICE_ID 0 -#define XPAR_ETHERNET_BASEADDR 0x81200000 -#define XPAR_ETHERNET_HIGHADDR 0x8120FFFF -#define XPAR_ETHERNET_RXFIFO_DEPTH 32768 -#define XPAR_ETHERNET_TXFIFO_DEPTH 32768 -#define XPAR_ETHERNET_MAC_FIFO_DEPTH 64 -#define XPAR_ETHERNET_DMA_TYPE 1 -#define XPAR_ETHERNET_TX_DRE_TYPE 0 -#define XPAR_ETHERNET_RX_DRE_TYPE 0 -#define XPAR_ETHERNET_INCLUDE_TX_CSUM 0 -#define XPAR_ETHERNET_INCLUDE_RX_CSUM 0 - - -/******************************************************************/ - - -/* Definitions for peripheral FLASH */ -#define XPAR_FLASH_NUM_BANKS_MEM 1 - - -/******************************************************************/ - -/* Definitions for peripheral FLASH */ -#define XPAR_FLASH_MEM0_BASEADDR 0x06000000 -#define XPAR_FLASH_MEM0_HIGHADDR 0x067FFFFF - -/******************************************************************/ - - -/* Definitions for peripheral PLB_BRAM_IF_CNTLR_1 */ -#define XPAR_PLB_BRAM_IF_CNTLR_1_BASEADDR 0xffff8000 -#define XPAR_PLB_BRAM_IF_CNTLR_1_HIGHADDR 0xffffffff - - -/******************************************************************/ - -#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000 - -/******************************************************************/ - diff --git a/c/src/lib/libbsp/powerpc/virtex/irq/irq.h b/c/src/lib/libbsp/powerpc/virtex/irq/irq.h deleted file mode 100644 index 1ce5b68b98..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex/irq/irq.h +++ /dev/null @@ -1,94 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS virtex BSP | -+-----------------------------------------------------------------+ -| Copyright (c) 2007 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file declares constants of the interrupt controller | -\*===============================================================*/ -#ifndef VIRTEX_IRQ_IRQ_H -#define VIRTEX_IRQ_IRQ_H - -#include <rtems/irq.h> -#include <rtems/irq-extension.h> -#include <bsp/opbintctrl.h> - -/* - * the following definitions specify the indices used - * to interface the interrupt handler API - */ - -/* - * Peripheral IRQ handlers related definitions - */ -#define BSP_OPBINTC_PER_IRQ_NUMBER XPAR_INTC_MAX_NUM_INTR_INPUTS -#define BSP_OPBINTC_IRQ_LOWEST_OFFSET 0 -#define BSP_OPBINTC_IRQ_MAX_OFFSET (BSP_OPBINTC_IRQ_LOWEST_OFFSET\ - +BSP_OPBINTC_PER_IRQ_NUMBER-1) - -#define BSP_IS_OPBINTC_IRQ(irqnum) \ - (((irqnum) >= BSP_OPBINTC_IRQ_LOWEST_OFFSET) && \ - ((irqnum) <= BSP_OPBINTC_IRQ_MAX_OFFSET)) -/* - * Processor IRQ handlers related definitions - */ -#define BSP_PROCESSOR_IRQ_NUMBER 3 -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_OPBINTC_IRQ_MAX_OFFSET+1) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\ - +BSP_PROCESSOR_IRQ_NUMBER-1) - -#define BSP_IS_PROCESSOR_IRQ(irqnum) \ - (((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \ - ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET)) -/* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1) -#define BSP_LOWEST_OFFSET BSP_OPBINTC_IRQ_LOWEST_OFFSET -#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET - -#define BSP_IS_VALID_IRQ(irqnum) \ - (BSP_IS_PROCESSOR_IRQ(irqnum) \ - || BSP_IS_OPBINTC_IRQ(irqnum)) - -#define BSP_INTERRUPT_VECTOR_MIN 0 -#define BSP_INTERRUPT_VECTOR_MAX BSP_PROCESSOR_IRQ_MAX_OFFSET - -#ifndef ASM -#ifdef __cplusplus -extern "C" { -#endif - -/* - * index table for the module specific handlers, a few entries are only placeholders - */ - typedef enum { - BSP_OPBINTC_IRQ_FIRST = BSP_OPBINTC_IRQ_LOWEST_OFFSET, - /* - * Note: for this BSP, the peripheral names are derived - * from the Xilinx parameter file - */ - BSP_OPBINTC_IRQ_LAST = BSP_OPBINTC_IRQ_MAX_OFFSET, - BSP_EXT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 0, - BSP_PIT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 1, - BSP_CRIT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 2 - } rtems_irq_symbolic_name; - -#define BSP_OPBINTC_XPAR(xname) (BSP_OPBINTC_IRQ_LOWEST_OFFSET+xname) - -#ifdef __cplusplus -} -#endif -#endif /* ASM */ - -#endif /* VIRTEX_IRQ_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/virtex/network/xiltemac.h b/c/src/lib/libbsp/powerpc/virtex/network/xiltemac.h deleted file mode 100644 index 185b89bdc1..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex/network/xiltemac.h +++ /dev/null @@ -1,375 +0,0 @@ -/* - * Driver for plb inteface of the xilinx temac 3.00a - * - * Author: Keith Robertson <kjrobert@alumni.uwaterloo.ca> - * Copyright (c) 2007 Linn Products Ltd, Scotland. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - */ - -#ifndef _XILINX_TEMAC_ -#define _XILINX_TEMAC_ -#include <rtems/irq.h> - - -#define XILTEMAC_DRIVER_PREFIX "xiltemac" - -#define DRIVER_PREFIX XILTEMAC_DRIVER_PREFIX - - -/** IPIF interrupt and reset registers - */ -#define XTE_DISR_OFFSET 0x00000000 /**< Device interrupt status */ -#define XTE_DIPR_OFFSET 0x00000004 /**< Device interrupt pending */ -#define XTE_DIER_OFFSET 0x00000008 /**< Device interrupt enable */ -#define XTE_DIIR_OFFSET 0x00000018 /**< Device interrupt ID */ -#define XTE_DGIE_OFFSET 0x0000001C /**< Device global interrupt enable */ -#define XTE_IPISR_OFFSET 0x00000020 /**< IP interrupt status */ -#define XTE_IPIER_OFFSET 0x00000028 /**< IP interrupt enable */ -#define XTE_DSR_OFFSET 0x00000040 /**< Device software reset (write) */ - -/** IPIF transmit fifo - */ -#define XTE_PFIFO_TX_BASE_OFFSET 0x00002000 /**< Packet FIFO Tx channel */ -#define XTE_PFIFO_TX_VACANCY_OFFSET 0x00002004 /**< Packet Fifo Tx Vacancy */ -#define XTE_PFIFO_TX_DATA_OFFSET 0x00002100 /**< IPIF Tx packet fifo port */ - -/** IPIF receive fifo - */ -#define XTE_PFIFO_RX_BASE_OFFSET 0x00002010 /**< Packet FIFO Rx channel */ -#define XTE_PFIFO_RX_VACANCY_OFFSET 0x00002014 /**< Packet Fifo Rx Vacancy */ -#define XTE_PFIFO_RX_DATA_OFFSET 0x00002200 /**< IPIF Rx packet fifo port */ - -/** IPIF fifo masks - */ -#define XTE_PFIFO_COUNT_MASK 0x00FFFFFF - -/** IPIF transmit and recieve DMA offsets - */ -#define XTE_DMA_SEND_OFFSET 0x00002300 /**< DMA Tx channel */ -#define XTE_DMA_RECV_OFFSET 0x00002340 /**< DMA Rx channel */ - -/** IPIF IPIC_TO_TEMAC Core Registers - */ -#define XTE_CR_OFFSET 0x00001000 /**< Control */ -#define XTE_TPLR_OFFSET 0x00001004 /**< Tx packet length (FIFO) */ -#define XTE_TSR_OFFSET 0x00001008 /**< Tx status (FIFO) */ -#define XTE_RPLR_OFFSET 0x0000100C /**< Rx packet length (FIFO) */ -#define XTE_RSR_OFFSET 0x00001010 /**< Receive status */ -#define XTE_IFGP_OFFSET 0x00001014 /**< Interframe gap */ -#define XTE_TPPR_OFFSET 0x00001018 /**< Tx pause packet */ - -/** TEMAC Core Registers - * These are registers defined within the device's hard core located in the - * processor block. They are accessed with the host interface. These registers - * are addressed offset by XTE_HOST_IPIF_OFFSET or by the DCR base address - * if so configured. - */ -#define XTE_HOST_IPIF_OFFSET 0x00003000 /**< Offset of host registers when - memory mapped into IPIF */ -#define XTE_ERXC0_OFFSET (XTE_HOST_IPIF_OFFSET + 0x00000200) /**< Rx configuration word 0 */ -#define XTE_ERXC1_OFFSET (XTE_HOST_IPIF_OFFSET + 0x00000240) /**< Rx configuration word 1 */ -#define XTE_ETXC_OFFSET (XTE_HOST_IPIF_OFFSET + 0x00000280) /**< Tx configuration */ -#define XTE_EFCC_OFFSET (XTE_HOST_IPIF_OFFSET + 0x000002C0) /**< Flow control configuration */ -#define XTE_ECFG_OFFSET (XTE_HOST_IPIF_OFFSET + 0x00000300) /**< EMAC configuration */ -#define XTE_EGMIC_OFFSET (XTE_HOST_IPIF_OFFSET + 0x00000320) /**< RGMII/SGMII configuration */ -#define XTE_EMC_OFFSET (XTE_HOST_IPIF_OFFSET + 0x00000340) /**< Management configuration */ -#define XTE_EUAW0_OFFSET (XTE_HOST_IPIF_OFFSET + 0x00000380) /**< Unicast address word 0 */ -#define XTE_EUAW1_OFFSET (XTE_HOST_IPIF_OFFSET + 0x00000384) /**< Unicast address word 1 */ -#define XTE_EMAW0_OFFSET (XTE_HOST_IPIF_OFFSET + 0x00000388) /**< Multicast address word 0 */ -#define XTE_EMAW1_OFFSET (XTE_HOST_IPIF_OFFSET + 0x0000038C) /**< Multicast address word 1 */ -#define XTE_EAFM_OFFSET (XTE_HOST_IPIF_OFFSET + 0x00000390) /**< Promisciuous mode */ -#define XTE_EIRS_OFFSET (XTE_HOST_IPIF_OFFSET + 0x000003A0) /**< IRstatus */ -#define XTE_EIREN_OFFSET (XTE_HOST_IPIF_OFFSET + 0x000003A4) /**< IRenable */ -#define XTE_EMIID_OFFSET (XTE_HOST_IPIF_OFFSET + 0x000003B0) /**< MIIMwrData */ -#define XTE_EMIIC_OFFSET (XTE_HOST_IPIF_OFFSET + 0x000003B4) /**< MiiMcnt */ - -/* Register masks. The following constants define bit locations of various - * control bits in the registers. Constants are not defined for those registers - * that have a single bit field representing all 32 bits. For further - * information on the meaning of the various bit masks, refer to the HW spec. - */ - -/** Interrupt status bits for top level interrupts - * These bits are associated with the XTE_DISR_OFFSET, XTE_DIPR_OFFSET, - * and XTE_DIER_OFFSET registers. - */ -#define XTE_DXR_SEND_FIFO_MASK 0x00000040 /**< Send FIFO channel */ -#define XTE_DXR_RECV_FIFO_MASK 0x00000020 /**< Receive FIFO channel */ -#define XTE_DXR_RECV_DMA_MASK 0x00000010 /**< Receive DMA channel */ -#define XTE_DXR_SEND_DMA_MASK 0x00000008 /**< Send DMA channel */ -#define XTE_DXR_CORE_MASK 0x00000004 /**< Core */ -#define XTE_DXR_DPTO_MASK 0x00000002 /**< Data phase timeout */ -#define XTE_DXR_TERR_MASK 0x00000001 /**< Transaction error */ - -/** Interrupt status bits for MAC interrupts - * These bits are associated with XTE_IPISR_OFFSET and XTE_IPIER_OFFSET - * registers. - */ -#define XTE_IPXR_XMIT_DONE_MASK 0x00000001 /**< Tx complete */ -#define XTE_IPXR_RECV_DONE_MASK 0x00000002 /**< Rx complete */ -#define XTE_IPXR_AUTO_NEG_MASK 0x00000004 /**< Auto negotiation complete */ -#define XTE_IPXR_RECV_REJECT_MASK 0x00000008 /**< Rx packet rejected */ -#define XTE_IPXR_XMIT_SFIFO_EMPTY_MASK 0x00000010 /**< Tx status fifo empty */ -#define XTE_IPXR_RECV_LFIFO_EMPTY_MASK 0x00000020 /**< Rx length fifo empty */ -#define XTE_IPXR_XMIT_LFIFO_FULL_MASK 0x00000040 /**< Tx length fifo full */ -#define XTE_IPXR_RECV_LFIFO_OVER_MASK 0x00000080 /**< Rx length fifo overrun - Note that this signal is - no longer asserted by HW - */ -#define XTE_IPXR_RECV_LFIFO_UNDER_MASK 0x00000100 /**< Rx length fifo underrun */ -#define XTE_IPXR_XMIT_SFIFO_OVER_MASK 0x00000200 /**< Tx status fifo overrun */ -#define XTE_IPXR_XMIT_SFIFO_UNDER_MASK 0x00000400 /**< Tx status fifo underrun */ -#define XTE_IPXR_XMIT_LFIFO_OVER_MASK 0x00000800 /**< Tx length fifo overrun */ -#define XTE_IPXR_XMIT_LFIFO_UNDER_MASK 0x00001000 /**< Tx length fifo underrun */ -#define XTE_IPXR_RECV_PFIFO_ABORT_MASK 0x00002000 /**< Rx packet rejected due to - full packet FIFO */ -#define XTE_IPXR_RECV_LFIFO_ABORT_MASK 0x00004000 /**< Rx packet rejected due to - full length FIFO */ - -#define XTE_IPXR_RECV_DROPPED_MASK \ - (XTE_IPXR_RECV_REJECT_MASK | \ - XTE_IPXR_RECV_PFIFO_ABORT_MASK | \ - XTE_IPXR_RECV_LFIFO_ABORT_MASK) /**< IPXR bits that indicate a dropped - receive frame */ -#define XTE_IPXR_XMIT_ERROR_MASK \ - (XTE_IPXR_XMIT_SFIFO_OVER_MASK | \ - XTE_IPXR_XMIT_SFIFO_UNDER_MASK | \ - XTE_IPXR_XMIT_LFIFO_OVER_MASK | \ - XTE_IPXR_XMIT_LFIFO_UNDER_MASK) /**< IPXR bits that indicate transmit - errors */ - -#define XTE_IPXR_RECV_ERROR_MASK \ - (XTE_IPXR_RECV_DROPPED_MASK | \ - XTE_IPXR_RECV_LFIFO_UNDER_MASK) /**< IPXR bits that indicate receive - errors */ - -#define XTE_IPXR_FIFO_FATAL_ERROR_MASK \ - (XTE_IPXR_XMIT_SFIFO_OVER_MASK | \ - XTE_IPXR_XMIT_SFIFO_UNDER_MASK | \ - XTE_IPXR_XMIT_LFIFO_OVER_MASK | \ - XTE_IPXR_XMIT_LFIFO_UNDER_MASK | \ - XTE_IPXR_RECV_LFIFO_UNDER_MASK) /**< IPXR bits that indicate errors with - one of the length or status FIFOs - that is fatal in nature. These bits - can only be cleared by a device - reset */ - -/** Software reset register (DSR) - */ -#define XTE_DSR_RESET_MASK 0x0000000A /**< Write this value to DSR to - reset entire core */ - - -/** Global interrupt enable register (DGIE) - */ -#define XTE_DGIE_ENABLE_MASK 0x80000000 /**< Write this value to DGIE to - enable interrupts from this - device */ - -/** Control Register (CR) - */ -#define XTE_CR_HTRST_MASK 0x00000008 /**< Reset hard temac */ -#define XTE_CR_BCREJ_MASK 0x00000004 /**< Disable broadcast address - filtering */ -#define XTE_CR_MCREJ_MASK 0x00000002 /**< Disable multicast address - filtering */ -#define XTE_CR_HDUPLEX_MASK 0x00000001 /**< Enable half duplex operation */ - - -/** Transmit Packet Length Register (TPLR) - */ -#define XTE_TPLR_TXPL_MASK 0x00003FFF /**< Tx packet length in bytes */ - - -/** Transmit Status Register (TSR) - */ -#define XTE_TSR_TXED_MASK 0x80000000 /**< Excess deferral error */ -#define XTE_TSR_PFIFOU_MASK 0x40000000 /**< Packet FIFO underrun */ -#define XTE_TSR_TXA_MASK 0x3E000000 /**< Transmission attempts */ -#define XTE_TSR_TXLC_MASK 0x01000000 /**< Late collision error */ -#define XTE_TSR_TPCF_MASK 0x00000001 /**< Transmit packet complete - flag */ - -#define XTE_TSR_ERROR_MASK \ - (XTE_TSR_TXED_MASK | \ - XTE_TSR_PFIFOU_MASK | \ - XTE_TSR_TXLC_MASK) /**< TSR bits that indicate an - error */ - - -/** Receive Packet Length Register (RPLR) - */ -#define XTE_RPLR_RXPL_MASK 0x00003FFF /**< Rx packet length in bytes */ - - -/** Receive Status Register (RSR) - */ -#define XTE_RSR_RPCF_MASK 0x00000001 /**< Receive packet complete - flag */ - -/** Interframe Gap Register (IFG) - */ -#define XTE_IFG_IFGD_MASK 0x000000FF /**< IFG delay */ - - -/** Transmit Pause Packet Register (TPPR) - */ -#define XTE_TPPR_TPPD_MASK 0x0000FFFF /**< Tx pause packet data */ - - -/** Receiver Configuration Word 1 (ERXC1) - */ -#define XTE_ERXC1_RXRST_MASK 0x80000000 /**< Receiver reset */ -#define XTE_ERXC1_RXJMBO_MASK 0x40000000 /**< Jumbo frame enable */ -#define XTE_ERXC1_RXFCS_MASK 0x20000000 /**< FCS not stripped */ -#define XTE_ERXC1_RXEN_MASK 0x10000000 /**< Receiver enable */ -#define XTE_ERXC1_RXVLAN_MASK 0x08000000 /**< VLAN enable */ -#define XTE_ERXC1_RXHD_MASK 0x04000000 /**< Half duplex */ -#define XTE_ERXC1_RXLT_MASK 0x02000000 /**< Length/type check disable */ -#define XTE_ERXC1_ERXC1_MASK 0x0000FFFF /**< Pause frame source address - bits [47:32]. Bits [31:0] - are stored in register - ERXC0 */ - - -/** Transmitter Configuration (ETXC) - */ -#define XTE_ETXC_TXRST_MASK 0x80000000 /**< Transmitter reset */ -#define XTE_ETXC_TXJMBO_MASK 0x40000000 /**< Jumbo frame enable */ -#define XTE_ETXC_TXFCS_MASK 0x20000000 /**< Generate FCS */ -#define XTE_ETXC_TXEN_MASK 0x10000000 /**< Transmitter enable */ -#define XTE_ETXC_TXVLAN_MASK 0x08000000 /**< VLAN enable */ -#define XTE_ETXC_TXHD_MASK 0x04000000 /**< Half duplex */ -#define XTE_ETXC_TXIFG_MASK 0x02000000 /**< IFG adjust enable */ - - -/** Flow Control Configuration (EFCC) - */ -#define XTE_EFCC_TXFLO_MASK 0x40000000 /**< Tx flow control enable */ -#define XTE_EFCC_RXFLO_MASK 0x20000000 /**< Rx flow control enable */ - - -/** EMAC Configuration (ECFG) - */ -#define XTE_ECFG_LINKSPD_MASK 0xC0000000 /**< Link speed */ -#define XTE_ECFG_RGMII_MASK 0x20000000 /**< RGMII mode enable */ -#define XTE_ECFG_SGMII_MASK 0x10000000 /**< SGMII mode enable */ -#define XTE_ECFG_1000BASEX_MASK 0x08000000 /**< 1000BaseX mode enable */ -#define XTE_ECFG_HOSTEN_MASK 0x04000000 /**< Host interface enable */ -#define XTE_ECFG_TX16BIT 0x02000000 /**< 16 bit Tx client enable */ -#define XTE_ECFG_RX16BIT 0x01000000 /**< 16 bit Rx client enable */ - -#define XTE_ECFG_LINKSPD_10 0x00000000 /**< XTE_ECFG_LINKSPD_MASK for - 10 Mbit */ -#define XTE_ECFG_LINKSPD_100 0x40000000 /**< XTE_ECFG_LINKSPD_MASK for - 100 Mbit */ -#define XTE_ECFG_LINKSPD_1000 0x80000000 /**< XTE_ECFG_LINKSPD_MASK for - 1000 Mbit */ - -/** EMAC RGMII/SGMII Configuration (EGMIC) - */ -#define XTE_EGMIC_RGLINKSPD_MASK 0xC0000000 /**< RGMII link speed */ -#define XTE_EGMIC_SGLINKSPD_MASK 0x0000000C /**< SGMII link speed */ -#define XTE_EGMIC_RGSTATUS_MASK 0x00000002 /**< RGMII link status */ -#define XTE_EGMIC_RGHALFDUPLEX_MASK 0x00000001 /**< RGMII half duplex */ - -#define XTE_EGMIC_RGLINKSPD_10 0x00000000 /**< XTE_EGMIC_RGLINKSPD_MASK - for 10 Mbit */ -#define XTE_EGMIC_RGLINKSPD_100 0x40000000 /**< XTE_EGMIC_RGLINKSPD_MASK - for 100 Mbit */ -#define XTE_EGMIC_RGLINKSPD_1000 0x80000000 /**< XTE_EGMIC_RGLINKSPD_MASK - for 1000 Mbit */ -#define XTE_EGMIC_SGLINKSPD_10 0x00000000 /**< XTE_SGMIC_RGLINKSPD_MASK - for 10 Mbit */ -#define XTE_EGMIC_SGLINKSPD_100 0x00000004 /**< XTE_SGMIC_RGLINKSPD_MASK - for 100 Mbit */ -#define XTE_EGMIC_SGLINKSPD_1000 0x00000008 /**< XTE_SGMIC_RGLINKSPD_MASK - for 1000 Mbit */ - -/** EMAC Management Configuration (EMC) - */ -#define XTE_EMC_MDIO_MASK 0x00000040 /**< MII management enable */ -#define XTE_EMC_CLK_DVD_MAX 0x3F /**< Maximum MDIO divisor */ - - -/** EMAC Unicast Address Register Word 1 (EUAW1) - */ -#define XTE_EUAW1_MASK 0x0000FFFF /**< Station address bits [47:32] - Station address bits [31:0] - are stored in register - EUAW0 */ - - -/** EMAC Multicast Address Register Word 1 (EMAW1) - */ -#define XTE_EMAW1_CAMRNW_MASK 0x00800000 /**< CAM read/write control */ -#define XTE_EMAW1_CAMADDR_MASK 0x00030000 /**< CAM address mask */ -#define XTE_EUAW1_MASK 0x0000FFFF /**< Multicast address bits [47:32] - Multicast address bits [31:0] - are stored in register - EMAW0 */ -#define XTE_EMAW1_CAMMADDR_SHIFT_MASK 16 /**< Number of bits to shift right - to align with - XTE_EMAW1_CAMADDR_MASK */ - - -/** EMAC Address Filter Mode (EAFM) - */ -#define XTE_EAFM_EPPRM_MASK 0x80000000 /**< Promiscuous mode enable */ - - -/** EMAC MII Management Write Data (EMIID) - */ -#define XTE_EMIID_MIIMWRDATA_MASK 0x0000FFFF /**< Data port */ - - -/** EMAC MII Management Control (EMIIC) - */ -#define XTE_EMIID_MIIMDECADDR_MASK 0x0000FFFF /**< Address port */ - - -struct XilTemacStats -{ - volatile uint32_t iInterrupts; - - volatile uint32_t iRxInterrupts; - volatile uint32_t iRxRejectedInterrupts; - volatile uint32_t iRxRejectedInvalidFrame; - volatile uint32_t iRxRejectedDataFifoFull; - volatile uint32_t iRxRejectedLengthFifoFull; - volatile uint32_t iRxMaxDrained; - volatile uint32_t iRxStrayEvents; - - volatile uint32_t iTxInterrupts; - volatile uint32_t iTxMaxDrained; -}; - -#define MAX_UNIT_BYTES 50 - -struct XilTemac -{ - struct arpcom iArpcom; - struct XilTemacStats iStats; - struct ifnet* iIfp; - - char iUnitName[MAX_UNIT_BYTES]; - - uint32_t iAddr; - rtems_event_set iIoEvent; - - int iIsrVector; - -#if PPC_HAS_CLASSIC_EXCEPTIONS - rtems_isr_entry iOldHandler; -#else - rtems_irq_connect_data iOldHandler; -#endif - int iIsPresent; -}; - - -#endif /* _XILINX_EMAC_*/ diff --git a/c/src/lib/libbsp/powerpc/virtex/preinstall.am b/c/src/lib/libbsp/powerpc/virtex/preinstall.am deleted file mode 100644 index 9263f7a4d1..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex/preinstall.am +++ /dev/null @@ -1,100 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/xparameters_dflt.h: include/xparameters_dflt.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/xparameters_dflt.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/xparameters_dflt.h - -if HAS_NETWORKING -$(PROJECT_INCLUDE)/xiltemac.h: network/xiltemac.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/xiltemac.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/xiltemac.h -endif -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_INCLUDE)/bsp/linker-symbols.h: ../shared/include/linker-symbols.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/linker-symbols.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/linker-symbols.h - -$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base - -$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h - -$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h - -$(PROJECT_INCLUDE)/bsp/opbintctrl.h: include/opbintctrl.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/opbintctrl.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/opbintctrl.h - -$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - diff --git a/c/src/lib/libbsp/powerpc/virtex/bsp_specs b/c/src/lib/libbsp/powerpc/virtex/startup/bsp_specs index 6cb546f392..6cb546f392 100644 --- a/c/src/lib/libbsp/powerpc/virtex/bsp_specs +++ b/c/src/lib/libbsp/powerpc/virtex/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/virtex4/Makefile.am b/c/src/lib/libbsp/powerpc/virtex4/Makefile.am index 28411c1fd0..c5a2a32632 100644 --- a/c/src/lib/libbsp/powerpc/virtex4/Makefile.am +++ b/c/src/lib/libbsp/powerpc/virtex4/Makefile.am @@ -5,18 +5,9 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp - -dist_project_lib_DATA = bsp_specs +dist_project_lib_DATA = startup/bsp_specs # include -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -include_bsp_HEADERS = - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h # start @@ -25,7 +16,7 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = rtems_crti.$(OBJEXT) -dist_project_lib_DATA += startup/linkcmds +project_lib_DATA += linkcmds noinst_LIBRARIES = libbsp.a @@ -49,11 +40,9 @@ libbsp_a_SOURCES += startup/dummy_console.c \ ../../shared/dummy_printk_support.c # irq -include_bsp_HEADERS += include/irq.h libbsp_a_SOURCES += irq/irq_init.c # mmu -include_bsp_HEADERS += include/mmu.h libbsp_a_SOURCES += mmu/mmu.c libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \ @@ -65,5 +54,5 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \ EXTRA_DIST += times -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/virtex4/headers.am diff --git a/c/src/lib/libbsp/powerpc/virtex4/configure.ac b/c/src/lib/libbsp/powerpc/virtex4/configure.ac index 8546bfc3a9..75e3c3bd15 100644 --- a/c/src/lib/libbsp/powerpc/virtex4/configure.ac +++ b/c/src/lib/libbsp/powerpc/virtex4/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-virtex4],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/virtex4.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/virtex4/include/bsp.h b/c/src/lib/libbsp/powerpc/virtex4/include/bsp.h deleted file mode 100644 index 91e7ddf4ab..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex4/include/bsp.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * This include file contains all Virtex4 board IO definitions. - */ - -/* - * derived from helas403/include/bsp.h: - * Id: bsp.h,v 1.4 2001/06/18 17:01:48 joel Exp - * Author: Thomas Doerfler <td@imd.m.isar.de> - * IMD Ingenieurbuero fuer Microcomputertechnik - * - * COPYRIGHT (c) 1998 by IMD - * - * Changes from IMD are covered by the original distributions terms. - * This file has been derived from the papyrus BSP. - * - * Author: Andrew Bray <andy@i-cubed.co.uk> - * - * COPYRIGHT (c) 1995 by i-cubed ltd. - * - * To anyone who acknowledges that this file is provided "AS IS" - * without any express or implied warranty: - * permission to use, copy, modify, and distribute this file - * for any purpose is hereby granted without fee, provided that - * the above copyright notice and this notice appears in all - * copies, and that the name of i-cubed limited not be used in - * advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. - * i-cubed limited makes no representations about the suitability - * of this software for any purpose. - * - * Derived from c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - */ - -#ifndef LIBBSP_POWERPC_VIRTEX4_BSP_H -#define LIBBSP_POWERPC_VIRTEX4_BSP_H - -#include <bspopts.h> - -/* - * confdefs.h overrides for this BSP: - * - Interrupt stack space is not minimum if defined. - */ -#define BSP_INTERRUPT_STACK_SIZE (16 * 1024) - -#ifdef ASM -/* Definition of where to store registers in alignment handler */ -#define ALIGN_REGS 0x0140 - -#else -#include <rtems.h> - -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* miscellaneous stuff assumed to exist */ -extern bool bsp_timer_internal_clock; /* TRUE, when timer runs with CPU clk */ - -extern rtems_configuration_table BSP_Configuration; /* owned by BSP */ -#endif /* ASM */ - -void BSP_ask_for_reset(void); - -/* - * Prototypes for BSP methods shared across file boundaries - */ -void zero_bss(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/virtex4/include/irq.h b/c/src/lib/libbsp/powerpc/virtex4/include/irq.h deleted file mode 100644 index 45ef69adbf..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex4/include/irq.h +++ /dev/null @@ -1,79 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS virtex BSP | -+-----------------------------------------------------------------+ -| Copyright (c) 2007 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file declares constants of the interrupt controller | -\*===============================================================*/ -#ifndef VIRTEX4_IRQ_IRQ_H -#define VIRTEX4_IRQ_IRQ_H - -#include <rtems/irq.h> - -/* - * the following definitions specify the indices used - * to interface the interrupt handler API - */ - -/* - * Peripheral IRQ handlers related definitions - */ - /* Not supported at this level */ - -/* - * Processor IRQ handlers related definitions - */ -#define BSP_PROCESSOR_IRQ_NUMBER 3 -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET 0 -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\ - +BSP_PROCESSOR_IRQ_NUMBER-1) - -#define BSP_IS_PROCESSOR_IRQ(irqnum) \ - (((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \ - ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET)) - -/* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1) -#define BSP_LOWEST_OFFSET BSP_PROCESSOR_IRQ_LOWEST_OFFSET -#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET - -#define BSP_IS_VALID_IRQ(irqnum) (BSP_IS_PROCESSOR_IRQ(irqnum)) - -#ifndef ASM -#ifdef __cplusplus -extern "C" { -#endif - -/* - * index table for the module specific handlers, a few entries are only placeholders - */ - typedef enum { - BSP_EXT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 0, - BSP_PIT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 1, - BSP_CRIT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 2 - } rtems_irq_symbolic_name; - - extern rtems_irq_connect_data *BSP_rtems_irq_tbl; - void BSP_irqexc_on_fnc(const rtems_irq_connect_data *conn_data); - void BSP_irqexc_off_fnc(const rtems_irq_connect_data *unused); - void BSP_rtems_irq_mngt_init(unsigned cpuId); - -#ifdef __cplusplus -} -#endif -#endif /* ASM */ - -#endif /* VIRTEX4_IRQ_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/virtex4/include/mmu.h b/c/src/lib/libbsp/powerpc/virtex4/include/mmu.h deleted file mode 100644 index 3e2710b95c..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex4/include/mmu.h +++ /dev/null @@ -1,269 +0,0 @@ -#ifndef RTEMS_VIRTEX4_MMU_H -#define RTEMS_VIRTEX4_MMU_H -/** - * @file - * - * @ingroup Virtex4MMU - * - * @brief Routines to manipulate the PPC 405 MMU. - */ -/* - * Authorship - * ---------- - * This software was created by - * Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * and was transcribed for the PPC 405 by - * R. Claus <claus@slac.stanford.edu>, 2012, - * Stanford Linear Accelerator Center, Stanford University, - * - * Acknowledgement of sponsorship - * ------------------------------ - * This software was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#include <rtems.h> -#include <inttypes.h> -#include <stdio.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup Virtex4MMU Virtex 4 - MMU Support - * - * @ingroup Virtex4 - * - * @brief MMU support. - * - * @{ - */ - -/* Some routines require or return a index 'key'. - */ -typedef int bsp_tlb_idx_t; - -/* Cache the relevant TLB entries so that we can make sure the user cannot - * create conflicting (overlapping) entries. Keep them public for informational - * purposes. - */ -typedef struct { - struct { - uint32_t pad:24; - uint32_t tid:8; /** Translation ID */ - } id; - struct { - uint32_t epn:22; /** Effective page number */ - uint32_t size:3; /** Page size */ - uint32_t v:1; /** Valid */ - uint32_t att:2; /** Little-endian, User-defined */ - uint32_t pad:4; - } hi; /** High word*/ - struct { - uint32_t rpn:22; /** Real page number */ - uint32_t perm:6; /** Execute enable, Write-enable, Zone select */ - uint32_t wimg:4; /** Write-through, Caching inhibited, Mem coherent, Guarded */ - } lo; /** Low word */ -} bsp_tlb_entry_t; - -#define NTLBS 64 - -extern bsp_tlb_entry_t* bsp_mmu_cache; - - -// These constants will have to be shifted right by 20 bits before -// being inserted the high word of the TLB. - -#define MMU_M_SIZE_1K (0x00000000U) -#define MMU_M_SIZE_4K (0x08000000U) -#define MMU_M_SIZE_16K (0x10000000U) -#define MMU_M_SIZE_64K (0x18000000U) -#define MMU_M_SIZE_256K (0x20000000U) -#define MMU_M_SIZE_1M (0x28000000U) -#define MMU_M_SIZE_4M (0x30000000U) -#define MMU_M_SIZE_16M (0x38000000U) -#define MMU_M_SIZE_MIN (MMU_M_SIZE_1K) -#define MMU_M_SIZE_MAX (MMU_M_SIZE_16M) -#define MMU_M_SIZE (0x38000000U) -#define MMU_V_SIZE (27) - -#define MMU_M_ATTR_LITTLE_ENDIAN (0x02000000U) -#define MMU_M_ATTR_USER0 (0x01000000U) -#define MMU_M_ATTR (0x03000000U) -#define MMU_V_ATTR (24) - -// These constants have the same bit positions they'll occupy -// in low word of the TLB. - -#define MMU_M_PERM_EXEC (0x00000200U) -#define MMU_M_PERM_DATA_WRITE (0x00000100U) -#define MMU_M_PERM_ZONE_SELECT (0x000000f0U) -#define MMU_M_PERM (0x000003f0U) -#define MMU_V_PERM (4) - -#define MMU_M_PROP_WRITE_THROUGH (0x00000008U) -#define MMU_M_PROP_UNCACHED (0x00000004U) -#define MMU_M_PROP_MEM_COHERENT (0x00000002U) -#define MMU_M_PROP_GUARDED (0x00000001U) -#define MMU_M_PROP (0x0000000fU) -#define MMU_V_PROP (0) - - -/* - * Dump (cleartext) content info from cached TLB entries - * to a file (stdout if f==NULL). - */ -void -bsp_mmu_dump_cache(FILE *f); - -/* Read a TLB entry from the hardware and store the settings in the - * bsp_mmu_cache[] structure. - * - * The routine can perform this operation quietly or - * print information to a file. - * - * 'key': TLB entry index. - * 'quiet': perform operation silently (no info printed) if nonzero. - * 'f': open FILE where to print information. May be NULL, in - * which case 'stdout' is used. - * - * RETURNS: - * 0: success; TLB entry is VALID - * +1: success but TLB entry is INVALID - * < 0: error (-1: invalid argument) - * (-2: driver not initialized) - */ -int -bsp_mmu_update(bsp_tlb_idx_t key, bool quiet, FILE *f); - -/* Initialize cache. Should be done only once although this is not enforced. - * - * RETURNS: zero on success, nonzero on error; in this case the driver will - * refuse to change TLB entries (other than disabling them). - */ -int -bsp_mmu_initialize(void); - -/* Find first free TLB entry by examining all entries' valid bit. The first - * entry without the valid bit set is returned. - * - * RETURNS: A free TLB entry number. -1 if no entry can be found. - */ -bsp_tlb_idx_t -bsp_mmu_find_first_free(void); - -/* Write a TLB entry (can also be used to disable an entry). - * - * The routine checks against the cached data in bsp_mmu_cache[] - * to prevent the user from generating overlapping entries. - * - * 'idx': TLB entry # to manipulate - * 'ea': Effective address (must be page aligned) - * 'pa': Physical address (must be page aligned) - * 'sz': Page size selector; page size is 1024 * 2^(2*sz) bytes. - * 'sz' may also be one of the following: - * - page size in bytes ( >= 1024 ); the selector - * value is then computed by this routine. - * However, 'sz' must be a valid page size - * or -1 will be returned. - * - a value < 0 to invalidate/disable the - * TLB entry. - * 'flgs': Page's little-endian & user-defined flags, permissions and attributes - * 'tid': Translation ID - * - * RETURNS: 0 on success, nonzero on error: - * - * >0: requested mapping would overlap with - * existing mapping in another entry. Return - * value gives conflicting entry + 1; i.e., - * if a value of 4 is returned then the request - * conflicts with existing mapping in entry 3. - * -1: invalid argument - * -3: driver not initialized (or initialization failed). - * <0: other error - */ -bsp_tlb_idx_t -bsp_mmu_write(bsp_tlb_idx_t idx, uint32_t ea, uint32_t pa, uint sz, - uint32_t flgs, uint32_t tid); - -/* Check if a ea/tid/sz mapping overlaps with an existing entry. - * - * 'ea': The Effective Address to match against - * 'sz': The 'logarithmic' size selector; the page size - * is 1024*2^(2*sz). - * 'tid': The TID to match against - * - * RETURNS: - * >= 0: index of TLB entry that already provides a mapping - * which overlaps within the ea range. - * -1: SUCCESS (no conflicting entry found) - * <=-2: ERROR (invalid input) - */ -bsp_tlb_idx_t -bsp_mmu_match(uint32_t ea, int sz, uint32_t tid); - -/* Find TLB index that maps 'ea/tid' combination - * - * 'ea': Effective address to match against - * 'tid': The TID to match against - * - * RETURNS: index 'key'; i.e., the index number. - * - * On error (no mapping) -1 is returned. - */ -bsp_tlb_idx_t -bsp_mmu_find(uint32_t ea, uint32_t tid); - -/* Mark TLB entry as invalid ('disabled'). - * - * 'key': TLB entry index. - * - * RETURNS: zero on success, nonzero on error (TLB unchanged). - * - * NOTE: If a TLB entry is disabled the associated - * entry in bsp_mmu_cache[] is also marked as disabled. - */ -int -bsp_mmu_invalidate(bsp_tlb_idx_t key); - -/** @} */ - -#ifdef __cplusplus -}; -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/virtex4/include/tm27.h b/c/src/lib/libbsp/powerpc/virtex4/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex4/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include <rtems/tm27-default.h> diff --git a/c/src/lib/libbsp/powerpc/virtex4/preinstall.am b/c/src/lib/libbsp/powerpc/virtex4/preinstall.am deleted file mode 100644 index 62df611471..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex4/preinstall.am +++ /dev/null @@ -1,71 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/mmu.h: include/mmu.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mmu.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mmu.h - diff --git a/c/src/lib/libbsp/powerpc/virtex4/bsp_specs b/c/src/lib/libbsp/powerpc/virtex4/startup/bsp_specs index ccbea2690c..ccbea2690c 100644 --- a/c/src/lib/libbsp/powerpc/virtex4/bsp_specs +++ b/c/src/lib/libbsp/powerpc/virtex4/startup/bsp_specs diff --git a/c/src/lib/libbsp/powerpc/virtex5/Makefile.am b/c/src/lib/libbsp/powerpc/virtex5/Makefile.am index 5466edf088..ffc9c7eaea 100644 --- a/c/src/lib/libbsp/powerpc/virtex5/Makefile.am +++ b/c/src/lib/libbsp/powerpc/virtex5/Makefile.am @@ -4,18 +4,9 @@ EXTRA_DIST = include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../bsp.am -include_bspdir = $(includedir)/bsp - -dist_project_lib_DATA = bsp_specs +dist_project_lib_DATA = startup/bsp_specs # include -include_HEADERS = include/bsp.h -include_HEADERS += include/tm27.h - -include_bsp_HEADERS = - -nodist_include_HEADERS = include/bspopts.h -nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h DISTCLEANFILES = include/bspopts.h # start @@ -24,7 +15,7 @@ rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S $(CPPASCOMPILE) -o $@ -c $< project_lib_DATA = rtems_crti.$(OBJEXT) -dist_project_lib_DATA += startup/linkcmds +project_lib_DATA += linkcmds noinst_LIBRARIES = libbsp.a @@ -51,11 +42,9 @@ libbsp_a_SOURCES += startup/dummy_console.c \ ../../shared/dummy_printk_support.c # irq -include_bsp_HEADERS += include/irq.h libbsp_a_SOURCES += irq/irq_init.c # mmu -include_bsp_HEADERS += include/mmu.h libbsp_a_SOURCES += mmu/mmu.c libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \ @@ -67,5 +56,5 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \ EXTRA_DIST += times -include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am +include $(srcdir)/../../../../../../bsps/powerpc/virtex5/headers.am diff --git a/c/src/lib/libbsp/powerpc/virtex5/configure.ac b/c/src/lib/libbsp/powerpc/virtex5/configure.ac index f3a156cb44..0c5481d772 100644 --- a/c/src/lib/libbsp/powerpc/virtex5/configure.ac +++ b/c/src/lib/libbsp/powerpc/virtex5/configure.ac @@ -4,6 +4,9 @@ AC_PREREQ([2.69]) AC_INIT([rtems-c-src-lib-libbsp-powerpc-virtex5],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) AC_CONFIG_SRCDIR([make/custom/virtex5.cfg]) RTEMS_TOP(../../../../../..) +RTEMS_SOURCE_TOP +RTEMS_BUILD_TOP +RTEMS_BSP_LINKCMDS RTEMS_CANONICAL_TARGET_CPU AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) diff --git a/c/src/lib/libbsp/powerpc/virtex5/include/bsp.h b/c/src/lib/libbsp/powerpc/virtex5/include/bsp.h deleted file mode 100644 index ee9f20058d..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex5/include/bsp.h +++ /dev/null @@ -1,107 +0,0 @@ -/* @file - * - * This include file contains all GEN405 board IO definitions. - */ - -/* - * derived from helas403/include/bsp.h: - * Id: bsp.h,v 1.4 2001/06/18 17:01:48 joel Exp - * Author: Thomas Doerfler <td@imd.m.isar.de> - * IMD Ingenieurbuero fuer Microcomputertechnik - * - * COPYRIGHT (c) 1998 by IMD - * - * Changes from IMD are covered by the original distributions terms. - * This file has been derived from the papyrus BSP. - * - * Author: Andrew Bray <andy@i-cubed.co.uk> - * - * COPYRIGHT (c) 1995 by i-cubed ltd. - * - * To anyone who acknowledges that this file is provided "AS IS" - * without any express or implied warranty: - * permission to use, copy, modify, and distribute this file - * for any purpose is hereby granted without fee, provided that - * the above copyright notice and this notice appears in all - * copies, and that the name of i-cubed limited not be used in - * advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. - * i-cubed limited makes no representations about the suitability - * of this software for any purpose. - * - * Derived from c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - */ - -#ifndef LIBBSP_POWERPC_VIRTEX5_BSP_H -#define LIBBSP_POWERPC_VIRTEX5_BSP_H - -#include <bspopts.h> - -/* - * confdefs.h overrides for this BSP: - * - Interrupt stack space is not minimum if defined. - */ -#define BSP_INTERRUPT_STACK_SIZE (16 * 1024) - -#ifdef ASM -/* Definition of where to store registers in alignment handler */ -#define ALIGN_REGS 0x0140 - -#else -#include <rtems.h> -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/* miscellaneous stuff assumed to exist */ -extern bool bsp_timer_internal_clock; /* TRUE, when timer runs with CPU clk */ - -/* - * Bus Frequency - */ -extern unsigned int BSP_bus_frequency; -/* - * Processor Clock Frequency - */ -extern unsigned int BSP_processor_frequency; -/* - * Time base divisior (how many tick for 1 second). - */ -extern unsigned int BSP_time_base_divisor; - -/* - * Macro used by shared MPC6xx timer driver - */ -#define BSP_Convert_decrementer( _value ) \ - ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value))) - -/* - * Interfaces to required Clock Driver support methods - */ -int BSP_disconnect_clock_handler(void); -int BSP_connect_clock_handler(void); - -/* - * Prototypes for BSP methods shared across file boundaries - */ -void zero_bss(void); - -#endif /* ASM */ - -void BSP_ask_for_reset(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/virtex5/include/irq.h b/c/src/lib/libbsp/powerpc/virtex5/include/irq.h deleted file mode 100644 index 066090de7f..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex5/include/irq.h +++ /dev/null @@ -1,82 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS virtex BSP | -+-----------------------------------------------------------------+ -| Copyright (c) 2007 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.org/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file declares constants of the interrupt controller | -\*===============================================================*/ -#ifndef VIRTEX5_IRQ_IRQ_H -#define VIRTEX5_IRQ_IRQ_H - -#include <rtems/irq.h> - -/* - * the following definitions specify the indices used - * to interface the interrupt handler API - */ - -/* - * Peripheral IRQ handlers related definitions - */ - /* Not supported at this level */ - -/* - * Processor IRQ handlers related definitions - */ -#define BSP_PROCESSOR_IRQ_NUMBER 3 -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET 0 -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\ - +BSP_PROCESSOR_IRQ_NUMBER-1) - -#define BSP_IS_PROCESSOR_IRQ(irqnum) \ - (((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \ - ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET)) - -/* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1) -#define BSP_LOWEST_OFFSET BSP_PROCESSOR_IRQ_LOWEST_OFFSET -#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET - -#define BSP_IS_VALID_IRQ(irqnum) (BSP_IS_PROCESSOR_IRQ(irqnum)) - -#ifndef ASM -#ifdef __cplusplus -extern "C" { -#endif - -/* - * index table for the module specific handlers, a few entries are only placeholders - */ - typedef enum { - BSP_EXT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 0, - BSP_PIT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 1, - BSP_CRIT = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 2 - } rtems_irq_symbolic_name; - - extern rtems_irq_connect_data *BSP_rtems_irq_tbl; - void BSP_irqexc_on_fnc(const rtems_irq_connect_data *conn_data); - void BSP_irqexc_off_fnc(const rtems_irq_connect_data *unused); - void BSP_rtems_irq_mngt_init(unsigned cpuId); - -#define BSP_DEC BSP_PIT -#define BSP_DECREMENTER BSP_PIT - -#ifdef __cplusplus -} -#endif -#endif /* ASM */ - -#endif /* VIRTEX5_IRQ_IRQ_H */ diff --git a/c/src/lib/libbsp/powerpc/virtex5/include/mmu.h b/c/src/lib/libbsp/powerpc/virtex5/include/mmu.h deleted file mode 100644 index a3fb32b662..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex5/include/mmu.h +++ /dev/null @@ -1,287 +0,0 @@ -#ifndef RTEMS_VIRTEX5_MMU_H -#define RTEMS_VIRTEX5_MMU_H -/** - * @file - * - * @ingroup Virtex5MMU - * - * @brief Routines to manipulate the PPC 440 MMU. - */ -/* - * Authorship - * ---------- - * This software was created by - * Till Straumann <strauman@slac.stanford.edu>, 2005-2007, - * Stanford Linear Accelerator Center, Stanford University. - * and was transcribed for the PPC 440 by - * R. Claus <claus@slac.stanford.edu>, 2012, - * Stanford Linear Accelerator Center, Stanford University, - * - * Acknowledgement of sponsorship - * ------------------------------ - * This software was produced by - * the Stanford Linear Accelerator Center, Stanford University, - * under Contract DE-AC03-76SFO0515 with the Department of Energy. - * - * Government disclaimer of liability - * ---------------------------------- - * Neither the United States nor the United States Department of Energy, - * nor any of their employees, makes any warranty, express or implied, or - * assumes any legal liability or responsibility for the accuracy, - * completeness, or usefulness of any data, apparatus, product, or process - * disclosed, or represents that its use would not infringe privately owned - * rights. - * - * Stanford disclaimer of liability - * -------------------------------- - * Stanford University makes no representations or warranties, express or - * implied, nor assumes any liability for the use of this software. - * - * Stanford disclaimer of copyright - * -------------------------------- - * Stanford University, owner of the copyright, hereby disclaims its - * copyright and all other rights in this software. Hence, anyone may - * freely use it for any purpose without restriction. - * - * Maintenance of notices - * ---------------------- - * In the interest of clarity regarding the origin and status of this - * SLAC software, this and all the preceding Stanford University notices - * are to remain affixed to any copy or derivative of this software made - * or distributed by the recipient and are to be affixed to any copy of - * software made or distributed by the recipient that contains a copy or - * derivative of this software. - * - * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 - */ - -#include <rtems.h> -#include <inttypes.h> -#include <stdio.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup Virtex5MMU Virtex 5 - MMU Support - * - * @ingroup Virtex5 - * - * @brief MMU support. - * - * @{ - */ - -/* Some routines require or return an index 'key'. - */ -typedef int bsp_tlb_idx_t; - -/* Cache the relevant TLB entries so that we can make sure the user cannot - * create conflicting (overlapping) entries. Keep them public for informational - * purposes. - */ -typedef struct { - struct { - uint32_t pad:24; - uint32_t tid:8; /** Translation ID */ - } id; - struct { - uint32_t epn:22; /** Effective page number */ - uint32_t v:1; /** Valid */ - uint32_t ts:1; /** Translation Address Space */ - uint32_t size:4; /** Page size */ - uint32_t tpar:4; /** Tag parity */ - } w0; - struct { - uint32_t rpn:22; /** The real (translated) page number. */ - uint32_t par1:2; /** For matching the TLB array parity */ - uint32_t pad:4; - uint32_t erpn:4; /** Extended Real Page Number */ - } w1; - struct { - uint32_t par2:2; /** Parity for TLB word 2 */ - uint32_t pad1:14; - uint32_t att:4; /** User-defined attributes */ - uint32_t wimge:5; /** Write-Through/Caching Inhibited/Memory Coherent/Guarded/Endian */ - uint32_t pad2:1; - uint32_t perm:6; /** User-State Executable/Writeable/Readable Supervisor-State Executable/Writeable/Readable */ - } w2; -} bsp_tlb_entry_t; - -#define NTLBS 64 - -extern bsp_tlb_entry_t* bsp_mmu_cache; - -// These constants will have to be shifted right by 20 bits before -// being inserted the high word of the TLB. - -#define MMU_M_SIZE_1K (0x00000000U) -#define MMU_M_SIZE_4K (0x08000000U) -#define MMU_M_SIZE_16K (0x10000000U) -#define MMU_M_SIZE_64K (0x18000000U) -#define MMU_M_SIZE_256K (0x20000000U) -#define MMU_M_SIZE_1M (0x28000000U) -#define MMU_M_SIZE_16M (0x38000000U) -#define MMU_M_SIZE_256M (0x48000000U) -#define MMU_M_SIZE_MIN (MMU_M_SIZE_1K) -#define MMU_M_SIZE_MAX (MMU_M_SIZE_256M) -#define MMU_M_SIZE (0x78000000U) -#define MMU_V_SIZE (27) - -// These constants have the same bit positions they'll occupy -// in low word of the TLB. - -#define MMU_M_ATTR_USER0 (0x00010000U) -#define MMU_M_ATTR_USER1 (0x00008000U) -#define MMU_M_ATTR_USER2 (0x00004000U) -#define MMU_M_ATTR_USER3 (0x00002000U) -#define MMU_M_ATTR (0x0001e000U) -#define MMU_V_ATTR (13) - -#define MMU_M_PROP_WRITE_THROUGH (0x00001000U) -#define MMU_M_PROP_UNCACHED (0x00000800U) -#define MMU_M_PROP_MEM_COHERENT (0x00000400U) -#define MMU_M_PROP_GUARDED (0x00000200U) -#define MMU_M_PROP_LITTLE_ENDIAN (0x00000100U) -#define MMU_M_PROP (0x00000f00U) -#define MMU_V_PROP (8) - -#define MMU_M_PERM_USER_EXEC (0x00000020U) -#define MMU_M_PERM_USER_WRITE (0x00000010U) -#define MMU_M_PERM_USER_READ (0x00000008U) -#define MMU_M_PERM_SUPER_EXEC (0x00000004U) -#define MMU_M_PERM_SUPER_WRITE (0x00000002U) -#define MMU_M_PERM_SUPER_READ (0x00000001U) -#define MMU_M_PERM (0x0000003fU) -#define MMU_V_PERM (0) - - -/* - * Dump (cleartext) content info from cached TLB entries - * to a file (stdout if f==NULL). - */ -void -bsp_mmu_dump_cache(FILE *f); - -/* Read a TLB entry from the hardware and store the settings in the - * bsp_mmu_cache[] structure. - * - * The routine can perform this operation quietly or - * print information to a file. - * - * 'key': TLB entry index. - * 'quiet': perform operation silently (no info printed) if nonzero. - * 'f': open FILE where to print information. May be NULL, in - * which case 'stdout' is used. - * - * RETURNS: - * 0: success; TLB entry is VALID - * +1: success but TLB entry is INVALID - * < 0: error (-1: invalid argument) - * (-2: driver not initialized) - */ -int -bsp_mmu_update(bsp_tlb_idx_t key, bool quiet, FILE *f); - -/* Initialize cache. Should be done only once although this is not enforced. - * - * RETURNS: zero on success, nonzero on error; in this case the driver will - * refuse to change TLB entries (other than disabling them). - */ -int -bsp_mmu_initialize(void); - -/* Find first free TLB entry by examining all entries' valid bit. The first - * entry without the valid bit set is returned. - * - * RETURNS: A free TLB entry number. -1 if no entry can be found. - */ -bsp_tlb_idx_t -bsp_mmu_find_first_free(void); - -/* Write a TLB entry (can also be used to disable an entry). - * - * The routine checks against the cached data in bsp_mmu_cache[] - * to prevent the user from generating overlapping entries. - * - * 'idx': TLB entry # to manipulate - * 'ea': Effective address (must be page aligned) - * 'pa': Physical address (must be page aligned) - * 'sz': Page size selector; page size is 1024 * 2^(2*sz) bytes. - * 'sz' may also be one of the following: - * - page size in bytes ( >= 1024 ); the selector - * value is then computed by this routine. - * However, 'sz' must be a valid page size - * or -1 will be returned. - * - a value < 0 to invalidate/disable the - * TLB entry. - * 'flgs': Page's User-defined flags, permissions and WIMGE page attributes - * 'tid': Translation ID - * 'ts': Translation Space - * 'erpn': Extended Real Page Number - * - * RETURNS: 0 on success, nonzero on error: - * - * >0: requested mapping would overlap with - * existing mapping in another entry. Return - * value gives conflicting entry + 1; i.e., - * if a value of 4 is returned then the request - * conflicts with existing mapping in entry 3. - * -1: invalid argument - * -3: driver not initialized (or initialization failed). - * <0: other error - */ -bsp_tlb_idx_t -bsp_mmu_write(bsp_tlb_idx_t idx, uint32_t ea, uint32_t pa, int sz, - uint32_t flgs, uint32_t tid, uint32_t ts, uint32_t erpn); - -/* Check if a ea/tid/ts/sz mapping overlaps with an existing entry. - * - * 'ea': The Effective Address to match against - * 'sz': The 'logarithmic' size selector; the page size - * is 1024*2^(2*sz). - * 'tid': Translation ID - * 'ts': Translation Space - * - * RETURNS: - * >= 0: index of TLB entry that already provides a mapping - * which overlaps within the ea range. - * -1: SUCCESS (no conflicting entry found) - * <=-2: ERROR (invalid input) - */ -bsp_tlb_idx_t -bsp_mmu_match(uint32_t ea, int sz, uint32_t tid, uint32_t ts); - -/* Find TLB index that maps 'ea/tid/ts' combination - * - * 'ea': Effective address to match against - * 'tid': Translation ID - * 'ts': Translation Space - * - * RETURNS: index 'key'; i.e., the index number. - * - * On error (no mapping) -1 is returned. - */ -bsp_tlb_idx_t -bsp_mmu_find(uint32_t ea, uint32_t tid, uint32_t ts); - -/* Mark TLB entry as invalid ('disabled'). - * - * 'key': TLB entry index. - * - * RETURNS: zero on success, nonzero on error (TLB unchanged). - * - * NOTE: If a TLB entry is disabled the associated - * entry in bsp_tlb_cache[] is also marked as disabled. - */ -int -bsp_mmu_invalidate(bsp_tlb_idx_t key); - -/** @} */ - -#ifdef __cplusplus -}; -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/virtex5/include/tm27.h b/c/src/lib/libbsp/powerpc/virtex5/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex5/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include <rtems/tm27-default.h> diff --git a/c/src/lib/libbsp/powerpc/virtex5/preinstall.am b/c/src/lib/libbsp/powerpc/virtex5/preinstall.am deleted file mode 100644 index 62df611471..0000000000 --- a/c/src/lib/libbsp/powerpc/virtex5/preinstall.am +++ /dev/null @@ -1,71 +0,0 @@ -## Automatically generated by ampolish3 - Do not edit - -if AMPOLISH3 -$(srcdir)/preinstall.am: Makefile.am - $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am -endif - -PREINSTALL_DIRS = -DISTCLEANFILES += $(PREINSTALL_DIRS) - -all-am: $(PREINSTALL_FILES) - -PREINSTALL_FILES = -CLEANFILES = $(PREINSTALL_FILES) - -all-local: $(TMPINSTALL_FILES) - -TMPINSTALL_FILES = -CLEANFILES += $(TMPINSTALL_FILES) - -$(PROJECT_LIB)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_LIB) - @: > $(PROJECT_LIB)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) - -$(PROJECT_INCLUDE)/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE) - @: > $(PROJECT_INCLUDE)/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) - -$(PROJECT_INCLUDE)/bsp/$(dirstamp): - @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp - @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) - -$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs -PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs - -$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h - -$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h - -$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h - -$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h - -$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT) -TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT) - -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds - -$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h - -$(PROJECT_INCLUDE)/bsp/mmu.h: include/mmu.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mmu.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mmu.h - diff --git a/c/src/lib/libbsp/powerpc/virtex5/bsp_specs b/c/src/lib/libbsp/powerpc/virtex5/startup/bsp_specs index ccbea2690c..ccbea2690c 100644 --- a/c/src/lib/libbsp/powerpc/virtex5/bsp_specs +++ b/c/src/lib/libbsp/powerpc/virtex5/startup/bsp_specs |