diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-09-12 10:35:21 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-01-17 08:31:48 +0100 |
| commit | f20078acea88f7c38f14cbc206053e50c313c357 (patch) | |
| tree | b00ad4ff46b7da85f4b5206561961d0317b86375 /spec/build/bsps/arm | |
| parent | build: Replace variant patterns with a list (diff) | |
| download | rtems-f20078acea88f7c38f14cbc206053e50c313c357.tar.bz2 | |
build: Use enabled by for defaults
Merge the "default" and "default-by-variant" attributes. Use an
"enabled-by" expression to select the default value based on the enabled
set. This makes it possible to select default values depending on other
options. For example you could choose memory settings based on whether
RTEMS_SMP is enabled or disabled.
The change was tested by comparing the output of
./waf bspdefaults
before and after the change.
Diffstat (limited to 'spec/build/bsps/arm')
320 files changed, 1217 insertions, 1065 deletions
diff --git a/spec/build/bsps/arm/altera-cyclone-v/abi.yml b/spec/build/bsps/arm/altera-cyclone-v/abi.yml index a3a710c97d..d3161d624d 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/abi.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/abi.yml @@ -7,12 +7,13 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a9 -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a9 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml b/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml index e67ddc129b..717ab3987e 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | define to set ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz, otherwise alt_clk_freq_get() is used enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml b/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml index 77dac09116..9a0fcab10c 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | enable data cache enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml b/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml index a59db43f31..d1528a778a 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | enable instruction cache enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml b/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml index 61333a11f1..e303a8bf9f 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false description: | This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml b/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml index 635697cc8a..7c0a838c59 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | configuration for console (UART 0) enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml b/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml index f5c588a330..23a7228b33 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | configuration for UART 1 enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml b/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml index f2fc473967..acaa870ecd 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | define if FDT is supported enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml b/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml index ee8097aa3b..55e4d45d30 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 100000 -default-by-variant: [] +default: +- enabled-by: true + value: 100000 description: | speed for I2C0 in HZ enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml b/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml index 2d36d5f930..c5aad3d6f0 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | Number of configured I2C buses. Note that each bus has to be configured in an apropriate i2cdrv_config array. enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml b/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml index efd1ea2b2a..bac5c79627 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml b/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml index b5f577ffc3..e4a99ded5f 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | baud for UARTs enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml b/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml index 152668b2d9..a9fa750357 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | enable usage of interrupts for the UART modules enabled-by: true diff --git a/spec/build/bsps/arm/atsam/abi.yml b/spec/build/bsps/arm/atsam/abi.yml index 7a95742c36..afb6d04b14 100644 --- a/spec/build/bsps/arm/atsam/abi.yml +++ b/spec/build/bsps/arm/atsam/abi.yml @@ -7,11 +7,12 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mthumb -- -mcpu=cortex-m7 -- -mfpu=fpv5-d16 -- -mfloat-abi=hard -default-by-variant: [] +- enabled-by: true + value: + - -mthumb + - -mcpu=cortex-m7 + - -mfpu=fpv5-d16 + - -mfloat-abi=hard description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optchgclksram.yml b/spec/build/bsps/arm/atsam/optchgclksram.yml index 58dca377d7..6d1c6e947e 100644 --- a/spec/build/bsps/arm/atsam/optchgclksram.yml +++ b/spec/build/bsps/arm/atsam/optchgclksram.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | Move the functions that set up the clock into the SRAM. This allows to change the clock frequency even if the application is started from SDRAM. Requires a TCM_SIZE > 0. enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optchip.yml b/spec/build/bsps/arm/atsam/optchip.yml index 16998e6c2a..0568b6c41d 100644 --- a/spec/build/bsps/arm/atsam/optchip.yml +++ b/spec/build/bsps/arm/atsam/optchip.yml @@ -43,8 +43,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: samv71q21 -default-by-variant: [] +default: +- enabled-by: true + value: samv71q21 description: | Chip variant enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optconbaud.yml b/spec/build/bsps/arm/atsam/optconbaud.yml index b0e34e7505..f80c5aa846 100644 --- a/spec/build/bsps/arm/atsam/optconbaud.yml +++ b/spec/build/bsps/arm/atsam/optconbaud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | initial baud for console devices (default 115200) enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optconidx.yml b/spec/build/bsps/arm/atsam/optconidx.yml index d58d75e4aa..3318cd7e2a 100644 --- a/spec/build/bsps/arm/atsam/optconidx.yml +++ b/spec/build/bsps/arm/atsam/optconidx.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: [] +default: +- enabled-by: true + value: 1 description: | device index for /dev/console (default 1, e.g. USART1) enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optconirq.yml b/spec/build/bsps/arm/atsam/optconirq.yml index a410e05060..710649f8af 100644 --- a/spec/build/bsps/arm/atsam/optconirq.yml +++ b/spec/build/bsps/arm/atsam/optconirq.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | use interrupt driven mode for console devices (used by default) enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optcontype.yml b/spec/build/bsps/arm/atsam/optcontype.yml index 6846fed5f2..4f5f313df8 100644 --- a/spec/build/bsps/arm/atsam/optcontype.yml +++ b/spec/build/bsps/arm/atsam/optcontype.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: [] +default: +- enabled-by: true + value: 0 description: | device type for /dev/console, use 0 for USART and 1 for UART (default USART) enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optmck.yml b/spec/build/bsps/arm/atsam/optmck.yml index d216542285..2b40fbdfb5 100644 --- a/spec/build/bsps/arm/atsam/optmck.yml +++ b/spec/build/bsps/arm/atsam/optmck.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 123000000 -default-by-variant: [] +default: +- enabled-by: true + value: 123000000 description: | Frequency of the MCK in Hz. Set to 0 to force application defined speed. See start/pmc-config.c for available clock configurations. enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optnocachesz.yml b/spec/build/bsps/arm/atsam/optnocachesz.yml index d7d4783260..1bf7d0b093 100644 --- a/spec/build/bsps/arm/atsam/optnocachesz.yml +++ b/spec/build/bsps/arm/atsam/optnocachesz.yml @@ -6,8 +6,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00001000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00001000 description: | size of NOCACHE section in bytes enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optnullsz.yml b/spec/build/bsps/arm/atsam/optnullsz.yml index 6e316b44b4..b2fc304924 100644 --- a/spec/build/bsps/arm/atsam/optnullsz.yml +++ b/spec/build/bsps/arm/atsam/optnullsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00000000 description: | Size of the NULL pointer protection area in bytes. This memory area reduces the size of the ITCM available to the application. diff --git a/spec/build/bsps/arm/atsam/optoscmain.yml b/spec/build/bsps/arm/atsam/optoscmain.yml index 4cafffea37..dd411a651f 100644 --- a/spec/build/bsps/arm/atsam/optoscmain.yml +++ b/spec/build/bsps/arm/atsam/optoscmain.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 12000000 -default-by-variant: [] +default: +- enabled-by: true + value: 12000000 description: | Main oscillator frequency in Hz (default 12MHz) enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optqspiflashsz.yml b/spec/build/bsps/arm/atsam/optqspiflashsz.yml index 49f15891b0..9174d0d893 100644 --- a/spec/build/bsps/arm/atsam/optqspiflashsz.yml +++ b/spec/build/bsps/arm/atsam/optqspiflashsz.yml @@ -6,8 +6,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00200000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00200000 description: | size of QSPI flash in bytes enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optsdram.yml b/spec/build/bsps/arm/atsam/optsdram.yml index 0c3808ab2b..d597e0106c 100644 --- a/spec/build/bsps/arm/atsam/optsdram.yml +++ b/spec/build/bsps/arm/atsam/optsdram.yml @@ -26,8 +26,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: is42s16100e-7bli -default-by-variant: [] +default: +- enabled-by: true + value: is42s16100e-7bli description: | SDRAM variant. Known chips are "is42s16100e-7bli", "is42s16320f-7bl", "mt48lc16m16a2p-6a". You can also set this to "custom-<RAM_SIZE>" (for example diff --git a/spec/build/bsps/arm/atsam/opttcmsz.yml b/spec/build/bsps/arm/atsam/opttcmsz.yml index 1cb51fcc78..1ed0da4778 100644 --- a/spec/build/bsps/arm/atsam/opttcmsz.yml +++ b/spec/build/bsps/arm/atsam/opttcmsz.yml @@ -6,8 +6,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00000000 description: | Size of tightly coupled memories (TCM) in bytes. Note that the ITCM is reduced by the ATSAM_MEMORY_NULL_SIZE option. DTCM is unaffected. diff --git a/spec/build/bsps/arm/atsam/optusextal.yml b/spec/build/bsps/arm/atsam/optusextal.yml index 6353956d15..3869b18743 100644 --- a/spec/build/bsps/arm/atsam/optusextal.yml +++ b/spec/build/bsps/arm/atsam/optusextal.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | Use the external crystal as source for the slow clock instead of the internal RC oscillator. Note that on the ATSAM the NRST pin seems to depend on the slow clock as well as all watchdogs. If ATSAM_SLOWCLOCK_USE_XTAL is set to 1 without a external crystal connected, the controller might hang in the switching process without a working NRST pin. enabled-by: true diff --git a/spec/build/bsps/arm/atsam/tstatsamv.yml b/spec/build/bsps/arm/atsam/tstatsamv.yml index 8af2234f22..f90cc615d3 100644 --- a/spec/build/bsps/arm/atsam/tstatsamv.yml +++ b/spec/build/bsps/arm/atsam/tstatsamv.yml @@ -27,8 +27,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: [] diff --git a/spec/build/bsps/arm/beagle/abi.yml b/spec/build/bsps/arm/beagle/abi.yml index 80b94605e7..55465d36a9 100644 --- a/spec/build/bsps/arm/beagle/abi.yml +++ b/spec/build/bsps/arm/beagle/abi.yml @@ -7,8 +7,9 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=cortex-a8 -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=cortex-a8 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/beagle/optam335x.yml b/spec/build/bsps/arm/beagle/optam335x.yml index 6641cef403..00c4c328d9 100644 --- a/spec/build/bsps/arm/beagle/optam335x.yml +++ b/spec/build/bsps/arm/beagle/optam335x.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/beagleboneblack - arm/beaglebonewhite + value: true +- enabled-by: true + value: false description: | true if SOC is AM335X enabled-by: true diff --git a/spec/build/bsps/arm/beagle/optconbaud.yml b/spec/build/bsps/arm/beagle/optconbaud.yml index 9c3eaff15b..8441947ce8 100644 --- a/spec/build/bsps/arm/beagle/optconbaud.yml +++ b/spec/build/bsps/arm/beagle/optconbaud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | initial baud for console UART enabled-by: true diff --git a/spec/build/bsps/arm/beagle/optconpoll.yml b/spec/build/bsps/arm/beagle/optconpoll.yml index 1717792bb8..acb67e28f3 100644 --- a/spec/build/bsps/arm/beagle/optconpoll.yml +++ b/spec/build/bsps/arm/beagle/optconpoll.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | polled console i/o (e.g. to run testsuite) enabled-by: true diff --git a/spec/build/bsps/arm/beagle/optdebug.yml b/spec/build/bsps/arm/beagle/optdebug.yml index 8a5dc7ee96..05ceae5818 100644 --- a/spec/build/bsps/arm/beagle/optdebug.yml +++ b/spec/build/bsps/arm/beagle/optdebug.yml @@ -5,12 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: false - variants: - - arm/beagleboneblack - - arm/beaglebonewhite +default: +- enabled-by: true + value: false description: | Enable BBB debug enabled-by: true diff --git a/spec/build/bsps/arm/beagle/optdm3730.yml b/spec/build/bsps/arm/beagle/optdm3730.yml index 4161ee29f1..6d7d495b67 100644 --- a/spec/build/bsps/arm/beagle/optdm3730.yml +++ b/spec/build/bsps/arm/beagle/optdm3730.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/beagleboardorig - arm/beagleboardxm + value: true +- enabled-by: true + value: false description: | true if SOC is DM3730 enabled-by: true diff --git a/spec/build/bsps/arm/csb336/abi.yml b/spec/build/bsps/arm/csb336/abi.yml index ccf0bc7ea2..c19f7eb9ff 100644 --- a/spec/build/bsps/arm/csb336/abi.yml +++ b/spec/build/bsps/arm/csb336/abi.yml @@ -7,8 +7,9 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=arm920 -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=arm920 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/csb337/abi.yml b/spec/build/bsps/arm/csb337/abi.yml index ccf0bc7ea2..c19f7eb9ff 100644 --- a/spec/build/bsps/arm/csb337/abi.yml +++ b/spec/build/bsps/arm/csb337/abi.yml @@ -7,8 +7,9 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=arm920 -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=arm920 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optcsb637.yml b/spec/build/bsps/arm/csb337/optcsb637.yml index 5db48e1f0a..af6b0b5790 100644 --- a/spec/build/bsps/arm/csb337/optcsb637.yml +++ b/spec/build/bsps/arm/csb337/optcsb637.yml @@ -5,14 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/kit637_v6 -- value: true - variants: - arm/csb637 + value: true +- enabled-by: true + value: false description: | If defined, this indicates that the BSP is being built for the csb637 variant. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenlcd.yml b/spec/build/bsps/arm/csb337/optenlcd.yml index 40617f7c2f..dc1f3b3786 100644 --- a/spec/build/bsps/arm/csb337/optenlcd.yml +++ b/spec/build/bsps/arm/csb337/optenlcd.yml @@ -6,11 +6,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: false - variants: - - arm/kit637_v6 +default: +- enabled-by: true + value: false description: | If defined, enable use of the SED1356 controller and LCD. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenumon.yml b/spec/build/bsps/arm/csb337/optenumon.yml index 8286e0fa4b..518fccc624 100644 --- a/spec/build/bsps/arm/csb337/optenumon.yml +++ b/spec/build/bsps/arm/csb337/optenumon.yml @@ -6,8 +6,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | If defined, enable use of the uMon console. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenumoncon.yml b/spec/build/bsps/arm/csb337/optenumoncon.yml index e2ca577184..7c53ee9139 100644 --- a/spec/build/bsps/arm/csb337/optenumoncon.yml +++ b/spec/build/bsps/arm/csb337/optenumoncon.yml @@ -6,8 +6,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | If defined, enable use of the MicroMonitor console device. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenusart0.yml b/spec/build/bsps/arm/csb337/optenusart0.yml index cd968f8dbc..410e04eb54 100644 --- a/spec/build/bsps/arm/csb337/optenusart0.yml +++ b/spec/build/bsps/arm/csb337/optenusart0.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | If defined, enable use of the USART 0. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenusart1.yml b/spec/build/bsps/arm/csb337/optenusart1.yml index 963d2a9742..398cce4a47 100644 --- a/spec/build/bsps/arm/csb337/optenusart1.yml +++ b/spec/build/bsps/arm/csb337/optenusart1.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | If defined, enable use of the USART 1. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenusart2.yml b/spec/build/bsps/arm/csb337/optenusart2.yml index d4ae1fe756..bece1ac63a 100644 --- a/spec/build/bsps/arm/csb337/optenusart2.yml +++ b/spec/build/bsps/arm/csb337/optenusart2.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | If defined, enable use of the USART 2. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenusart3.yml b/spec/build/bsps/arm/csb337/optenusart3.yml index 200824f3e3..f73381e338 100644 --- a/spec/build/bsps/arm/csb337/optenusart3.yml +++ b/spec/build/bsps/arm/csb337/optenusart3.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | If defined, enable use of the USART 3. enabled-by: true diff --git a/spec/build/bsps/arm/edb7312/abi.yml b/spec/build/bsps/arm/edb7312/abi.yml index ab6ef203fa..2236f6e6f5 100644 --- a/spec/build/bsps/arm/edb7312/abi.yml +++ b/spec/build/bsps/arm/edb7312/abi.yml @@ -7,8 +7,9 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=arm7tdmi -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=arm7tdmi description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/edb7312/optskyeye.yml b/spec/build/bsps/arm/edb7312/optskyeye.yml index be55a98c3a..0d805efefd 100644 --- a/spec/build/bsps/arm/edb7312/optskyeye.yml +++ b/spec/build/bsps/arm/edb7312/optskyeye.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites. enabled-by: true diff --git a/spec/build/bsps/arm/fvp/abi.yml b/spec/build/bsps/arm/fvp/abi.yml index 8cfbb744be..e6c8dee87f 100644 --- a/spec/build/bsps/arm/fvp/abi.yml +++ b/spec/build/bsps/arm/fvp/abi.yml @@ -7,11 +7,12 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=cortex-r52 -- -mthumb -- -mfloat-abi=hard -- -mfpu=auto -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=cortex-r52 + - -mthumb + - -mfloat-abi=hard + - -mfpu=auto description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/fvp/optdevbegin.yml b/spec/build/bsps/arm/fvp/optdevbegin.yml index 9736a6a4a3..5a32c3ae30 100644 --- a/spec/build/bsps/arm/fvp/optdevbegin.yml +++ b/spec/build/bsps/arm/fvp/optdevbegin.yml @@ -8,11 +8,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x1a000000 -default-by-variant: -- value: 0x9a000000 - variants: - - arm/fvp_cortex_r52 +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0x9a000000 +- enabled-by: true + value: 0x1a000000 description: | Defines the begin address of the device area. enabled-by: true diff --git a/spec/build/bsps/arm/fvp/optdevsize.yml b/spec/build/bsps/arm/fvp/optdevsize.yml index 03da209c05..fd5ac76d1e 100644 --- a/spec/build/bsps/arm/fvp/optdevsize.yml +++ b/spec/build/bsps/arm/fvp/optdevsize.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x15200000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x15200000 description: | Defines the size in bytes of the device area. enabled-by: true diff --git a/spec/build/bsps/arm/fvp/optdrambegin.yml b/spec/build/bsps/arm/fvp/optdrambegin.yml index 13b459042b..7ab2fa5aaa 100644 --- a/spec/build/bsps/arm/fvp/optdrambegin.yml +++ b/spec/build/bsps/arm/fvp/optdrambegin.yml @@ -7,11 +7,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x80000000 -default-by-variant: -- value: 0x00000400 - variants: - - arm/fvp_cortex_r52 +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0x00000400 +- enabled-by: true + value: 0x80000000 description: | Defines the begin address of the DRAM. The begin address must take the size of the NULL pointer protection area into account (ARM_FVP_MEMORY_NULL_SIZE). diff --git a/spec/build/bsps/arm/fvp/optdramsize.yml b/spec/build/bsps/arm/fvp/optdramsize.yml index 2bfd9d1595..6d22ccfc73 100644 --- a/spec/build/bsps/arm/fvp/optdramsize.yml +++ b/spec/build/bsps/arm/fvp/optdramsize.yml @@ -7,11 +7,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x02000000 -default-by-variant: -- value: 0x01fffc00 - variants: - - arm/fvp_cortex_r52 +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0x01fffc00 +- enabled-by: true + value: 0x02000000 description: | Defines the size in bytes of the DRAM. Increasing the size may increase the startup time of the FVP. The size must take the size of the NULL pointer diff --git a/spec/build/bsps/arm/fvp/optnullsize.yml b/spec/build/bsps/arm/fvp/optnullsize.yml index afe707c52b..27ab83d133 100644 --- a/spec/build/bsps/arm/fvp/optnullsize.yml +++ b/spec/build/bsps/arm/fvp/optnullsize.yml @@ -7,11 +7,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00100000 -default-by-variant: -- value: 0x00000400 - variants: - - arm/fvp_cortex_r52 +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0x00000400 +- enabled-by: true + value: 0x00100000 description: | Defines the size in bytes of the NULL pointer protection area. enabled-by: true diff --git a/spec/build/bsps/arm/gumstix/abi.yml b/spec/build/bsps/arm/gumstix/abi.yml index 41a3903894..1b574760f5 100644 --- a/spec/build/bsps/arm/gumstix/abi.yml +++ b/spec/build/bsps/arm/gumstix/abi.yml @@ -7,8 +7,9 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=xscale -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=xscale description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/gumstix/optskyeye.yml b/spec/build/bsps/arm/gumstix/optskyeye.yml index be55a98c3a..0d805efefd 100644 --- a/spec/build/bsps/arm/gumstix/optskyeye.yml +++ b/spec/build/bsps/arm/gumstix/optskyeye.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites. enabled-by: true diff --git a/spec/build/bsps/arm/imx/abi.yml b/spec/build/bsps/arm/imx/abi.yml index 169a5e6584..c666949cd0 100644 --- a/spec/build/bsps/arm/imx/abi.yml +++ b/spec/build/bsps/arm/imx/abi.yml @@ -7,12 +7,13 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a7 -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a7 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcachedata.yml b/spec/build/bsps/arm/imx/optcachedata.yml index 23b1410385..c86800df35 100644 --- a/spec/build/bsps/arm/imx/optcachedata.yml +++ b/spec/build/bsps/arm/imx/optcachedata.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable data cache enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcacheinst.yml b/spec/build/bsps/arm/imx/optcacheinst.yml index f172cc4b58..90e0e1301a 100644 --- a/spec/build/bsps/arm/imx/optcacheinst.yml +++ b/spec/build/bsps/arm/imx/optcacheinst.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable instruction cache enabled-by: true diff --git a/spec/build/bsps/arm/imx/optccmahb.yml b/spec/build/bsps/arm/imx/optccmahb.yml index a515a44204..9137c269c0 100644 --- a/spec/build/bsps/arm/imx/optccmahb.yml +++ b/spec/build/bsps/arm/imx/optccmahb.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 135000000 -default-by-variant: [] +default: +- enabled-by: true + value: 135000000 description: | AHB clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcmmecspi.yml b/spec/build/bsps/arm/imx/optcmmecspi.yml index 1f32305aef..1802608b3a 100644 --- a/spec/build/bsps/arm/imx/optcmmecspi.yml +++ b/spec/build/bsps/arm/imx/optcmmecspi.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 67500000 -default-by-variant: [] +default: +- enabled-by: true + value: 67500000 description: | ECSPI clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcmmipg.yml b/spec/build/bsps/arm/imx/optcmmipg.yml index 8c62921ef6..98fd8abf0e 100644 --- a/spec/build/bsps/arm/imx/optcmmipg.yml +++ b/spec/build/bsps/arm/imx/optcmmipg.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 67500000 -default-by-variant: [] +default: +- enabled-by: true + value: 67500000 description: | IPG clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcmmsdhci.yml b/spec/build/bsps/arm/imx/optcmmsdhci.yml index fa06f8111a..120b0997ed 100644 --- a/spec/build/bsps/arm/imx/optcmmsdhci.yml +++ b/spec/build/bsps/arm/imx/optcmmsdhci.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 196363000 -default-by-variant: [] +default: +- enabled-by: true + value: 196363000 description: | SDHCI clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcmmuart.yml b/spec/build/bsps/arm/imx/optcmmuart.yml index ab69c87323..467d4dc091 100644 --- a/spec/build/bsps/arm/imx/optcmmuart.yml +++ b/spec/build/bsps/arm/imx/optcmmuart.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 24000000 -default-by-variant: [] +default: +- enabled-by: true + value: 24000000 description: | UART clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/imx/optconirq.yml b/spec/build/bsps/arm/imx/optconirq.yml index d94a5d20d9..ac5183c17c 100644 --- a/spec/build/bsps/arm/imx/optconirq.yml +++ b/spec/build/bsps/arm/imx/optconirq.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: [] +default: +- enabled-by: true + value: 1 description: | use interrupt driven mode for console devices (used by default) enabled-by: true diff --git a/spec/build/bsps/arm/imx/optresetvec.yml b/spec/build/bsps/arm/imx/optresetvec.yml index efd1ea2b2a..bac5c79627 100644 --- a/spec/build/bsps/arm/imx/optresetvec.yml +++ b/spec/build/bsps/arm/imx/optresetvec.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/imxrt/abi.yml b/spec/build/bsps/arm/imxrt/abi.yml index 7a95742c36..afb6d04b14 100644 --- a/spec/build/bsps/arm/imxrt/abi.yml +++ b/spec/build/bsps/arm/imxrt/abi.yml @@ -7,11 +7,12 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mthumb -- -mcpu=cortex-m7 -- -mfpu=fpv5-d16 -- -mfloat-abi=hard -default-by-variant: [] +- enabled-by: true + value: + - -mthumb + - -mcpu=cortex-m7 + - -mfpu=fpv5-d16 + - -mfloat-abi=hard description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/imxrt/optfsledmaemlm.yml b/spec/build/bsps/arm/imxrt/optfsledmaemlm.yml index 80c840373d..19d3ec60fc 100644 --- a/spec/build/bsps/arm/imxrt/optfsledmaemlm.yml +++ b/spec/build/bsps/arm/imxrt/optfsledmaemlm.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | Enable the minor loop mapping of the Freescale EDMA. enabled-by: true diff --git a/spec/build/bsps/arm/imxrt/optlinkcmds.yml b/spec/build/bsps/arm/imxrt/optlinkcmds.yml index cb398b4a89..8499f6bfee 100644 --- a/spec/build/bsps/arm/imxrt/optlinkcmds.yml +++ b/spec/build/bsps/arm/imxrt/optlinkcmds.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: linkcmds.flexspi -default-by-variant: [] +default: +- enabled-by: true + value: linkcmds.flexspi description: | The default linker command file. Must be linkcmds.sdram, linkcmds.ocram or linkcmds.flexspi. diff --git a/spec/build/bsps/arm/imxrt/optmemdtcmsz.yml b/spec/build/bsps/arm/imxrt/optmemdtcmsz.yml index 646460c48b..ac87854181 100644 --- a/spec/build/bsps/arm/imxrt/optmemdtcmsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemdtcmsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00020000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00020000 description: | Size of the DTCM in bytes. Note that these sizes depend on fuses or software settings done by a bootloader (together with ITCM and OCRAM). diff --git a/spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml b/spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml index e4e2616a1e..fa386d42c7 100644 --- a/spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml +++ b/spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00100000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00100000 description: | Size of the nocache area at the end of the external RAM in bytes. Must not be bigger than IMXRT_MEMORY_EXTRAM_SIZE. diff --git a/spec/build/bsps/arm/imxrt/optmemextramorigin.yml b/spec/build/bsps/arm/imxrt/optmemextramorigin.yml index c0becc935a..b9660aca5e 100644 --- a/spec/build/bsps/arm/imxrt/optmemextramorigin.yml +++ b/spec/build/bsps/arm/imxrt/optmemextramorigin.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x80000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x80000000 description: | Base address of the external RAM. An external ram can be for example be a SDRAM connected to SEMC or a HyperRAM connected to FlexSPI. diff --git a/spec/build/bsps/arm/imxrt/optmemextramsz.yml b/spec/build/bsps/arm/imxrt/optmemextramsz.yml index b547ec44fe..3e5cdac34c 100644 --- a/spec/build/bsps/arm/imxrt/optmemextramsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemextramsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x02000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x02000000 description: | Size of the external RAM in bytes. An external ram can be for example be a SDRAM connected to SEMC or a HyperRAM connected to FlexSPI. The size has to diff --git a/spec/build/bsps/arm/imxrt/optmemflashcfgsz.yml b/spec/build/bsps/arm/imxrt/optmemflashcfgsz.yml index 4c1e4b3276..e53649ea3d 100644 --- a/spec/build/bsps/arm/imxrt/optmemflashcfgsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemflashcfgsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00001000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00001000 description: | Size of the flash configuration area at the start of the FlexSPI / SEMC flash in bytes. Either 4 KByte for FlexSPI NOR / SEMC NOR or 1 Kbyte for most other. diff --git a/spec/build/bsps/arm/imxrt/optmemflashivtsz.yml b/spec/build/bsps/arm/imxrt/optmemflashivtsz.yml index 0af2fc2981..96f3e95875 100644 --- a/spec/build/bsps/arm/imxrt/optmemflashivtsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemflashivtsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00001000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00001000 description: | Size of the image vector table, boot data structure, device configuration data and similar program image header information. Take a look at the i.MX RT1050 diff --git a/spec/build/bsps/arm/imxrt/optmemflashorigin.yml b/spec/build/bsps/arm/imxrt/optmemflashorigin.yml index 4805d319cf..54618c928f 100644 --- a/spec/build/bsps/arm/imxrt/optmemflashorigin.yml +++ b/spec/build/bsps/arm/imxrt/optmemflashorigin.yml @@ -6,8 +6,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x60000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x60000000 description: | Origin of the external flash memory. That can be for example a flash connected to FlexSPI or to SEMC. The default value is for a HyperFlash diff --git a/spec/build/bsps/arm/imxrt/optmemflashsz.yml b/spec/build/bsps/arm/imxrt/optmemflashsz.yml index 6683977ef2..562293eda0 100644 --- a/spec/build/bsps/arm/imxrt/optmemflashsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemflashsz.yml @@ -6,8 +6,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x04000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x04000000 description: | Size of the external flash area in bytes. Has to be big enough to hold the i.MXRT initial vector table (IVT) and configuration information. The sizes of diff --git a/spec/build/bsps/arm/imxrt/optmemitcmsz.yml b/spec/build/bsps/arm/imxrt/optmemitcmsz.yml index 83d3c75f4b..611fbf72f3 100644 --- a/spec/build/bsps/arm/imxrt/optmemitcmsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemitcmsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x0001ff00 -default-by-variant: [] +default: +- enabled-by: true + value: 0x0001ff00 description: | Size of the ITCM in bytes. Note that these sizes depend on fuses or software settings done by a bootloader (together with DTCM and OCRAM). The ITCM size diff --git a/spec/build/bsps/arm/imxrt/optmemnullsz.yml b/spec/build/bsps/arm/imxrt/optmemnullsz.yml index 029a996203..061d94a34b 100644 --- a/spec/build/bsps/arm/imxrt/optmemnullsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemnullsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000100 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00000100 description: | Size of the NULL pointer protection area in bytes. This memory area reduces the size of the ITCM available to the application. If you adapt this, you diff --git a/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml b/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml index 6b738a2a08..d87e412c52 100644 --- a/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml +++ b/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00000000 description: | Size of the nocache area at the end of the OCRAM in bytes. Must not be bigger than IMXRT_MEMORY_OCRAM_SIZE. diff --git a/spec/build/bsps/arm/imxrt/optmemocramsz.yml b/spec/build/bsps/arm/imxrt/optmemocramsz.yml index b37b84eb77..0ab26700db 100644 --- a/spec/build/bsps/arm/imxrt/optmemocramsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemocramsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00040000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00040000 description: | Size of the OCRAM in bytes. Note that these sizes depend on fuses or software settings done by a bootloader (together with ITCM and DTCM). The size has to diff --git a/spec/build/bsps/arm/lm3s69xx/abi.yml b/spec/build/bsps/arm/lm3s69xx/abi.yml index 77d5db8cf7..37f0e6056c 100644 --- a/spec/build/bsps/arm/lm3s69xx/abi.yml +++ b/spec/build/bsps/arm/lm3s69xx/abi.yml @@ -7,9 +7,10 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mthumb -- -mcpu=cortex-m3 -default-by-variant: [] +- enabled-by: true + value: + - -mthumb + - -mcpu=cortex-m3 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optenuart0.yml b/spec/build/bsps/arm/lm3s69xx/optenuart0.yml index fa3254dbf5..c376176aef 100644 --- a/spec/build/bsps/arm/lm3s69xx/optenuart0.yml +++ b/spec/build/bsps/arm/lm3s69xx/optenuart0.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | enable UART 0 enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optenuart1.yml b/spec/build/bsps/arm/lm3s69xx/optenuart1.yml index 42c6133cf5..e992cbcc87 100644 --- a/spec/build/bsps/arm/lm3s69xx/optenuart1.yml +++ b/spec/build/bsps/arm/lm3s69xx/optenuart1.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable UART 1 enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optenuart2.yml b/spec/build/bsps/arm/lm3s69xx/optenuart2.yml index 0de60cb7a7..7e312b4df7 100644 --- a/spec/build/bsps/arm/lm3s69xx/optenuart2.yml +++ b/spec/build/bsps/arm/lm3s69xx/optenuart2.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable UART 2 enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml b/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml index 77e1c9219e..a1a9003a86 100644 --- a/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml +++ b/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml @@ -5,14 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lm3s3749 -- value: true - variants: - arm/lm4f120 + value: true +- enabled-by: true + value: false description: | use AHB apperture to access GPIO registers enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optgpionum.yml b/spec/build/bsps/arm/lm3s69xx/optgpionum.yml index bbccdd5a58..da509e1163 100644 --- a/spec/build/bsps/arm/lm3s69xx/optgpionum.yml +++ b/spec/build/bsps/arm/lm3s69xx/optgpionum.yml @@ -5,18 +5,17 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 8 - variants: - - arm/lm3s3749 -- value: 7 - variants: +default: +- enabled-by: arm/lm3s3749 + value: 8 +- enabled-by: - arm/lm3s6965 - arm/lm3s6965_qemu -- value: 6 - variants: - - arm/lm4f120 + value: 7 +- enabled-by: arm/lm4f120 + value: 6 +- enabled-by: true + value: 0 description: | number of GPIO blocks supported by MCU enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml b/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml index 9ca33cbe94..fd0a6ccba2 100644 --- a/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml +++ b/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lm3s3749 +default: +- enabled-by: arm/lm3s3749 + value: true +- enabled-by: true + value: false description: | board has LM3S3749 MCU enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml b/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml index 6c11733729..109997f5ee 100644 --- a/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml +++ b/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lm3s6965 - arm/lm3s6965_qemu + value: true +- enabled-by: true + value: false description: | board has LM3S6965 MCU enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml b/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml index af60aee4d6..42ecbf25db 100644 --- a/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml +++ b/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lm4f120 +default: +- enabled-by: arm/lm4f120 + value: true +- enabled-by: true + value: false description: | board has LM4F120xxx MCU enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optssiblks.yml b/spec/build/bsps/arm/lm3s69xx/optssiblks.yml index 3234606781..198e978a77 100644 --- a/spec/build/bsps/arm/lm3s69xx/optssiblks.yml +++ b/spec/build/bsps/arm/lm3s69xx/optssiblks.yml @@ -5,18 +5,17 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 2 - variants: - - arm/lm3s3749 -- value: 1 - variants: +default: +- enabled-by: arm/lm3s3749 + value: 2 +- enabled-by: - arm/lm3s6965 - arm/lm3s6965_qemu -- value: 4 - variants: - - arm/lm4f120 + value: 1 +- enabled-by: arm/lm4f120 + value: 4 +- enabled-by: true + value: 0 description: | number of SSI blocks supported by MCU enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optssiclk.yml b/spec/build/bsps/arm/lm3s69xx/optssiclk.yml index b278880160..8c2b76e3bd 100644 --- a/spec/build/bsps/arm/lm3s69xx/optssiclk.yml +++ b/spec/build/bsps/arm/lm3s69xx/optssiclk.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1000000 -default-by-variant: [] +default: +- enabled-by: true + value: 1000000 description: | SSI clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optsysclk.yml b/spec/build/bsps/arm/lm3s69xx/optsysclk.yml index 14fcbcd84d..9bde41291f 100644 --- a/spec/build/bsps/arm/lm3s69xx/optsysclk.yml +++ b/spec/build/bsps/arm/lm3s69xx/optsysclk.yml @@ -5,16 +5,16 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 50000000 - variants: +default: +- enabled-by: - arm/lm3s3749 - arm/lm3s6965 - arm/lm3s6965_qemu -- value: 80000000 - variants: - - arm/lm4f120 + value: 50000000 +- enabled-by: arm/lm4f120 + value: 80000000 +- enabled-by: true + value: 0 description: | system clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml b/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml index 9b1deff47c..fa80b62bb7 100644 --- a/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml +++ b/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | baud for UARTs enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optudma.yml b/spec/build/bsps/arm/lm3s69xx/optudma.yml index 9445b273ec..7c433389c9 100644 --- a/spec/build/bsps/arm/lm3s69xx/optudma.yml +++ b/spec/build/bsps/arm/lm3s69xx/optudma.yml @@ -5,14 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lm3s3749 -- value: true - variants: - arm/lm4f120 + value: true +- enabled-by: true + value: false description: | defined if MCU supports UDMA enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml b/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml index 3854c6e3e9..a2d232a533 100644 --- a/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml +++ b/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml @@ -5,18 +5,17 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: -- value: 0x0000000e - variants: +default: +- enabled-by: - arm/lm3s6965 - arm/lm3s6965_qemu -- value: 0x00000010 - variants: - - arm/lm3s3749 -- value: 0x00000015 - variants: - - arm/lm4f120 + value: 0x0000000e +- enabled-by: arm/lm3s3749 + value: 0x00000010 +- enabled-by: arm/lm4f120 + value: 0x00000015 +- enabled-by: true + value: 0x00000000 description: | crystal configuration for RCC register enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml b/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml index e449e68ea0..82338c2298 100644 --- a/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml +++ b/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml @@ -28,8 +28,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml b/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml index c7405f76dd..675af7406f 100644 --- a/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml +++ b/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml @@ -13,8 +13,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml b/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml index 0ea7bf2b7c..49dda63ed0 100644 --- a/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml +++ b/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml @@ -28,8 +28,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc176x/abi.yml b/spec/build/bsps/arm/lpc176x/abi.yml index 77d5db8cf7..37f0e6056c 100644 --- a/spec/build/bsps/arm/lpc176x/abi.yml +++ b/spec/build/bsps/arm/lpc176x/abi.yml @@ -7,9 +7,10 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mthumb -- -mcpu=cortex-m3 -default-by-variant: [] +- enabled-by: true + value: + - -mthumb + - -mcpu=cortex-m3 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optcclk.yml b/spec/build/bsps/arm/lpc176x/optcclk.yml index 5df9f0a5e2..d8c0288299 100644 --- a/spec/build/bsps/arm/lpc176x/optcclk.yml +++ b/spec/build/bsps/arm/lpc176x/optcclk.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 96000000 -default-by-variant: [] +default: +- enabled-by: true + value: 96000000 description: | CPU clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optconcfg.yml b/spec/build/bsps/arm/lpc176x/optconcfg.yml index 98ff2a9325..5c9093e969 100644 --- a/spec/build/bsps/arm/lpc176x/optconcfg.yml +++ b/spec/build/bsps/arm/lpc176x/optconcfg.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | configuration for console (UART 0) enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optdmachn.yml b/spec/build/bsps/arm/lpc176x/optdmachn.yml index a7c288b3c7..817b0f7767 100644 --- a/spec/build/bsps/arm/lpc176x/optdmachn.yml +++ b/spec/build/bsps/arm/lpc176x/optdmachn.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 2 -default-by-variant: [] +default: +- enabled-by: true + value: 2 description: | DMA channel count enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optlpc1768.yml b/spec/build/bsps/arm/lpc176x/optlpc1768.yml index 9d9673b002..a14d3c1434 100644 --- a/spec/build/bsps/arm/lpc176x/optlpc1768.yml +++ b/spec/build/bsps/arm/lpc176x/optlpc1768.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | target used for identify LPC1768 board enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optmintskstksz.yml b/spec/build/bsps/arm/lpc176x/optmintskstksz.yml index 57e77ae551..5c4f2ce0b7 100644 --- a/spec/build/bsps/arm/lpc176x/optmintskstksz.yml +++ b/spec/build/bsps/arm/lpc176x/optmintskstksz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1024 -default-by-variant: [] +default: +- enabled-by: true + value: 1024 description: | Suggested minimum task stack size in bytes enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optoscmain.yml b/spec/build/bsps/arm/lpc176x/optoscmain.yml index eccce9a3ea..8bbe329836 100644 --- a/spec/build/bsps/arm/lpc176x/optoscmain.yml +++ b/spec/build/bsps/arm/lpc176x/optoscmain.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 12000000 -default-by-variant: [] +default: +- enabled-by: true + value: 12000000 description: | main oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optoscrtc.yml b/spec/build/bsps/arm/lpc176x/optoscrtc.yml index a5eff014e9..2c0895f3b9 100644 --- a/spec/build/bsps/arm/lpc176x/optoscrtc.yml +++ b/spec/build/bsps/arm/lpc176x/optoscrtc.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 32768 -default-by-variant: [] +default: +- enabled-by: true + value: 32768 description: | RTC oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optpclkdiv.yml b/spec/build/bsps/arm/lpc176x/optpclkdiv.yml index 4027f8ad17..95c157ee3a 100644 --- a/spec/build/bsps/arm/lpc176x/optpclkdiv.yml +++ b/spec/build/bsps/arm/lpc176x/optpclkdiv.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: [] +default: +- enabled-by: true + value: 1 description: | clock divider for default PCLK (PCLK = CCLK / PCLKDIV) enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optstopgpdma.yml b/spec/build/bsps/arm/lpc176x/optstopgpdma.yml index d407af65e7..cd599b292e 100644 --- a/spec/build/bsps/arm/lpc176x/optstopgpdma.yml +++ b/spec/build/bsps/arm/lpc176x/optstopgpdma.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | stop general purpose DMA at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optstopusb.yml b/spec/build/bsps/arm/lpc176x/optstopusb.yml index 708a5bb41c..7a0f8421ac 100644 --- a/spec/build/bsps/arm/lpc176x/optstopusb.yml +++ b/spec/build/bsps/arm/lpc176x/optstopusb.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | stop USB controller at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optuart1cfg.yml b/spec/build/bsps/arm/lpc176x/optuart1cfg.yml index ec9d9843d5..53553c92b6 100644 --- a/spec/build/bsps/arm/lpc176x/optuart1cfg.yml +++ b/spec/build/bsps/arm/lpc176x/optuart1cfg.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | Use Uart 1 enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optuartbaud.yml b/spec/build/bsps/arm/lpc176x/optuartbaud.yml index c5e094beef..2fa27c270f 100644 --- a/spec/build/bsps/arm/lpc176x/optuartbaud.yml +++ b/spec/build/bsps/arm/lpc176x/optuartbaud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 9600 -default-by-variant: [] +default: +- enabled-by: true + value: 9600 description: | baud for UARTs enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml b/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml index 0ce00994c3..43372d8106 100644 --- a/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml +++ b/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml @@ -25,8 +25,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml index f1ba9bfba7..2aaf7a87dc 100644 --- a/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml +++ b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml @@ -27,8 +27,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml index 8a900bf5ab..bca644de68 100644 --- a/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml +++ b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml @@ -126,8 +126,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/abi.yml b/spec/build/bsps/arm/lpc24xx/abi.yml index e032f2d9a6..c63b60e295 100644 --- a/spec/build/bsps/arm/lpc24xx/abi.yml +++ b/spec/build/bsps/arm/lpc24xx/abi.yml @@ -7,25 +7,26 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=arm7tdmi-s -- -mthumb -default-by-variant: -- value: - - -mthumb - - -mcpu=cortex-m3 - variants: +- enabled-by: - arm/lpc17xx_ea_ram - arm/lpc17xx_ea_rom_int - arm/lpc17xx_plx800_ram - arm/lpc17xx_plx800_rom_int -- value: + value: + - -mthumb + - -mcpu=cortex-m3 +- enabled-by: + - arm/lpc40xx_ea_ram + - arm/lpc40xx_ea_rom_int + value: - -mcpu=cortex-m4 - -mthumb - -mfloat-abi=hard - -mfpu=auto - variants: - - arm/lpc40xx_ea_ram - - arm/lpc40xx_ea_rom_int +- enabled-by: true + value: + - -mcpu=arm7tdmi-s + - -mthumb description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optcclk.yml b/spec/build/bsps/arm/lpc24xx/optcclk.yml index e9700ce101..1a44ff0b35 100644 --- a/spec/build/bsps/arm/lpc24xx/optcclk.yml +++ b/spec/build/bsps/arm/lpc24xx/optcclk.yml @@ -5,24 +5,23 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 72000000 -default-by-variant: -- value: 96000000 - variants: +default: +- enabled-by: - arm/lpc17xx_ea_ram - arm/lpc17xx_ea_rom_int -- value: 96000000 - variants: - arm/lpc40xx_ea_ram - arm/lpc40xx_ea_rom_int -- value: 58982400 - variants: + value: 96000000 +- enabled-by: - arm/lpc2362 - arm/lpc23xx_tli800 -- value: 51612800 - variants: + value: 58982400 +- enabled-by: - arm/lpc24xx_plx800_ram - arm/lpc24xx_plx800_rom_int + value: 51612800 +- enabled-by: true + value: 72000000 description: | CPU clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optconcfg.yml b/spec/build/bsps/arm/lpc24xx/optconcfg.yml index 4e09164cdf..8a903b4380 100644 --- a/spec/build/bsps/arm/lpc24xx/optconcfg.yml +++ b/spec/build/bsps/arm/lpc24xx/optconcfg.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | configuration for console (UART 0) enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optdmachn.yml b/spec/build/bsps/arm/lpc24xx/optdmachn.yml index f1f57dca60..14638cbd36 100644 --- a/spec/build/bsps/arm/lpc24xx/optdmachn.yml +++ b/spec/build/bsps/arm/lpc24xx/optdmachn.yml @@ -5,10 +5,8 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 2 -default-by-variant: -- value: 8 - variants: +default: +- enabled-by: - arm/lpc1768_mbed - arm/lpc1768_mbed_ahb_ram - arm/lpc1768_mbed_ahb_ram_eth @@ -16,10 +14,11 @@ default-by-variant: - arm/lpc17xx_ea_rom_int - arm/lpc17xx_plx800_ram - arm/lpc17xx_plx800_rom_int -- value: 8 - variants: - arm/lpc40xx_ea_ram - arm/lpc40xx_ea_rom_int + value: 8 +- enabled-by: true + value: 2 description: | DMA channel count enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml b/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml index 36ff19f07b..7afec15896 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml @@ -5,16 +5,15 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: -- value: 2 - variants: +default: +- enabled-by: - arm/lpc17xx_ea_ram - arm/lpc17xx_ea_rom_int -- value: 2 - variants: - arm/lpc40xx_ea_ram - arm/lpc40xx_ea_rom_int + value: 2 +- enabled-by: true + value: 1 description: | clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV) enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml b/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml index c6162af143..3b0b3960f2 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml @@ -5,14 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lpc17xx_ea_rom_int -- value: true - variants: - arm/lpc40xx_ea_rom_int + value: true +- enabled-by: true + value: false description: | enable ISSI IS42S32800B configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml b/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml index 71d2b38f27..b4ebc7a3f6 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lpc17xx_plx800_rom_int - arm/lpc24xx_plx800_rom_int + value: true +- enabled-by: true + value: false description: | enable ISSI IS42S32800D7 configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml b/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml index 02f233165c..2f56d4fcc6 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lpc24xx_ncs_rom_ext - arm/lpc24xx_ncs_rom_int + value: true +- enabled-by: true + value: false description: | enable M29W160E configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml b/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml index 66aa8c5cad..8abab7cd1d 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lpc17xx_plx800_rom_int - arm/lpc24xx_plx800_rom_int + value: true +- enabled-by: true + value: false description: | enable M29W320E70 configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml b/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml index 02b92e0710..aefaa8de24 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lpc24xx_ncs_rom_ext - arm/lpc24xx_ncs_rom_int + value: true +- enabled-by: true + value: false description: | enable Micron MT48LC4M16A2 configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml b/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml index 851c28a275..fba7e67905 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable SST39VF3201 configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemctest.yml b/spec/build/bsps/arm/lpc24xx/optemctest.yml index 4153bd2664..96451dc88f 100644 --- a/spec/build/bsps/arm/lpc24xx/optemctest.yml +++ b/spec/build/bsps/arm/lpc24xx/optemctest.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable tests for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml b/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml index 2be3f76372..8f6b79f752 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable Winbond W9825G2JB75I configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optethdownpin.yml b/spec/build/bsps/arm/lpc24xx/optethdownpin.yml index c3889b0eea..56a7c932d8 100644 --- a/spec/build/bsps/arm/lpc24xx/optethdownpin.yml +++ b/spec/build/bsps/arm/lpc24xx/optethdownpin.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | optional Ethernet power-down pin, output is set to high to enable power enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optethrmii.yml b/spec/build/bsps/arm/lpc24xx/optethrmii.yml index 6dc25d0d86..4d95bc10aa 100644 --- a/spec/build/bsps/arm/lpc24xx/optethrmii.yml +++ b/spec/build/bsps/arm/lpc24xx/optethrmii.yml @@ -5,14 +5,15 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lpc17xx_ea_ram - arm/lpc17xx_ea_rom_int - arm/lpc40xx_ea_ram - arm/lpc40xx_ea_rom_int + value: true +- enabled-by: true + value: false description: | enable RMII for Ethernet enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optheapext.yml b/spec/build/bsps/arm/lpc24xx/optheapext.yml index 90acde9447..03254e3003 100644 --- a/spec/build/bsps/arm/lpc24xx/optheapext.yml +++ b/spec/build/bsps/arm/lpc24xx/optheapext.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lpc2362 - arm/lpc23xx_tli800 + value: true +- enabled-by: true + value: false description: | enable heap extend by Ethernet and USB regions enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optoscmain.yml b/spec/build/bsps/arm/lpc24xx/optoscmain.yml index 2a483213de..67faf6455c 100644 --- a/spec/build/bsps/arm/lpc24xx/optoscmain.yml +++ b/spec/build/bsps/arm/lpc24xx/optoscmain.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 12000000 -default-by-variant: -- value: 3686400 - variants: +default: +- enabled-by: - arm/lpc2362 - arm/lpc23xx_tli800 + value: 3686400 +- enabled-by: true + value: 12000000 description: | main oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optoscrtc.yml b/spec/build/bsps/arm/lpc24xx/optoscrtc.yml index 0b66f8a553..dc67d0e776 100644 --- a/spec/build/bsps/arm/lpc24xx/optoscrtc.yml +++ b/spec/build/bsps/arm/lpc24xx/optoscrtc.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 32768 -default-by-variant: [] +default: +- enabled-by: true + value: 32768 description: | RTC oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optotgi2c.yml b/spec/build/bsps/arm/lpc24xx/optotgi2c.yml index 3e7baeadbc..a80810e3ae 100644 --- a/spec/build/bsps/arm/lpc24xx/optotgi2c.yml +++ b/spec/build/bsps/arm/lpc24xx/optotgi2c.yml @@ -5,16 +5,15 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: -- value: 0x0000005e - variants: +default: +- enabled-by: - arm/lpc17xx_ea_ram - arm/lpc17xx_ea_rom_int -- value: 0x0000005e - variants: - arm/lpc40xx_ea_ram - arm/lpc40xx_ea_rom_int + value: 0x0000005e +- enabled-by: true + value: 0x00000000 description: | USB OTG transceiver I2C address used by USB stack enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml b/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml index bc4984bc3d..ac6664f415 100644 --- a/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml +++ b/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml @@ -5,16 +5,15 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: -- value: 2 - variants: +default: +- enabled-by: - arm/lpc17xx_ea_ram - arm/lpc17xx_ea_rom_int -- value: 2 - variants: - arm/lpc40xx_ea_ram - arm/lpc40xx_ea_rom_int + value: 2 +- enabled-by: true + value: 1 description: | clock divider for default PCLK (PCLK = CCLK / PCLKDIV) enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optresetvec.yml b/spec/build/bsps/arm/lpc24xx/optresetvec.yml index 96e57b3adb..a96613d15b 100644 --- a/spec/build/bsps/arm/lpc24xx/optresetvec.yml +++ b/spec/build/bsps/arm/lpc24xx/optresetvec.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: -- value: 0x80000040 - variants: - - arm/lpc24xx_ncs_rom_ext +default: +- enabled-by: arm/lpc24xx_ncs_rom_ext + value: 0x80000040 +- enabled-by: true + value: 0x00000000 description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optstopeth.yml b/spec/build/bsps/arm/lpc24xx/optstopeth.yml index 2baf76da8c..cb0ac373eb 100644 --- a/spec/build/bsps/arm/lpc24xx/optstopeth.yml +++ b/spec/build/bsps/arm/lpc24xx/optstopeth.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/lpc2362 - arm/lpc23xx_tli800 + value: false +- enabled-by: true + value: true description: | stop Ethernet controller at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml b/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml index 5705cc03ef..b7590138a9 100644 --- a/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml +++ b/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | stop general purpose DMA at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optstopusb.yml b/spec/build/bsps/arm/lpc24xx/optstopusb.yml index b895ff7df3..a6d986948c 100644 --- a/spec/build/bsps/arm/lpc24xx/optstopusb.yml +++ b/spec/build/bsps/arm/lpc24xx/optstopusb.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/lpc2362 - arm/lpc23xx_tli800 + value: false +- enabled-by: true + value: true description: | stop USB controller at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml b/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml index 055f8bbbee..91d89c9c37 100644 --- a/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml +++ b/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml @@ -5,14 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: false - variants: - - arm/lpc17xx_plx800_ram - - arm/lpc17xx_plx800_rom_int - - arm/lpc24xx_plx800_ram - - arm/lpc24xx_plx800_rom_int +default: +- enabled-by: true + value: false description: | configuration for UART 1 enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml b/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml index 0f9bbad26b..abb5d0bedc 100644 --- a/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml +++ b/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml @@ -5,23 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: false - variants: - - arm/lpc2362 - - arm/lpc23xx_tli800 -- value: false - variants: - - arm/lpc24xx_ncs_ram - - arm/lpc24xx_ncs_rom_ext - - arm/lpc24xx_ncs_rom_int -- value: false - variants: - - arm/lpc17xx_plx800_ram - - arm/lpc17xx_plx800_rom_int - - arm/lpc24xx_plx800_ram - - arm/lpc24xx_plx800_rom_int +default: +- enabled-by: true + value: false description: | configuration for UART 2 enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml b/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml index 991be593f3..58363efbec 100644 --- a/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml +++ b/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml @@ -5,17 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: false - variants: - - arm/lpc2362 - - arm/lpc23xx_tli800 -- value: false - variants: - - arm/lpc24xx_ncs_ram - - arm/lpc24xx_ncs_rom_ext - - arm/lpc24xx_ncs_rom_int +default: +- enabled-by: true + value: false description: | configuration for UART 3 enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optuartbaud.yml b/spec/build/bsps/arm/lpc24xx/optuartbaud.yml index e772d71381..bec352e265 100644 --- a/spec/build/bsps/arm/lpc24xx/optuartbaud.yml +++ b/spec/build/bsps/arm/lpc24xx/optuartbaud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | baud for UARTs enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml b/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml index 3ded8b9878..140cf80a25 100644 --- a/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml +++ b/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml @@ -8,8 +8,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml b/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml index 3ded8b9878..140cf80a25 100644 --- a/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml +++ b/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml @@ -8,8 +8,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc23xx.yml b/spec/build/bsps/arm/lpc24xx/tstlpc23xx.yml index e43ca25d3d..4d3b175bd6 100644 --- a/spec/build/bsps/arm/lpc24xx/tstlpc23xx.yml +++ b/spec/build/bsps/arm/lpc24xx/tstlpc23xx.yml @@ -58,8 +58,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml b/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml index 3ded8b9878..140cf80a25 100644 --- a/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml +++ b/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml @@ -8,8 +8,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/tstncsromint.yml b/spec/build/bsps/arm/lpc24xx/tstncsromint.yml index 3ded8b9878..140cf80a25 100644 --- a/spec/build/bsps/arm/lpc24xx/tstncsromint.yml +++ b/spec/build/bsps/arm/lpc24xx/tstncsromint.yml @@ -8,8 +8,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml b/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml index 3ded8b9878..140cf80a25 100644 --- a/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml +++ b/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml @@ -8,8 +8,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc32xx/abi.yml b/spec/build/bsps/arm/lpc32xx/abi.yml index ae245b4eb0..3fa82f50fe 100644 --- a/spec/build/bsps/arm/lpc32xx/abi.yml +++ b/spec/build/bsps/arm/lpc32xx/abi.yml @@ -7,9 +7,10 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=arm926ej-s -- -mthumb -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=arm926ej-s + - -mthumb description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optdismmu.yml b/spec/build/bsps/arm/lpc32xx/optdismmu.yml index b431f04841..f0acf5a4b3 100644 --- a/spec/build/bsps/arm/lpc32xx/optdismmu.yml +++ b/spec/build/bsps/arm/lpc32xx/optdismmu.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | disable MMU enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optdisroprot.yml b/spec/build/bsps/arm/lpc32xx/optdisroprot.yml index 5ce23607b8..4a2b675db7 100644 --- a/spec/build/bsps/arm/lpc32xx/optdisroprot.yml +++ b/spec/build/bsps/arm/lpc32xx/optdisroprot.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | disable MMU protection of read-only sections enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml b/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml index 55765c3e8e..f378ad048a 100644 --- a/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml +++ b/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | disable cache for read-write data sections enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optdmachn.yml b/spec/build/bsps/arm/lpc32xx/optdmachn.yml index 4c826a5f01..19f8acb182 100644 --- a/spec/build/bsps/arm/lpc32xx/optdmachn.yml +++ b/spec/build/bsps/arm/lpc32xx/optdmachn.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 8 -default-by-variant: [] +default: +- enabled-by: true + value: 8 description: | DMA channel count enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml b/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml index d36a5c0398..c06a6b2fca 100644 --- a/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml +++ b/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | bsp_reset() will use the watchdog to reset the chip enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optethrmii.yml b/spec/build/bsps/arm/lpc32xx/optethrmii.yml index ccb4c95abc..ed51b9491e 100644 --- a/spec/build/bsps/arm/lpc32xx/optethrmii.yml +++ b/spec/build/bsps/arm/lpc32xx/optethrmii.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | enable RMII for Ethernet enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optoscmain.yml b/spec/build/bsps/arm/lpc32xx/optoscmain.yml index aadb9b6799..6f93400e98 100644 --- a/spec/build/bsps/arm/lpc32xx/optoscmain.yml +++ b/spec/build/bsps/arm/lpc32xx/optoscmain.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 13000000 -default-by-variant: [] +default: +- enabled-by: true + value: 13000000 description: | main oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optoscrtc.yml b/spec/build/bsps/arm/lpc32xx/optoscrtc.yml index 09aab2d9c6..443f19e963 100644 --- a/spec/build/bsps/arm/lpc32xx/optoscrtc.yml +++ b/spec/build/bsps/arm/lpc32xx/optoscrtc.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 32768 -default-by-variant: [] +default: +- enabled-by: true + value: 32768 description: | RTC oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optotgi2c.yml b/spec/build/bsps/arm/lpc32xx/optotgi2c.yml index 2f7d54425c..a2705d5219 100644 --- a/spec/build/bsps/arm/lpc32xx/optotgi2c.yml +++ b/spec/build/bsps/arm/lpc32xx/optotgi2c.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: -- value: 0x00000058 - variants: +default: +- enabled-by: - arm/lpc32xx_mzx - arm/lpc32xx_mzx_stage_1 - arm/lpc32xx_mzx_stage_2 + value: 0x00000058 +- enabled-by: true + value: 0x00000000 description: | USB OTG transceiver I2C address used by USB stack enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optotgvbus.yml b/spec/build/bsps/arm/lpc32xx/optotgvbus.yml index e5d2563a7b..038e04472e 100644 --- a/spec/build/bsps/arm/lpc32xx/optotgvbus.yml +++ b/spec/build/bsps/arm/lpc32xx/optotgvbus.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: USB_OTG_VBUS_POWER_WITH_CHARGE_PUMP - variants: +default: +- enabled-by: - arm/lpc32xx_mzx - arm/lpc32xx_mzx_stage_1 - arm/lpc32xx_mzx_stage_2 + value: USB_OTG_VBUS_POWER_WITH_CHARGE_PUMP +- enabled-by: true + value: false description: | USB OTG transceiver VBUS policy enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optperiphclk.yml b/spec/build/bsps/arm/lpc32xx/optperiphclk.yml index 70be8d51bf..dfd3e27953 100644 --- a/spec/build/bsps/arm/lpc32xx/optperiphclk.yml +++ b/spec/build/bsps/arm/lpc32xx/optperiphclk.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 13000000 -default-by-variant: [] +default: +- enabled-by: true + value: 13000000 description: | peripheral clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optresetvec.yml b/spec/build/bsps/arm/lpc32xx/optresetvec.yml index efd1ea2b2a..bac5c79627 100644 --- a/spec/build/bsps/arm/lpc32xx/optresetvec.yml +++ b/spec/build/bsps/arm/lpc32xx/optresetvec.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optscratchsz.yml b/spec/build/bsps/arm/lpc32xx/optscratchsz.yml index ad8473d57d..5299cfa992 100644 --- a/spec/build/bsps/arm/lpc32xx/optscratchsz.yml +++ b/spec/build/bsps/arm/lpc32xx/optscratchsz.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 4096 - variants: +default: +- enabled-by: - arm/lpc32xx_mzx - arm/lpc32xx_mzx_stage_1 - arm/lpc32xx_mzx_stage_2 + value: 4096 +- enabled-by: true + value: 0 description: | size of scratch area enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optstopeth.yml b/spec/build/bsps/arm/lpc32xx/optstopeth.yml index 2d430a1862..036b3c14a3 100644 --- a/spec/build/bsps/arm/lpc32xx/optstopeth.yml +++ b/spec/build/bsps/arm/lpc32xx/optstopeth.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | stop Ethernet controller at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml b/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml index 5096cc48a9..d5894ce274 100644 --- a/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml +++ b/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | stop general purpose DMA at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optstopusb.yml b/spec/build/bsps/arm/lpc32xx/optstopusb.yml index e2bbc72f5f..8b6991a01d 100644 --- a/spec/build/bsps/arm/lpc32xx/optstopusb.yml +++ b/spec/build/bsps/arm/lpc32xx/optstopusb.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | stop USB controller at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optu3clk.yml b/spec/build/bsps/arm/lpc32xx/optu3clk.yml index ee0f7f3157..998841d033 100644 --- a/spec/build/bsps/arm/lpc32xx/optu3clk.yml +++ b/spec/build/bsps/arm/lpc32xx/optu3clk.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00001386 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00001386 description: | clock configuration for UART 3 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optu4clk.yml b/spec/build/bsps/arm/lpc32xx/optu4clk.yml index 4d4f014f7f..d0dafb8f78 100644 --- a/spec/build/bsps/arm/lpc32xx/optu4clk.yml +++ b/spec/build/bsps/arm/lpc32xx/optu4clk.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00001386 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00001386 description: | clock configuration for UART 4 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optu5clk.yml b/spec/build/bsps/arm/lpc32xx/optu5clk.yml index 5226085029..47065d8eeb 100644 --- a/spec/build/bsps/arm/lpc32xx/optu5clk.yml +++ b/spec/build/bsps/arm/lpc32xx/optu5clk.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00001386 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00001386 description: | clock configuration for UART 5 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optu6clk.yml b/spec/build/bsps/arm/lpc32xx/optu6clk.yml index 03437e6fe0..9a6a89da97 100644 --- a/spec/build/bsps/arm/lpc32xx/optu6clk.yml +++ b/spec/build/bsps/arm/lpc32xx/optu6clk.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00001386 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00001386 description: | clock configuration for UART 6 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart1baud.yml b/spec/build/bsps/arm/lpc32xx/optuart1baud.yml index d0b7a546db..b1267567f1 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart1baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart1baud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | baud for UART 1 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart2baud.yml b/spec/build/bsps/arm/lpc32xx/optuart2baud.yml index 5bdf8be11b..cd848156e8 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart2baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart2baud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | baud for UART 2 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart3baud.yml b/spec/build/bsps/arm/lpc32xx/optuart3baud.yml index 95e63cf56e..48513c9370 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart3baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart3baud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | baud for UART 3 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart4baud.yml b/spec/build/bsps/arm/lpc32xx/optuart4baud.yml index d210bd3c6b..66ac9b857a 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart4baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart4baud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | baud for UART 4 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart5baud.yml b/spec/build/bsps/arm/lpc32xx/optuart5baud.yml index 0021d5c9ed..c09f50b481 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart5baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart5baud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | baud for UART 5 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart6baud.yml b/spec/build/bsps/arm/lpc32xx/optuart6baud.yml index dc856fa33e..2d512f00a1 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart6baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart6baud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | baud for UART 6 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart7baud.yml b/spec/build/bsps/arm/lpc32xx/optuart7baud.yml index 867d534e57..90b72e4570 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart7baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart7baud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | baud for UART 7 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml b/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml index 0dbde105cb..2821aeb5c3 100644 --- a/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml +++ b/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml @@ -16,8 +16,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/opta9periphclk.yml b/spec/build/bsps/arm/opta9periphclk.yml index 8d8c240606..2768086225 100644 --- a/spec/build/bsps/arm/opta9periphclk.yml +++ b/spec/build/bsps/arm/opta9periphclk.yml @@ -7,14 +7,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 100000000 -default-by-variant: -- value: 333333333 - variants: - - arm/xilinx_zynq_zc702 -- value: 666666667 - variants: - - arm/xilinx_zynq_zedboard +default: +- enabled-by: arm/xilinx_zynq_zc702 + value: 333333333 +- enabled-by: arm/xilinx_zynq_zedboard + value: 666666667 +- enabled-by: true + value: 100000000 description: | ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/optgiccpuif.yml b/spec/build/bsps/arm/optgiccpuif.yml index 53ffa49c93..8c09e93d65 100644 --- a/spec/build/bsps/arm/optgiccpuif.yml +++ b/spec/build/bsps/arm/optgiccpuif.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x2c000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x2c000000 description: | Defines the base address of the GIC CPU Interface. enabled-by: true diff --git a/spec/build/bsps/arm/optgicdist.yml b/spec/build/bsps/arm/optgicdist.yml index 710d3b13db..ccb5e49837 100644 --- a/spec/build/bsps/arm/optgicdist.yml +++ b/spec/build/bsps/arm/optgicdist.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x2f000000 -default-by-variant: -- value: 0xaf000000 - variants: - - arm/fvp_cortex_r52 +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0xaf000000 +- enabled-by: true + value: 0x2f000000 description: | Defines the base address of the GIC Distributor. enabled-by: true diff --git a/spec/build/bsps/arm/optgicredist.yml b/spec/build/bsps/arm/optgicredist.yml index 8d15b1ace5..8b7a758b5d 100644 --- a/spec/build/bsps/arm/optgicredist.yml +++ b/spec/build/bsps/arm/optgicredist.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x2f100000 -default-by-variant: -- value: 0xaf100000 - variants: - - arm/fvp_cortex_r52 +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0xaf100000 +- enabled-by: true + value: 0x2f100000 description: | Defines the base address of the GIC Redistributor. enabled-by: true diff --git a/spec/build/bsps/arm/optgicspicount.yml b/spec/build/bsps/arm/optgicspicount.yml index cec05f36d7..ba4a9fc945 100644 --- a/spec/build/bsps/arm/optgicspicount.yml +++ b/spec/build/bsps/arm/optgicspicount.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 64 -default-by-variant: [] +default: +- enabled-by: true + value: 64 description: | Defines the count of Shared Peripheral Interrupts (SPIs) supported by the interrupt controller. diff --git a/spec/build/bsps/arm/optgtfreq.yml b/spec/build/bsps/arm/optgtfreq.yml index 192f4bf651..f2dfe204c8 100644 --- a/spec/build/bsps/arm/optgtfreq.yml +++ b/spec/build/bsps/arm/optgtfreq.yml @@ -5,11 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: -- value: 100000000 - variants: - - arm/fvp_cortex_r52 +default: +- enabled-by: arm/fvp_cortex_r52 + value: 100000000 description: | Defines the frequency in Hz of the ARM Generic Timer. enabled-by: true diff --git a/spec/build/bsps/arm/optgtsysbase.yml b/spec/build/bsps/arm/optgtsysbase.yml index e8d089a9dd..ff9215d488 100644 --- a/spec/build/bsps/arm/optgtsysbase.yml +++ b/spec/build/bsps/arm/optgtsysbase.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x2a430000 -default-by-variant: -- value: 0xaa430000 - variants: - - arm/fvp_cortex_r52 +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0xaa430000 +- enabled-by: true + value: 0x2a430000 description: | Defines the base address of the memory-mapped system level ARM Generic Timer. enabled-by: true diff --git a/spec/build/bsps/arm/optgtsyscntcr.yml b/spec/build/bsps/arm/optgtsyscntcr.yml index ff10881203..0beb8d2e2d 100644 --- a/spec/build/bsps/arm/optgtsyscntcr.yml +++ b/spec/build/bsps/arm/optgtsyscntcr.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000001 -default-by-variant: -- value: 0x00000101 - variants: - - arm/fvp_cortex_r52 +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0x00000101 +- enabled-by: true + value: 0x00000001 description: | Defines the initialization value of the CNTCR register of the memory-mapped system level ARM Generic Timer. diff --git a/spec/build/bsps/arm/optgtusevirt.yml b/spec/build/bsps/arm/optgtusevirt.yml index b443cc1d32..f680ed36d7 100644 --- a/spec/build/bsps/arm/optgtusevirt.yml +++ b/spec/build/bsps/arm/optgtusevirt.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | If set to true, then the clock driver uses the Virtual Timer of the ARM Generic Timer, otherwise it uses the Physical Timer (EL1). diff --git a/spec/build/bsps/arm/optmmusmallpages.yml b/spec/build/bsps/arm/optmmusmallpages.yml index a4ceb0aa1e..2bc02ed5df 100644 --- a/spec/build/bsps/arm/optmmusmallpages.yml +++ b/spec/build/bsps/arm/optmmusmallpages.yml @@ -14,11 +14,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/realview_pbx_a9_qemu +default: +- enabled-by: arm/realview_pbx_a9_qemu + value: true +- enabled-by: true + value: false description: | If set to true, then the MMU is configured to use small pages (4KiB), otherwise it uses sections (1MiB). diff --git a/spec/build/bsps/arm/optmmusz.yml b/spec/build/bsps/arm/optmmusz.yml index 2051112683..f4c5b2f4ac 100644 --- a/spec/build/bsps/arm/optmmusz.yml +++ b/spec/build/bsps/arm/optmmusz.yml @@ -8,8 +8,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00004000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00004000 description: | Defines the size of the MMU translation table in bytes. The translation table size depends on the configured MMU granularity, for example 4KiB pages diff --git a/spec/build/bsps/arm/raspberrypi/abi.yml b/spec/build/bsps/arm/raspberrypi/abi.yml index 66459a1e1b..9cbe152c32 100644 --- a/spec/build/bsps/arm/raspberrypi/abi.yml +++ b/spec/build/bsps/arm/raspberrypi/abi.yml @@ -7,16 +7,16 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a7 -default-by-variant: -- value: +- enabled-by: arm/raspberrypi + value: - -mcpu=arm1176jzf-s - variants: - - arm/raspberrypi +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a7 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml b/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml index 82ba37dc4d..86e77d2cc6 100644 --- a/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml +++ b/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | Define to 1 to use interrupt-driven I/O with the Raspberry Pi I2C bus. If defined to other value the access will be polled-driven. enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/optnocachelen.yml b/spec/build/bsps/arm/raspberrypi/optnocachelen.yml index 436ada3955..aff5d4ebe7 100644 --- a/spec/build/bsps/arm/raspberrypi/optnocachelen.yml +++ b/spec/build/bsps/arm/raspberrypi/optnocachelen.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00200000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00200000 description: | No-cache region length enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/optramlen.yml b/spec/build/bsps/arm/raspberrypi/optramlen.yml index df409a3341..21baba60cf 100644 --- a/spec/build/bsps/arm/raspberrypi/optramlen.yml +++ b/spec/build/bsps/arm/raspberrypi/optramlen.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x10000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x10000000 description: | RAM region length enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/optresetvec.yml b/spec/build/bsps/arm/raspberrypi/optresetvec.yml index efd1ea2b2a..bac5c79627 100644 --- a/spec/build/bsps/arm/raspberrypi/optresetvec.yml +++ b/spec/build/bsps/arm/raspberrypi/optresetvec.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/optrpi2.yml b/spec/build/bsps/arm/raspberrypi/optrpi2.yml index 08e3a1e381..39e9b7b779 100644 --- a/spec/build/bsps/arm/raspberrypi/optrpi2.yml +++ b/spec/build/bsps/arm/raspberrypi/optrpi2.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/raspberrypi2 +default: +- enabled-by: arm/raspberrypi2 + value: true +- enabled-by: true + value: false description: | Set if the BSP variant is Raspberry Pi 2. enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/optspiiomode.yml b/spec/build/bsps/arm/raspberrypi/optspiiomode.yml index bb0b94a683..69c197be59 100644 --- a/spec/build/bsps/arm/raspberrypi/optspiiomode.yml +++ b/spec/build/bsps/arm/raspberrypi/optspiiomode.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | Define to 1 to use interrupt-driven I/O with the Raspberry Pi SPI bus. If defined to other value the access will be polled-driven. enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/abi.yml b/spec/build/bsps/arm/realview-pbx-a9/abi.yml index a3a710c97d..d3161d624d 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/abi.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/abi.yml @@ -7,12 +7,13 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a9 -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a9 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml b/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml index 3ab2b72830..acd0524ce0 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 100000000 -default-by-variant: [] +default: +- enabled-by: true + value: 100000000 description: | ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml b/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml index 23b1410385..c86800df35 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable data cache enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml b/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml index f172cc4b58..90e0e1301a 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable instruction cache enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml b/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml index 8cca180892..4abc209af2 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false description: | If defined, then do the clock tick processing on the boot processor on behalf of all other processors. enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml b/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml index 61333a11f1..e303a8bf9f 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false description: | This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml b/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml index efd1ea2b2a..bac5c79627 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/rtl22xx/abi.yml b/spec/build/bsps/arm/rtl22xx/abi.yml index abb7f66b50..0d70e8b6c8 100644 --- a/spec/build/bsps/arm/rtl22xx/abi.yml +++ b/spec/build/bsps/arm/rtl22xx/abi.yml @@ -7,13 +7,13 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=arm7tdmi -- -mthumb -default-by-variant: -- value: +- enabled-by: arm/rtl22xx + value: - -mcpu=arm7tdmi - variants: - - arm/rtl22xx +- enabled-by: true + value: + - -mcpu=arm7tdmi + - -mthumb description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/rtl22xx/optskyeye.yml b/spec/build/bsps/arm/rtl22xx/optskyeye.yml index be55a98c3a..0d805efefd 100644 --- a/spec/build/bsps/arm/rtl22xx/optskyeye.yml +++ b/spec/build/bsps/arm/rtl22xx/optskyeye.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites. enabled-by: true diff --git a/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml b/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml index efcb42b586..73065c3ea8 100644 --- a/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml +++ b/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml @@ -17,8 +17,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml b/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml index 1bd1983dcb..80200abb7a 100644 --- a/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml +++ b/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml @@ -13,8 +13,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/smdk2410/abi.yml b/spec/build/bsps/arm/smdk2410/abi.yml index d964ca5d2f..3b66ec01ba 100644 --- a/spec/build/bsps/arm/smdk2410/abi.yml +++ b/spec/build/bsps/arm/smdk2410/abi.yml @@ -7,8 +7,9 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=arm920t -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=arm920t description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml b/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml index ba24539e4a..187b7972a0 100644 --- a/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml +++ b/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/smdk2410 +default: +- enabled-by: arm/smdk2410 + value: true +- enabled-by: true + value: false description: | If defined, enable optons for the S3C2410 CPU model. enabled-by: true diff --git a/spec/build/bsps/arm/smdk2410/optskyeye.yml b/spec/build/bsps/arm/smdk2410/optskyeye.yml index be55a98c3a..0d805efefd 100644 --- a/spec/build/bsps/arm/smdk2410/optskyeye.yml +++ b/spec/build/bsps/arm/smdk2410/optskyeye.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites. enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/abi.yml b/spec/build/bsps/arm/stm32f4/abi.yml index 3098d8597b..3d8cf52ec9 100644 --- a/spec/build/bsps/arm/stm32f4/abi.yml +++ b/spec/build/bsps/arm/stm32f4/abi.yml @@ -7,16 +7,16 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mcpu=cortex-m4 -- -mthumb -- -mfloat-abi=hard -- -mfpu=auto -default-by-variant: -- value: +- enabled-by: arm/stm32f105rc + value: - -mthumb - -mcpu=cortex-m3 - variants: - - arm/stm32f105rc +- enabled-by: true + value: + - -mcpu=cortex-m4 + - -mthumb + - -mfloat-abi=hard + - -mfpu=auto description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/opteni2c1.yml b/spec/build/bsps/arm/stm32f4/opteni2c1.yml index ab8dd78926..dbb47cf63a 100644 --- a/spec/build/bsps/arm/stm32f4/opteni2c1.yml +++ b/spec/build/bsps/arm/stm32f4/opteni2c1.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/stm32f105rc +default: +- enabled-by: arm/stm32f105rc + value: true +- enabled-by: true + value: false description: | enable I2C 1 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/opteni2c2.yml b/spec/build/bsps/arm/stm32f4/opteni2c2.yml index d4ef7328e1..4206c3e619 100644 --- a/spec/build/bsps/arm/stm32f4/opteni2c2.yml +++ b/spec/build/bsps/arm/stm32f4/opteni2c2.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable I2C 2 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenuart4.yml b/spec/build/bsps/arm/stm32f4/optenuart4.yml index 5bf266707f..adff97c933 100644 --- a/spec/build/bsps/arm/stm32f4/optenuart4.yml +++ b/spec/build/bsps/arm/stm32f4/optenuart4.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable UART 4 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenuart5.yml b/spec/build/bsps/arm/stm32f4/optenuart5.yml index 21f1e6f963..ed52ec5b2d 100644 --- a/spec/build/bsps/arm/stm32f4/optenuart5.yml +++ b/spec/build/bsps/arm/stm32f4/optenuart5.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable UART 5 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenusart1.yml b/spec/build/bsps/arm/stm32f4/optenusart1.yml index 9fd8f99af2..cdb6a3b53c 100644 --- a/spec/build/bsps/arm/stm32f4/optenusart1.yml +++ b/spec/build/bsps/arm/stm32f4/optenusart1.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable USART 1 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenusart2.yml b/spec/build/bsps/arm/stm32f4/optenusart2.yml index d9dd3a3d22..8bae93c1d8 100644 --- a/spec/build/bsps/arm/stm32f4/optenusart2.yml +++ b/spec/build/bsps/arm/stm32f4/optenusart2.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable USART 2 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenusart3.yml b/spec/build/bsps/arm/stm32f4/optenusart3.yml index 3cc11ba79b..feb8c1f429 100644 --- a/spec/build/bsps/arm/stm32f4/optenusart3.yml +++ b/spec/build/bsps/arm/stm32f4/optenusart3.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | enable USART 3 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenusart6.yml b/spec/build/bsps/arm/stm32f4/optenusart6.yml index 4e20fb4317..1755749163 100644 --- a/spec/build/bsps/arm/stm32f4/optenusart6.yml +++ b/spec/build/bsps/arm/stm32f4/optenusart6.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | enable USART 6 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optf10xxx.yml b/spec/build/bsps/arm/stm32f4/optf10xxx.yml index a1cc76ff37..2acf8248df 100644 --- a/spec/build/bsps/arm/stm32f4/optf10xxx.yml +++ b/spec/build/bsps/arm/stm32f4/optf10xxx.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/stm32f105rc +default: +- enabled-by: arm/stm32f105rc + value: true +- enabled-by: true + value: false description: | Chip belongs to the STM32F10XXX family. enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optf4xxxx.yml b/spec/build/bsps/arm/stm32f4/optf4xxxx.yml index 891aacc3c3..a7d4aa9003 100644 --- a/spec/build/bsps/arm/stm32f4/optf4xxxx.yml +++ b/spec/build/bsps/arm/stm32f4/optf4xxxx.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/stm32f4 +default: +- enabled-by: arm/stm32f4 + value: true +- enabled-by: true + value: false description: | Chip belongs to the STM32F4XXXX family. enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/opthclk.yml b/spec/build/bsps/arm/stm32f4/opthclk.yml index b827fffe33..dc1f69b81e 100644 --- a/spec/build/bsps/arm/stm32f4/opthclk.yml +++ b/spec/build/bsps/arm/stm32f4/opthclk.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 16000000 -default-by-variant: -- value: 8000000 - variants: - - arm/stm32f105rc +default: +- enabled-by: arm/stm32f105rc + value: 8000000 +- enabled-by: true + value: 16000000 description: | HCLK frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optoschse.yml b/spec/build/bsps/arm/stm32f4/optoschse.yml index 2b1dad620e..047b5d98a9 100644 --- a/spec/build/bsps/arm/stm32f4/optoschse.yml +++ b/spec/build/bsps/arm/stm32f4/optoschse.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 8000000 -default-by-variant: [] +default: +- enabled-by: true + value: 8000000 description: | HSE oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optpclk1.yml b/spec/build/bsps/arm/stm32f4/optpclk1.yml index 79aafa89a9..493534ad1c 100644 --- a/spec/build/bsps/arm/stm32f4/optpclk1.yml +++ b/spec/build/bsps/arm/stm32f4/optpclk1.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 16000000 -default-by-variant: -- value: 8000000 - variants: - - arm/stm32f105rc +default: +- enabled-by: arm/stm32f105rc + value: 8000000 +- enabled-by: true + value: 16000000 description: | PCLK1 frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optpclk2.yml b/spec/build/bsps/arm/stm32f4/optpclk2.yml index 43ce9f9c04..ab25ee194b 100644 --- a/spec/build/bsps/arm/stm32f4/optpclk2.yml +++ b/spec/build/bsps/arm/stm32f4/optpclk2.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 16000000 -default-by-variant: -- value: 8000000 - variants: - - arm/stm32f105rc +default: +- enabled-by: arm/stm32f105rc + value: 8000000 +- enabled-by: true + value: 16000000 description: | PCLK2 frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optsysclk.yml b/spec/build/bsps/arm/stm32f4/optsysclk.yml index 9dd081d475..d70078e2f5 100644 --- a/spec/build/bsps/arm/stm32f4/optsysclk.yml +++ b/spec/build/bsps/arm/stm32f4/optsysclk.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 16000000 -default-by-variant: -- value: 8000000 - variants: - - arm/stm32f105rc +default: +- enabled-by: arm/stm32f105rc + value: 8000000 +- enabled-by: true + value: 16000000 description: | SYSCLK frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optusartbaud.yml b/spec/build/bsps/arm/stm32f4/optusartbaud.yml index b102e37eb6..8d4462cacd 100644 --- a/spec/build/bsps/arm/stm32f4/optusartbaud.yml +++ b/spec/build/bsps/arm/stm32f4/optusartbaud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | baud for USARTs enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml b/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml index c7405f76dd..675af7406f 100644 --- a/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml +++ b/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml @@ -13,8 +13,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/stm32h7/abi.yml b/spec/build/bsps/arm/stm32h7/abi.yml index 27da264d03..2289c595bf 100644 --- a/spec/build/bsps/arm/stm32h7/abi.yml +++ b/spec/build/bsps/arm/stm32h7/abi.yml @@ -7,19 +7,20 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mthumb -- -mcpu=cortex-m7 -- -mfpu=fpv5-d16 -- -mfloat-abi=hard -default-by-variant: -- value: +- enabled-by: + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval-m4 + value: - -mthumb - -mcpu=cortex-m4 - -mfpu=fpv4-sp-d16 - -mfloat-abi=hard - variants: - - arm/stm32h747i-disco-m4 - - arm/stm32h757i-eval-m4 +- enabled-by: true + value: + - -mthumb + - -mcpu=cortex-m7 + - -mfpu=fpv5-d16 + - -mfloat-abi=hard description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optbootcore.yml b/spec/build/bsps/arm/stm32h7/optbootcore.yml index c248939bbe..1aa3cbd8e4 100644 --- a/spec/build/bsps/arm/stm32h7/optbootcore.yml +++ b/spec/build/bsps/arm/stm32h7/optbootcore.yml @@ -9,16 +9,17 @@ actions: build-type: option copyrights: - Copyright (C) 2022 Karel Gardas <karel@functional.vision> -default: BOOT_CORE_DEFINE_NOT_NEEDED -default-by-variant: -- value: CORE_CM7 - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h757i-eval -- value: CORE_CM4 - variants: + value: CORE_CM7 +- enabled-by: - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval-m4 + value: CORE_CM4 +- enabled-by: true + value: BOOT_CORE_DEFINE_NOT_NEEDED description: | Select the boot core. Possible values are CORE_CM7 and CORE_CM4 enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optenmpualign.yml b/spec/build/bsps/arm/stm32h7/optenmpualign.yml index 407a824b36..f7fe5447e4 100644 --- a/spec/build/bsps/arm/stm32h7/optenmpualign.yml +++ b/spec/build/bsps/arm/stm32h7/optenmpualign.yml @@ -6,8 +6,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | Enable the alignment of the size of the combined start and text sections and the rodata section to meet MPU region alignment requirements. This increases diff --git a/spec/build/bsps/arm/stm32h7/optenuart4.yml b/spec/build/bsps/arm/stm32h7/optenuart4.yml index b95b2372f7..e3d8a43b2b 100644 --- a/spec/build/bsps/arm/stm32h7/optenuart4.yml +++ b/spec/build/bsps/arm/stm32h7/optenuart4.yml @@ -5,14 +5,15 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 + value: false +- enabled-by: true + value: true description: | Enable UART4 device in console driver. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optenuart5.yml b/spec/build/bsps/arm/stm32h7/optenuart5.yml index db70f25470..6f116c4f8f 100644 --- a/spec/build/bsps/arm/stm32h7/optenuart5.yml +++ b/spec/build/bsps/arm/stm32h7/optenuart5.yml @@ -5,15 +5,16 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true description: | Enable UART5 device in console driver. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optenuart7.yml b/spec/build/bsps/arm/stm32h7/optenuart7.yml index 6fdc57cec8..42a425ae1d 100644 --- a/spec/build/bsps/arm/stm32h7/optenuart7.yml +++ b/spec/build/bsps/arm/stm32h7/optenuart7.yml @@ -5,15 +5,16 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true description: | Enable UART7 device in console driver. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optenuart8.yml b/spec/build/bsps/arm/stm32h7/optenuart8.yml index 0dc550d701..b933a291dd 100644 --- a/spec/build/bsps/arm/stm32h7/optenuart8.yml +++ b/spec/build/bsps/arm/stm32h7/optenuart8.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true description: | Enable UART8 device in console driver. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optenuart9.yml b/spec/build/bsps/arm/stm32h7/optenuart9.yml index 9c364b7fec..78354328ae 100644 --- a/spec/build/bsps/arm/stm32h7/optenuart9.yml +++ b/spec/build/bsps/arm/stm32h7/optenuart9.yml @@ -5,15 +5,16 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true description: | Enable UART9 device in console driver. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optenusart1.yml b/spec/build/bsps/arm/stm32h7/optenusart1.yml index 2ed54158b3..6707415008 100644 --- a/spec/build/bsps/arm/stm32h7/optenusart1.yml +++ b/spec/build/bsps/arm/stm32h7/optenusart1.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | Enable USART1 device in console driver. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optenusart10.yml b/spec/build/bsps/arm/stm32h7/optenusart10.yml index a23ce86e7e..3822b0af78 100644 --- a/spec/build/bsps/arm/stm32h7/optenusart10.yml +++ b/spec/build/bsps/arm/stm32h7/optenusart10.yml @@ -5,15 +5,16 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true description: | Enable USART10 device in console driver. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optenusart2.yml b/spec/build/bsps/arm/stm32h7/optenusart2.yml index 482b31e794..1156853139 100644 --- a/spec/build/bsps/arm/stm32h7/optenusart2.yml +++ b/spec/build/bsps/arm/stm32h7/optenusart2.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 + value: false +- enabled-by: true + value: true description: | Enable USART2 device in console driver. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optenusart3.yml b/spec/build/bsps/arm/stm32h7/optenusart3.yml index 48f5ce7e9f..0b4adad549 100644 --- a/spec/build/bsps/arm/stm32h7/optenusart3.yml +++ b/spec/build/bsps/arm/stm32h7/optenusart3.yml @@ -5,15 +5,16 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true description: | Enable USART3 device in console driver. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optenusart6.yml b/spec/build/bsps/arm/stm32h7/optenusart6.yml index 1090bbce39..a1efb0dc80 100644 --- a/spec/build/bsps/arm/stm32h7/optenusart6.yml +++ b/spec/build/bsps/arm/stm32h7/optenusart6.yml @@ -5,15 +5,16 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true description: | Enable USART6 device in console driver. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml b/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml index 168e235719..aae049fa2d 100644 --- a/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml +++ b/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml @@ -5,11 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: -- value: GPIO_PIN_13 - variants: - - arm/nucleo-h743zi +default: +- enabled-by: arm/nucleo-h743zi + value: GPIO_PIN_13 description: | GPIO B pins used for the ETH pin configuration. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml b/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml index 74a4286310..7c6ac690f1 100644 --- a/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml +++ b/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) -default: ( GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 ) -default-by-variant: -- value: ( GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13 ) - variants: - - arm/nucleo-h743zi +default: +- enabled-by: arm/nucleo-h743zi + value: ( GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13 ) +- enabled-by: true + value: ( GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 ) description: | GPIO G pins used for the ETH pin configuration. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/opthse.yml b/spec/build/bsps/arm/stm32h7/opthse.yml index debccdc686..336575638a 100644 --- a/spec/build/bsps/arm/stm32h7/opthse.yml +++ b/spec/build/bsps/arm/stm32h7/opthse.yml @@ -6,14 +6,13 @@ actions: build-type: option copyrights: - Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) -default: 25000000 -default-by-variant: -- value: 8000000 - variants: - - arm/nucleo-h743zi -- value: 24000000 - variants: - - arm/stm32h7b3i-dk +default: +- enabled-by: arm/nucleo-h743zi + value: 8000000 +- enabled-by: arm/stm32h7b3i-dk + value: 24000000 +- enabled-by: true + value: 25000000 description: | Frequency of the external high speed oscillator (HSE). enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optlinkcmds.yml b/spec/build/bsps/arm/stm32h7/optlinkcmds.yml index ed10fe94d1..d558c519cb 100644 --- a/spec/build/bsps/arm/stm32h7/optlinkcmds.yml +++ b/spec/build/bsps/arm/stm32h7/optlinkcmds.yml @@ -5,16 +5,17 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: linkcmds.sdram -default-by-variant: -- value: linkcmds.flash - variants: +default: +- enabled-by: - arm/nucleo-h743zi - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 - arm/stm32h7b3i-dk + value: linkcmds.flash +- enabled-by: true + value: linkcmds.sdram description: | The default linker command file. Must be either linkcmds.flash, linkcmds.sdram, linkcmds.sram, linkcmds.sram_sdram diff --git a/spec/build/bsps/arm/stm32h7/optmemdtcmsz.yml b/spec/build/bsps/arm/stm32h7/optmemdtcmsz.yml index e62efb45c2..260cc14a97 100644 --- a/spec/build/bsps/arm/stm32h7/optmemdtcmsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemdtcmsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00020000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00020000 description: | Size of the Data Tightly Coupled Memory (DTCM) in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml b/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml index 0f0c673ee8..facee637dc 100644 --- a/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml +++ b/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2022 Karel Gardas <karel@functional.vision> -default: FLASH_LATENCY_4 -default-by-variant: -- value: FLASH_LATENCY_6 - variants: - - arm/stm32h7b3i-dk +default: +- enabled-by: arm/stm32h7b3i-dk + value: FLASH_LATENCY_6 +- enabled-by: true + value: FLASH_LATENCY_4 description: | Internal Flash latency enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemflashorigin.yml b/spec/build/bsps/arm/stm32h7/optmemflashorigin.yml index 2e97ba5659..828b5e6ba2 100644 --- a/spec/build/bsps/arm/stm32h7/optmemflashorigin.yml +++ b/spec/build/bsps/arm/stm32h7/optmemflashorigin.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x08000000 -default-by-variant: -- value: 0x08100000 - variants: +default: +- enabled-by: - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval-m4 + value: 0x08100000 +- enabled-by: true + value: 0x08000000 description: | Origin address of the internal flash. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemflashsz.yml b/spec/build/bsps/arm/stm32h7/optmemflashsz.yml index c8eb11f320..8dcfa76e4f 100644 --- a/spec/build/bsps/arm/stm32h7/optmemflashsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemflashsz.yml @@ -5,12 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00200000 -default-by-variant: -- value: 0x00100000 - variants: +default: +- enabled-by: - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval-m4 + value: 0x00100000 +- enabled-by: true + value: 0x00200000 description: | Size of the internal flash in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemitcmsz.yml b/spec/build/bsps/arm/stm32h7/optmemitcmsz.yml index 1648eebb40..e9dcac542d 100644 --- a/spec/build/bsps/arm/stm32h7/optmemitcmsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemitcmsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x0000ff00 -default-by-variant: [] +default: +- enabled-by: true + value: 0x0000ff00 description: | Size of the Instruction Tightly Coupled Memory (ITCM) in bytes. The size must take the NULL pointer protection memory area into account diff --git a/spec/build/bsps/arm/stm32h7/optmemnandsz.yml b/spec/build/bsps/arm/stm32h7/optmemnandsz.yml index 9c53510cd7..cad32b132d 100644 --- a/spec/build/bsps/arm/stm32h7/optmemnandsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemnandsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00000000 description: | Size of the NAND flash in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemnorsz.yml b/spec/build/bsps/arm/stm32h7/optmemnorsz.yml index 4449924a72..133663b3ae 100644 --- a/spec/build/bsps/arm/stm32h7/optmemnorsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemnorsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00000000 description: | Size of the NOR flash or PSRAM in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemnullsz.yml b/spec/build/bsps/arm/stm32h7/optmemnullsz.yml index feb8ba3be8..7a9d025fc4 100644 --- a/spec/build/bsps/arm/stm32h7/optmemnullsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemnullsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000100 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00000100 description: | Size of the NULL pointer protection area in bytes. This memory area reduces the size of the ITCM available to the application (STM32H7_MEMORY_ITCM_SIZE). diff --git a/spec/build/bsps/arm/stm32h7/optmemperipheralsz.yml b/spec/build/bsps/arm/stm32h7/optmemperipheralsz.yml index 75a3aa0f3b..6fa49af466 100644 --- a/spec/build/bsps/arm/stm32h7/optmemperipheralsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemperipheralsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x20000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x20000000 description: | Size of the peripheral memory in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemquadspisz.yml b/spec/build/bsps/arm/stm32h7/optmemquadspisz.yml index 4fd966e63a..82c48c7683 100644 --- a/spec/build/bsps/arm/stm32h7/optmemquadspisz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemquadspisz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00000000 description: | Size of the QUADSPI memory in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml b/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml index 0a554d1461..7b93747a41 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml @@ -5,16 +5,17 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x02000000 -default-by-variant: -- value: 0x00000000 - variants: +default: +- enabled-by: - arm/nucleo-h743zi - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 - arm/stm32h7b3i-dk + value: 0x00000000 +- enabled-by: true + value: 0x02000000 description: | Size of the SDRAM 1 in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemsdram2sz.yml b/spec/build/bsps/arm/stm32h7/optmemsdram2sz.yml index ccd026fc4e..addff5fa58 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsdram2sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsdram2sz.yml @@ -5,14 +5,15 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: -- value: 0x02000000 - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 + value: 0x02000000 +- enabled-by: true + value: 0x00000000 description: | Size of the SDRAM 2 in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml b/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml index a624a8a76c..a3ecbadd3f 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00020000 -default-by-variant: -- value: 0x00010000 - variants: - - arm/stm32h7b3i-dk +default: +- enabled-by: arm/stm32h7b3i-dk + value: 0x00010000 +- enabled-by: true + value: 0x00020000 description: | Size of the SRAM 1 (D2 domain) in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml b/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml index 47cbbfe770..851b5f5632 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00020000 -default-by-variant: -- value: 0x00010000 - variants: - - arm/stm32h7b3i-dk +default: +- enabled-by: arm/stm32h7b3i-dk + value: 0x00010000 +- enabled-by: true + value: 0x00020000 description: | Size of the SRAM 2 (D2 domain) in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml b/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml index dddc15d304..23b7353313 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00008000 -default-by-variant: -- value: 0x00000000 - variants: - - arm/stm32h7b3i-dk +default: +- enabled-by: arm/stm32h7b3i-dk + value: 0x00000000 +- enabled-by: true + value: 0x00008000 description: | Size of the SRAM 3 (D2 domain) in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml b/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml index 3f89188adc..3b777a4943 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00010000 -default-by-variant: -- value: 0x00008000 - variants: - - arm/stm32h7b3i-dk +default: +- enabled-by: arm/stm32h7b3i-dk + value: 0x00008000 +- enabled-by: true + value: 0x00010000 description: | Size of the SRAM 4 (D3 domain) in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml b/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml index 24964196a1..79787c4e64 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00080000 -default-by-variant: -- value: 0x000a0000 - variants: - - arm/stm32h7b3i-dk +default: +- enabled-by: arm/stm32h7b3i-dk + value: 0x000a0000 +- enabled-by: true + value: 0x00080000 description: | Size of the AXI SRAM (D1 domain) in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optmemsrambackupsz.yml b/spec/build/bsps/arm/stm32h7/optmemsrambackupsz.yml index 40e3ae1a1d..0d22f2aafb 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsrambackupsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsrambackupsz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00001000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00001000 description: | Size of backup SRAM in bytes. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optprintkinstance.yml b/spec/build/bsps/arm/stm32h7/optprintkinstance.yml index 16c1b4238b..be5d14e05b 100644 --- a/spec/build/bsps/arm/stm32h7/optprintkinstance.yml +++ b/spec/build/bsps/arm/stm32h7/optprintkinstance.yml @@ -5,11 +5,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: stm32h7_usart1_instance -default-by-variant: -- value: stm32h7_usart3_instance - variants: - - arm/nucleo-h743zi +default: +- enabled-by: arm/nucleo-h743zi + value: stm32h7_usart3_instance +- enabled-by: true + value: stm32h7_usart1_instance description: | UART/USART instance used for printk() and getchark(). enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optpwrsupply.yml b/spec/build/bsps/arm/stm32h7/optpwrsupply.yml index 6534cf6143..2fec330314 100644 --- a/spec/build/bsps/arm/stm32h7/optpwrsupply.yml +++ b/spec/build/bsps/arm/stm32h7/optpwrsupply.yml @@ -5,15 +5,16 @@ actions: build-type: option copyrights: - Copyright (C) 2022 Karel Gardas <karel@functional.vision> -default: PWR_LDO_SUPPLY -default-by-variant: -- value: PWR_DIRECT_SMPS_SUPPLY - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 - arm/stm32h7b3i-dk + value: PWR_DIRECT_SMPS_SUPPLY +- enabled-by: true + value: PWR_LDO_SUPPLY description: | Board power supply mechanism configuration. WARNING: wrong configuration here may result in your board being unaccessible using ST-Link interface! Please diff --git a/spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml b/spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml index e0f39814e8..b4b2b6b774 100644 --- a/spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml +++ b/spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2022 Karel Gardas <karel@functional.vision> -default: GPIO_AF4_USART1 -default-by-variant: -- value: GPIO_AF7_USART1 - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h7b3i-dk + value: GPIO_AF7_USART1 +- enabled-by: true + value: GPIO_AF4_USART1 description: | Alternate function mapping for the USART1 pin configuration. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml b/spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml index cc81ce408b..219e9705f7 100644 --- a/spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml +++ b/spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2021-22 embedded brains GmbH (http://www.embedded-brains.de) -default: ( GPIO_PIN_14 | GPIO_PIN_15 ) -default-by-variant: -- value: ( GPIO_PIN_9 | GPIO_PIN_10 ) - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h7b3i-dk + value: ( GPIO_PIN_9 | GPIO_PIN_10 ) +- enabled-by: true + value: ( GPIO_PIN_14 | GPIO_PIN_15 ) description: | GPIO pins used for the USART1 pin configuration. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml b/spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml index 890579b9f8..f9de4981e6 100644 --- a/spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml +++ b/spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml @@ -5,17 +5,18 @@ actions: build-type: option copyrights: - Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) -default: GPIOD -default-by-variant: -- value: GPIOA - variants: +default: +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 - arm/stm32h7b3i-dk -- value: GPIOB - variants: + value: GPIOA +- enabled-by: - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 + value: GPIOB +- enabled-by: true + value: GPIOD description: | GPIO registers used for the USART1 pin configuration. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optusart3gpiopins.yml b/spec/build/bsps/arm/stm32h7/optusart3gpiopins.yml index f946bbd2a6..25339aefbb 100644 --- a/spec/build/bsps/arm/stm32h7/optusart3gpiopins.yml +++ b/spec/build/bsps/arm/stm32h7/optusart3gpiopins.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) -default: ( GPIO_PIN_8 | GPIO_PIN_9 ) -default-by-variant: [] +default: +- enabled-by: true + value: ( GPIO_PIN_8 | GPIO_PIN_9 ) description: | GPIO pins used for the USART3 pin configuration. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optusart3gpioregs.yml b/spec/build/bsps/arm/stm32h7/optusart3gpioregs.yml index 3485b4fdb8..f227c5cfdf 100644 --- a/spec/build/bsps/arm/stm32h7/optusart3gpioregs.yml +++ b/spec/build/bsps/arm/stm32h7/optusart3gpioregs.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) -default: GPIOD -default-by-variant: [] +default: +- enabled-by: true + value: GPIOD description: | GPIO registers used for the USART3 pin configuration. enabled-by: true diff --git a/spec/build/bsps/arm/stm32h7/optvariant.yml b/spec/build/bsps/arm/stm32h7/optvariant.yml index c5c0ce65dc..e6324c644d 100644 --- a/spec/build/bsps/arm/stm32h7/optvariant.yml +++ b/spec/build/bsps/arm/stm32h7/optvariant.yml @@ -15,19 +15,19 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: STM32H743xx -default-by-variant: -- value: STM32H7B3xxQ - variants: - - arm/stm32h7b3i-dk -- value: STM32H757xx - variants: +default: +- enabled-by: arm/stm32h7b3i-dk + value: STM32H7B3xxQ +- enabled-by: - arm/stm32h757i-eval - arm/stm32h757i-eval-m4 -- value: STM32H747xx - variants: + value: STM32H757xx +- enabled-by: - arm/stm32h747i-disco - arm/stm32h747i-disco-m4 + value: STM32H747xx +- enabled-by: true + value: STM32H743xx description: | Select the STM32H7 series chip variant out of STM32H742xx, STM32H743xx, STM32H745xx, STM32H747xx, STM32H750xx, STM32H753xx, STM32H755xx, STM32H757xx, diff --git a/spec/build/bsps/arm/stm32h7/tststm32h757i-eval.yml b/spec/build/bsps/arm/stm32h7/tststm32h757i-eval.yml index 69f7ffe561..0b08f39fd5 100644 --- a/spec/build/bsps/arm/stm32h7/tststm32h757i-eval.yml +++ b/spec/build/bsps/arm/stm32h7/tststm32h757i-eval.yml @@ -10,8 +10,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/tms570/abi.yml b/spec/build/bsps/arm/tms570/abi.yml index 0177616e2a..e80655211d 100644 --- a/spec/build/bsps/arm/tms570/abi.yml +++ b/spec/build/bsps/arm/tms570/abi.yml @@ -7,12 +7,13 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -march=armv7-r -- -mthumb -- -mbig-endian -- -mfpu=vfpv3-d16 -- -mfloat-abi=hard -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-r + - -mthumb + - -mbig-endian + - -mfpu=vfpv3-d16 + - -mfloat-abi=hard description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optcclk.yml b/spec/build/bsps/arm/tms570/optcclk.yml index 674ec1ac86..d5c2e0ded9 100644 --- a/spec/build/bsps/arm/tms570/optcclk.yml +++ b/spec/build/bsps/arm/tms570/optcclk.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 96000000 -default-by-variant: [] +default: +- enabled-by: true + value: 96000000 description: | CPU clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optconirq.yml b/spec/build/bsps/arm/tms570/optconirq.yml index 3e3dc5a836..52c01ab30f 100644 --- a/spec/build/bsps/arm/tms570/optconirq.yml +++ b/spec/build/bsps/arm/tms570/optconirq.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: [] +default: +- enabled-by: true + value: 1 description: | The tms570 console driver can operate in either polled or interrupt mode. enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optlinkflags.yml b/spec/build/bsps/arm/tms570/optlinkflags.yml index bf700031b7..5d4f83fdcd 100644 --- a/spec/build/bsps/arm/tms570/optlinkflags.yml +++ b/spec/build/bsps/arm/tms570/optlinkflags.yml @@ -7,8 +7,9 @@ build-type: option copyrights: - Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de) default: -- -mbe32 -default-by-variant: [] +- enabled-by: true + value: + - -mbe32 description: | TMS570-specific flags passed to the linker. enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optlowinit.yml b/spec/build/bsps/arm/tms570/optlowinit.yml index d889dd2573..d44febb791 100644 --- a/spec/build/bsps/arm/tms570/optlowinit.yml +++ b/spec/build/bsps/arm/tms570/optlowinit.yml @@ -6,8 +6,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | Include BSP startup code for TMS570LS3137 which allows to start RTEMS application directly after reset enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optmintskstksz.yml b/spec/build/bsps/arm/tms570/optmintskstksz.yml index 57e77ae551..5c4f2ce0b7 100644 --- a/spec/build/bsps/arm/tms570/optmintskstksz.yml +++ b/spec/build/bsps/arm/tms570/optmintskstksz.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1024 -default-by-variant: [] +default: +- enabled-by: true + value: 1024 description: | Suggested minimum task stack size in bytes enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optoscmain.yml b/spec/build/bsps/arm/tms570/optoscmain.yml index 8ebd6bb82d..f41fd3422c 100644 --- a/spec/build/bsps/arm/tms570/optoscmain.yml +++ b/spec/build/bsps/arm/tms570/optoscmain.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 12000000 -default-by-variant: [] +default: +- enabled-by: true + value: 12000000 description: | main oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optoscrtc.yml b/spec/build/bsps/arm/tms570/optoscrtc.yml index 8e14cbf9a8..b2f85e2c36 100644 --- a/spec/build/bsps/arm/tms570/optoscrtc.yml +++ b/spec/build/bsps/arm/tms570/optoscrtc.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 32768 -default-by-variant: [] +default: +- enabled-by: true + value: 32768 description: | RTC oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optreginit.yml b/spec/build/bsps/arm/tms570/optreginit.yml index 3f7e9f2bf2..d6cbd32196 100644 --- a/spec/build/bsps/arm/tms570/optreginit.yml +++ b/spec/build/bsps/arm/tms570/optreginit.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | The TMS570 needs to have the registers of its CPU initialized to avoid CCMR4F errors enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optscibaud.yml b/spec/build/bsps/arm/tms570/optscibaud.yml index e4eedd871b..d71df26b8c 100644 --- a/spec/build/bsps/arm/tms570/optscibaud.yml +++ b/spec/build/bsps/arm/tms570/optscibaud.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +default: +- enabled-by: true + value: 115200 description: | baud for UARTs enabled-by: true diff --git a/spec/build/bsps/arm/tms570/opttms570ls3137.yml b/spec/build/bsps/arm/tms570/opttms570ls3137.yml index 344f209ca1..fc33bdad5b 100644 --- a/spec/build/bsps/arm/tms570/opttms570ls3137.yml +++ b/spec/build/bsps/arm/tms570/opttms570ls3137.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | target used for identify TMS570LS3137 board enabled-by: true diff --git a/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml b/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml index c52a26e118..981a4f41a1 100644 --- a/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml +++ b/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml @@ -13,8 +13,7 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/xen/abi.yml b/spec/build/bsps/arm/xen/abi.yml index ed581d94f4..dbd1dfa9a6 100644 --- a/spec/build/bsps/arm/xen/abi.yml +++ b/spec/build/bsps/arm/xen/abi.yml @@ -7,11 +7,12 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/xen/optgentmunmask.yml b/spec/build/bsps/arm/xen/optgentmunmask.yml index 1e7c523f15..ade26bd0b3 100644 --- a/spec/build/bsps/arm/xen/optgentmunmask.yml +++ b/spec/build/bsps/arm/xen/optgentmunmask.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | unmask the timer in the tick handler, since Xen will mask the virtual timer before injecting the interrupt to the guest enabled-by: true diff --git a/spec/build/bsps/arm/xen/optloadoff.yml b/spec/build/bsps/arm/xen/optloadoff.yml index 2796f9b52d..6705a1d867 100644 --- a/spec/build/bsps/arm/xen/optloadoff.yml +++ b/spec/build/bsps/arm/xen/optloadoff.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00008000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00008000 description: | offset of RAM region from memory area base enabled-by: true diff --git a/spec/build/bsps/arm/xen/optnocachelen.yml b/spec/build/bsps/arm/xen/optnocachelen.yml index b3661bd491..04bd28816e 100644 --- a/spec/build/bsps/arm/xen/optnocachelen.yml +++ b/spec/build/bsps/arm/xen/optnocachelen.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00100000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00100000 description: | length of nocache RAM region enabled-by: true diff --git a/spec/build/bsps/arm/xen/optramlen.yml b/spec/build/bsps/arm/xen/optramlen.yml index 8ba7d0b4a3..ac7cb7d486 100644 --- a/spec/build/bsps/arm/xen/optramlen.yml +++ b/spec/build/bsps/arm/xen/optramlen.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00800000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00800000 description: | length of memory area available to the BSP enabled-by: true diff --git a/spec/build/bsps/arm/xen/optramori.yml b/spec/build/bsps/arm/xen/optramori.yml index 32b4acd160..d0f72c0c12 100644 --- a/spec/build/bsps/arm/xen/optramori.yml +++ b/spec/build/bsps/arm/xen/optramori.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x40000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x40000000 description: | base address of memory area available to the BSP enabled-by: true diff --git a/spec/build/bsps/arm/xen/optzimghdr.yml b/spec/build/bsps/arm/xen/optzimghdr.yml index 56aa00c8b1..56eb40bde0 100644 --- a/spec/build/bsps/arm/xen/optzimghdr.yml +++ b/spec/build/bsps/arm/xen/optzimghdr.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | include zImage boot header enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/abi.yml b/spec/build/bsps/arm/xilinx-zynq/abi.yml index a3a710c97d..d3161d624d 100644 --- a/spec/build/bsps/arm/xilinx-zynq/abi.yml +++ b/spec/build/bsps/arm/xilinx-zynq/abi.yml @@ -7,12 +7,13 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a9 -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a9 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml index 39cb972a74..d74103c349 100644 --- a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml +++ b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml @@ -5,14 +5,13 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 100000000 -default-by-variant: -- value: 333333333 - variants: - - arm/xilinx_zynq_zc702 -- value: 666666667 - variants: - - arm/xilinx_zynq_zedboard +default: +- enabled-by: arm/xilinx_zynq_zc702 + value: 333333333 +- enabled-by: arm/xilinx_zynq_zedboard + value: 666666667 +- enabled-by: true + value: 100000000 description: | ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml b/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml index 23b1410385..c86800df35 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable data cache enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml b/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml index f172cc4b58..90e0e1301a 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable instruction cache enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml b/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml index 57b7187cdf..5525a0a7b4 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml @@ -5,14 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 111111111 -default-by-variant: -- value: 111111111 - variants: - - arm/xilinx_zynq_zc702 -- value: 111111111 - variants: - - arm/xilinx_zynq_zedboard +default: +- enabled-by: true + value: 111111111 description: | Zynq cpu_1x clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml b/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml index 61333a11f1..e303a8bf9f 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false description: | This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml b/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml index 56a6056687..49a7216dd9 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml @@ -5,14 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 50000000 -default-by-variant: -- value: 50000000 - variants: - - arm/xilinx_zynq_zc702 -- value: 50000000 - variants: - - arm/xilinx_zynq_zedboard +default: +- enabled-by: true + value: 50000000 description: | Zynq UART clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optconirq.yml b/spec/build/bsps/arm/xilinx-zynq/optconirq.yml index ecb91d81a3..ea13fa4561 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optconirq.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optconirq.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | use interrupt driven mode for console devices (used by default) enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optint0len.yml b/spec/build/bsps/arm/xilinx-zynq/optint0len.yml index 9d793e561b..7da268ffca 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optint0len.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optint0len.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00030000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00030000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml b/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml index f23ab23bb9..a1098fc60f 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00000000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynq/optint1len.yml b/spec/build/bsps/arm/xilinx-zynq/optint1len.yml index 776834ac49..889fc50877 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optint1len.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optint1len.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x0000fe00 -default-by-variant: [] +default: +- enabled-by: true + value: 0x0000fe00 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml b/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml index 21bba0d6bf..857537fce4 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0xffff0000 -default-by-variant: [] +default: +- enabled-by: true + value: 0xffff0000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml b/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml index c9b0e27275..fe201cf7a0 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00100000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00100000 description: | length of nocache RAM region enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optramlen.yml b/spec/build/bsps/arm/xilinx-zynq/optramlen.yml index be26a59cd3..1593cc786e 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optramlen.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optramlen.yml @@ -7,20 +7,15 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x10000000 -default-by-variant: -- value: 0x10000000 - variants: - - arm/xilinx_zynq_a9_qemu -- value: 0x40000000 - variants: +default: +- enabled-by: - arm/xilinx_zynq_zc702 -- value: 0x40000000 - variants: - arm/xilinx_zynq_zc706 -- value: 0x20000000 - variants: - - arm/xilinx_zynq_zedboard + value: 0x40000000 +- enabled-by: arm/xilinx_zynq_zedboard + value: 0x20000000 +- enabled-by: true + value: 0x10000000 description: | override a BSP's default RAM length enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optramori.yml b/spec/build/bsps/arm/xilinx-zynq/optramori.yml index b48fe23d60..9730ed590f 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optramori.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optramori.yml @@ -8,11 +8,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00100000 -default-by-variant: -- value: 0x00400000 - variants: - - arm/xilinx_zynq_zc706 +default: +- enabled-by: arm/xilinx_zynq_zc706 + value: 0x00400000 +- enabled-by: true + value: 0x00100000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml b/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml index efd1ea2b2a..bac5c79627 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/abi.yml b/spec/build/bsps/arm/xilinx-zynqmp/abi.yml index 23c66bb5b8..b49ac81c6a 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/abi.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/abi.yml @@ -7,12 +7,13 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a53 -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a53 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml b/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml index 23b1410385..c86800df35 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable data cache enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml b/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml index f172cc4b58..90e0e1301a 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable instruction cache enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml b/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml index 61333a11f1..e303a8bf9f 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml @@ -5,13 +5,14 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +default: +- enabled-by: - arm/lm3s6965_qemu - arm/realview_pbx_a9_qemu - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false description: | This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml b/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml index df6cd08847..77c8f30fff 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml @@ -5,11 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 100000000 -default-by-variant: -- value: 100000000 - variants: - - arm/xilinx_zynqmp_ultra96 +default: +- enabled-by: true + value: 100000000 description: | Zynq UART clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml b/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml index ecb91d81a3..ea13fa4561 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +default: +- enabled-by: true + value: true description: | use interrupt driven mode for console devices (used by default) enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml index 499f190176..433e181ee6 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00030000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00030000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml index b4d4bb67e7..3fa03d3129 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00000000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00000000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml index 1b76b9f19e..9f1c797366 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x0000fe00 -default-by-variant: [] +default: +- enabled-by: true + value: 0x0000fe00 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml index abf15b1043..3ef196e567 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0xffff0000 -default-by-variant: [] +default: +- enabled-by: true + value: 0xffff0000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml b/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml index ce56cfd92b..f35686d1c9 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml @@ -7,8 +7,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00100000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00100000 description: | length of nocache RAM region enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml b/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml index fe13f5305a..5cb5e805cf 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml @@ -7,11 +7,11 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x10000000 -default-by-variant: -- value: 0x80000000 - variants: - - arm/xilinx_zynqmp_ultra96 +default: +- enabled-by: arm/xilinx_zynqmp_ultra96 + value: 0x80000000 +- enabled-by: true + value: 0x10000000 description: | override a BSP's default RAM length enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml b/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml index cba1092058..6269b662e0 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml @@ -8,8 +8,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x00100000 -default-by-variant: [] +default: +- enabled-by: true + value: 0x00100000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml b/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml index efd1ea2b2a..bac5c79627 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml @@ -5,8 +5,9 @@ actions: build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true |