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-rw-r--r--spec/build/bsps/arm/optgtsyscntcr.yml10
1 files changed, 5 insertions, 5 deletions
diff --git a/spec/build/bsps/arm/optgtsyscntcr.yml b/spec/build/bsps/arm/optgtsyscntcr.yml
index ff10881203..0beb8d2e2d 100644
--- a/spec/build/bsps/arm/optgtsyscntcr.yml
+++ b/spec/build/bsps/arm/optgtsyscntcr.yml
@@ -5,11 +5,11 @@ actions:
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x00000001
-default-by-variant:
-- value: 0x00000101
- variants:
- - arm/fvp_cortex_r52
+default:
+- enabled-by: arm/fvp_cortex_r52
+ value: 0x00000101
+- enabled-by: true
+ value: 0x00000001
description: |
Defines the initialization value of the CNTCR register of the memory-mapped
system level ARM Generic Timer.