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The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.
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Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1
enable registers. This fixes the build for the AArch32 target.
Add BSP options which define the initial values of CPU Interface registers.
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Propagate the group defined cppflags, cflags, and cxxflags from parent groups
to child items through the build item context.
Update #4670.
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Update #4202.
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This BSP supports the Arm Fixed Virtual Platform. Only the Cortex-R52
processor configuration is supported by the BSP. It should be easy to
add support for other variants if needed.
Update #4202.
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