rtems - RTEMS Kernel, file-systems, drivers, BSPs, samples, and testsuite.

	Commit message (Collapse)	Author	Age	Files	Lines
*	Remove texinfo format documentation. Replaced by Sphinx formatted documentation.	Joel Sherrill	2017-01-11	1	-131/+0
\| \| \| \|	closes #2812.
*	Remove AVR port	Joel Sherrill	2016-01-19	1	-6/+0
\| \| \| \|	closes #2443.
*	Remove H8300 port	Joel Sherrill	2016-01-04	1	-6/+0
\| \| \| \|	updates #2452.
*	Remove M32R architecture	Joel Sherrill	2016-01-04	1	-7/+1
\| \| \| \|	updates #2446.
*	doc: Add new documentation section for Epiphany architecture	Hesham ALMatary	2015-05-21	1	-0/+6
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*	Add new documentation section for OpenRISC CPU architecture.	Hesham ALMatary	2014-08-20	1	-0/+6
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*	Add thread-local storage (TLS) support	Sebastian Huber	2014-02-04	1	-2/+44
\| \| \| \| \|	Tested and implemented on ARM, m68k, PowerPC and SPARC. Other architectures need more work.
*	v850 port: Initial addition with BSP for simulator in GDB	Joel Sherrill	2012-06-11	1	-2/+7
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Port + v850 does not have appear to have any optimized bit scan instructions + v850 does have single instructions for wap u16 and u32 + Code path optimization preferences set + Add BSP variants for each GCC CPU model flag and a README - v850e1 variant does not work (fails during BSP initialization) BSP for GDB v850 Simulator + linkcmds matches defaults in GDB simulator with RTEMS mods + crt1.c added from v850 newlib port for __main() + BSP exits cleanly + printk and console I/O work + uses clock tick from IDLE task + Tests not requiring real clock ISR work Documentation + CPU Supplment chapter for v850 added
*	Remove All CVS Id Strings Possible Using a Script	Joel Sherrill	2012-05-11	1	-3/+0
\| \| \| \| \| \| \| \| \| \| \| \|	Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
*	Revert: Remove CVS Ids	Joel Sherrill	2012-05-07	1	-0/+3
\| \| \| \| \|	See http://www.rtems.org/pipermail/rtems-devel/2012-May/001006.html for details.
*	Remove CVS-Ids.	Ralf Corsépius	2012-05-04	1	-3/+0
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*	2011-03-04 Joel Sherrill <joel.sherrill@oarcorp.com>	Joel Sherrill	2011-03-04	1	-6/+1
\| \| \| \| \| \| \| \|	PR 1752/doc * cpu_supplement/.cvsignore, cpu_supplement/Makefile.am, cpu_supplement/cpu_supplement.texi: Remove TI C4x CPU Supplement chapter. * cpu_supplement/tic4x.t: Removed.
*	2010-06-15 Gedare Bloom <giddyup44@yahoo.com>	Joel Sherrill	2010-06-15	1	-1/+6
\| \| \| \| \| \| \|	PR 1565/cpukit * cpu_supplement/Makefile.am, cpu_supplement/cpu_supplement.texi: Merge SPARC64 port. * cpu_supplement/sparc64.t: New file.
*	2010-06-11 Ralf Corsépius <ralf.corsepius@rtems.org>	Ralf Corsepius	2010-06-11	1	-8/+1
\| \| \| \|	* cpu_supplement/Makefile.am: Include main.am.
*	Remove EDITION (Unused)	Ralf Corsepius	2010-06-11	1	-1/+0
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*	2009-04-19 Joel Sherrill <joel.sherrill@oarcorp.com>	Joel Sherrill	2009-04-19	1	-1/+6
\| \| \| \| \| \|	* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am, cpu_supplement/cpu_supplement.texi: Add shell for Atmel AVR chapter. * cpu_supplement/avr.t: New file.
*	2008-12-04 Jukka Pietarinen <jukka.pietarinen@mrf.fi>	Joel Sherrill	2008-12-04	1	-2/+7
\| \| \| \| \| \|	* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am, cpu_supplement/cpu_supplement.texi: Add Lattice Mico32 support. * cpu_supplement/lm32.t: New file.
*	2008-06-02 Joel Sherrill <joel.sherrill@oarcorp.com>	Joel Sherrill	2008-06-02	1	-2/+7
\| \| \| \| \| \| \| \| \| \| \| \| \|	* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am, cpu_supplement/arm.t, cpu_supplement/bfin.t, cpu_supplement/cpu_supplement.texi, cpu_supplement/i386.t, cpu_supplement/m68k.t, cpu_supplement/mips.t, cpu_supplement/powerpc.t, cpu_supplement/preface.texi, cpu_supplement/sh.t: Remove duplicated text from each CPU specific chapter. This text was necessary when each CPU was a separate manual but now only needs to be one place and that is in an introductory chapter. * cpu_supplement/general.t: New file.
*	2006-10-23 Joel Sherrill <joel@OARcorp.com>	Joel Sherrill	2006-10-23	1	-2/+7
\| \| \| \| \| \| \| \|	* ada_user/Makefile.am, ada_user/ada_user.texi, cpu_supplement/Makefile.am, cpu_supplement/cpu_supplement.texi, cpu_supplement/sparc.t: Add Blackfin CPU supplement chapter and get everything building from previous breakages. * cpu_supplement/bfin.t: New file.
*	2006-08-23 Joel Sherrill <joel@OARcorp.com>	Joel Sherrill	2006-08-23	1	-0/+81
	* Makefile.am, configure.ac, FAQ/stamp-vti, FAQ/version.texi, common/cpright.texi: Merging CPU Supplements into a single document. As part of this removed the obsolete and impossible to maintain size and timing information. * cpu_supplement/.cvsignore, cpu_supplement/Makefile.am, cpu_supplement/arm.t, cpu_supplement/i386.t, cpu_supplement/m68k.t, cpu_supplement/mips.t, cpu_supplement/powerpc.t, cpu_supplement/preface.texi, cpu_supplement/sh.t, cpu_supplement/sparc.t, cpu_supplement/tic4x.t: New files. * supplements/.cvsignore, supplements/Makefile.am, supplements/supplement.am, supplements/arm/.cvsignore, supplements/arm/BSP_TIMES, supplements/arm/ChangeLog, supplements/arm/Makefile.am, supplements/arm/arm.texi, supplements/arm/bsp.t, supplements/arm/callconv.t, supplements/arm/cpumodel.t, supplements/arm/cputable.t, supplements/arm/fatalerr.t, supplements/arm/intr_NOTIMES.t, supplements/arm/memmodel.t, supplements/arm/preface.texi, supplements/arm/timeBSP.t, supplements/c4x/.cvsignore, supplements/c4x/BSP_TIMES, supplements/c4x/ChangeLog, supplements/c4x/Makefile.am, supplements/c4x/bsp.t, supplements/c4x/c4x.texi, supplements/c4x/callconv.t, supplements/c4x/cpumodel.t, supplements/c4x/cputable.t, supplements/c4x/fatalerr.t, supplements/c4x/intr_NOTIMES.t, supplements/c4x/memmodel.t, supplements/c4x/preface.texi, supplements/c4x/timeBSP.t, supplements/i386/.cvsignore, supplements/i386/ChangeLog, supplements/i386/FORCE386_TIMES, supplements/i386/Makefile.am, supplements/i386/bsp.t, supplements/i386/callconv.t, supplements/i386/cpumodel.t, supplements/i386/cputable.t, supplements/i386/fatalerr.t, supplements/i386/i386.texi, supplements/i386/intr_NOTIMES.t, supplements/i386/memmodel.t, supplements/i386/preface.texi, supplements/i386/timeFORCE386.t, supplements/m68k/.cvsignore, supplements/m68k/ChangeLog, supplements/m68k/MVME136_TIMES, supplements/m68k/Makefile.am, supplements/m68k/bsp.t, supplements/m68k/callconv.t, supplements/m68k/cpumodel.t, supplements/m68k/cputable.t, supplements/m68k/fatalerr.t, supplements/m68k/intr_NOTIMES.t, supplements/m68k/m68k.texi, supplements/m68k/memmodel.t, supplements/m68k/preface.texi, supplements/m68k/timeMVME136.t, supplements/m68k/timedata.t, supplements/mips/.cvsignore, supplements/mips/BSP_TIMES, supplements/mips/ChangeLog, supplements/mips/Makefile.am, supplements/mips/bsp.t, supplements/mips/callconv.t, supplements/mips/cpumodel.t, supplements/mips/cputable.t, supplements/mips/fatalerr.t, supplements/mips/intr_NOTIMES.t, supplements/mips/memmodel.t, supplements/mips/mips.texi, supplements/mips/preface.texi, supplements/mips/timeBSP.t, supplements/powerpc/.cvsignore, supplements/powerpc/ChangeLog, supplements/powerpc/DMV177_TIMES, supplements/powerpc/Makefile.am, supplements/powerpc/PSIM_TIMES, supplements/powerpc/bsp.t, supplements/powerpc/callconv.t, supplements/powerpc/cpumodel.t, supplements/powerpc/cputable.t, supplements/powerpc/fatalerr.t, supplements/powerpc/intr_NOTIMES.t, supplements/powerpc/memmodel.t, supplements/powerpc/powerpc.texi, supplements/powerpc/preface.texi, supplements/powerpc/timeDMV177.t, supplements/powerpc/timePSIM.t, supplements/sh/.cvsignore, supplements/sh/BSP_TIMES, supplements/sh/ChangeLog, supplements/sh/Makefile.am, supplements/sh/bsp.t, supplements/sh/callconv.t, supplements/sh/cpumodel.t, supplements/sh/cputable.t, supplements/sh/fatalerr.t, supplements/sh/intr_NOTIMES.t, supplements/sh/memmodel.t, supplements/sh/preface.texi, supplements/sh/sh.texi, supplements/sh/timeBSP.t, supplements/sparc/.cvsignore, supplements/sparc/ChangeLog, supplements/sparc/ERC32_TIMES, supplements/sparc/Makefile.am, supplements/sparc/bsp.t, supplements/sparc/callconv.t, supplements/sparc/cpumodel.t, supplements/sparc/cputable.t, supplements/sparc/fatalerr.t, supplements/sparc/intr_NOTIMES.t, supplements/sparc/memmodel.t, supplements/sparc/preface.texi, supplements/sparc/sparc.texi, supplements/sparc/timeERC32.t, supplements/template/.cvsignore, supplements/template/BSP_TIMES, supplements/template/ChangeLog, supplements/template/Makefile.am, supplements/template/bsp.t, supplements/template/callconv.t, supplements/template/cpumodel.t, supplements/template/cputable.t, supplements/template/fatalerr.t, supplements/template/intr_NOTIMES.t, supplements/template/memmodel.t, supplements/template/preface.texi, supplements/template/template.texi, supplements/template/timeBSP.t: Removed.