summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/powerpc/rtems/score/cpu.h (follow)
Commit message (Collapse)AuthorAgeFilesLines
...
* score: Rename bsp_smp_initialize()Sebastian Huber2014-02-191-0/+2
| | | | | Rename bsp_smp_initialize() into _CPU_SMP_Initialize() since every CPU port must supply this function.
* score: Remove volatile from asm statementsSebastian Huber2014-02-141-1/+1
| | | | | The instructions to get the processor current index have no side-effects.
* score: Add CPU counter supportSebastian Huber2014-02-141-0/+24
| | | | | | | | | Add a CPU counter interface to allow access to a free-running counter. It is useful to measure short time intervals. This can be used for example to enable profiling of critical low-level functions. Add two busy wait functions rtems_counter_delay_ticks() and rtems_counter_delay_nanoseconds() implemented via the CPU counter.
* score: _CPU_Context_switch_to_first_task_smp()Sebastian Huber2014-02-051-3/+0
| | | | | Delete _CPU_Context_switch_to_first_task_smp() and use _CPU_Context_restore() instead.
* Add thread-local storage (TLS) supportSebastian Huber2014-02-041-1/+2
| | | | | Tested and implemented on ARM, m68k, PowerPC and SPARC. Other architectures need more work.
* powerpc: Add r2 to CPU contextSebastian Huber2013-11-181-2/+8
| | | | The r2 may be used for thread-local storage.
* score/cpu: Add CPU_Per_CPU_controlSebastian Huber2013-08-091-0/+6
| | | | Add CPU port specific per-CPU control.
* smp: Rename _CPU_Processor_event_receive()Sebastian Huber2013-07-171-1/+1
| | | | Rename to _CPU_SMP_Processor_event_receive().
* smp: Rename _CPU_Processor_event_broadcast()Sebastian Huber2013-07-171-1/+1
| | | | Rename to _CPU_SMP_Processor_event_broadcast().
* smp: Add and use _CPU_SMP_Send_interrupt()Sebastian Huber2013-07-171-0/+1
| | | | Delete bsp_smp_interrupt_cpu().
* smp: Add and use _CPU_SMP_Get_current_processor()Sebastian Huber2013-07-171-0/+15
| | | | | | | | | | Add and use _SMP_Get_current_processor() and rtems_smp_get_current_processor(). Delete bsp_smp_interrupt_cpu(). Change type of current processor index from int to uint32_t to match _SMP_Processor_count type.
* powerpc: Fix Altivec supportSebastian Huber2013-06-261-4/+4
| | | | Use the right context.
* smp: Add PowerPC supportSebastian Huber2013-05-311-1/+16
|
* score: Add CPU context validationSebastian Huber2013-05-101-0/+4
|
* score: Doxygen Clean Up Task #5Alex Ivanov2013-01-021-1/+3
|
* score: Add CPU_Exception_frameSebastian Huber2012-11-271-0/+9
| | | | | | | | | | | | | | | | | | | | | Add CPU port type CPU_Exception_frame and function _CPU_Exception_frame_print(). The CPU ports of avr, bfin, h8300, lm32, m32c, m32r, m68k, nios2, sh, sparc64, and v850 use an empty default implementation of _CPU_Exception_frame_print(). Add rtems_exception_frame and rtems_exception_frame_print(). Add RTEMS_FATAL_SOURCE_EXCEPTION for CPU exceptions. Use rtems_fatal() with source RTEMS_FATAL_SOURCE_EXCEPTION in CPU ports of i386, powerpc, and sparc for unexpected exceptions. Add third parameter to RTEMS_BSP_CLEANUP_OPTIONS() which controls the BSP_PRINT_EXCEPTION_CONTEXT define used in the default bsp_fatal_extension(). Add test sptests/spfatal26.
* powerpc: Add CPU_Exception_frameSebastian Huber2012-11-271-0/+46
| | | | | The powerpc port uses now a unified CPU_Exception_frame. This resulted in a CPU_Exception_frame layout change for the MPC5XX.
* score: PR1607: Add and use CPU_SIZEOF_POINTERSebastian Huber2012-11-221-0/+2
| | | | | | | | | | | | | | | | | Add and use new CPU port define CPU_SIZEOF_POINTER. It must be an integer literal that can be used by the assembler. This value will be used to calculate offsets of structure members. These offsets will be used in assembler code. The size of a pointer is part of the application binary interface (ABI) and thus independent of the actual programming language. The compiler will provide defines to determine the current ABI. We use these defines to select the appropriate CPU_SIZEOF_POINTER value. Static assertions in the new file "cpukit/score/src/percpuasm.c" will ensure that the value of CPU_SIZEOF_POINTER is consistent with the current compiler settings. Also the offset values used by assembler code are verfied.
* powerpc: Delete _CPU_Install_interrupt_stack()Sebastian Huber2012-11-141-11/+0
| | | | This function is only used if CPU_HAS_HARDWARE_INTERRUPT_STACK == TRUE.
* powerpc/cpu.h: Define CPU_SIMPLE_VECTORED_INTERRUPTS and remove ↵Joel Sherrill2012-06-111-2/+14
| | | | _CPU_ISR_Initialize
* powerpc: Simplify context switchSebastian Huber2012-06-041-145/+96
| | | | | | | | | | | | | | | | | | | PowerPC cores with the SPE (Signal Processing Extension) have 64-bit general-purpose registers. The SPE context switch code has been merged with the standard context switch code. The context switch may use cache operations to increase the performance. It will be ensured that the context is 32-byte aligned (PPC_DEFAULT_CACHE_LINE_SIZE). This increases the overall memory size of the context area in the thread control block slightly. The general-purpose registers GPR2 and GPR13 are no longer part of the context. The BSP must initialize these registers during startup (usually initialized by the __eabi() function). The new BSP option BSP_USE_DATA_CACHE_BLOCK_TOUCH can be used to enable the dcbt instruction in the context switch. The new BSP option BSP_USE_SYNC_IN_CONTEXT_SWITCH can be used to enable sync and isync instructions in the context switch. This should be not necessary in most cases.
* Remove All CVS Id Strings Possible Using a ScriptJoel Sherrill2012-05-111-2/+0
| | | | | | | | | | | | Script does what is expected and tries to do it as smartly as possible. + remove occurrences of two blank comment lines next to each other after Id string line removed. + remove entire comment blocks which only exited to contain CVS Ids + If the processing left a blank line at the top of a file, it was removed.
* Score ISR - Minimize Capabilities When Not Simple VectoredJoel Sherrill2012-05-091-4/+6
| | | | | | | | | | | In particular CPU_INTERRUPT_NUMBER_OF_VECTORS and CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER are only used on Simple Vectored Architectures, so do not depend on them being defined. This disables as much as possible that is specific to the Simple Vectored Model and not expected to be used on architectures which use the Programmable Interrupt Controller model for interrupt handler vectoring.
* 2011-09-27 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-09-271-0/+2
| | | | | PR 1914/cpukit * rtems/score/cpu.h: Select timestamp implementation.
* 2011-08-30 Peter Dufault <dufault@hda.com>Sebastian Huber2011-08-301-0/+28
| | | | | * rtems/score/cpu.h: Add more context access functionality. Needed to get GDB debugger hooks working.
* 2011-07-21 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2011-07-211-16/+98
| | | | * rtems/score/cpu.h: Added SPE support to CPU context.
* 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2011-02-111-2/+2
| | | | | * rtems/powerpc/registers.h, rtems/score/cpu.h: Use "__asm__" instead of "asm" for improved c99-compliance.
* 2010-10-21 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2010-10-211-1/+1
| | | | | | * rtems/score/cpu.h: Add RTEMS_COMPILER_NO_RETURN_ATTRIBUTE to _CPU_Context_restore() because it does not return. Telling GCC this avoids generation of dead code.
* 2010-07-29 Gedare Bloom <giddyup44@yahoo.com>Joel Sherrill2010-07-291-1/+1
| | | | | | | | | | | PR 1635/cpukit * rtems/score/cpu.h, rtems/score/types.h: Refactoring of priority handling, to isolate the bitmap implementation of priorities in the supercore so that priority management is a little more modular. This change is in anticipation of scheduler implementations that can select how they manage tracking priority levels / finding the highest priority ready task. Note that most of the changes here are simple renaming, to clarify the use of the bitmap-based priority management.
* 2010-07-16 Sebastian Huber <sebastian.huber@embedded-brains.de>Sebastian Huber2010-07-161-3/+272
| | | | | | | | * rtems/new-exceptions/cpu.h: Removed file. * Makefile.am, preinstall.am: Reflect change above. * rtems/score/cpu.h: Include <rtems/score/types.h> first. Added contents of <rtems/new-exceptions/cpu.h>. * rtems/score/types.h: Use <rtems/score/basedefs.h> header file.
* Whitespace removal.Ralf Corsepius2009-12-041-3/+3
|
* 2009-12-01 Till Straumann <strauman@slac.stanford.edu>Till Straumann2009-12-021-0/+55
| | | | | | | * score/cpu/powerpc/rtems/score/cpu.h: Added space for non- volatile AltiVec registers to context struct. Added declaration for AltiVec-related routines to be implemented by CPU/BSP support.
* move timebase access functions from cpukit to libcpuThomas Doerfler2009-10-301-106/+0
|
* * rtems/powerpc/registers.h: Added defines DEAR_BOOKE and DEAR_405.Thomas Doerfler2009-10-211-10/+10
| | | | | | | | * rtems/score/cpu.h: Changed fpscr field to an integer type in Context_Control_fp. Fixed warnings in PPC_Set_timebase_register(). Changed _CPU_Context_Initialize_fp() to initialize all fields and avoid floating-point instructions. * rtems/score/powerpc.h: Removed PPC_INIT_FPSCR define.
* 2009-02-11 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2009-02-111-3/+1
| | | | | | * rtems/new-exceptions/cpu.h, rtems/score/cpu.h: Eliminate _CPU_Thread_dispatch_pointer and passing address of _Thread_Dispatch to _CPU_Initialize. Clean up comments.
* 2008-09-14 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2008-09-141-1/+3
| | | | | * rtems/score/cpu.h: Move extern of bsp_clicks_per_usec so it is not nested inside braces.
* Convert to "bool".Ralf Corsepius2008-09-051-1/+1
|
* 2008-07-10 Till Straumann <strauman@slac.stanford.edu>Till Straumann2008-07-101-1/+1
| | | | | | | | | | | * cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h, cpukit/score/cpu/powerpc/rtems/score/cpu.h, cpukit/score/cpu/powerpc/rtems/score/powerpc.h: Removed all macro definitions which depended on the compiler defining a PPC CPU-model dependent symbol. Macros which were not used by cpukit have been moved to libcpu/powerpc/rtems/powerpc/powerpc.h.
* Remove ref to rtems/old-exceptions/cpu.h.Ralf Corsepius2008-02-201-4/+0
|
* 2007-12-17 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2007-12-171-0/+3
| | | | * rtems/score/cpu.h: Add _CPU_Context_Get_SP() for stack check utility.
* 2007-12-17 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-171-0/+7
| | | | | * rtems/powerpc/registers.h, rtems/score/cpu.h: Sweep to make sure grep for COPYRIGHT passes.
* 2007-12-04 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-041-1/+0
| | | | | | | * rtems/new-exceptions/cpu.h, rtems/old-exceptions/cpu.h, rtems/score/cpu.h: Move interrupt_stack_size field from CPU Table to Configuration Table. Eliminate CPU Table from all ports. Delete references to CPU Table in all forms.
* 2007-12-03 Till Straumann <strauman@slac.stanford.edu>Till Straumann2007-12-031-0/+4
| | | | | | * rtems/score/cpu.h: Added comment that GDB patch sim/2376 is needed for reading the time-base with the new (more portable) method.
* 2007-11-30 Till Straumann <strauman@slac.stanford.edu>Till Straumann2007-12-011-0/+18
| | | | | | * rtems/score/cpu.h: Wonderful bookE doesn't have mftb/mftbu; ( CPU_Get_timebase_low() ) they only define the TBRU/TBRL SPRs so we use these. Should work on all CPUs.
* 2007-11-28 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-11-281-49/+2
| | | | | | | * rtems/new-exceptions/cpu.h, rtems/old-exceptions/cpu.h, rtems/score/cpu.h: Eliminate PowerPC specific elements from the CPU Table. They have been replaced with variables named bsp_XXX as needed.
* 2007-05-09 Ralf Corsépius <ralf.corsepius@rtems.org>Ralf Corsepius2007-05-091-2/+0
| | | | * rtems/score/cpu.h: Remove CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES.
* Use Context_Control_fp* instead of void* for fp_contexts.Ralf Corsepius2007-04-171-3/+3
| | | | Eliminate evil casts.
* 2006-08-09 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2006-08-091-1/+5
| | | | | * rtems/score/cpu.h: Because gcc implicitly uses floating point turn on floating point for all threads if there is a hardware FPU.
* 2006-01-16 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2006-01-161-2/+2
| | | | | | | * rtems/new-exceptions/cpu.h, rtems/old-exceptions/cpu.h, rtems/score/cpu.h: Part of a large patch to improve Doxygen output. As a side-effect, grammar and spelling errors were corrected, spacing errors were address, and some variable names were improved.
* (CPU_HARDWARE_FP, CPU_ALL_TASKS_ARE_FP,Ralf Corsepius2005-02-181-0/+49
| | | | CPU_IDLE_TASK_IS_FP, CPU_SOFTWARE_FP): New.
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-21 08:08:58 +0000