| Commit message (Collapse) | Author | Age | Files | Lines |
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Fixes #2515.
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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* cpu.h: Remove warnings.
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* cache.c, cpu.h, cpuModel.h:
Use "__asm__" instead of "asm" for improved c99-compliance.
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* byteorder.h, cpu.h, page.c: Fix typo where license said
found in found in.
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* cpu.c, cpu.h, cpuModel.S, cpuModel.h, displayCpu.c, idtr.S, page.c:
URL for license changed.
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* cache.c: Include <rtems/score/registers.h> instead of
<libcpu/registers.h>.
* cpu.h: Ditto. Remove parts moved to score/cpu/i386.
* registers.h: Add BIG-FAT warning.
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<charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart
<Darlene.Stewart@nrc.ca> to add support for a number of very
significant things:
+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040
and PowerPC
+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
same code base.
+ Rework of eth_comm BSP to utiltize above.
John reports this works on the 821 and 860
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warning.
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Ian Lance Taylor <ian@airs.com> to note that condition codes
are modified.
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patch.
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Here is a patch which slightly improves the i386 interrupt handling
macros. These macros were written to use both input and output
parameters, which is not necessary. This patch changes them to use
only an input or output parameter, as appropriate. It also changes
the constraints to permit the interrupt level to be loaded directly in
and out of memory, rather than always requiring a register.
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You will find enclosed a patch which contains, for Intel PC386 target :
- an Ethernet driver for DEC21140 device based boards.
- a simple cache management with paging mechanism.
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Enabled on the pc386.
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Here is a enhanced version of my previous patch. This patch enables
to potentially share the new interrupt management code for all Intel targets
(pc386, go32 and force386) bsp.
Note : this patch is complete only for pc386. It still needs to
be completed for go32 and force386. I carrefully checked
that anything needed is in for force386 (only some function
name changes for IDT manipulation and GDT segment
manipulation). But anyway I will not be able to test any
of theses targets...
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