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authorJoel Sherrill <joel.sherrill@OARcorp.com>1998-08-05 15:15:46 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1998-08-05 15:15:46 +0000
commitab0df696d09f6b53b33345d207f8aead63a6fcab (patch)
treee446f792382e49b1169482837cd842a82fb2350b /c/src/lib/libcpu/i386/cpu.h
parentFixed name of Buffer so this would compile. (diff)
downloadrtems-ab0df696d09f6b53b33345d207f8aead63a6fcab.tar.bz2
Automatic CPU type detection code from Eric Valette <valette@crf.canon.fr>.
Enabled on the pc386.
Diffstat (limited to 'c/src/lib/libcpu/i386/cpu.h')
-rw-r--r--c/src/lib/libcpu/i386/cpu.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/c/src/lib/libcpu/i386/cpu.h b/c/src/lib/libcpu/i386/cpu.h
index cded552740..be25929a0e 100644
--- a/c/src/lib/libcpu/i386/cpu.h
+++ b/c/src/lib/libcpu/i386/cpu.h
@@ -18,8 +18,11 @@
* $Id$
*/
-#ifndef _i386_CPU_H
-#define _i386_CPU_H
+#ifndef _LIBCPU_i386_CPU_H
+#define _LIBCPU_i386_CPU_H
+
+#include <libcpu/registers.h>
+
#ifndef ASM
@@ -63,7 +66,7 @@
: "=r" ((_eflags)) : "0" ((_eflags)) \
); \
\
- _level = (_eflags & 0x0200) ? 0 : 1; \
+ _level = (_eflags & EFLAGS_INTR_ENABLE) ? 0 : 1; \
} while (0)
#define _CPU_ISR_Disable( _level ) i386_disable_interrupts( _level )