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* build: Remove old build systemSebastian Huber2021-09-211-71/+0
| | | | | Close #3250. Close #4081.
* bsps: Add default rtems_get_target_hash()Sebastian Huber2021-02-261-0/+1
| | | | Update #4267.
* bsp/riscv: Remove bogus Automake conditionalSebastian Huber2019-11-141-7/+0
| | | | Update #3785.
* riscv: Generate linkcmds.base from the shared linkcmds.base.inHesham Almatary2019-10-271-1/+1
| | | | | This commit moves the existing linkcmds.base to linkcmds.base.in in order to make it configurable by autotools.
* riscv: add freedom E310 Arty A7 bspPragnesh Patel2019-10-231-0/+8
| | | | | | | Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board. Update #3785. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
* riscv: add griscv bspJiri Gaisler2019-01-221-2/+2
| | | | Update #3678.
* build: Remove local.amSebastian Huber2018-10-101-1/+0
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* bsp/riscv: Use CPU counter btimerSebastian Huber2018-07-251-1/+1
| | | | Update #3433.
* bsp/riscv: Add basic SMP startupSebastian Huber2018-07-251-1/+1
| | | | Update #3433.
* bsps/riscv: Update linker-symbols.hSebastian Huber2018-07-251-1/+0
| | | | Update #3433.
* riscv: Rework exception handlingSebastian Huber2018-07-251-1/+1
| | | | | | | | | | | Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector() functions. Applications can install an exception handler via the fatal error handler to handle synchronous exceptions. Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must be provided by the BSP. Update #3433.
* bsp/riscv: Add device tree support for consoleSebastian Huber2018-06-281-5/+4
| | | | Update #3433.
* bsp/riscv: Add device tree supportSebastian Huber2018-06-281-0/+1
| | | | Update #3433.
* riscv: Add dummy SMP supportSebastian Huber2018-06-281-0/+3
| | | | Update #3433.
* bsp/riscv_generic: Rename to "riscv"Sebastian Huber2018-06-271-0/+68
Update #3433.
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-22 17:35:23 +0000