summaryrefslogtreecommitdiffstats
path: root/bsps (follow)
Commit message (Collapse)AuthorAgeFilesLines
* bsps: Change license to BSD-2-Clause of some filesSebastian Huber2021-02-245-37/+167
| | | | | | | Change license to BSD-2-Clause according to file histories and re-licensing agreement. Update #3899.
* grspw_pkt.c: Fix Dereference before null check (CID #1399846)Ryan Long2021-02-191-1/+3
| | | | | | CID 1399846: Dereference before null check in grspw_addr_ctrl(). Closes #4253
* grtc.c: Fix Dereference before null check (CID #1399840)Ryan Long2021-02-191-1/+3
| | | | | | CID 1399840: Dereference before null check in grtc_ioctl(). Closes #4252
* b1553rt.c: Fix Deference before null check (CID #1399830)Ryan Long2021-02-191-1/+3
| | | | | | CID 1399830: Dereference before null check in rt_control(). Closes #4251
* b1553brm.c: Fix Dereference before null check (CID #1399829)Ryan Long2021-02-191-2/+5
| | | | | | CID 1399829: Dereference before null check in brm_control(). Closes #4250
* powerpc/motorola_powerpc: Add cache coherent memory to the allocatorChris Johns2021-02-161-0/+6
| | | | | Updates #4245 Updates #4243
* powerpc/motorola_powerpc: Enable bus PCI support in LibBSDChris Johns2021-02-161-0/+4
| | | | Updates #4245
* powerpc/io: Make [out/in] le and be calls conditionalChris Johns2021-02-161-0/+8
| | | | | | | | - These calls clash with the Linux IO header in LibBSD. Making these conditional here means BSPs build and the imported Linux header is untouched. Updates #4245
* powerpc/shared: Fix warnings in i8259 PIC code.Chris Johns2021-02-161-6/+0
|
* powerpc/shared: Fix warningsChris Johns2021-02-163-10/+16
|
* powerpc/motorola_powerpc: Fix tm27 warningsChris Johns2021-02-161-8/+16
|
* Update motorola_power to irq-generic interrupt managementChris Johns2021-02-137-55/+283
| | | | | | | | | | | | | | - Add support to the BSP to enable irq-generic management - Update the powerpc shared irq code to support irq-generic. This is an opt in option for existing powerpc bsps. This change should be simpler now - Fix a number of issues in ISA IRQ controller handling by porting fixes from the i386 (PC) BSP Closes #4238 Closes #4239
* bsp/riscv: Re-license to BSD-2-ClauseSebastian Huber2021-02-091-10/+37
| | | | | | Change license to BSD-2-Clause according to file history. Update #3053.
* bsps/shared/ofw: Bug fixesG S Niteesh Babu2021-02-081-3/+3
| | | | | Fixed bugs in rtems_ofw_get_prop, rtems_ofw_get_prop_len and removed hardcoded value.
* bsps/shared/ofw: Make rtems_ofw_get_effective_phandle iterativeG S Niteesh Babu2021-02-081-4/+5
| | | | | Refactored recursive rtems_ofw_get_effective_phandle into a iterative function.
* bsps/shared/ofw: Use strlcpy instead of strncpyG S Niteesh Babu2021-02-081-1/+9
| | | | | Changed rtems_ofw_get_prop to use strlcpy instead of strncpy to ensure the buffer is null terminated incase of overflow.
* bsps/shared/ofw: Fix coverity reported defectsG S Niteesh Babu2021-02-081-5/+5
| | | | | | | | | | | | | | | Fixed use after free and null pointer dereference defects FIXES: 1) CID 1472601 (NULL_RETURNS) 2) CID 1472600 (USE_AFTER_FREE) 3) CID 1472599 (USE_AFTER_FREE) 4) CID 1472598 (USE_AFTER_FREE) 5) CID 1472596 (USE_AFTER_FREE) The below two defects have to marked false positive 1) CID 1472597 (ARRAY_VS_SINGLETON) 2) CID 1472595 (ARRAY_VS_SINGLETON)
* bsp/motorola_powerp: Print RTEMS_VERSION from the bootloaderChris Johns2021-02-081-1/+3
|
* powerpc/shared: ISA bus bridge fails to enable the openpic irqChris Johns2021-02-082-2/+2
| | | | | | | | | | - The call to enable the openpic irq for the ISA bridge fails because the IRQ used is offset by the ISA bus signals and the openpic call expects an IRQ relative to its signals. - Add the MVME 2600/2700 to the list of boards with an ISA bridge. Closes #4231
* bsp/leon3: Improve printk() supportSebastian Huber2021-02-011-40/+52
| | | | | | | | Use the idle stack to buffer early uses of printk(). Print the buffered characters during initialization when the UART is available and before the idle stack is used normally. This fix relates to a Coverity issue (PW.SET_BUT_NOT_USED).
* bsp/leon3: Fix incompatible function typesSebastian Huber2021-02-011-4/+6
| | | | This fix relates to a Coverity issue (PW.INCOMPATIBLE_PARAM).
* bsp/leon3: Fix bsp_fatal_extension) indentationSebastian Huber2021-02-011-15/+13
| | | | | | Remove superfluous include. Fix comment formatting. This fix relates to a Coverity issue (NESTING_INDENT_MISMATCH).
* bsps/aarch64: Add missing includeSebastian Huber2021-01-281-0/+1
| | | | | | | | | Fixes: bsps/shared/dev/irq/arm-gicv2.c:53:6: warning: no previous prototype for 'bsp_interrupt_dispatch' [-Wmissing-prototypes] Close #4227.
* bsp/leon3: Simplify bsp_interrupt_is_valid_vector()Sebastian Huber2021-01-281-5/+5
| | | | | | | There is not need to check that vector >= BSP_INTERRUPT_VECTOR_MIN since BSP_INTERRUPT_VECTOR_MIN is zero and vector is unsigned. This fix relates to CID 1399742 (NO_EFFECT).
* bsps: Replace bsp_specs with an empty fileSebastian Huber2021-01-2885-772/+0
| | | | | | | This fixes an issue with the latest tool chain which adds the default linker script in the endfile specification. Update #3250.
* cacheimpl.h: Avoid potential dead codeSebastian Huber2021-01-271-12/+11
| | | | | | | If CPU_DATA_CACHE_ALIGNMENT == CPU_INSTRUCTION_CACHE_ALIGNMENT we had dead code with the previous implementation. This fix relates to CID 1399776 (DEADCODE).
* bsps: Add missing DWARF 5 sectionsSebastian Huber2021-01-266-18/+30
| | | | Sort alphabetically.
* bsps: Support DWARF 5 sectionsSebastian Huber2021-01-256-60/+95
| | | | GCC 11 uses DWARF 5 by default.
* bsp/imx: Fix system counter init for imx6Christian Mauderer2021-01-211-1/+60
| | | | | | | | | For i.MX7 U-Boot initializes the system counter. On i.MX6 Barebox is often used which doesn't initialize the counter. With this patch, we try to auto-detect whether the counter is initialized or not and do the initialization ourself if necessary. Closes #3869
* bsps/imxrt: Add ioctl to LPSPI to get registersChristian Mauderer2021-01-212-0/+74
| | | | | | | | This allows an application to get the registers of the LPSPI. That is usefull for applications that want to use DMA for a very specialized and highly optimized communication. Update #4180
* bsps/imxrt: Add DMA numbers to dtsiChristian Mauderer2021-01-212-478/+604
| | | | | | | Also currently no driver uses these numbers, it is usefull for applications that want to use the DMA. Update #4180
* bsps/shared: Adapt fsl-edma driver for imxrtChristian Mauderer2021-01-214-824/+723
| | | | | | | | | | Note: The changes have been done with portability in mind. The driver should (in theory) be able to replace the original one in the MPC BSPs too. For full compatibility an adaption layer and especially a test would be necessary. Because both are missing, don't integrate it into the MPC BSP now. Update #4180
* bsps/shared: Copy fsl-edma from mpc55xxChristian Mauderer2021-01-213-0/+1368
| | | | | | This is a preparation for making the driver universal. Update #4180
* bsps/imxrt: Use standard names to avoid warningsChristian Mauderer2021-01-212-106/+103
| | | | | | | If spi or i2c slaves are "connected" to the spi or i2c bus, the device tree compiler complains if the busses are not named spi or i2c. Update #4180
* bsps/aarch64: Swap primary ZynqMP UARTKinsey Moore2021-01-142-4/+4
| | | | | Both Qemu and actual hardware treat the second UART in memory map as the primary UART. This adjusts the ZynqMP BSPs to match.
* bsp/stm32h7: Split console configurationSebastian Huber2021-01-0421-150/+498
| | | | | | | This allows applications to individually provide configuration structures. Update #4209.
* bsp/stm32h7: Split start configurationSebastian Huber2021-01-045-38/+166
| | | | | | | This allows applications to individually provide configuration structures. Update #4209.
* bsps/shared/ofw: Implement RTEMS OFW interfaceG S Niteesh Babu2020-12-274-0/+1348
| | | | | | | | | | | | | | RTEMS OFW is a FDT only implementation of the OpenFirmWare interface. This API is created to be compatible with FreeBSD OpenFirmWare interface. The main intention is to make porting of FreeBSD drivers to RTEMS easier. Most functions implemented have an direct one-one mapping with the original OFW API and some extra auxiliary functions were implemented to make working with device trees easier in RTEMS. Update #3784
* Update header.amSebastian Huber2020-12-234-8/+19
|
* arm/fvp: New BSPSebastian Huber2020-12-2311-0/+694
| | | | | | | | This BSP supports the Arm Fixed Virtual Platform. Only the Cortex-R52 processor configuration is supported by the BSP. It should be easy to add support for other variants if needed. Update #4202.
* bsps/arm: Rely on initialized vector tableSebastian Huber2020-12-231-5/+4
| | | | | | | The arm_cp15_set_exception_handler() is a complicated function which should be avoided if possible. Update #4202.
* bsps: Use header file for GIC architecture supportSebastian Huber2020-12-235-19/+34
| | | | | | This avoids a function call overhead in the interrupt dispatching. Update #4202.
* bsps/arm: Invalidate TLB in start.SSebastian Huber2020-12-235-15/+10
| | | | Update #4202.
* bsps/arm: Clear SCTLR[M, I, A, C] in start.SSebastian Huber2020-12-235-119/+43
| | | | | | | Initialize the data and unified cache levels. Invalidate the instruction cache levels. Update #4202.
* bsps/arm: Add arm-data-cache-loop-set-way.hSebastian Huber2020-12-232-62/+105
| | | | | | This makes it possible to reuse this loop. Update #4202.
* bsps/arm: Remove optional start hook argumentsSebastian Huber2020-12-232-48/+28
| | | | | | | The start hook arguments are not used by a BSP. Removing them avoids the need for a stack during the very early system initialization. Update #4202.
* bsps/arm: Invalidate branch predictors earlierSebastian Huber2020-12-235-5/+11
| | | | | | | Make sure the branch predictors are invalidated before the first branch is executed. Update #4202.
* bsps/arm: Set VBAR in start.SSebastian Huber2020-12-2310-93/+34
| | | | | | | | | | Set the VBAR to the vector table in the start section before bsp_start_hook_0() is called to earlier handle exceptions in RTEMS. Set the VBAR to the normal vector table in start.S for the main processor. Secondary processors set it in bsp_start_hook_0(). Update #4202.
* bsps: Fix includesSebastian Huber2020-12-222-1/+6
| | | | Update #4202.
* bsps: Remove gicvx_interrupt_dispatch()Sebastian Huber2020-12-165-18/+2
| | | | | | Avoid one level of indirection. Update #4202.