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* bsps: Default to CPU counter benchmark timerSebastian Huber2022-01-151-30/+0
| | | | | | Most BSPs which used the stubbed benachmark timer provide a CPU counter. All BSPs provide at least a stub CPU counter. Simply use the benchmark timer implementation using the CPU counter.
* aarch64: always boot into EL1NSGedare Bloom2022-01-123-32/+32
| | | | | | | | | | | Always start the executive in Exception Level 1, Non-Secure mode. If we boot in EL3 Secure with GICv3 then we have to initialize the distributor and redistributor to set up G1NS interrupts early in the boot sequence before stepping down from EL3S to EL1NS. Now there is no need to distinguish between secure and non-secure world execution after the primary core boots, so get rid of the AARCH64_IS_NONSECURE configuration option.
* arm/gicv3: refactor DIST initialization to helperGedare Bloom2022-01-121-31/+29
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* bsps/aarch64: refactor register init and hooksGedare Bloom2022-01-122-45/+48
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* Fix device tree blob alignmentSebastian Huber2022-01-111-4/+4
| | | | A device tree blob must be aligned on an 8-byte boundary.
* bsp/qoriq: Implement Interrupt Manager directivesSebastian Huber2022-01-111-24/+77
| | | | Update #3269.
* bsp/mrm332: Fix TLS support in linker command fileSebastian Huber2021-12-221-10/+6
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* Remove powerpc/haleakala boardJoel Sherrill2021-12-1713-1841/+0
| | | | Closes #4302.
* bsp/leon3: Do not invalidate cache in SMP startSebastian Huber2021-12-131-1/+1
| | | | | Since the trap table is now statically initialized, there is no need to invalidate the instruction cache.
* bsp/leon3: Use interrupt entry for tm27 supportSebastian Huber2021-12-131-20/+57
| | | | | | | | | | Using rtems_interrupt_entry_install() instead of rtems_interrupt_handler_install() avoids a dependency on the dynamic memory allocation. Use Interrupt Manager directives instead of a BSP-specific API. Use inline functions. In SMP configurations, set an affinity to all online processors and raise the interrupt on the current processor.
* bsp/leon3: Use interrupt entry for the SMP supportSebastian Huber2021-12-131-4/+9
| | | | | | Using rtems_interrupt_entry_install() instead of rtems_interrupt_handler_install() avoids a dependency on the dynamic memory allocation.
* bsp/leon3: Use interrupt entry for Clock DriverSebastian Huber2021-12-131-4/+10
| | | | | | Using rtems_interrupt_entry_install() instead of rtems_interrupt_handler_install() avoids a dependency on the dynamic memory allocation.
* bsps/aarch64: Support .noinit linker sectionSebastian Huber2021-12-131-0/+7
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* bsps/aarch64: Remove erroneous cache featureKinsey Moore2021-12-121-2/+0
| | | | | | | | | | The AArch64 cache implementation does not define rtems_cache_disable_data(), but declares that it does via CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA. The existing implementation of _CPU_cache_disable_data() is sufficient to enable this functionality without the erroneous cache feature flag. Closes #4569
* libc: Optimize malloc() initializationSebastian Huber2021-11-302-0/+98
| | | | | | | | | | | | | | | | The BSPs provide memory for the separate C Program Heap initialization via _Memory_Get(). Most BSPs provide exactly one memory area. Only two BSPs provide more than one memory area (arm/altera-cyclone-v and bsps/powerpc/mpc55xxevb). Only if more than one memory area is provided, there is a need to use _Heap_Extend(). Provide two implementations to initialize the separate C Program Heap and let the BSP select one of the implementations based on the number of provided memory areas. This gets rid of a dependency on _Heap_Extend(). It also avoids dead code sections for most BSPs. Change licence to BSD-2-Clause according to file history. Update #3053.
* score: Optimize Workspace Handler initializationSebastian Huber2021-11-302-0/+92
| | | | | | | | | | | | The BSPs provide memory for the workspace initialization via _Memory_Get(). Most BSPs provide exactly one memory area. Only two BSPs provide more than one memory area (arm/altera-cyclone-v and bsps/powerpc/mpc55xxevb). Only if more than one memory area is provided, there is a need to use _Heap_Extend(). Provide two implementations to initialize the workspace handler and let the BSP select one of the implementations based on the number of provided memory areas. This gets rid of a dependency on _Heap_Extend(). It also avoids dead code sections for most BSPs.
* bsp_specs: Delete last remnants of these.Joel Sherrill2021-11-2985-0/+0
| | | | Updates #3937.
* bsps/aarch64: Restore interrupt nestingKinsey Moore2021-11-101-1/+3
| | | | | Fixing the debug mask flag broke nested interrupts. This restores that functionality.
* cpukit/aarch64: Add libdebugger supportKinsey Moore2021-11-011-0/+11
| | | | | | This adds support for libdebugger under AArch64 using software breakpoints and the single-step execution mode present in all AArch64 CPUs.
* bsps/aarch64: Mask debug events from startupKinsey Moore2021-11-011-2/+2
| | | | | | Debug events should be masked at least until after the first context switch and should usually be masked until a debugger is attached for application debugging.
* bsps/aarch64: Set interrupt level correctlyKinsey Moore2021-11-011-1/+1
| | | | | | The existing code is functional but inccorrect and blindly modifies the other masking bits. It is important to preserve those other bits since they control masking of important system events.
* bsps/aarch64: Add missing MMU map recursion checkKinsey Moore2021-11-011-0/+9
| | | | | | | Certain input parameters for MMU mapping operations could cause an infinite recursion if block end boundaries didn't align to 4k. This ensures that recursion descent does not exceed 2 levels and instead rounds up to the nearest 4k block if necessary.
* aarch64: Break out MMU definitionsKinsey Moore2021-11-015-39/+121
| | | | | | This moves the AArch64 MMU memory type definitions into cpukit for use by libdebugger since remapping of memory is required to insert software breakpoints.
* microblaze: Rework for RTEMS 6Alex White2021-10-1324-0/+2171
| | | | | This reworks the existing MicroBlaze architecture port and BSP to achieve basic functionality using the latest RTEMS APIs.
* bsp/imx: Add cs_change support to SPIChristian Mauderer2021-10-061-4/+6
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* cpukit: Add AArch64 SMP SupportKinsey Moore2021-09-217-26/+165
| | | | This adds SMP support for AArch64 in cpukit and for the ZynqMP BSPs.
* bsps/gicv2: Allow BSPs to define IRQ attributesKinsey Moore2021-09-213-34/+180
| | | | | | | ARM's GICv2 is configurable and its attributes vary between implementations including omission of specific interrupts. This allows BSPs to accomodate those varying implementations with customized attribute sets.
* bsps/zynqmp: Use correct number of interruptsKinsey Moore2021-09-211-1/+1
| | | | | GICv2 can support up to 1024 interrupts, but ZynqMP hardware is only configured for 192 interrupts.
* bsps/shared: Add PSCI SMP startup supportKinsey Moore2021-09-211-0/+92
| | | | | | | | This adds the SMP function that supports spinup of additional CPU cores using the ARM standard PSCI inteface. This interface is provided by QEMU as well as ARM Trusted Firmware running in monitor mode (EL3) on ARMv7 and AArch64 CPUs. This supports activation va SMC or HVC instructions depending on BSP configuration.
* build: Remove old build systemSebastian Huber2021-09-21117-3065/+0
| | | | | Close #3250. Close #4081.
* powerpc/motorola_powerpc: Map LibBSD bus space to the PCI base addressChris Johns2021-09-191-3/+29
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* arm/xilinx: Fix zynq-uart interrupt receiveChris Johns2021-09-163-57/+67
| | | | | | | | - Trigger on a single character entering the RX FIFO - Disable the RX timeout - Send up to a FIFO full of data
* bsps/zynqmp: Added I2C support for ZynqMPStephen Clark2021-09-094-0/+80
| | | | Added I2C drivers for ZynqMP and updated build system accordingly.
* bsps/zynq: Moved general i2c files to shared directoriesStephen Clark2021-09-093-2/+2
| | | | | Certain files related to the Zynq BSP's I2C driver are useable by the ZynqMP BSP as well. Moved these files to shared directory in anticipation of I2C support for ZynqMP.
* score: Change TOD_LATEST_YEAR to 2099Sebastian Huber2021-09-061-7/+2
| | | | | | | | This simplifies the implementation a bit. Declare _TOD_Days_to_date[] in <rtems/score/todimpl.h>. Make _TOD_Days_per_month[] and _TOD_Days_since_last_leap_year[] static. Update #4338.
* bsps/leon3: Rename fatal error codeSebastian Huber2021-09-022-2/+2
| | | | | | Rename LEON3_FATAL_INVALID_CACHE_CONFIG_MAIN_PROCESSOR in LEON3_FATAL_INVALID_CACHE_CONFIG_BOOT_PROCESSOR since the term "boot processor" is used elsewhere in the code base.
* bsps/imxrt: Improve SPI driverChristian Mauderer2021-09-021-73/+124
| | | | | | | | It wasn't possible to keep the CS line low between multiple message descriptors in one transfer. This patch reworks the driver so that it is possible. Update #4180
* aarch64/versal: Enable TX and RX FIFOsChris Johns2021-08-191-5/+8
| | | | - Wait for the tx holding register to empty in a tx flush
* bsps/raspberrypi: Add SEV Instruction for RPi SMP firmware changes.pranav2021-08-181-0/+1
| | | | | | The Pi firmware added a wfe(wait for event), the cores 1-3 wait for the start address being written to the mailbox register, followed by a SEV poke to the mailbox that acts as a wfe wake-up event.
* bsp/leon3: Fix rtems_interrupt_is_pending()Sebastian Huber2021-08-121-6/+0
| | | | | | Take the interrupt force register into account in all configurations. Update #3269.
* bsps/arm: More robust SMP startSebastian Huber2021-08-123-11/+16
| | | | | Do not continue execution on processors which are not configured to prevent the use of arbitrary memory for the initialization stack.
* bsps/cache: Optimize smp_cache_broadcast()Sebastian Huber2021-07-291-1/+2
| | | | | Directly call the handler on the executing processor instead of doing this indirectly via a per-CPU job.
* score: Canonicalize _CPU_Fatal_halt()Sebastian Huber2021-07-285-35/+25
| | | | | | | | Move _CPU_Fatal_halt() declaration to <rtems/score/cpuimpl.h> and make sure it is a proper declaration of a function which does not return. Fix the type of the error code. If necessary, add the implementation to cpu.c. Implementing _CPU_Fatal_halt() as a function makes it possible to wrap this function for example to fully test _Terminate().
* bsps/irq: bsp_interrupt_facility_initialize()Sebastian Huber2021-07-2736-148/+90
| | | | | | Do not return a status code in bsp_interrupt_facility_initialize() since this leads to unreachable code in bsp_interrupt_initialize(). Use RTEMS_DEBUG assertions in bsp_interrupt_facility_initialize() if necessary.
* bsp/raspberrypi: Add interrupt get/set affinitySebastian Huber2021-07-261-0/+26
| | | | | | | | Add default implementations for bsp_interrupt_get_affinity() and bsp_interrupt_set_affinity() which are required to link all tests in SMP configurations. Update #3269.
* bsps/irq: Add rtems_interrupt_entry_install()Sebastian Huber2021-07-2611-523/+669
| | | | | | | | | | | | | | | | | | | Add rtems_interrupt_entry_remove(). Split up irq-generic.c into several files. In particular, place all functions which use dynamic memory into their own file. Add optional macros to let the BSP customize the vector installation after installing the first entry and the vector removal before removing the last entry: * bsp_interrupt_vector_install() * bsp_interrupt_vector_remove() Use these new customization options in the m68k/genmcf548x BSP so re-use the generic interrupt controller support. Update #3269.
* bsps/irq: Move bsp_interrupt_handler_is_empty()Sebastian Huber2021-07-263-30/+11
| | | | | | This function is only used by one BSP. Update #3269.
* bsps/irq: Add bsp_interrupt_check_and_lock()Sebastian Huber2021-07-263-63/+86
| | | | | | | | Return RTEMS_INCORRECT_STATE instead of RTEMS_INTERNAL_ERROR in case the interrupt support is not initialized. This is similar to rtems_timer_server_fire_after() for example. Update #3269.
* bsps/irq: Use rtems_interrupt_entrySebastian Huber2021-07-263-25/+16
| | | | Update #3269.
* sparc/irq: Implement new interrupt directivesSebastian Huber2021-07-266-22/+162
| | | | Update #3269.
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