diff options
| author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2021-10-25 09:53:44 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2021-11-01 08:39:00 -0500 |
| commit | 2d27725838c7e61abf092e8ca8a89f17a35cc6bf (patch) | |
| tree | c722289673c38aeeed22461558051044c13d26f6 /bsps | |
| parent | bsps/aarch64: Add missing MMU map recursion check (diff) | |
| download | rtems-2d27725838c7e61abf092e8ca8a89f17a35cc6bf.tar.bz2 | |
bsps/aarch64: Set interrupt level correctly
The existing code is functional but inccorrect and blindly modifies the
other masking bits. It is important to preserve those other bits since
they control masking of important system events.
Diffstat (limited to 'bsps')
| -rw-r--r-- | bsps/aarch64/include/dev/irq/arm-gic-arch.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/bsps/aarch64/include/dev/irq/arm-gic-arch.h b/bsps/aarch64/include/dev/irq/arm-gic-arch.h index 0911320851..049a1c8555 100644 --- a/bsps/aarch64/include/dev/irq/arm-gic-arch.h +++ b/bsps/aarch64/include/dev/irq/arm-gic-arch.h @@ -49,7 +49,7 @@ extern "C" { static inline void arm_interrupt_handler_dispatch(rtems_vector_number vector) { uint32_t interrupt_level = _CPU_ISR_Get_level(); - AArch64_interrupt_enable(1); + _CPU_ISR_Set_level(1); bsp_interrupt_handler_dispatch(vector); _CPU_ISR_Set_level(interrupt_level); } |