| Commit message (Collapse) | Author | Age | Files | Lines |
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Directly use "static inline" which is available in C99 and later. This brings
the RTEMS implementation closer to standard C.
Close #3935.
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Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support
is implemented as a riscv BSP. Both 32-bit and 64-bit processor
systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP
is described here:
https://www.gaisler.com/NOELV
Compatible with the following NOEL-V FPGA example design ranges
available from Cobham Gaisler. Follow the links for free
bit-streams, DTS/DTB, user's manuals and quick-start guides:
- NOEL-ARTYA7-EX (https://www.gaisler.com/NOEL-ARTYA7)
- NOEL-PF-EX (https://www.gaisler.com/NOEL-PF)
- NOEL-XCKU-EX (https://www.gaisler.com/NOEL-XCKU)
Uses the shared GRLIB APBUART console driver "apbuart_termios.c".
APBUART devices are probed using device tree.
Closes #4225.
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- Support DDRMC0 region 0 up to 2G in size
- Support DDRMC0 region 1 with DDR memory greater than 2G
up to the DDRMC0 max amount
- Extend the heap with region 1's memory
Closes #4684
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This alters the AArch64 page table generation and mapping code and MMU
configuration to use page table level 0 in addition to levels 1, 2, and
3. This allows the mapping of up to 48 bits of memory space and is the
maximum that can be mapped without relying on additional processor
extensions. Mappings are restricted based on the number of physical
address bits that the CPU supports.
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Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1
enable registers. This fixes the build for the AArch32 target.
Add BSP options which define the initial values of CPU Interface registers.
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Updates #3053.
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RTEMS runs at EL1 and the removed register accesses are for
EL3 or the TF-A. This change aligns our driver with the Linux
and FreeBSD ones.
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Add Doxygen documentation. Change license to BSD-2-Clause according
to file history.
Update #3053.
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Replace Doxygen documentation. Change license to BSD-2-Clause according
to file history.
Update #3053.
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Make the processor index a parameter.
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Make the distributor register block a parameter.
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Separate the Interrupt Manager implementation from the generic Arm GICv3
support. Move parts of the Arm GICv3 support into a new header file. This
helps to support systems with a clustered structure in which multiple GICv3
instances are present. For example, two clusters of two Cortex-R52 cores where
each cluster has a dedicated GICv3 instance.
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Update #4625
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Updates #4625.
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Updates #4625.
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Updates #4625.
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Updates #4625.
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Updates #4625.
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This reworks the existing MicroBlaze architecture port and BSP to
achieve basic functionality using the latest RTEMS APIs.
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- Trigger on a single character entering the RX FIFO
- Disable the RX timeout
- Send up to a FIFO full of data
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Certain files related to the Zynq BSP's I2C driver are useable by the ZynqMP BSP as well.
Moved these files to shared directory in anticipation of I2C support for ZynqMP.
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Rename LEON3_FATAL_INVALID_CACHE_CONFIG_MAIN_PROCESSOR in
LEON3_FATAL_INVALID_CACHE_CONFIG_BOOT_PROCESSOR since the term
"boot processor" is used elsewhere in the code base.
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Do not return a status code in bsp_interrupt_facility_initialize() since this
leads to unreachable code in bsp_interrupt_initialize(). Use RTEMS_DEBUG
assertions in bsp_interrupt_facility_initialize() if necessary.
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Add rtems_interrupt_entry_remove(). Split up irq-generic.c into several files.
In particular, place all functions which use dynamic memory into their own
file.
Add optional macros to let the BSP customize the vector installation after
installing the first entry and the vector removal before removing the last
entry:
* bsp_interrupt_vector_install()
* bsp_interrupt_vector_remove()
Use these new customization options in the m68k/genmcf548x BSP so re-use the
generic interrupt controller support.
Update #3269.
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This function is only used by one BSP.
Update #3269.
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Return RTEMS_INCORRECT_STATE instead of RTEMS_INTERNAL_ERROR in case the
interrupt support is not initialized. This is similar to
rtems_timer_server_fire_after() for example.
Update #3269.
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Update #3269.
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Update #3269.
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Return a status code for bsp_interrupt_set_affinity().
Update #3269.
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Return a status code for bsp_interrupt_get_affinity().
Update #3269.
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Return a status code for bsp_interrupt_vector_disable().
Update #3269.
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Return a status code for bsp_interrupt_vector_enable().
Update #3269.
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Add a default implementation which just returns RTEMS_UNSATISFIED.
Update #3269.
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Add a default implementation which clears the attributes to zero and
just returns RTEMS_SUCCESSFUL for valid parameters.
Update #3269.
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Add rtems_interrupt_raise_on() and rtems_interrupt_clear().
Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.
Update #3269.
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Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.
Update #3269.
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Update #3269.
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Move the moduleid register to the correct offset according to Cadence IP
documentation.
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Add bsp_interrupt_handler_dispatch_unchecked() as an alternative to
bsp_interrupt_handler_dispatch(). It may be used if the caller can ensure that
the vector number is valid.
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