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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-03-14 16:53:18 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-04-06 09:48:52 +0200 |
commit | 0725b200e7e624733e8dbea5a8ed4251ba73a50e (patch) | |
tree | 9dfc2da1703cf98820490ab7105f4a2e427db009 /bsps/include | |
parent | bsps: Add gicv3_sgi_ppi_get_priority() (diff) | |
download | rtems-0725b200e7e624733e8dbea5a8ed4251ba73a50e.tar.bz2 |
bsps: Add gicv3_get_attributes()
Diffstat (limited to 'bsps/include')
-rw-r--r-- | bsps/include/dev/irq/arm-gicv3.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/bsps/include/dev/irq/arm-gicv3.h b/bsps/include/dev/irq/arm-gicv3.h index 6a716894b4..0d3ef9a1c1 100644 --- a/bsps/include/dev/irq/arm-gicv3.h +++ b/bsps/include/dev/irq/arm-gicv3.h @@ -327,6 +327,38 @@ static void gicv3_init_cpu_interface(uint32_t cpu_index) WRITE_SR(ICC_CTLR, 0x0); } +static inline void gicv3_get_attributes( + rtems_vector_number vector, + rtems_interrupt_attributes *attributes +) +{ + attributes->is_maskable = true; + attributes->maybe_enable = true; + attributes->maybe_disable = true; + attributes->can_raise = true; + + if ( vector <= ARM_GIC_IRQ_SGI_LAST ) { + /* + * It is implementation-defined whether implemented SGIs are permanently + * enabled, or can be enabled and disabled by writes to GICD_ISENABLER0 and + * GICD_ICENABLER0. + */ + attributes->can_raise_on = true; + attributes->cleared_by_acknowledge = true; + attributes->trigger_signal = RTEMS_INTERRUPT_NO_SIGNAL; + } else { + attributes->can_disable = true; + attributes->can_clear = true; + attributes->trigger_signal = RTEMS_INTERRUPT_UNSPECIFIED_SIGNAL; + + if ( vector > ARM_GIC_IRQ_PPI_LAST ) { + /* SPI */ + attributes->can_get_affinity = true; + attributes->can_set_affinity = true; + } + } +} + #ifdef __cplusplus } #endif |