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authorSebastian Huber <sebastian.huber@embedded-brains.de>2022-03-14 15:49:25 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2022-04-06 09:48:52 +0200
commitf74b120c248b4979e6c73a3cee32beb0adb713a2 (patch)
tree708159112aefc75c2681402ebb83a68af2f1c537 /bsps/include
parentbsps: Add gicv3_sgi_ppi_is_enabled() (diff)
downloadrtems-f74b120c248b4979e6c73a3cee32beb0adb713a2.tar.bz2
bsps: Add gicv3_sgi_ppi_enable()
Diffstat (limited to 'bsps/include')
-rw-r--r--bsps/include/dev/irq/arm-gicv3.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/bsps/include/dev/irq/arm-gicv3.h b/bsps/include/dev/irq/arm-gicv3.h
index 8bfa34c11e..effa7a8ffb 100644
--- a/bsps/include/dev/irq/arm-gicv3.h
+++ b/bsps/include/dev/irq/arm-gicv3.h
@@ -156,6 +156,21 @@ static inline volatile gic_sgi_ppi *gicv3_get_sgi_ppi(uint32_t cpu_index)
((uintptr_t)BSP_ARM_GIC_REDIST_BASE + cpu_index * 0x20000 + 0x10000);
}
+static inline void gicv3_sgi_ppi_enable(
+ rtems_vector_number vector,
+ uint32_t cpu_index
+)
+{
+ volatile gic_sgi_ppi *sgi_ppi = gicv3_get_sgi_ppi(cpu_index);
+
+ /* Set G1NS */
+ sgi_ppi->icspigrpr[0] |= 1U << vector;
+ sgi_ppi->icspigrpmodr[0] &= ~(1U << vector);
+
+ /* Set enable */
+ sgi_ppi->icspiser[0] = 1U << vector;
+}
+
static inline bool gicv3_sgi_ppi_is_enabled(
rtems_vector_number vector,
uint32_t cpu_index