| Commit message (Collapse) | Author | Age | Files | Lines |
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The pinctrl-0 of the video_mux might overwrite pin settings done by
other peripherals. Disabling it by default prevents unexpected pin
settings.
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With this, it is possible to use GPIOs as CS pins in the LPSPI. To avoid
additional complexity, the GPIOs will have the same limitations as the
native (hardware) CS pins.
The GPIO CS feature adds a number of extra code when starting SPI
transfers on this controller. Therefore it is possible to disable the
additional code by just setting the IMXRT_LPSPI_MAX_CS option to 0. In
that case only native CS pins are supported.
At the moment, this feature is only enabled on i.MXRT1166 by default
because it is not tested on i.MXRT1050. But it should work there too.
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The nocache-memory was set as device memory. It's not necessary to be
that strict. Set it to normal non-cacheable non-shareable memory
instead.
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Enable the USB modules in the FDT.
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The mcux-sdk tries to enable the USBPHY. But it uses the wrong register
for that. This patch fixes the bug.
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The BSP is for a custom i.MXRT1166 based board. At the moment, only the
cortex M7 is supported.
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The flash configuration is something very board specific. So move the
file to a board specific location. Beneath that, not all controllers and
configurations need the flash config right at the address 0 of the
flash. For example on the i.MXRT11xx, the config has an offset for some
flash types.
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According to the reference manual the bits exist and they can be used.
Also confirmed by NXP support in the community forum:
https://community.nxp.com/t5/i-MX-RT/i-MXRT1160-LPSPI-HREQ-supported/m-p/1668647#M25512
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The function returned a multiplexer value instead of the frequency.
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Move the files that are board specific and not specific to the chip
family into a separate folder.
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Some parts of the startup code don't apply for all chips. Make that part
chip specific.
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The different variants of the i.MXRT have some minimal differences in
the fsl_flexspi_nor_config.h. Make sure that the header supports the
different chips.
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The defines for the different clock frequencies in the
fsl_clock_config.h do not represent the clock frequencies that have been
set up in the registers. Remove them to avoid someone trusting in
correct values.
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The mcux_sdk has a different interface for getting the clock for
IMXRT11xx than for getting it in IMXRT10xx. Adapt simple drivers to
support that interface.
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Remove the old NXP MCUXpresso SDK and adapt the BSP so that it uses the
new mcux-sdk.
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Reapply patches used in the old version of the NXP library and apply
patches necessary for the new version of the library.
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This imports new files from the mcux-sdk support library. NXP now offers
the library as a git repository instead of a zip package. The git
repository supports multiple CPUs from the i.MXRT family:
https://github.com/nxp-mcuxpresso/mcux-sdk.git
The imported files are from revision
2b9354539e6e4f722749e87b0bdc22966dc080d9
This revision is the same as MCUXpresso 2.13.0 with small bug fixes.
For importing the files, a script has been used, that parses the
mcux-sdk cmake files and creates the yaml files for RTEMS:
https://raw.githubusercontent.com/c-mauderer/nxp-mcux-sdk/d21c3e61eb8602b2cf8f45fed0afa50c6aee932f/export_to_RTEMS.py
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The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.
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Due to API change, the patch also fixes affected BSPs and uses
value provided by MPU CTRL spec option there.
Sponsored-By: Precidata
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Updates #3053.
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Updates #4625.
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A device tree binary has to be 8 byte aligned in memory. This is checked
since RTEMS commit 34052ef78cf8724dee73e9279b2c6bff8cfed234 "libfdt: Add
FDT alignment check to fdt_check_header()".
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It wasn't possible to keep the CS line low between multiple message
descriptors in one transfer. This patch reworks the driver so that it is
possible.
Update #4180
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Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes
it simpler to support other types of external RAM. This patch also
removes some of the calculations and improves names and documentation to
avoid pitfalls. It removes a unnecessary memory definition.
Update #4180
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Update #4180
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This define is no longer used.
Update #3269.
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Assert BSP_INTERRUPT_VECTOR_MAX + 1 == BSP_INTERRUPT_VECTOR_COUNT.
After building all BSPs with this patch, BSP_INTERRUPT_VECTOR_MAX can be
removed and replaced by BSP_INTERRUPT_VECTOR_COUNT. The
BSP_INTERRUPT_VECTOR_COUNT allows a default implementation which supports no
interrupt vector at all. Using COUNT instead of MAX may avoid some
interpretation issues, for example is the maximum value a valid vector number
or not.
Update #3269.
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Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector
numbers start with zero.
The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit
and building all BSPs.
Update #3269.
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The EDMA is intialized so make sure the the clock is initialized too.
Update #4180
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The sizes are configurable via fuses or per software via some registers.
At the moment the registers are not changed. Changing the registers
destroys data stored in the RAM areas (like application code or data).
So either the fuses or some bootloader should be used to set them before
the application starts.
This also adds an OCRAM only linker command file.
Update #4180
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Add addresses and interrupts for most internal peripherals to the dts.
The additional aliases make it possible for an application to easily
access these informations.
Update #4180
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Remove symbols that would be necessary for overlays and decrease padding
that would be necessary for adding stuff during run-time.
Update #4180
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Update #4180
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Makes it simpler to access the QTMR in an application via a FDT name or
link in an application specific FDT entry.
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This allows an application to get the registers of the LPSPI. That is
usefull for applications that want to use DMA for a very specialized and
highly optimized communication.
Update #4180
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Also currently no driver uses these numbers, it is usefull for
applications that want to use the DMA.
Update #4180
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Note: The changes have been done with portability in mind. The driver
should (in theory) be able to replace the original one in the MPC BSPs
too. For full compatibility an adaption layer and especially a test
would be necessary. Because both are missing, don't integrate it into
the MPC BSP now.
Update #4180
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If spi or i2c slaves are "connected" to the spi or i2c bus, the device
tree compiler complains if the busses are not named spi or i2c.
Update #4180
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This allows simpler creation of own dts files for custom boards.
Update #4180
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Update #4180
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Update #4180
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Update #4180
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The following files have been imported:
cp ${SDK}/boards/evkbimxrt1050/project_template/clock_config.c nxp/boards/evkbimxrt1050
cp ${SDK}/boards/evkbimxrt1050/project_template/clock_config.h include/fsl_clock_config.h
cp ${SDK}/boards/evkbimxrt1050/project_template/dcd.c start/flash-dcd.c
cp ${SDK}/boards/evkbimxrt1050/project_template/pin_mux.c nxp/boards/evkbimxrt1050
cp ${SDK}/boards/evkbimxrt1050/project_template/pin_mux.h include/fsl_pin_mux.h
cp ${SDK}/boards/evkbimxrt1050/xip/evkbimxrt1050_flexspi_nor_config.h include/fsl_flexspi_nor_config.h
cp ${SDK}/devices/MIMXRT1052/MIMXRT1052.h include
cp ${SDK}/devices/MIMXRT1052/MIMXRT1052_features.h include
cp ${SDK}/devices/MIMXRT1052/drivers/fsl_*.c nxp/devices/MIMXRT1052/drivers
cp ${SDK}/devices/MIMXRT1052/drivers/fsl_*.h include
cp ${SDK}/devices/MIMXRT1052/fsl_device_registers.h include
cp ${SDK}/devices/MIMXRT1052/system_MIMXRT1052.h include/
cp ${SDK}/devices/MIMXRT1052/xip/fsl_flexspi_nor_boot.c nxp/devices/MIMXRT1052/xip/fsl_flexspi_nor_boot.c
cp ${SDK}/devices/MIMXRT1052/xip/fsl_flexspi_nor_boot.h include
Update #4180
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