| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
| |
This avoids a function call overhead in the interrupt dispatching.
Update #4202.
|
|
|
|
| |
Update #4202.
|
|
|
|
|
|
|
| |
Initialize the data and unified cache levels. Invalidate the
instruction cache levels.
Update #4202.
|
|
|
|
|
|
| |
This makes it possible to reuse this loop.
Update #4202.
|
|
|
|
|
|
|
| |
The start hook arguments are not used by a BSP. Removing them avoids
the need for a stack during the very early system initialization.
Update #4202.
|
|
|
|
|
|
|
| |
Make sure the branch predictors are invalidated before the first branch
is executed.
Update #4202.
|
|
|
|
|
|
|
|
|
|
| |
Set the VBAR to the vector table in the start section before
bsp_start_hook_0() is called to earlier handle exceptions in RTEMS.
Set the VBAR to the normal vector table in start.S for the main
processor. Secondary processors set it in bsp_start_hook_0().
Update #4202.
|
|
|
|
| |
Update #4202.
|
|
|
|
| |
Update #4202.
|
|
|
|
| |
Update #4202.
|
|
|
|
|
|
| |
This architecture variant has no MMU.
Update #4202.
|
|
|
|
| |
Update #4202.
|
|
|
|
|
|
| |
Avoid one level of indirection.
Update #4202.
|
|
|
|
| |
Update #4202.
|
| |
|
| |
|
|
|
|
| |
Update #4184.
|
|
|
|
|
|
|
|
| |
Somehow the table index has been missing in the latest patch version.
With that, the configuration for the first region has been applied
multiple times.
Update #4180
|
|
|
|
|
|
|
| |
When moving the headers from the imx BSP to the shared area, the wrong
directory has been selected. This patch fixes that problem.
Update #4180
|
|
|
|
|
|
| |
This allows simpler creation of own dts files for custom boards.
Update #4180
|
|
|
|
|
|
|
|
| |
This adds some commands that are usefull for debugging simple serial
interfaces.
Even if they are a complete re-implementation, the i2c* commands use a
simmilar call like the Linux i2c tools.
|
| |
|
| |
|
| |
|
| |
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Expressions in static assertions must be integral constant expressions. In
integral constant expressions the use of address constant expressions is not
allowed.
In static initializers the address constant expressions are allowed. Introduce
a new macro _CONFIGURE_ASSERT_NOT_NULL() which leads to a compile time error if
the second parameter is NULL. It generates error messages like this if for
example
#define CONFIGURE_INIT_TASK_ENTRY_POINT NULL
is provided by the application:
cpukit/include/rtems/confdefs/inittask.h:51:26: error: size of unnamed array is negative
51 | ( _type ) sizeof( int[ ( _value ) != NULL ? 1 : -1 ] ) )
| ^
cpukit/include/rtems/confdefs/inittask.h:170:3: note: in expansion of macro '_CONFIGURE_ASSERT_NOT_NULL'
170 | _CONFIGURE_ASSERT_NOT_NULL(
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
This fix relates to CID 1470570 (PARSE_ERROR).
Update #4181.
|
| |
|
|
|
|
|
|
| |
The arm_cp15 function for accessing the current CPU index is specific
to ARMv7 while this header is used for ARMv8 as well. Instead, use a
generic accessor that is part of the standard CPU API.
|
| |
|
|
|
|
|
|
|
| |
- Disabled by default
- Enable using ARM_MMU_USE_SMALL_PAGES option
Close 4192.
|
|
|
|
|
|
| |
- For small tables only round to the next 4kiB instead of 1MiB
Close #4184.
|
| |
|
| |
|
|
|
|
|
|
|
| |
Remove the target filter for software-generated interrupts since this
feature is not supported by the affinity routing in GICv3.
Update #4202.
|
|
|
|
|
|
|
|
| |
Use the targets parameter to determine the targets of the SGI. Change
targets parameter type to 32-bit to ease the parameter passing. GICv3
supports up to 16 targets.
Update #4202.
|
| |
|
|
|
|
|
|
| |
Clarify documentation.
Update #4202.
|
|
|
|
| |
Update #4202.
|
|
|
|
| |
Update #4202.
|
|
|
|
| |
Update #4202.
|
|
|
|
| |
Update #4202.
|
| |
|
| |
|
|
|
|
| |
Update #4202.
|
| |
|
|
|
|
|
|
|
| |
Currently, zynq-uart code is always built and has some requirements for
BSPs that use it. Instead of making all BSPs satisfy that requirement or
working around it by setting defaults, this moves the zynq-uart code
into its own spec build object so it can be included if needed.
|
|
|
|
|
| |
The option for defining the console minor should be an integer, not a
boolean.
|
|
|
|
|
|
|
|
| |
This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC
(ZynqMP) family of chips. It is configured to be usable on the Qemu
ZCU102 machine definition and should be almost trivially portable to
ZynqMP development boards and custom hardware. It is also configured to
be usable with libbsd.
|
|
|
|
|
|
|
|
|
| |
The zynq-uart set_attributes implementation was configured to always
return false which causes spconsole01 to fail. This restores the
disabled implementation which sets the baud rate registers
appropriately and allows spconsole01 to pass. This also expands the
set_attributes functionality to allow setting of the stop bits,
character width, and parity.
|