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| author | Christian Mauderer <christian.mauderer@embedded-brains.de> | 2020-11-07 11:11:07 +0100 |
|---|---|---|
| committer | Christian Mauderer <christian.mauderer@embedded-brains.de> | 2020-12-14 10:48:57 +0100 |
| commit | 86d3c275253426048346e9e8248003121b5e6728 (patch) | |
| tree | 6896756476ef9bd7c4fbef76d40ad3123676bf4c | |
| parent | bsps: Replace non-ASCII copyright character (diff) | |
| download | rtems-86d3c275253426048346e9e8248003121b5e6728.tar.bz2 | |
bsps: Replace non-ASCII trademark symbol
| -rw-r--r-- | bsps/arm/atsam/contrib/libraries/libboard/include/gmii.h | 2 | ||||
| -rw-r--r-- | bsps/arm/lm3s69xx/start/bspstart.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/bsps/arm/atsam/contrib/libraries/libboard/include/gmii.h b/bsps/arm/atsam/contrib/libraries/libboard/include/gmii.h index e346143452..e9dc31e1e4 100644 --- a/bsps/arm/atsam/contrib/libraries/libboard/include/gmii.h +++ b/bsps/arm/atsam/contrib/libraries/libboard/include/gmii.h @@ -52,7 +52,7 @@ #define GMII_ECR 0x18 // Expanded Control Register #define GMII_ICSR 0x1B // Interrupt Control/Status Register #define GMII_FC 0x1C // Function Control -#define GMII_LCSR 0x1D // LinkMD® Control/Status Register +#define GMII_LCSR 0x1D // LinkMD(R) Control/Status Register #define GMII_PC1R 0x1E // PHY Control 1 Register #define GMII_PC2R 0x1F // PHY Control 2 Register diff --git a/bsps/arm/lm3s69xx/start/bspstart.c b/bsps/arm/lm3s69xx/start/bspstart.c index ea73b1e1c2..43b7b826bf 100644 --- a/bsps/arm/lm3s69xx/start/bspstart.c +++ b/bsps/arm/lm3s69xx/start/bspstart.c @@ -39,7 +39,7 @@ static void init_main_osc(void) syscon->rcc2 = rcc2; /* - As per a note in Stellaris® LM4F120H5QR Microcontroller Data + As per a note in Stellaris(R) LM4F120H5QR Microcontroller Data Sheet on page 219: "When transitioning the system clock configuration to use the MOSC as the fundamental clock source, the MOSCDIS bit must be set prior to reselecting the MOSC or an |