diff options
Diffstat (limited to 'spec/build/bsps/arm/xilinx-zynqmp')
20 files changed, 451 insertions, 0 deletions
diff --git a/spec/build/bsps/arm/xilinx-zynqmp/abi.yml b/spec/build/bsps/arm/xilinx-zynqmp/abi.yml new file mode 100644 index 0000000000..23c66bb5b8 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/abi.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- split: null +- env-append: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: +- -march=armv7-a +- -mthumb +- -mfpu=neon +- -mfloat-abi=hard +- -mtune=cortex-a53 +default-by-variant: [] +description: | + ABI flags +enabled-by: true +links: [] +name: ABI_FLAGS +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml b/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml new file mode 100644 index 0000000000..fe56228c38 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml @@ -0,0 +1,95 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: xilinx_zynqmp_ultra96 +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +enabled-by: true +family: xilinx-zynqmp +includes: [] +install: +- destination: ${BSP_INCLUDEDIR} + source: + - bsps/arm/xilinx-zynqmp/include/bsp.h + - bsps/arm/xilinx-zynqmp/include/tm27.h +- destination: ${BSP_INCLUDEDIR}/bsp + source: + - bsps/arm/xilinx-zynqmp/include/bsp/irq.h +links: +- role: build-dependency + uid: ../grp +- role: build-dependency + uid: ../start +- role: build-dependency + uid: abi +- role: build-dependency + uid: objsmp +- role: build-dependency + uid: optcachedata +- role: build-dependency + uid: optcacheinst +- role: build-dependency + uid: optclkfastidle +- role: build-dependency + uid: optclkuart +- role: build-dependency + uid: optconirq +- role: build-dependency + uid: optconminor +- role: build-dependency + uid: optgentmrfreq +- role: build-dependency + uid: optgentmrusevirt +- role: build-dependency + uid: optint0len +- role: build-dependency + uid: optint0ori +- role: build-dependency + uid: optint1len +- role: build-dependency + uid: optint1ori +- role: build-dependency + uid: ../optmmusz +- role: build-dependency + uid: optnocachelen +- role: build-dependency + uid: optramlen +- role: build-dependency + uid: optramori +- role: build-dependency + uid: optresetvec +- role: build-dependency + uid: ../../obj +- role: build-dependency + uid: ../../objirq +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: linkcmds +- role: build-dependency + uid: ../../bspopts +source: +- bsps/arm/shared/cache/cache-cp15.c +- bsps/arm/shared/clock/clock-generic-timer.c +- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c +- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c +- bsps/arm/shared/irq/irq-gic.c +- bsps/arm/shared/serial/zynq-uart.c +- bsps/arm/shared/serial/zynq-uart-polled.c +- bsps/arm/shared/start/bsp-start-memcpy.S +- bsps/arm/xilinx-zynqmp/console/console-config.c +- bsps/arm/xilinx-zynqmp/start/bspreset.c +- bsps/arm/xilinx-zynqmp/start/bspstart.c +- bsps/arm/xilinx-zynqmp/start/bspstarthooks.c +- bsps/arm/xilinx-zynqmp/start/bspstartmmu.c +- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/getentropy/getentropy-cpucounter.c +- bsps/shared/dev/serial/console-termios.c +- bsps/shared/irq/irq-default-handler.c +- bsps/shared/start/bspfatal-default.c +- bsps/shared/start/bspgetworkarea-default.c +- bsps/shared/start/sbrk.c +- bsps/shared/start/stackalloc.c +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/linkcmds.yml b/spec/build/bsps/arm/xilinx-zynqmp/linkcmds.yml new file mode 100644 index 0000000000..77bd5fb763 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/linkcmds.yml @@ -0,0 +1,46 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: config-file +content: | + MEMORY { + RAM_INT_0 : ORIGIN = ${ZYNQMP_RAM_INT_0_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RAM_INT_0_LENGTH:#010x} + RAM_INT_1 : ORIGIN = ${ZYNQMP_RAM_INT_1_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RAM_INT_1_LENGTH:#010x} + RAM_MMU : ORIGIN = ${ZYNQMP_RAM_ORIGIN:#010x}, LENGTH = ${ARM_MMU_TRANSLATION_TABLE_SIZE:#010x} + RAM : ORIGIN = ${ZYNQMP_RAM_ORIGIN:#010x} + ${ARM_MMU_TRANSLATION_TABLE_SIZE:#010x}, LENGTH = ${ZYNQMP_RAM_LENGTH:#010x} - ${ZYNQMP_RAM_ORIGIN:#010x} - ${ARM_MMU_TRANSLATION_TABLE_SIZE:#010x} - ${ZYNQMP_RAM_NOCACHE_LENGTH:#010x} + NOCACHE : ORIGIN = ${ZYNQMP_RAM_LENGTH:#010x} - ${ZYNQMP_RAM_NOCACHE_LENGTH:#010x}, LENGTH = ${ZYNQMP_RAM_NOCACHE_LENGTH:#010x} + } + + REGION_ALIAS ("REGION_START", RAM); + REGION_ALIAS ("REGION_VECTOR", RAM); + REGION_ALIAS ("REGION_TEXT", RAM); + REGION_ALIAS ("REGION_TEXT_LOAD", RAM); + REGION_ALIAS ("REGION_RODATA", RAM); + REGION_ALIAS ("REGION_RODATA_LOAD", RAM); + REGION_ALIAS ("REGION_DATA", RAM); + REGION_ALIAS ("REGION_DATA_LOAD", RAM); + REGION_ALIAS ("REGION_FAST_TEXT", RAM); + REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM); + REGION_ALIAS ("REGION_FAST_DATA", RAM); + REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM); + REGION_ALIAS ("REGION_BSS", RAM); + REGION_ALIAS ("REGION_WORK", RAM); + REGION_ALIAS ("REGION_STACK", RAM); + REGION_ALIAS ("REGION_NOCACHE", NOCACHE); + REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE); + + bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; + + bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M; + + bsp_vector_table_in_start_section = 1; + + bsp_translation_table_base = ORIGIN (RAM_MMU); + bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU); + + INCLUDE linkcmds.armv4 +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +enabled-by: true +install-path: ${BSP_LIBDIR} +links: [] +target: linkcmds +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/objsmp.yml b/spec/build/bsps/arm/xilinx-zynqmp/objsmp.yml new file mode 100644 index 0000000000..e8b954b5cb --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/objsmp.yml @@ -0,0 +1,16 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +cppflags: [] +cxxflags: [] +enabled-by: +- RTEMS_SMP +includes: [] +install: [] +links: [] +source: +- bsps/arm/shared/start/arm-a9mpcore-smp.c +- bsps/arm/xilinx-zynqmp/start/bspsmp.c +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml b/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml new file mode 100644 index 0000000000..1664b0fc31 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: true +default-by-variant: +- value: false + variants: + - arm/.*qemu +description: | + enable data cache +enabled-by: true +links: [] +name: BSP_DATA_CACHE_ENABLED +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml b/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml new file mode 100644 index 0000000000..b191133af9 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: true +default-by-variant: +- value: false + variants: + - arm/.*qemu +description: | + enable instruction cache +enabled-by: true +links: [] +name: BSP_INSTRUCTION_CACHE_ENABLED +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml b/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml new file mode 100644 index 0000000000..b800b20428 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: false +default-by-variant: +- value: true + variants: + - arm/.*qemu +description: | + This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. +enabled-by: true +links: [] +name: CLOCK_DRIVER_USE_FAST_IDLE +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml b/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml new file mode 100644 index 0000000000..a2def36606 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 100000000 +default-by-variant: +- value: 100000000 + variants: + - arm/xilinx_zynqmp_ultra96.* +description: | + Zynq UART clock frequency in Hz +enabled-by: true +format: '{}' +links: [] +name: ZYNQ_CLOCK_UART +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml b/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml new file mode 100644 index 0000000000..ecb91d81a3 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: true +default-by-variant: [] +description: | + use interrupt driven mode for console devices (used by default) +enabled-by: true +links: [] +name: ZYNQ_CONSOLE_USE_INTERRUPTS +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optconminor.yml b/spec/build/bsps/arm/xilinx-zynqmp/optconminor.yml new file mode 100644 index 0000000000..55074c6dac --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optconminor.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: true +default-by-variant: [] +description: | + minor number of console device +enabled-by: true +links: [] +name: BSP_CONSOLE_MINOR +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optgentmrfreq.yml b/spec/build/bsps/arm/xilinx-zynqmp/optgentmrfreq.yml new file mode 100644 index 0000000000..a31630ebd6 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optgentmrfreq.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: false +default-by-variant: [] +description: | + ARM generic timer frequency in Hz +enabled-by: true +links: [] +name: ARM_GENERIC_TIMER_FREQ +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optgentmrusevirt.yml b/spec/build/bsps/arm/xilinx-zynqmp/optgentmrusevirt.yml new file mode 100644 index 0000000000..794f66244b --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optgentmrusevirt.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: false +default-by-variant: [] +description: | + Use virtual ARM generic timer +enabled-by: true +links: [] +name: ARM_GENERIC_TIMER_USE_VIRTUAL +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml new file mode 100644 index 0000000000..55b3487553 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 196608 +default-by-variant: [] +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RAM_INT_0_LENGTH +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml new file mode 100644 index 0000000000..f6a8b5f7d4 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 0 +default-by-variant: [] +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RAM_INT_0_ORIGIN +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml new file mode 100644 index 0000000000..bdaef49951 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 65024 +default-by-variant: [] +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RAM_INT_1_LENGTH +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml new file mode 100644 index 0000000000..55caa6f4a2 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 4294901760 +default-by-variant: [] +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RAM_INT_1_ORIGIN +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml b/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml new file mode 100644 index 0000000000..4b9118d926 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 1048576 +default-by-variant: [] +description: | + length of nocache RAM region +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RAM_NOCACHE_LENGTH +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml b/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml new file mode 100644 index 0000000000..6efaf7b13b --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 268435456 +default-by-variant: +- value: 2147483648 + variants: + - arm/xilinx_zynqmp_ultra96 +description: | + override a BSP's default RAM length +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RAM_LENGTH +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml b/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml new file mode 100644 index 0000000000..401b8ec3a3 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- assert-aligned: 1048576 +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 1048576 +default-by-variant: [] +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RAM_ORIGIN +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml b/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml new file mode 100644 index 0000000000..efd1ea2b2a --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml @@ -0,0 +1,15 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: false +default-by-variant: [] +description: | + reset vector address for BSP start +enabled-by: true +links: [] +name: BSP_START_RESET_VECTOR +type: build |