diff options
Diffstat (limited to 'cpukit/score/cpu/lm32/cpu_asm.S')
| -rw-r--r-- | cpukit/score/cpu/lm32/cpu_asm.S | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/cpukit/score/cpu/lm32/cpu_asm.S b/cpukit/score/cpu/lm32/cpu_asm.S index 02e1f6928a..bfed8cb1af 100644 --- a/cpukit/score/cpu/lm32/cpu_asm.S +++ b/cpukit/score/cpu/lm32/cpu_asm.S @@ -108,7 +108,7 @@ _CPU_Context_switch_restore: _CPU_Context_restore: mv r2, r1 bi _CPU_Context_switch_restore - + /* void _ISR_Handler() * * This routine provides the RTEMS interrupt management. @@ -125,7 +125,7 @@ _CPU_Context_restore: * handles interrupt nesting, software interrupt stack setup etc and * finally calls the user ISR. * At the end the saved registers are restored. - * + * */ .globl _ISR_Handler @@ -180,18 +180,18 @@ found_irq: mvhi r3, hi(__ISR_Handler) ori r3, r3, lo(__ISR_Handler) call r3 - + exit_isr: /* Restore the saved registers */ lw r1, (sp+4) - lw r2, (sp+8) - lw r3, (sp+12) - lw r4, (sp+16) - lw r5, (sp+20) - lw r6, (sp+24) - lw r7, (sp+28) - lw r8, (sp+32) - lw r9, (sp+36) + lw r2, (sp+8) + lw r3, (sp+12) + lw r4, (sp+16) + lw r5, (sp+20) + lw r6, (sp+24) + lw r7, (sp+28) + lw r8, (sp+32) + lw r9, (sp+36) lw r10, (sp+40) lw ra, (sp+44) lw ea, (sp+48) |