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-rw-r--r--c/src/lib/libbsp/arm/vegaplus/clock/clockdrv.c1
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/include/bsp.h1
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/include/registers.h31
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c1
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/irq/irq.c4
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/irq/irq.h2
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/start/start.S4
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c3
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/startup/exit.c1
9 files changed, 0 insertions, 48 deletions
diff --git a/c/src/lib/libbsp/arm/vegaplus/clock/clockdrv.c b/c/src/lib/libbsp/arm/vegaplus/clock/clockdrv.c
index c49150fba6..f61b66e42d 100644
--- a/c/src/lib/libbsp/arm/vegaplus/clock/clockdrv.c
+++ b/c/src/lib/libbsp/arm/vegaplus/clock/clockdrv.c
@@ -14,7 +14,6 @@
#define Clock_driver_support_install_isr( _new, _old ) \
do { _old = 0; } while(0)
-
#define Clock_driver_support_initialize_hardware()
#define Clock_driver_support_shutdown_hardware()
diff --git a/c/src/lib/libbsp/arm/vegaplus/include/bsp.h b/c/src/lib/libbsp/arm/vegaplus/include/bsp.h
index 761b5f3604..abefa5502b 100644
--- a/c/src/lib/libbsp/arm/vegaplus/include/bsp.h
+++ b/c/src/lib/libbsp/arm/vegaplus/include/bsp.h
@@ -14,7 +14,6 @@
| $Id$
+--------------------------------------------------------------------------*/
-
#ifndef __BSP_H_
#define __BSP_H_
diff --git a/c/src/lib/libbsp/arm/vegaplus/include/registers.h b/c/src/lib/libbsp/arm/vegaplus/include/registers.h
index 2a153fd8d9..c11fc851c3 100644
--- a/c/src/lib/libbsp/arm/vegaplus/include/registers.h
+++ b/c/src/lib/libbsp/arm/vegaplus/include/registers.h
@@ -10,7 +10,6 @@
*
*/
-
#ifndef __LMREGS_H__
#define __LMREGS_H__
@@ -28,8 +27,6 @@
extern volatile unsigned long *Regs; /* Chip registers */
#endif
-
-
/******************************************************************************
* RADIO CONTROLLER BLOCK 0x0C00 - 0x0FFF *
******************************************************************************
@@ -71,7 +68,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define ADCPERIOD ((RC_BASE+0x7C)/4)
#define SYNTIOCNTL ((RC_BASE+0x80)/4) /* added 30/08/99 */
-
/* modified 30/08/99 by LHT */
#define SHAPE0 ((RC_BASE+0x100)/4) /* previously 0x80 */
#define SHAPE1 ((RC_BASE+0x104)/4)
@@ -121,7 +117,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define TSTRXD ((PLP_BASE+0x78)/4)
#define PLPID ((PLP_BASE+0x7C)/4)
-
/** ENCRYPTION ENGINE 0x1800 - 0x1BFF */
#define EE_BASE 0x1800
@@ -250,7 +245,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define RSCNT ((UART_BASE+0x20)/4)
/*PRODUCT_VERSION*/
-
/** THUMB and INTERFACES BLOCK 0x3400 - 0x4FFF */
#define TIM_BASE 0x3400
@@ -333,8 +327,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define SLEEPTIMER ((TI_BASE+0x204)/4)
#define SLEEPCNTL ((TI_BASE+0x208)/4)
-
-
/******************************************************************************
* BIT MASKS for Chip registers
******************************************************************************
@@ -358,8 +350,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define MSK_TADCMD 0x0F /* Mask on TADCMD */
#define CONTINUE 0x10
-
-
/** RADIO CONTROLER BLOCK (RC3) */
/* SLICECNTL register */
@@ -461,7 +451,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
/* RCCNTL register */
#define RCCNTL_ENABLE 0x80
-
/* ADCCNTL1 register */
#define ADCSTART 0x80
#define SCAN 0x40
@@ -474,8 +463,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define ADCDWN1 0x04
#define ADCDWN2 0x08
-
-
/** PLP BLOCK */
/* DCNTL0 register */
@@ -511,7 +498,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define MSK_PRES 0x0F /* mask on PRES field */
-
/* PLPALIN register */
#define SYNM 0x08
#define BITSLIP 0x10
@@ -537,7 +523,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
/* Bit ENABLE already defined */
#define EECNTL_ENABLE 0x80
-
/** PAINT+ BLOCK */
/* PAINTCNTL register */
@@ -555,7 +540,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define FORCE13 0x4000
#define PAINTENB 0x8000
-
/* PAINTPLLCNTL register */
#define MSK_MC 0x001F /* Mask on MC field */
#define MCSIGN 0x0020
@@ -649,7 +633,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define G726ENB0 0x0001
#define G726ENB1 0x0003
-
/** GENERAL REGISTERS BLOCK */
/* RINGCNTL register */
@@ -730,7 +713,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define PWM0_PADENB 0x20
#define MIRROR 0x10
-
/* LCDEECNTL1 register */
/* Bit ENABLE already defined */
#define LCDEE_ENABLE 0x80
@@ -788,7 +770,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define CSMODE_16_WHWL 0x0002
#define CSMODE_16_BHBL 0x0003
-
/* MUXADCNTL register */
#define MSK_AHOLD 0x0007
#define MSK_ALEWIDTH 0x0070
@@ -815,11 +796,9 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define ADDRESS_1M 0x3000
#define ADDRESS_2M 0x4000
-
/* CSGCNTL register */
#define CSSWITCH 0x0040
-
/* SLEEPCNTL register */
#define EXPIRED 0x01
#define SLEEP_ENABLE 0x80
@@ -828,12 +807,10 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define WDSTROKE 0x80
#define WDFLAG 0x80 /* same bit */
-
/* DCC register */
/* bit ENABLE=0x80 already defined */
#define DCC_ENABLE 0x80
-
/* TIMERCNTL[0:1] register */
/* bit ENABLE=0x80 already defined */
#define TIMER_ENABLE 0x80
@@ -844,7 +821,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define TIMER_216kHz 0x0001
#define TIMER_27kHz 0x0000
-
/* INTMASKALL register */
#define MASKIRQ 0x80
#define MASKFIQ 0x40
@@ -880,7 +856,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
/* INTHPAI register */
#define AUTOACK 0x0080
-
/******************************************************************************
* Memory Mapping definition
******************************************************************************
@@ -899,7 +874,6 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define REGS_BASE_ADR 0x000F0000 /* Base Address of registers */
#define RADRAM_BASE_ADR 0x000F0000 /* Base Address of registers */
-
/******************************************************************************
* Slot Control bloc
******************************************************************************
@@ -1067,10 +1041,6 @@ typedef LM_SCB *LM_SCB_P; /* pointer to Slot Control Block */
#define LM_WIN_OPEN 0x3F /* wide open window size */
#define MSK_WINSZ 0x3F
-
-
-
-
/*
* Some macros to mask the VEGA+ interrupt sources
******************************************************************************
@@ -1085,7 +1055,6 @@ typedef LM_SCB *LM_SCB_P; /* pointer to Slot Control Block */
#define LM_MaskSTX() (LM_Regs[RSIER] &= ~TX_INT_ENABLE)
#define LM_MaskUARTStatus() (LM_Regs[RSIER] &= ~LINE_STATUS_ENABLE)
-
#define LM_MaskTMR0() (LM_Regs[INTMASK] |= TMR0)
#define LM_MaskTMR1() (LM_Regs[INTMASK] |= TMR1)
#define LM_MaskLCDEE() (LM_Regs[INTMASK] |= LCDEE)
diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c
index 7807d89181..a8bb04bd8a 100644
--- a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c
+++ b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c
@@ -16,7 +16,6 @@
#include <bsp.h>
#include <registers.h>
-
void BSP_rtems_irq_mngt_init() {
/* Initialize the vector table address in internal RAM */
diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/irq.c b/c/src/lib/libbsp/arm/vegaplus/irq/irq.c
index 55c1590bdf..9a529346dc 100644
--- a/c/src/lib/libbsp/arm/vegaplus/irq/irq.c
+++ b/c/src/lib/libbsp/arm/vegaplus/irq/irq.c
@@ -12,14 +12,12 @@
* $Id$
*/
-
#include <bsp.h>
#include <irq.h>
#include <registers.h>
#include <rtems/score/thread.h>
#include <rtems/score/apiext.h>
-
/*
* This function check that the value given for the irq line
* is valid.
@@ -121,8 +119,6 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
return 1;
}
-
-
void _ThreadProcessSignalsFromIrq (CPU_Exception_frame* ctx)
{
/*
diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/irq.h b/c/src/lib/libbsp/arm/vegaplus/irq/irq.h
index 5857792ebe..0483849bd6 100644
--- a/c/src/lib/libbsp/arm/vegaplus/irq/irq.h
+++ b/c/src/lib/libbsp/arm/vegaplus/irq/irq.h
@@ -135,7 +135,6 @@ typedef struct __rtems_irq_connect_data__ {
*/
void BSP_rtems_irq_mngt_init();
-
/*
* function to connect a particular irq handler. This hanlder will NOT be called
* directly as the result of the corresponding interrupt. Instead, a RTEMS
@@ -184,7 +183,6 @@ int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr);
*/
int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data*);
-
#ifdef __cplusplus
}
#endif
diff --git a/c/src/lib/libbsp/arm/vegaplus/start/start.S b/c/src/lib/libbsp/arm/vegaplus/start/start.S
index 6c3c2ab141..49c216150c 100644
--- a/c/src/lib/libbsp/arm/vegaplus/start/start.S
+++ b/c/src/lib/libbsp/arm/vegaplus/start/start.S
@@ -40,12 +40,10 @@
.equ I_Bit, 0x80
.equ F_Bit, 0x40
-
.equ Mode_SVC_MIRQ, Mode_SVC | I_Bit | F_Bit
.equ Mode_SVC_UIRQ, Mode_SVC
.equ Mode_IRQ_MIRQ, Mode_SVC | I_Bit | F_Bit
-
.equ MARK_STACK, 0 /*Fill every stack with a pattern for debug (0 or 1)*/
/*-----------------------------------------------------------------------------
@@ -129,7 +127,6 @@ Real_start:
LDR r1, =0xA2
STR r1, [r0,#CSCNTL1_2]
-
MOV r0,#CNTL_CLK_ADR
/* Load clock mode 55 MHz */
LDR r1, =0x0010
@@ -155,7 +152,6 @@ zi_init:
STRLOT r2, [r0], #4
BLO zi_init
-
/* Load basic ARM7 interrupt table */
VectorInit:
MOV R8, #0
diff --git a/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c b/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c
index 3af8289599..5b1749d7cf 100644
--- a/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c
@@ -13,7 +13,6 @@
|
+--------------------------------------------------------------------------*/
-
#include <bsp.h>
#include <rtems/libcsupport.h>
#include <rtems/libio.h>
@@ -77,7 +76,6 @@ void bsp_pretasking_hook(void)
rtemsFreeMemStart += _heap_size; /* HEAP_SIZE in KBytes */
-
#ifdef RTEMS_DEBUG
rtems_debug_enable(RTEMS_DEBUG_ALL_MASK);
@@ -86,7 +84,6 @@ void bsp_pretasking_hook(void)
} /* bsp_pretasking_hook */
-
/*-------------------------------------------------------------------------+
| Function: bsp_start
| Description: Called before main is invoked.
diff --git a/c/src/lib/libbsp/arm/vegaplus/startup/exit.c b/c/src/lib/libbsp/arm/vegaplus/startup/exit.c
index a99faeb9ba..03e240cc33 100644
--- a/c/src/lib/libbsp/arm/vegaplus/startup/exit.c
+++ b/c/src/lib/libbsp/arm/vegaplus/startup/exit.c
@@ -13,7 +13,6 @@
|
+--------------------------------------------------------------------------*/
-
#include <stdio.h>
#include <bsp.h>
#include <rtems/bspIo.h>
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-27 18:06:03 +0000