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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-12-03 15:31:40 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-12-23 09:24:49 +0100 |
| commit | 81c7f5be92803f96c39b5325006071771709125b (patch) | |
| tree | 0cce25831bfc5c75161126a9dca80ec5c5ba63fe /spec/build/bsps/arm/optgicspicount.yml | |
| parent | bsps/arm: Rely on initialized vector table (diff) | |
| download | rtems-81c7f5be92803f96c39b5325006071771709125b.tar.bz2 | |
arm/fvp: New BSP
This BSP supports the Arm Fixed Virtual Platform. Only the Cortex-R52
processor configuration is supported by the BSP. It should be easy to
add support for other variants if needed.
Update #4202.
Diffstat (limited to 'spec/build/bsps/arm/optgicspicount.yml')
| -rw-r--r-- | spec/build/bsps/arm/optgicspicount.yml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/spec/build/bsps/arm/optgicspicount.yml b/spec/build/bsps/arm/optgicspicount.yml new file mode 100644 index 0000000000..cec05f36d7 --- /dev/null +++ b/spec/build/bsps/arm/optgicspicount.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 64 +default-by-variant: [] +description: | + Defines the count of Shared Peripheral Interrupts (SPIs) supported by the + interrupt controller. +enabled-by: true +format: '{}' +links: [] +name: BSP_ARM_SHARED_PERIPHERAL_INTERRUPT_COUNT +type: build |