arm/fvp: New BSP

This BSP supports the Arm Fixed Virtual Platform.  Only the Cortex-R52
processor configuration is supported by the BSP.  It should be easy to
add support for other variants if needed.

Update #4202.

28 files changed, 1089 insertions, 1 deletions

diff --git a/bsps/arm/fvp/console/console.c b/bsps/arm/fvp/console/console.c
new file mode 100644
index 0000000000..b8714c60c4
--- /dev/null
+++ b/bsps/arm/fvp/console/console.c
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <bsp/semihosting.h>
+
+#include <rtems/console.h>
+#include <rtems/termiostypes.h>
+
+static rtems_termios_device_context arm_fvp_console_instance;
+
+static void arm_fvp_console_write(
+  rtems_termios_device_context *ctx,
+  const char                   *buf,
+  size_t                        len
+)
+{
+  size_t i;
+
+  (void) ctx;
+
+  for ( i = 0; i < len; ++i ) {
+    arm_fvp_console_output( buf[ i ] );
+  }
+}
+
+static int arm_fvp_console_read( rtems_termios_device_context *ctx )
+{
+  (void) ctx;
+
+  return arm_fvp_console_input();
+}
+
+static const rtems_termios_device_handler arm_fvp_console_handler = {
+  .write = arm_fvp_console_write,
+  .poll_read = arm_fvp_console_read,
+  .mode = TERMIOS_POLLED
+};
+
+rtems_status_code console_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *arg
+)
+{
+  rtems_termios_initialize();
+
+  (void) rtems_termios_device_install(
+    CONSOLE_DEVICE_NAME,
+    &arm_fvp_console_handler,
+    NULL,
+    &arm_fvp_console_instance
+  );
+
+  return RTEMS_SUCCESSFUL;
+}
diff --git a/bsps/arm/fvp/console/printk-support.c b/bsps/arm/fvp/console/printk-support.c
new file mode 100644
index 0000000000..59575ad4be
--- /dev/null
+++ b/bsps/arm/fvp/console/printk-support.c
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <bsp/semihosting.h>
+#include <rtems/bspIo.h>
+
+void arm_fvp_console_output( char c )
+{
+  (void) arm_fvp_semihosting_call( SYS_WRITEC, (uintptr_t) &c );
+}
+
+int arm_fvp_console_input( void )
+{
+  return (unsigned char) arm_fvp_semihosting_call( SYS_READC, 0 );
+}
+
+BSP_output_char_function_type BSP_output_char = arm_fvp_console_output;
+
+BSP_polling_getchar_function_type BSP_poll_char = arm_fvp_console_input;
diff --git a/bsps/arm/fvp/include/bsp.h b/bsps/arm/fvp/include/bsp.h
new file mode 100644
index 0000000000..43c5c935fe
--- /dev/null
+++ b/bsps/arm/fvp/include/bsp.h
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_ARM_FVP_BSP_H
+#define LIBBSP_ARM_FVP_BSP_H
+
+#include <bspopts.h>
+#include <bsp/default-initial-extension.h>
+
+#include <rtems.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @defgroup RTEMSBSPsARMFVP Arm Fixed Virtual Platform
+ *
+ * @ingroup RTEMSBSPsARM
+ *
+ * @brief This BSP supports the Arm Fixed Virtual Platform.
+ *
+ * @{
+ */
+
+#define BSP_FEATURE_IRQ_EXTENSION
+
+extern char arm_fvp_memory_null_begin[];
+extern char arm_fvp_memory_null_end[];
+extern char arm_fvp_memory_null_size[];
+
+extern char arm_fvp_memory_dram_begin[];
+extern char arm_fvp_memory_dram_end[];
+extern char arm_fvp_memory_dram_size[];
+
+extern char arm_fvp_memory_device_begin[];
+extern char arm_fvp_memory_device_end[];
+extern char arm_fvp_memory_device_size[];
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* LIBBSP_ARM_FVP_BSP_H */
diff --git a/bsps/arm/fvp/include/bsp/irq.h b/bsps/arm/fvp/include/bsp/irq.h
new file mode 100644
index 0000000000..7b4450ffec
--- /dev/null
+++ b/bsps/arm/fvp/include/bsp/irq.h
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_ARM_FVP_IRQ_H
+#define LIBBSP_ARM_FVP_IRQ_H
+
+#ifndef ASM
+
+#include <rtems.h>
+#include <rtems/irq.h>
+#include <rtems/irq-extension.h>
+
+#include <dev/irq/arm-gic-irq.h>
+
+#endif /* ASM */
+
+#include <bspopts.h>
+
+#define BSP_INTERRUPT_VECTOR_MIN 0
+
+#define BSP_INTERRUPT_VECTOR_MAX (32 + BSP_ARM_SHARED_PERIPHERAL_INTERRUPT_COUNT)
+
+#endif /* LIBBSP_ARM_FVP_IRQ_H */
diff --git a/bsps/arm/fvp/include/bsp/semihosting.h b/bsps/arm/fvp/include/bsp/semihosting.h
new file mode 100644
index 0000000000..4b88d4fdcf
--- /dev/null
+++ b/bsps/arm/fvp/include/bsp/semihosting.h
@@ -0,0 +1,130 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMFVP
+ *
+ * @brief This header file provides the semihosting API.
+ */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _BSPS_ARM_FVP_SEMIHOSTING_H
+#define _BSPS_ARM_FVP_SEMIHOSTING_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @addtogroup RTEMSBSPsARMFVP
+ *
+ * @{
+ */
+
+#define SYS_CLOCK 0x10
+#define SYS_CLOSE 0x02
+#define SYS_ELAPSED 0x30
+#define SYS_ERRNO 0x13
+#define SYS_EXIT 0x18
+#define SYS_EXIT_EXTENDED 0x20
+#define SYS_FLEN 0x0c
+#define SYS_GET_CMDLINE 0x15
+#define SYS_HEAPINFO 0x16
+#define SYS_ISERROR 0x08
+#define SYS_ISTTY 0x09
+#define SYS_OPEN 0x01
+#define SYS_READ 0x06
+#define SYS_READC 0x07
+#define SYS_REMOVE 0x0e
+#define SYS_RENAME 0x0f
+#define SYS_SEEK 0x0a
+#define SYS_SYSTEM 0x12
+#define SYS_TICKFREQ 0x31
+#define SYS_TIME 0x11
+#define SYS_TMPNAM 0x0d
+#define SYS_WRITE 0x05
+#define SYS_WRITEC 0x03
+#define SYS_WRITE0 0x04
+
+#define ADP_Stopped_BranchThroughZero 0x20000
+#define ADP_Stopped_UndefinedInstr 0x20001
+#define ADP_Stopped_SoftwareInterrupt 0x20002
+#define ADP_Stopped_PrefetchAbort 0x20003
+#define ADP_Stopped_DataAbort 0x20004
+#define ADP_Stopped_AddressException 0x20005
+#define ADP_Stopped_IRQ 0x20006
+#define ADP_Stopped_FIQ 0x20007
+#define ADP_Stopped_BreakPoint 0x20020
+#define ADP_Stopped_WatchPoint 0x20021
+#define ADP_Stopped_StepComplete 0x20022
+#define ADP_Stopped_RunTimeErrorUnknown 0x20023
+#define ADP_Stopped_InternalError 0x20024
+#define ADP_Stopped_UserInterruption 0x20025
+#define ADP_Stopped_ApplicationExit 0x20026
+#define ADP_Stopped_StackOverflow 0x20027
+#define ADP_Stopped_DivisionByZero 0x20028
+#define ADP_Stopped_OSSpecific 0x20029
+
+static inline uintptr_t arm_fvp_semihosting_call(
+  uintptr_t op,
+  uintptr_t params
+)
+{
+  register uintptr_t op_and_return_reg __asm__("r0");
+  register uintptr_t params_reg __asm__("r1");
+
+  op_and_return_reg = op;
+  params_reg = params;
+
+  __asm__ volatile (
+#ifdef __thumb__
+    "svc #0xab"
+#else
+    "svc #0x123456"
+#endif
+    : "=r" (op_and_return_reg)
+    : "0" (op_and_return_reg), "r" (params_reg)
+    : "memory"
+  );
+
+  return op_and_return_reg;
+}
+
+void arm_fvp_console_output( char c );
+
+int arm_fvp_console_input( void );
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BSPS_ARM_FVP_SEMIHOSTING_H */
diff --git a/bsps/arm/fvp/include/tm27.h b/bsps/arm/fvp/include/tm27.h
new file mode 100644
index 0000000000..a9cde9dffe
--- /dev/null
+++ b/bsps/arm/fvp/include/tm27.h
@@ -0,0 +1 @@
+#include <dev/irq/arm-gic-tm27.h>
diff --git a/bsps/arm/fvp/start/bspreset.c b/bsps/arm/fvp/start/bspreset.c
new file mode 100644
index 0000000000..ef625c1bdf
--- /dev/null
+++ b/bsps/arm/fvp/start/bspreset.c
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMFVP
+ *
+ * @brief This source file contains the implementation of bsp_reset().
+ */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <bsp/bootcard.h>
+#include <bsp/semihosting.h>
+
+void bsp_reset( void )
+{
+  while ( true ) {
+    (void) arm_fvp_semihosting_call( SYS_EXIT, ADP_Stopped_ApplicationExit );
+  }
+}
diff --git a/bsps/arm/fvp/start/bspsmp.c b/bsps/arm/fvp/start/bspsmp.c
new file mode 100644
index 0000000000..98b59f54ef
--- /dev/null
+++ b/bsps/arm/fvp/start/bspsmp.c
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMFVP
+ *
+ * @brief This source file contains the implementation of
+ *   _CPU_SMP_Start_processor().
+ */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems/score/smpimpl.h>
+
+bool _CPU_SMP_Start_processor( uint32_t cpu_index )
+{
+  /* Nothing to do */
+  (void) cpu_index;
+
+  return true;
+}
diff --git a/bsps/arm/fvp/start/bspstart.c b/bsps/arm/fvp/start/bspstart.c
new file mode 100644
index 0000000000..1af09fb25e
--- /dev/null
+++ b/bsps/arm/fvp/start/bspstart.c
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMFVP
+ *
+ * @brief This source file contains the implementation of bsp_start().
+ */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <bsp/bootcard.h>
+#include <bsp/irq-generic.h>
+
+#include <dev/clock/arm-generic-timer.h>
+
+#include <libcpu/arm-cp15.h>
+
+void arm_generic_timer_get_config( uint32_t *frequency, uint32_t *irq )
+{
+#ifdef ARM_GENERIC_TIMER_FREQ
+  *frequency = ARM_GENERIC_TIMER_FREQ;
+#else
+  *frequency = arm_cp15_get_counter_frequency();
+#endif
+
+#ifdef ARM_GENERIC_TIMER_USE_VIRTUAL
+  *irq = 27;
+#else
+  /* Non-secure physical timer interrupt */
+  *irq = 30;
+#endif
+}
+
+void bsp_start( void )
+{
+  bsp_interrupt_initialize();
+}
diff --git a/bsps/arm/fvp/start/bspstarthooks.c b/bsps/arm/fvp/start/bspstarthooks.c
new file mode 100644
index 0000000000..b990dde30e
--- /dev/null
+++ b/bsps/arm/fvp/start/bspstarthooks.c
@@ -0,0 +1,97 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMFVP
+ *
+ * @brief This source file contains the implementation of bsp_start_hook_0()
+ *   and bsp_start_hook_1().
+ */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <bsp.h>
+#include <bsp/start.h>
+
+#include <rtems/score/aarch32-pmsa.h>
+#include <rtems/score/aarch32-system-registers.h>
+
+#ifdef RTEMS_SMP
+#include <rtems.h>
+#include <rtems/score/smpimpl.h>
+
+#include <bsp/irq-generic.h>
+
+#include <dev/irq/arm-gic-irq.h>
+#endif
+
+void bsp_start_hook_0( void )
+{
+#ifdef RTEMS_SMP
+  uint32_t cpu_index_self;
+
+  cpu_index_self = _SMP_Get_current_processor();
+
+  if ( cpu_index_self != 0 ) {
+    /*
+     * The FVP jumps to the entry point of the ELF file on all processors.
+     * Prevent the fatal errors SMP_FATAL_MULTITASKING_START_ON_INVALID_PROCESSOR
+     * and SMP_FATAL_MULTITASKING_START_ON_UNASSIGNED_PROCESSOR this way.
+     */
+    if (
+      cpu_index_self >= rtems_configuration_get_maximum_processors()
+        || !_SMP_Should_start_processor( cpu_index_self )
+    ) {
+      while ( true ) {
+        _ARM_Wait_for_event();
+      }
+    }
+
+    _AArch32_PMSA_Initialize_default();
+    arm_gic_irq_initialize_secondary_cpu();
+
+    /* Change the VBAR from the start to the normal vector table */
+    _AArch32_Write_vbar( bsp_vector_table_begin );
+
+    bsp_interrupt_vector_enable( ARM_GIC_IRQ_SGI_0 );
+    _SMP_Start_multitasking_on_secondary_processor(
+      _Per_CPU_Get_by_index( cpu_index_self )
+    );
+  }
+#endif
+}
+
+void bsp_start_hook_1( void )
+{
+  bsp_start_copy_sections();
+  _AArch32_PMSA_Initialize_default();
+  bsp_start_clear_bss();
+}
diff --git a/bsps/arm/fvp/start/pmsa-sections.c b/bsps/arm/fvp/start/pmsa-sections.c
new file mode 100644
index 0000000000..862e09a94b
--- /dev/null
+++ b/bsps/arm/fvp/start/pmsa-sections.c
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMFVP
+ *
+ * @brief This source file contains the definition of ::_AArch32_PMSA_Sections
+ *   and ::_AArch32_PMSA_Section_count.
+ */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <bsp.h>
+#include <bsp/linker-symbols.h>
+
+#include <rtems/score/aarch32-pmsa.h>
+
+const AArch32_PMSA_Section _AArch32_PMSA_Sections[] = {
+  AARCH32_PMSA_DEFAULT_SECTIONS,
+  {
+    .begin = (uint32_t) arm_fvp_memory_device_begin,
+    .end = (uint32_t) arm_fvp_memory_device_end,
+    .attributes = AARCH32_PMSA_DEVICE
+  }
+};
+
+const size_t _AArch32_PMSA_Section_count =
+  RTEMS_ARRAY_SIZE( _AArch32_PMSA_Sections );
diff --git a/spec/build/bsps/arm/fvp/abi.yml b/spec/build/bsps/arm/fvp/abi.yml
new file mode 100644
index 0000000000..8cfbb744be
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/abi.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=cortex-r52
+- -mthumb
+- -mfloat-abi=hard
+- -mfpu=auto
+default-by-variant: []
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/fvp/bspcortexr52.yml b/spec/build/bsps/arm/fvp/bspcortexr52.yml
new file mode 100644
index 0000000000..01a3d7c3bd
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/bspcortexr52.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: fvp_cortex_r52
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: fvp
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/fvp/grp.yml b/spec/build/bsps/arm/fvp/grp.yml
new file mode 100644
index 0000000000..4fc9018052
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/grp.yml
@@ -0,0 +1,58 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: ../start
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: obj
+- role: build-dependency
+  uid: objsmp
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+- role: build-dependency
+  uid: ../optgicspicount
+- role: build-dependency
+  uid: ../optgiccpuif
+- role: build-dependency
+  uid: ../optgicdist
+- role: build-dependency
+  uid: ../optgicredist
+- role: build-dependency
+  uid: ../optgtfreq
+- role: build-dependency
+  uid: ../optgtsysbase
+- role: build-dependency
+  uid: ../optgtsyscntcr
+- role: build-dependency
+  uid: ../optgtusevirt
+- role: build-dependency
+  uid: ../optstarthyp
+- role: build-dependency
+  uid: optnullsize
+- role: build-dependency
+  uid: optdrambegin
+- role: build-dependency
+  uid: optdramsize
+- role: build-dependency
+  uid: optdevbegin
+- role: build-dependency
+  uid: optdevsize
+- role: build-dependency
+  uid: linkcmds
+- role: build-dependency
+  uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/fvp/linkcmds.yml b/spec/build/bsps/arm/fvp/linkcmds.yml
new file mode 100644
index 0000000000..1812866d2d
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/linkcmds.yml
@@ -0,0 +1,53 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+  MEMORY {
+    NULL : ORIGIN = 0x00000000, LENGTH = ${ARM_FVP_MEMORY_NULL_SIZE:#010x}
+    DRAM : ORIGIN = ${ARM_FVP_MEMORY_DRAM_BEGIN:#010x}, LENGTH = ${ARM_FVP_MEMORY_DRAM_SIZE:#010x}
+    DEVICE : ORIGIN = ${ARM_FVP_MEMORY_DEVICE_BEGIN:#010x}, LENGTH = ${ARM_FVP_MEMORY_DEVICE_SIZE:#010x}
+  }
+
+  arm_fvp_memory_null_begin = ORIGIN (NULL);
+  arm_fvp_memory_null_end = ORIGIN (NULL) + LENGTH (NULL);
+  arm_fvp_memory_null_size = LENGTH (NULL);
+
+  arm_fvp_memory_dram_begin = ORIGIN (DRAM);
+  arm_fvp_memory_dram_end = ORIGIN (DRAM) + LENGTH (DRAM);
+  arm_fvp_memory_dram_size = LENGTH (DRAM);
+
+  arm_fvp_memory_device_begin = ORIGIN (DEVICE);
+  arm_fvp_memory_device_end = ORIGIN (DEVICE) + LENGTH (DEVICE);
+  arm_fvp_memory_device_size = LENGTH (DEVICE);
+
+  REGION_ALIAS ("REGION_START", DRAM);
+  REGION_ALIAS ("REGION_VECTOR", DRAM);
+  REGION_ALIAS ("REGION_TEXT", DRAM);
+  REGION_ALIAS ("REGION_TEXT_LOAD", DRAM);
+  REGION_ALIAS ("REGION_RODATA", DRAM);
+  REGION_ALIAS ("REGION_RODATA_LOAD", DRAM);
+  REGION_ALIAS ("REGION_DATA", DRAM);
+  REGION_ALIAS ("REGION_DATA_LOAD", DRAM);
+  REGION_ALIAS ("REGION_FAST_TEXT", DRAM);
+  REGION_ALIAS ("REGION_FAST_TEXT_LOAD", DRAM);
+  REGION_ALIAS ("REGION_FAST_DATA", DRAM);
+  REGION_ALIAS ("REGION_FAST_DATA_LOAD", DRAM);
+  REGION_ALIAS ("REGION_BSS", DRAM);
+  REGION_ALIAS ("REGION_WORK", DRAM);
+  REGION_ALIAS ("REGION_STACK", DRAM);
+  REGION_ALIAS ("REGION_NOCACHE", DRAM);
+  REGION_ALIAS ("REGION_NOCACHE_LOAD", DRAM);
+
+  bsp_section_xbarrier_align = DEFINED (bsp_section_xbarrier_align) ? bsp_section_xbarrier_align : 64;
+  bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 64;
+  bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 64;
+
+  bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
+
+  INCLUDE linkcmds.armv4
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds
+type: build
diff --git a/spec/build/bsps/arm/fvp/obj.yml b/spec/build/bsps/arm/fvp/obj.yml
new file mode 100644
index 0000000000..f07899beff
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/obj.yml
@@ -0,0 +1,44 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/arm/fvp/include/bsp.h
+  - bsps/arm/fvp/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/arm/fvp/include/bsp/irq.h
+- destination: ${BSP_INCLUDEDIR}/dev/clock
+  source:
+  - bsps/include/dev/clock/arm-generic-timer.h
+links: []
+source:
+- bsps/arm/fvp/console/console.c
+- bsps/arm/fvp/console/printk-support.c
+- bsps/arm/fvp/start/bspreset.c
+- bsps/arm/fvp/start/bspstart.c
+- bsps/arm/fvp/start/bspstarthooks.c
+- bsps/arm/fvp/start/pmsa-sections.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cache/cache-v7ar-disable-data.S
+- bsps/arm/shared/clock/arm-generic-timer-aarch32.c
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/btimer/btimer-cpucounter.c
+- bsps/shared/dev/clock/arm-generic-timer.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/irq/arm-gicv3.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/fvp/objsmp.yml b/spec/build/bsps/arm/fvp/objsmp.yml
new file mode 100644
index 0000000000..b0e58c64d5
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/objsmp.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_SMP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/fvp/start/bspsmp.c
+- bsps/arm/shared/start/arm-a9mpcore-smp.c
+type: build
diff --git a/spec/build/bsps/arm/fvp/optdevbegin.yml b/spec/build/bsps/arm/fvp/optdevbegin.yml
new file mode 100644
index 0000000000..d7522d0fd7
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/optdevbegin.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- assert-aligned: 1048576
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 436207616
+default-by-variant:
+- value: 2583691264
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the begin address of the device area.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_FVP_MEMORY_DEVICE_BEGIN
+type: build
diff --git a/spec/build/bsps/arm/fvp/optdevsize.yml b/spec/build/bsps/arm/fvp/optdevsize.yml
new file mode 100644
index 0000000000..ca6468510c
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/optdevsize.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 354418688
+default-by-variant: []
+description: |
+  Defines the size in bytes of the device area.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_FVP_MEMORY_DEVICE_SIZE
+type: build
diff --git a/spec/build/bsps/arm/fvp/optdrambegin.yml b/spec/build/bsps/arm/fvp/optdrambegin.yml
new file mode 100644
index 0000000000..7a44b2086f
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/optdrambegin.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 2147483648
+default-by-variant:
+- value: 1024
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the begin address of the DRAM.  The begin address must take the size
+  of the NULL pointer protection area into account (ARM_FVP_MEMORY_NULL_SIZE).
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_FVP_MEMORY_DRAM_BEGIN
+type: build
diff --git a/spec/build/bsps/arm/fvp/optdramsize.yml b/spec/build/bsps/arm/fvp/optdramsize.yml
new file mode 100644
index 0000000000..9ae2a8afe8
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/optdramsize.yml
@@ -0,0 +1,23 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 33554432
+default-by-variant:
+- value: 33553408
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the size in bytes of the DRAM.  Increasing the size may increase the
+  startup time of the FVP.  The size must take the size of the NULL pointer
+  protection area into account (ARM_FVP_MEMORY_NULL_SIZE).
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_FVP_MEMORY_DRAM_SIZE
+type: build
diff --git a/spec/build/bsps/arm/fvp/optnullsize.yml b/spec/build/bsps/arm/fvp/optnullsize.yml
new file mode 100644
index 0000000000..3d6b60b7eb
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/optnullsize.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1048576
+default-by-variant:
+- value: 1024
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the size in bytes of the NULL pointer protection area.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_FVP_MEMORY_NULL_SIZE
+type: build
diff --git a/spec/build/bsps/arm/optgiccpuif.yml b/spec/build/bsps/arm/optgiccpuif.yml
new file mode 100644
index 0000000000..4929f1bcf5
--- /dev/null
+++ b/spec/build/bsps/arm/optgiccpuif.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0x2c000000
+default-by-variant:
+- value: 0xac000000
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the base address of the GIC CPU Interface.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_ARM_GIC_CPUIF_BASE
+type: build
diff --git a/spec/build/bsps/arm/optgicdist.yml b/spec/build/bsps/arm/optgicdist.yml
new file mode 100644
index 0000000000..710d3b13db
--- /dev/null
+++ b/spec/build/bsps/arm/optgicdist.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0x2f000000
+default-by-variant:
+- value: 0xaf000000
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the base address of the GIC Distributor.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_ARM_GIC_DIST_BASE
+type: build
diff --git a/spec/build/bsps/arm/optgicredist.yml b/spec/build/bsps/arm/optgicredist.yml
new file mode 100644
index 0000000000..8d15b1ace5
--- /dev/null
+++ b/spec/build/bsps/arm/optgicredist.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0x2f100000
+default-by-variant:
+- value: 0xaf100000
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the base address of the GIC Redistributor.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_ARM_GIC_REDIST_BASE
+type: build
diff --git a/spec/build/bsps/arm/optgicspicount.yml b/spec/build/bsps/arm/optgicspicount.yml
new file mode 100644
index 0000000000..cec05f36d7
--- /dev/null
+++ b/spec/build/bsps/arm/optgicspicount.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 64
+default-by-variant: []
+description: |
+  Defines the count of Shared Peripheral Interrupts (SPIs) supported by the
+  interrupt controller.
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_ARM_SHARED_PERIPHERAL_INTERRUPT_COUNT
+type: build
diff --git a/spec/build/bsps/arm/optgtfreq.yml b/spec/build/bsps/arm/optgtfreq.yml
index adfacfaed2..71d356428a 100644
--- a/spec/build/bsps/arm/optgtfreq.yml
+++ b/spec/build/bsps/arm/optgtfreq.yml
@@ -6,7 +6,10 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: null
-default-by-variant: []
+default-by-variant:
+- value: 100000000
+  variants:
+  - arm/fvp_cortex_r52
 description: |
   Defines the frequency in Hz of the ARM Generic Timer.
 format: '{}'
diff --git a/spec/build/cpukit/optsmp.yml b/spec/build/cpukit/optsmp.yml
index b7fe3355ef..eefeef44aa 100644
--- a/spec/build/cpukit/optsmp.yml
+++ b/spec/build/cpukit/optsmp.yml
@@ -12,6 +12,7 @@ description: |
   Enable the Symmetric Multiprocessing (SMP) support
 enabled-by:
 - arm/altcycv_devkit
+- arm/fvp_cortex_r52
 - arm/imx7
 - arm/raspberrypi2
 - arm/realview_pbx_a9_qemu