arm/fvp: New BSP

This BSP supports the Arm Fixed Virtual Platform.  Only the Cortex-R52
processor configuration is supported by the BSP.  It should be easy to
add support for other variants if needed.

Update #4202.

16 files changed, 394 insertions, 1 deletions

diff --git a/spec/build/bsps/arm/fvp/abi.yml b/spec/build/bsps/arm/fvp/abi.yml
new file mode 100644
index 0000000000..8cfbb744be
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/abi.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=cortex-r52
+- -mthumb
+- -mfloat-abi=hard
+- -mfpu=auto
+default-by-variant: []
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build
diff --git a/spec/build/bsps/arm/fvp/bspcortexr52.yml b/spec/build/bsps/arm/fvp/bspcortexr52.yml
new file mode 100644
index 0000000000..01a3d7c3bd
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/bspcortexr52.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: fvp_cortex_r52
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: fvp
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: ../../opto2
+source: []
+type: build
diff --git a/spec/build/bsps/arm/fvp/grp.yml b/spec/build/bsps/arm/fvp/grp.yml
new file mode 100644
index 0000000000..4fc9018052
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/grp.yml
@@ -0,0 +1,58 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: ../start
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: obj
+- role: build-dependency
+  uid: objsmp
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+- role: build-dependency
+  uid: ../optgicspicount
+- role: build-dependency
+  uid: ../optgiccpuif
+- role: build-dependency
+  uid: ../optgicdist
+- role: build-dependency
+  uid: ../optgicredist
+- role: build-dependency
+  uid: ../optgtfreq
+- role: build-dependency
+  uid: ../optgtsysbase
+- role: build-dependency
+  uid: ../optgtsyscntcr
+- role: build-dependency
+  uid: ../optgtusevirt
+- role: build-dependency
+  uid: ../optstarthyp
+- role: build-dependency
+  uid: optnullsize
+- role: build-dependency
+  uid: optdrambegin
+- role: build-dependency
+  uid: optdramsize
+- role: build-dependency
+  uid: optdevbegin
+- role: build-dependency
+  uid: optdevsize
+- role: build-dependency
+  uid: linkcmds
+- role: build-dependency
+  uid: ../../bspopts
+type: build
+use-after: []
+use-before: []
diff --git a/spec/build/bsps/arm/fvp/linkcmds.yml b/spec/build/bsps/arm/fvp/linkcmds.yml
new file mode 100644
index 0000000000..1812866d2d
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/linkcmds.yml
@@ -0,0 +1,53 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+  MEMORY {
+    NULL : ORIGIN = 0x00000000, LENGTH = ${ARM_FVP_MEMORY_NULL_SIZE:#010x}
+    DRAM : ORIGIN = ${ARM_FVP_MEMORY_DRAM_BEGIN:#010x}, LENGTH = ${ARM_FVP_MEMORY_DRAM_SIZE:#010x}
+    DEVICE : ORIGIN = ${ARM_FVP_MEMORY_DEVICE_BEGIN:#010x}, LENGTH = ${ARM_FVP_MEMORY_DEVICE_SIZE:#010x}
+  }
+
+  arm_fvp_memory_null_begin = ORIGIN (NULL);
+  arm_fvp_memory_null_end = ORIGIN (NULL) + LENGTH (NULL);
+  arm_fvp_memory_null_size = LENGTH (NULL);
+
+  arm_fvp_memory_dram_begin = ORIGIN (DRAM);
+  arm_fvp_memory_dram_end = ORIGIN (DRAM) + LENGTH (DRAM);
+  arm_fvp_memory_dram_size = LENGTH (DRAM);
+
+  arm_fvp_memory_device_begin = ORIGIN (DEVICE);
+  arm_fvp_memory_device_end = ORIGIN (DEVICE) + LENGTH (DEVICE);
+  arm_fvp_memory_device_size = LENGTH (DEVICE);
+
+  REGION_ALIAS ("REGION_START", DRAM);
+  REGION_ALIAS ("REGION_VECTOR", DRAM);
+  REGION_ALIAS ("REGION_TEXT", DRAM);
+  REGION_ALIAS ("REGION_TEXT_LOAD", DRAM);
+  REGION_ALIAS ("REGION_RODATA", DRAM);
+  REGION_ALIAS ("REGION_RODATA_LOAD", DRAM);
+  REGION_ALIAS ("REGION_DATA", DRAM);
+  REGION_ALIAS ("REGION_DATA_LOAD", DRAM);
+  REGION_ALIAS ("REGION_FAST_TEXT", DRAM);
+  REGION_ALIAS ("REGION_FAST_TEXT_LOAD", DRAM);
+  REGION_ALIAS ("REGION_FAST_DATA", DRAM);
+  REGION_ALIAS ("REGION_FAST_DATA_LOAD", DRAM);
+  REGION_ALIAS ("REGION_BSS", DRAM);
+  REGION_ALIAS ("REGION_WORK", DRAM);
+  REGION_ALIAS ("REGION_STACK", DRAM);
+  REGION_ALIAS ("REGION_NOCACHE", DRAM);
+  REGION_ALIAS ("REGION_NOCACHE_LOAD", DRAM);
+
+  bsp_section_xbarrier_align = DEFINED (bsp_section_xbarrier_align) ? bsp_section_xbarrier_align : 64;
+  bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 64;
+  bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 64;
+
+  bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
+
+  INCLUDE linkcmds.armv4
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds
+type: build
diff --git a/spec/build/bsps/arm/fvp/obj.yml b/spec/build/bsps/arm/fvp/obj.yml
new file mode 100644
index 0000000000..f07899beff
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/obj.yml
@@ -0,0 +1,44 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/arm/fvp/include/bsp.h
+  - bsps/arm/fvp/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/arm/fvp/include/bsp/irq.h
+- destination: ${BSP_INCLUDEDIR}/dev/clock
+  source:
+  - bsps/include/dev/clock/arm-generic-timer.h
+links: []
+source:
+- bsps/arm/fvp/console/console.c
+- bsps/arm/fvp/console/printk-support.c
+- bsps/arm/fvp/start/bspreset.c
+- bsps/arm/fvp/start/bspstart.c
+- bsps/arm/fvp/start/bspstarthooks.c
+- bsps/arm/fvp/start/pmsa-sections.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cache/cache-v7ar-disable-data.S
+- bsps/arm/shared/clock/arm-generic-timer-aarch32.c
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/btimer/btimer-cpucounter.c
+- bsps/shared/dev/clock/arm-generic-timer.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/irq/arm-gicv3.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build
diff --git a/spec/build/bsps/arm/fvp/objsmp.yml b/spec/build/bsps/arm/fvp/objsmp.yml
new file mode 100644
index 0000000000..b0e58c64d5
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/objsmp.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_SMP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/fvp/start/bspsmp.c
+- bsps/arm/shared/start/arm-a9mpcore-smp.c
+type: build
diff --git a/spec/build/bsps/arm/fvp/optdevbegin.yml b/spec/build/bsps/arm/fvp/optdevbegin.yml
new file mode 100644
index 0000000000..d7522d0fd7
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/optdevbegin.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- assert-aligned: 1048576
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 436207616
+default-by-variant:
+- value: 2583691264
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the begin address of the device area.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_FVP_MEMORY_DEVICE_BEGIN
+type: build
diff --git a/spec/build/bsps/arm/fvp/optdevsize.yml b/spec/build/bsps/arm/fvp/optdevsize.yml
new file mode 100644
index 0000000000..ca6468510c
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/optdevsize.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 354418688
+default-by-variant: []
+description: |
+  Defines the size in bytes of the device area.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_FVP_MEMORY_DEVICE_SIZE
+type: build
diff --git a/spec/build/bsps/arm/fvp/optdrambegin.yml b/spec/build/bsps/arm/fvp/optdrambegin.yml
new file mode 100644
index 0000000000..7a44b2086f
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/optdrambegin.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 2147483648
+default-by-variant:
+- value: 1024
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the begin address of the DRAM.  The begin address must take the size
+  of the NULL pointer protection area into account (ARM_FVP_MEMORY_NULL_SIZE).
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_FVP_MEMORY_DRAM_BEGIN
+type: build
diff --git a/spec/build/bsps/arm/fvp/optdramsize.yml b/spec/build/bsps/arm/fvp/optdramsize.yml
new file mode 100644
index 0000000000..9ae2a8afe8
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/optdramsize.yml
@@ -0,0 +1,23 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 33554432
+default-by-variant:
+- value: 33553408
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the size in bytes of the DRAM.  Increasing the size may increase the
+  startup time of the FVP.  The size must take the size of the NULL pointer
+  protection area into account (ARM_FVP_MEMORY_NULL_SIZE).
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_FVP_MEMORY_DRAM_SIZE
+type: build
diff --git a/spec/build/bsps/arm/fvp/optnullsize.yml b/spec/build/bsps/arm/fvp/optnullsize.yml
new file mode 100644
index 0000000000..3d6b60b7eb
--- /dev/null
+++ b/spec/build/bsps/arm/fvp/optnullsize.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 1048576
+default-by-variant:
+- value: 1024
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the size in bytes of the NULL pointer protection area.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ARM_FVP_MEMORY_NULL_SIZE
+type: build
diff --git a/spec/build/bsps/arm/optgiccpuif.yml b/spec/build/bsps/arm/optgiccpuif.yml
new file mode 100644
index 0000000000..4929f1bcf5
--- /dev/null
+++ b/spec/build/bsps/arm/optgiccpuif.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0x2c000000
+default-by-variant:
+- value: 0xac000000
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the base address of the GIC CPU Interface.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_ARM_GIC_CPUIF_BASE
+type: build
diff --git a/spec/build/bsps/arm/optgicdist.yml b/spec/build/bsps/arm/optgicdist.yml
new file mode 100644
index 0000000000..710d3b13db
--- /dev/null
+++ b/spec/build/bsps/arm/optgicdist.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0x2f000000
+default-by-variant:
+- value: 0xaf000000
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the base address of the GIC Distributor.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_ARM_GIC_DIST_BASE
+type: build
diff --git a/spec/build/bsps/arm/optgicredist.yml b/spec/build/bsps/arm/optgicredist.yml
new file mode 100644
index 0000000000..8d15b1ace5
--- /dev/null
+++ b/spec/build/bsps/arm/optgicredist.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0x2f100000
+default-by-variant:
+- value: 0xaf100000
+  variants:
+  - arm/fvp_cortex_r52
+description: |
+  Defines the base address of the GIC Redistributor.
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_ARM_GIC_REDIST_BASE
+type: build
diff --git a/spec/build/bsps/arm/optgicspicount.yml b/spec/build/bsps/arm/optgicspicount.yml
new file mode 100644
index 0000000000..cec05f36d7
--- /dev/null
+++ b/spec/build/bsps/arm/optgicspicount.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 64
+default-by-variant: []
+description: |
+  Defines the count of Shared Peripheral Interrupts (SPIs) supported by the
+  interrupt controller.
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_ARM_SHARED_PERIPHERAL_INTERRUPT_COUNT
+type: build
diff --git a/spec/build/bsps/arm/optgtfreq.yml b/spec/build/bsps/arm/optgtfreq.yml
index adfacfaed2..71d356428a 100644
--- a/spec/build/bsps/arm/optgtfreq.yml
+++ b/spec/build/bsps/arm/optgtfreq.yml
@@ -6,7 +6,10 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: null
-default-by-variant: []
+default-by-variant:
+- value: 100000000
+  variants:
+  - arm/fvp_cortex_r52
 description: |
   Defines the frequency in Hz of the ARM Generic Timer.
 format: '{}'