diff options
| author | Joel Sherrill <joel@rtems.org> | 2018-03-12 14:53:09 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2018-03-13 09:55:23 -0500 |
| commit | 0a7a30d19d7d2e3067fc7d7be0d54730b8275f2f (patch) | |
| tree | bdb81bd29cb7ad96d43897ac126eae39e49a45a2 /cpukit/score/cpu/powerpc/include/rtems/score/cpu.h | |
| parent | Add ARM Paravirtualization support (diff) | |
| download | rtems-0a7a30d19d7d2e3067fc7d7be0d54730b8275f2f.tar.bz2 | |
Add PowerPC paravirtualization support
Cannot read or write MSR when executing in user mode. This
is used when RTEMS_PARAVIRT is defined.
Provide alternate methods to disable/enable interrupts
Closes #3306.
Diffstat (limited to 'cpukit/score/cpu/powerpc/include/rtems/score/cpu.h')
| -rw-r--r-- | cpukit/score/cpu/powerpc/include/rtems/score/cpu.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h index 7b6948a1d2..02560695bd 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h @@ -36,6 +36,9 @@ #define _RTEMS_SCORE_CPU_H #include <rtems/score/basedefs.h> +#if defined(RTEMS_PARAVIRT) +#include <rtems/score/paravirt.h> +#endif #include <rtems/score/powerpc.h> #include <rtems/powerpc/registers.h> @@ -654,6 +657,8 @@ RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level ) return ( level & MSR_EE ) != 0; } +#if !defined(PPC_DISABLE_INLINE_ISR_DISABLE_ENABLE) + static inline uint32_t _CPU_ISR_Get_level( void ) { register unsigned int msr; @@ -674,6 +679,13 @@ static inline void _CPU_ISR_Set_level( uint32_t level ) } _CPU_MSR_SET(msr); } +#else +/* disable, enable, etc. are in registers.h */ +uint32_t ppc_get_interrupt_level( void ); +void ppc_set_interrupt_level( uint32_t level ); +#define _CPU_ISR_Get_level( _new_level ) ppc_get_interrupt_level() +#define _CPU_ISR_Set_level( _new_level ) ppc_set_interrupt_level(_new_level) +#endif #endif /* ASM */ |